riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-10-16	RISC-V: Include more registers in SIBCALL_REGS.	Andrew Burgess	2	-4/+4
2019-09-18	RISC-V: Fix more splitters accidentally calling gen_reg_rtx.	Jim Wilson	3	-23/+33
2019-09-10	Add call_used_or_fixed_reg_p	Richard Sandiford	1	-5/+6
2019-09-06	RISC-V: Re-enable -msave-restore for shared libraries.	Jim Wilson	1	-10/+0
2019-09-05	RISC-V: Fix bad insn splits with paradoxical subregs.	Jakub Jelinek	1	-9/+21
2019-08-30	RISC-V: Disable -msave-restore for shared libraries.	Jim Wilson	1	-0/+10
2019-08-20	Use function_arg_info for TARGET_FUNCTION_ARG_ADVANCE	Richard Sandiford	1	-5/+4
2019-08-20	Use function_arg_info for TARGET_FUNCTION_(INCOMING_)ARG	Richard Sandiford	1	-4/+3
2019-08-20	Use function_arg_info for TARGET_SETUP_INCOMING_ARGS	Richard Sandiford	1	-4/+5
2019-08-20	Use function_arg_info for TARGET_PASS_BY_REFERENCE	Richard Sandiford	1	-5/+5
2019-08-20	Use function_arg_info for TARGET_ARG_PARTIAL_BYTES	Richard Sandiford	1	-2/+3
2019-08-13	Use checking forms of DECL_FUNCTION_CODE (PR 91421)	Richard Sandiford	1	-1/+1
2019-08-08	RISC-V: Fix C ABI for flattened struct with 0-length bitfield.	Jim Wilson	1	-16/+76
2019-08-07	RISC-V: Handle g extension in multilib-generator	Kito Cheng	1	-3/+3
2019-08-06	RISC-V: Handle extensions combination correctly in multilib-generator.	Kito Cheng	1	-0/+37
2019-08-05	RISC-V: Promote type correctly for libcalls	Kito Cheng	1	-1/+27
2019-07-22	RISC-V: Add -malign-data= option.	Ilia Diachkov	4	-7/+32
2019-07-08	RISC-V: Fix splitter for 32-bit AND on 64-bit target.	Jim Wilson	1	-2/+3
2019-07-08	[riscv] Fix ambiguous .md attribute uses	Richard Sandiford	2	-5/+5
2019-06-27	builtins.c (get_memory_rtx): Fix comment.	Aaron Sawdey	3	-6/+6
2019-06-06	RISC-V: Move STARTFILE_PREFIX_SPEC into target OS files.	Jim Wilson	3	-6/+12
2019-05-16	gcc: move assemble_start_function / assemble_end_function to output_mi_thunk	Max Filippov	1	-0/+3
2019-04-30	RISC-V: Short-forward-branch opt for SiFive 7 series cores.	Andrew Waterman	7	-18/+84
2019-04-26	RISC-V: Promode modes of constant loads for store insns.	Jim Wilson	3	-9/+38
2019-04-09	re PR translation/90011 (trailing space in diagnostic)	Jakub Jelinek	1	-1/+1
2019-04-09	re PR target/90015 (riscv: typo "intterupt" in diagnostic)	Jakub Jelinek	1	-2/+2
2019-03-26	RISC-V: Add sifive-7 pipeline description.	Andrew Waterman	6	-20/+294
2019-03-19	RISC-V: Fix %lo overflow with BLKmode references.	Jim Wilson	1	-6/+37
2019-03-18	gcc/riscv: Correctly ignore empty C++ structs when flattening for ABI	Andrew Burgess	1	-3/+5
2019-03-11	Wrap option names in gcc internal messages with %< and %>.	Martin Liska	1	-7/+7
2019-03-01	RISC-V: Generalize -march support, add ELF attribute support.	Kito Cheng	3	-0/+36
2019-01-01	Update copyright years.	Jakub Jelinek	23	-23/+23
2018-11-27	riscv (riscv_block_mvoe_straight): Use RETURN_BEGIN in call to move_by_pieces.	Jeff Law	1	-1/+1
2018-11-17	RISC-V: Fix epilogue unwind info with fp and single sp adjust.	Jim Wilson	1	-1/+22
2018-10-28	Add D front-end, libphobos library, and D2 testsuite.	Iain Buclaw	4	-0/+50
2018-10-05	RISC-V: Fix -fsignaling-nans for glibc testsuite.	Andrew Waterman	1	-6/+28
2018-10-03	RISC-V: Add macro for ilp32e ABI. Cleanup white space.	Jim Wilson	1	-12/+15
2018-09-26	RISC-V: Add missing negate patterns.	Jim Wilson	1	-3/+38
2018-09-26	RISC-V: Delete obsolete MIPS comment.	Jim Wilson	1	-2/+1
2018-09-25	RISC-V: Fix weak symbols with medany and explicit relocs.	Jim Wilson	1	-0/+5
2018-09-24	RISC-V: Fix problems with ilp32e ABI support.	Jim Wilson	1	-3/+4
2018-08-28	Rewrite pic.md to improve medany and pic code size.	Jim Wilson	3	-46/+91
2018-07-14	RISC-V: Fix nested function trampolines.	Jim Wilson	1	-0/+2
2018-07-12	RISC-V: Error if function declared with different interrupt modes.	Kito Cheng	1	-18/+64
2018-07-07	RISC-V: Finish Ada port.	Jim Wilson	1	-0/+4
2018-07-05	Replace NO_IMPLICIT_EXTERN_C with SYSTEM_IMPLICIT_EXTERN_C.	Nathan Sidwell	1	-2/+0
2018-07-02	RISC-V: Fix interrupt support for -g.	Jim Wilson	2	-6/+9
2018-06-30	RISC-V: Add patterns to convert AND mask to two shifts.	Jim Wilson	2	-0/+52
2018-06-15	RISC-V: Add custom RTEMS multilibs	Sebastian Huber	1	-0/+25
2018-06-06	RISC-V: Add interrupt attribute modes.	Jim Wilson	2	-3/+91