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path: root/gcc/config/riscv/sync.md
AgeCommit message (Expand)AuthorFilesLines
2024-01-03Update copyright years.Jakub Jelinek1-1/+1
2023-11-01RISC-V: Use riscv_subword_address for atomic_test_and_setPatrick O'Neill1-24/+17
2023-10-31RISC-V: Let non-atomic targets use optimized amo loads/storesPatrick O'Neill1-2/+2
2023-08-25RISC-V: Add Types to Un-Typed Sync Instructions:Edwin Lu1-5/+9
2023-08-10RISC-V: Add Ztso atomic mappingsPatrick O'Neill1-72/+39
2023-05-03riscv: fix error: control reaches end of non-void functionMartin Liska1-0/+2
2023-05-02RISC-V: Weaken atomic loadsPatrick O'Neill1-2/+26
2023-05-02RISC-V: Weaken mem_thread_fencePatrick O'Neill1-3/+13
2023-05-02RISC-V: Weaken LR/SC pairsPatrick O'Neill1-47/+67
2023-05-02RISC-V: Eliminate AMO op fencesPatrick O'Neill1-6/+6
2023-05-02RISC-V: Strengthen atomic storesPatrick O'Neill1-3/+18
2023-05-02RISC-V: Enforce atomic compare_exchange SEQ_CSTPatrick O'Neill1-2/+9
2023-05-02RISC-V: Enforce subword atomic LR/SC SEQ_CSTPatrick O'Neill1-4/+4
2023-04-26RISC-V: Fix sync.md and riscv.cc whitespace errorsPatrick O'Neill1-8/+8
2023-04-26RISCV: Inline subword atomic opsPatrick O'Neill1-0/+301
2023-01-16Update copyright years.Jakub Jelinek1-1/+1
2022-10-21RISC-V: Add type attribute for atomic instructions.Monk Chiang1-5/+10
2022-08-24[RISCV] Move iterators from sync.md to iterators.mdAndrew Pinski1-4/+0
2022-01-03Update copyright years.Jakub Jelinek1-1/+1
2021-01-04Update copyright years.Jakub Jelinek1-1/+1
2020-01-01Update copyright years.Jakub Jelinek1-1/+1
2019-01-01Update copyright years.Jakub Jelinek1-1/+1
2018-04-02RISC-V: Fix for combine bug with shift and AND operations.Jim Wilson1-2/+3
2018-01-03Update copyright years.Jakub Jelinek1-1/+1
2017-03-20Use more conservative fences on RISC-VPalmer Dabbelt1-1/+1
2017-02-06RISC-V Port: gccPalmer Dabbelt1-0/+194