riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-04-30	This is almost exclusively Jivan's work. His original post:	Jivan Hakobyan	1	-1/+1
2024-03-20	RISC-V: Introduce option -mrvv-max-lmul for RVV autovec	demin.han	1	-1/+1
2024-03-07	RISC-V: Refactor expand_vec_cmp [NFC]	demin.han	1	-30/+14
2024-03-01	RISC-V: Introduce gcc option mrvv-vector-bits for RVV	Pan Li	1	-8/+8
2024-02-23	RISC-V: Fix vec_init for simple sequences [PR114028].	Robin Dapp	1	-1/+24
2024-02-03	RISC-V: Expand VLMAX scalar move in reduction	Juzhe-Zhong	1	-5/+7
2024-01-22	RISC-V: Lower vmv.v.x (avl = 1) into vmv.s.x	Juzhe-Zhong	1	-0/+12
2024-01-18	RISC-V: Handle differences between XTheadvector and Vector	Jun Sha (Joshua)	1	-1/+1
2024-01-10	RISC-V: Refine unsigned avg_floor/avg_ceil	Juzhe-Zhong	1	-0/+11
2024-01-06	RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move	Juzhe-Zhong	1	-0/+23
2024-01-05	RISC-V: Clean up unused variable [NFC]	Kito Cheng	1	-5/+0
2024-01-03	Update copyright years.	Jakub Jelinek	1	-1/+1
2024-01-02	RISC-V: Add simplification of dummy len and dummy mask COND_LEN_xxx pattern	Juzhe-Zhong	1	-3/+8
2023-12-29	RISC-V: Disallow transformation into VLMAX AVL for cond_len_xxx when length i...	Juzhe-Zhong	1	-6/+15
2023-12-21	RISC-V: Optimize SELECT_VL codegen when length is known as smaller than VF	Juzhe-Zhong	1	-0/+10
2023-12-20	RISC-V: Bugfix for the const vector in single steps	Pan Li	1	-16/+95
2023-12-19	RISC-V: Refine some codes of expand_const_vector [NFC]	Juzhe-Zhong	1	-3/+3
2023-12-18	RISC-V: Bugfix for the RVV const vector	Pan Li	1	-1/+1
2023-12-15	RISC-V: Fix vmerge optimization bug in vec_perm vectorization	Juzhe-Zhong	1	-8/+51
2023-12-14	expmed: Use GET_MODE_PRECISION and expander's output mode.	Robin Dapp	1	-6/+8
2023-12-12	RISC-V: Move RVV POLY VALUE estimation from riscv.cc to riscv-v.cc[NFC]	Juzhe-Zhong	1	-0/+47
2023-12-11	RISC-V: Robostify shuffle index used by vrgather and fix regression	Juzhe-Zhong	1	-32/+48
2023-12-11	RISC-V: Recognize stepped series in expand_vec_perm_const.	Robin Dapp	1	-2/+64
2023-12-08	RISC-V: Support interleave vector with different step sequence	Juzhe-Zhong	1	-11/+137
2023-12-06	RISC-V: Block VLSmodes according to TARGET_MAX_LMUL and BITS_PER_RISCV_VECTOR	Juzhe-Zhong	1	-1/+15
2023-12-05	RISC-V: FAIL:g++.dg/torture/vshuf-v[2\|4]di.C -Os (execution test) on RV32	xuli	1	-1/+6
2023-12-05	RISC-V: Add blocker for gather/scatter auto-vectorization	Juzhe-Zhong	1	-0/+18
2023-11-28	RISC-V: Disallow poly (1,1) VLA SLP interleave vectorization	Juzhe-Zhong	1	-0/+9
2023-11-27	RISC-V: Remove incorrect function gate gather_scatter_valid_offset_mode_p	Juzhe-Zhong	1	-16/+1
2023-11-24	RISC-V: Fix inconsistency among all vectorization hooks	Juzhe-Zhong	1	-14/+5
2023-11-24	RISC-V: Optimize a special case of VLA SLP	Juzhe-Zhong	1	-0/+38
2023-11-24	RISC-V: Disable BSWAP optimization for NUNITS < 4	Juzhe-Zhong	1	-0/+5
2023-11-23	RISC-V: Add wrapper for emit vec_extract[NFC]	Juzhe-Zhong	1	-0/+22
2023-11-23	RISC-V: Refine some codes of riscv-v.cc[NFC]	Juzhe-Zhong	1	-36/+18
2023-11-22	RISC-V: Fix incorrect use of vcompress in permutation auto-vectorization	Juzhe-Zhong	1	-7/+8
2023-11-22	RISC-V: Fix permutation indice mode bug	Juzhe-Zhong	1	-8/+23
2023-11-20	RISC-V: Disallow 64-bit indexed loads and stores for rv32gcv.	Robin Dapp	1	-1/+8
2023-11-20	RISC-V: Optimize constant AVL for LRA pattern	Juzhe-Zhong	1	-3/+17
2023-11-19	RISC-V: Fix bug of tuple move splitter	Juzhe-Zhong	1	-0/+4
2023-11-15	RISC-V: Support trailing vec_init optimization	Juzhe-Zhong	1	-4/+48
2023-11-15	RISC-V: Refine the mask generation for vec_init case 2	Pan Li	1	-12/+42
2023-11-13	RISC-V: Optimize combine sequence by merge approach	Juzhe-Zhong	1	-1/+88
2023-11-13	RISC-V: Support FP l/ll round and rint HF mode autovec	Pan Li	1	-14/+37
2023-11-10	RISC-V: Add combine optimization by slideup for vec_init vectorization	Juzhe-Zhong	1	-0/+53
2023-11-10	Revert "RISC-V: Support vec_init for trailing same element"	Pan Li	1	-43/+0
2023-11-10	RISC-V: Support vec_init for trailing same element	Pan Li	1	-0/+43
2023-11-08	RISC-V: Support FP floor to i/l/ll diff size autovec	Pan Li	1	-5/+3
2023-11-07	RISC-V: Support FP ceil to i/l/ll diff size autovec	Pan Li	1	-5/+3
2023-11-06	RISC-V: Support FP round to i/l/ll diff size autovec	Pan Li	1	-5/+3
2023-11-06	RISC-V: Early expand DImode vec_duplicate in RV32 system	Juzhe-Zhong	1	-0/+20