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Age
Commit message (
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Author
Files
Lines
2024-01-18
RISC-V: Handle differences between XTheadvector and Vector
Jun Sha (Joshua)
1
-1
/
+2
2024-01-18
RISC-V: Introduce XTheadVector as a subset of V1.0.0
Jun Sha (Joshua)
1
-2
/
+6
2024-01-03
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2023-12-20
RISC-V: Support -mcmodel=large.
Kuan-Lin Chen
1
-0
/
+4
2023-11-27
RISC-V: Initial RV64E and LP64E support
Tsukasa OI
1
-1
/
+2
2023-11-16
RISC-V: Change unaligned fast/slow/avoid macros to misaligned [PR111557]
Edwin Lu
1
-3
/
+3
2023-11-08
RISC-V: Eliminate unused parameter warning.
xuli
1
-1
/
+1
2023-11-06
RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic
xuli
1
-1
/
+35
2023-08-29
RISC-V: generate builtin macro for compilation with strict alignment
Edwin Lu
1
-0
/
+7
2023-08-14
RISC-V: Enable compressible features when use ZC* extensions.
Jiawei
1
-1
/
+1
2023-03-28
RISC-V: Define __riscv_v_intrinsic [PR109312]
Kito Cheng
1
-4
/
+14
2023-03-05
RISC-V: Add RVV misc intrinsic support
Ju-Zhe Zhong
1
-0
/
+20
2023-01-16
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2022-10-27
RISC-V: Target support for z*inx extension.
Jiawei
1
-1
/
+1
2022-10-10
RISC-V: Add newline to the end of file [NFC]
Kito Cheng
1
-1
/
+1
2022-10-05
RISC-V: Introduce RVV header to enable builtin types
Ju-Zhe Zhong
1
-0
/
+41
2022-10-05
RISC-V: remove deprecate pic code model macro
Vineet Gupta
1
-5
/
+0
2022-03-21
RISC-V: Implement misc macro for vector extensions.
Kito Cheng
1
-0
/
+18
2022-01-21
PR middle-end/104140: bootstrap ICE on riscv.
Roger Sayle
1
-0
/
+3
2022-01-17
Rename .c files to .cc files.
Martin Liska
1
-0
/
+136