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2018-09-22re PR target/86798 (nds32 port needs updating for CVE-2017-5753)Chung-Ju Wu1-0/+3
PR target/86798 * config/nds32/nds32.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r264503
2018-08-12[NDS32] Change return type of predicator to bool.Chung-Ju Wu2-12/+12
gcc/ * config/nds32/nds32-predicates.c (nds32_can_use_bclr_p): Change return type as bool. (nds32_can_use_bset_p): Ditto. (nds32_can_use_btgl_p): Ditto. (nds32_can_use_bitci_p): Ditto. * config/nds32/nds32-protos.h (nds32_can_use_bclr_p): Change declaration. (nds32_can_use_bset_p): Ditto. (nds32_can_use_btgl_p): Ditto. (nds32_can_use_bitci_p): Ditto. From-SVN: r263497
2018-08-12[NDS32] Add new option: -msched-prolog-epilogChung-Ju Wu2-6/+14
gcc/ * config/nds32/nds32.c (nds32_expand_prologue, nds32_expand_epilogue): Support -msched-prolog-epilog option. * config/nds32/nds32.opt (msched-prolog-epilog): New option. From-SVN: r263496
2018-08-12[NDS32] Implement more C ISR extension.Chung-Ju Wu8-35/+1092
gcc/ * config.gcc (nds32*): Add nds32_isr.h and nds32_init.inc in extra_headers. * common/config/nds32/nds32-common.c (nds32_handle_option): Handle OPT_misr_secure_ case. * config/nds32/nds32-isr.c: Implementation of backward compatibility. * config/nds32/nds32-protos.h (nds32_isr_function_critical_p): New. * config/nds32/nds32.c (nds32_attribute_table): Add critical and secure attribute. * config/nds32/nds32.h (nds32_isr_nested_type): Add NDS32_CRITICAL. (nds32_isr_info): New field security_level. (TARGET_ISR_VECTOR_SIZE_4_BYTE): New macro. * config/nds32/nds32.md (return_internal): Consider critical attribute. * config/nds32/nds32.opt (misr-secure): New option. * config/nds32/nds32_init.inc: New file. * config/nds32/nds32_isr.h: New file. libgcc/ * config/nds32/t-nds32-isr: Rearrange object dependency. * config/nds32/initfini.c: Add dwarf2 unwinding support. * config/nds32/isr-library/adj_intr_lvl.inc: Consider new extensions and registers usage. * config/nds32/isr-library/excp_isr.S: Ditto. * config/nds32/isr-library/intr_isr.S: Ditto. * config/nds32/isr-library/reset.S: Ditto. * config/nds32/isr-library/restore_all.inc: Ditto. * config/nds32/isr-library/restore_mac_regs.inc: Ditto. * config/nds32/isr-library/restore_partial.inc: Ditto. * config/nds32/isr-library/restore_usr_regs.inc: Ditto. * config/nds32/isr-library/save_all.inc: Ditto. * config/nds32/isr-library/save_mac_regs.inc: Ditto. * config/nds32/isr-library/save_partial.inc: Ditto. * config/nds32/isr-library/save_usr_regs.inc: Ditto. * config/nds32/isr-library/vec_vid*.S: Consider 4-byte vector size. From-SVN: r263493
2018-08-02nds32.c (nds32_hard_regno_mode_ok): Replace > with >=.Ilya Leoshkevich1-1/+1
* config/nds32/nds32.c (nds32_hard_regno_mode_ok): Replace > with >=. * df-problems.c (df_remove_dead_eq_notes): Replace > with >=. * dwarf2out.c (mem_loc_descriptor): Replace > with >=. * lra-constraints.c (spill_hard_reg_in_range): Replace <= with <. * lra-remat.c (call_used_input_regno_present_p): Replace <= with <. From-SVN: r263280
2018-07-17Clean up of new format of -falign-FOO.Martin Liska1-3/+6
2018-07-17 Martin Liska <mliska@suse.cz> * align.h: New file. * config/alpha/alpha.c (alpha_align_insns_1): Use align_functions directly. * config/i386/i386.c (ix86_avoid_jump_mispredicts): Use new return type align_flags of label_to_alignment. * config/m32r/m32r.h (LOOP_ALIGN): Wrap returned values into align_flags class. * config/m68k/m68k.c: Do not use removed align_labels_value and align_loops_value. * config/nds32/nds32.h (JUMP_ALIGN): Wrap result into align_flags class. (LOOP_ALIGN): Likewise. (LABEL_ALIGN): Likewise. * config/powerpcspe/powerpcspe.c (TARGET_ASM_LOOP_ALIGN_MAX_SKIP): Remove not used macro. (rs6000_loop_align): Change return type to align_flags. (rs6000_loop_align_max_skip): Remove. * config/rs6000/rs6000-protos.h (rs6000_loop_align): Change return type to align_flags. * config/rs6000/rs6000.c (TARGET_ASM_LOOP_ALIGN_MAX_SKIP): Remove not used macro. (rs6000_loop_align): Change return type to align_flags. (rs6000_loop_align_max_skip): Remove. * config/rx/rx.h (JUMP_ALIGN): Wrap integer values * config/rx/rx-protos.h (rx_align_for_label): Make it static function. * config/rx/rx.c (rx_align_for_label): Change return type to align_flags. (rx_max_skip_for_label): Remove TARGET_ASM_*_ALIGN_MAX_SKIP macro definitions. into align_flags class. (LABEL_ALIGN): Likewise. (LOOP_ALIGN): Likewise. * config/s390/s390.c (s390_label_align): Use align_flags class member. (s390_asm_output_function_label): Likewise. * config/sh/sh.c (sh_override_options_after_change): Use align_flags class directly without macros. (find_barrier): Likewise. (barrier_align): Likewise. (sh_loop_align): Likewise. * config/spu/spu.c (spu_option_override): Use align_flags_tuple::get_value instead of removed macros. (spu_sched_init): Likewise. * config/spu/spu.h (GTY): Likewise. * config/visium/visium.c (visium_option_override): Set "8" as default secondary alignment. * config/visium/visium.h (SUBALIGN_LOG): Define to 3 in order to guarantee secondary alignment of 8. * coretypes.h: Include align.h header file. * doc/tm.texi: Remove TARGET_ASM_JUMP_ALIGN_MAX_SKIP, TARGET_ASM_LOOP_ALIGN_MAX_SKIP, TARGET_ASM_LABEL_ALIGN_MAX_SKIP and TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP macros. * doc/tm.texi.in: Likewise. * final.c (struct label_alignment): Remove not used structure. (LABEL_ALIGN): Change type to align_flags. (LOOP_ALIGN): Likewise. (JUMP_ALIGN): Likewise. (default_loop_align_max_skip): Remove. (default_label_align_max_skip): Likewise. (default_jump_align_max_skip): Likewise. (default_label_align_after_barrier_max_skip): (LABEL_TO_ALIGNMENT): Change to access label_align vector. (LABEL_TO_MAX_SKIP): Remove. (label_to_alignment): Return align_flags type instead of integer. (label_to_max_skip): Remove. (align_fuzz): Use align_flags type. (compute_alignments): Use align_flags type and use align_flags::max to combine multiple alignments. (grow_label_align): Grow vec instead of C array. (update_alignments): Assign just LABEL_TO_ALIGNMENT. (shorten_branches): Use align_flags type and use align_flags::max to combine multiple alignments. (final_scan_insn_1): Remove usage of secondary alignment that comes from label alignment, but instead use proper secondary alignment which is computed in grow_label_align. * flags.h (struct align_flags_tuple): Move to align.h. (struct align_flags): Likewise. (state_align_loops): Rename to align_loops. (state_align_jumps): Rename to align_jumps. (state_align_labels): Rename to align_labels. (state_align_functions): Rename to align_functions. (align_loops_log): Remove. (align_jumps_log): Remove. (align_labels_log): Remove. (align_functions_log): Remove. (align_loops_max_skip): Remove. (align_jumps_max_skip): Remove. (align_labels_max_skip): Remove. (align_functions_max_skip): Remove. (align_loops_value): Remove. (align_jumps_value): Remove. (align_labels_value): Remove. (align_functions_value): Remove. * output.h (label_to_alignment): Change return type to align_flags. (label_to_max_skip): Remove. * target.def: Remove loop_align_max_skip, label_align_max_skip, jump_align_max_skip macros. * targhooks.h (default_loop_align_max_skip): Remove. (default_label_align_max_skip): Likewise. (default_jump_align_max_skip): Likewise. (default_label_align_after_barrier_max_skip): Remove. * toplev.c (read_log_maxskip): Use ::normalize function. (parse_N_M): Remove not used argument and also call ::normalize. (parse_alignment_opts): Do not pass unused arguments. * varasm.c (assemble_start_function): Use directly align_functions instead of removed macros. * system.h: Do not poison removed macros. 2018-07-17 Martin Liska <mliska@suse.cz> * gcc.target/powerpc/loop_align.c: Update scanned pattern. From-SVN: r262804
2018-06-18More rtx to rtx_insn * cleanupsDavid Malcolm1-2/+2
gcc/ChangeLog: * config/frv/frv-protos.h (frv_ifcvt_modify_insn): Strengthen 3rd param from rtx to rtx_insn *. * config/frv/frv.c (frv_ifcvt_add_insn): Likewise for "insn" param. (frv_ifcvt_modify_insn): Likwise. (frv_ifcvt_modify_final): Likwise for local "existing_insn", adding an as_a <rtx_insn *> cast. Likewise for local "insn". * config/mips/mips.c (r10k_insert_cache_barriers): Add an as_a <rtx_insn *> cast to local "unprotected_region" once it's been established that it's not NULL or pc_rtx. * config/nds32/nds32-relax-opt.c (nds32_group_insns): Strengthen param "sethi" from rtx to rtx_insn *. (nds32_group_float_insns): Likewise for param "insn". * config/vax/vax-protos.h (vax_output_int_add): Likewise for 1st param. (vax_output_int_subtract): Likewise. * config/vax/vax.c (vax_output_int_add): Likewise for param "insn". (vax_output_int_subtract): Likewise. * emit-rtl.c (set_insn_deleted): Likewise, removing cast. (emit_pattern_after): Likewise for param "after". (emit_insn_after): Likewise. (emit_jump_insn_after): Likewise. (emit_call_insn_after): Likewise. (emit_debug_insn_after): Likewise. (emit_pattern_before): Likewise for param "before". (emit_insn_before): Likewise. (emit_jump_insn_before): Likewise. * final.c (get_insn_template): Likewise for param "insn", removing a cast. * output.h (get_insn_template): Likewise for 2nd param. * rtl.h (emit_insn_before): Likewise. (emit_jump_insn_before): Likewise. (emit_debug_insn_before_noloc): Likewise. (emit_insn_after): Likewise. (emit_jump_insn_after): Likewise. (emit_call_insn_after): Likewise. (emit_debug_insn_after): Likewise. (set_insn_deleted): Likewise for param. From-SVN: r261715
2018-06-03[NDS32] Implement peephole2 patterns for tuning code size.Kito Cheng1-0/+136
gcc/ * config/nds32/nds32-peephole2.md: Add new patterns for code size. From-SVN: r261124
2018-06-03[NDS32] Add -march=v3j.Chung-Ju Wu4-1/+8
gcc/ * config/nds32/nds32-opts.h (nds32_arch_type): Add ARCH_V3J. * config/nds32/nds32.c (nds32_option_override): Consider ARCH_V3J. * config/nds32/nds32.h (TARGET_ISA_V3): Add ARCH_V3J checking. * config/nds32/nds32.opt (march): Add enum value Value(ARCH_V3J). From-SVN: r261123
2018-06-02[NDS32] Support Linux target for nds32.Chung-Ju Wu11-61/+317
gcc/ * config.gcc (nds32*): Use nds32-linux.opt and nds32-elf.opt. (nds32le-*-*, nds32be-*-*): Integrate checking process. (nds32*-*-*): Add glibc and uclibc conditions. * common/config/nds32/nds32-common.c (nds32_except_unwind_info): New. (TARGET_EXCEPT_UNWIND_INFO): Define. * config/nds32/elf.h: New file. * config/nds32/linux.h: New file. * config/nds32/nds32-elf.opt: New file. * config/nds32/nds32-linux.opt: New file. * config/nds32/nds32-fp-as-gp.c (pass_nds32_fp_as_gp::gate): Consider TARGET_LINUX_ABI. * config/nds32/nds32.c (nds32_conditional_register_usage): Consider TARGET_LINUX_ABI. (nds32_asm_file_end): Ditto. (nds32_print_operand): Ditto. (nds32_insert_attributes): Ditto. (nds32_init_libfuncs): New function. (TARGET_HAVE_TLS): Define. (TARGET_INIT_LIBFUNCS): Define. * config/nds32/nds32.h (TARGET_DEFAULT_RELAX): Apply different relax spec content. (TARGET_ELF): Apply different mcmodel setting. (LINK_SPEC, LIB_SPEC, STARTFILE_SPEC, ENDFILE_SPEC): The content has been migrated into elf.h and linux.h files. * config/nds32/nds32.md (add_pc): Consider TARGET_LINUX_ABI. * config/nds32/nds32.opt (mvh): Consider TARGET_LINUX_ABI. (mcmodel): The content has been migrated into nds32-elf.opt and nds32-linux.opt files. * config/nds32/t-elf: New file. * config/nds32/t-linux: New file. libgcc/ * config.host (nds32*-linux*): New. * config/nds32/linux-atomic.c: New file. * config/nds32/linux-unwind.h: New file. Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com> From-SVN: r261116
2018-06-02[NDS32] Implement fp-as-gp optimization.Chung-Ju Wu6-54/+340
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add UNSPEC_VOLATILE_OMIT_FP_BEGIN and UNSPEC_VOLATILE_OMIT_FP_END. * config/nds32/nds32-fp-as-gp.c: New implementation of fp_as_gp optimization. * config/nds32/nds32-protos.h (nds32_naked_function_p): Declare. (make_pass_nds32_fp_as_gp): Declare. * config/nds32/nds32.c (nds32_register_passes): Add fp_as_gp as one optmization pass. (nds32_asm_function_end_prologue): Remove unused asm output. (nds32_asm_function_begin_epilogue): Remove unused asm output. (nds32_asm_file_start): Output necessary fp_as_gp information. (nds32_option_override): Adjust register usage. (nds32_expand_prologue): Consider fp_as_gp situation. (nds32_expand_prologue_v3push): Consider fp_as_gp situation. * config/nds32/nds32.md (prologue): Check fp_as_gp_p and naked_p. (epilogue): Ditto. (return): Ditto. (simple_return): Ditto. (omit_fp_begin): Output special directive for fp_as_gp. (omit_fp_end): Output special directive for fp_as_gp. * config/nds32/nds32.opt (mfp-as-gp, mno-fp-as-gp, mforce-fp-as-gp, mforbid-fp-as-gp): New options. Co-Authored-By: Shiva Chen <shiva0217@gmail.com> From-SVN: r261115
2018-05-27[NDS32] Optimize movmem and setmem operations.Monk Chiang3-34/+186
gcc/ * config/nds32/nds32-intrinsic.md (unaligned_storedi): Modify patterns implementation. (unaligned_store_dw): Ditto. * config/nds32/nds32-memory-manipulation.c (nds32_expand_movmemsi_loop_known_size): Refactoring implementation. (nds32_gen_dup_4_byte_to_word_value): Rename to ... (nds32_gen_dup_4_byte_to_word_value_aux): ... this. (emit_setmem_word_loop): Rename to ... (emit_setmem_doubleword_loop): ... this. (nds32_gen_dup_4_byte_to_word_value): New function. (nds32_gen_dup_8_byte_to_double_word_value): New function. (nds32_expand_setmem_loop): Refine implementation. (nds32_expand_setmem_loop_v3m): Ditto. * config/nds32/nds32-multiple.md (unaligned_store_update_base_dw): New pattern. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r260805
2018-05-27[NDS32] Implement bswapsi2 and bswaphi2 patterns.Chung-Ju Wu1-0/+20
gcc/ * config/nds32/nds32.md (bswapsi2, bswaphi2): New patterns. From-SVN: r260804
2018-05-27[NDS32] new attribute no_prologue and new option -mret-in-naked-func.Chung-Ju Wu3-8/+66
gcc/ * config/nds32/nds32.c (nds32_attribute_table): Add "no_prologue". (nds32_init_machine_status): Initialize machine->attr_naked_p and machine->attr_no_prologue_p. (nds32_compute_stack_frame): Check "naked" and "no_prologue" attributes. (nds32_naked_function_p): Handle "naked" and "no_prologue" attributes. (nds32_expand_epilogue): Consider attr_naked_p. (nds32_expand_epilogue_v3pop): Likewise. (nds32_can_use_return_insn): Likewise. * config/nds32/nds32.h (machine_function): Add attr_naked_p and attr_no_prologue_p fields. * config/nds32/nds32.opt (mret-in-naked-func): New option. From-SVN: r260803
2018-05-20[NDS32] Set call address constraint.Chung-Ju Wu2-4/+9
gcc/ * config/nds32/constraints.md (S): New constraint. * config/nds32/nds32.md (call_internal): Use constraint S. (call_value_internal): Likewise. (sibcall_internal): Likewise. (sibcall_value_internal): Likewise. From-SVN: r260422
2018-05-20[NDS32] Adjust register move cost for graywolf cpu.Kito Cheng1-2/+22
gcc/ * config/nds32/nds32.c (nds32_register_move_cost): Take garywolf cpu into consideration. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r260412
2018-05-20[NDS32] Rewrite cost model.Kito Cheng3-67/+543
gcc/ * config/nds32/nds32-cost.c (rtx_cost_model_t): New structure. (insn_size_16bit, insn_size_32bit): New variables for cost evaluation. (nds32_rtx_costs_impl): Simplify. (nds32_address_cost_impl): Simplify. (nds32_init_rtx_costs): New function. (nds32_rtx_costs_speed_prefer): Likewise. (nds32_rtx_costs_size_prefer): Likewise. (nds32_address_cost_speed_prefer): Likewise. (nds32_address_cost_speed_fwprop): Likewise. (nds32_address_cost_size_prefer): Likewise. * config/nds32/nds32-protos.h (nds32_init_rtx_costs): Declare. * config/nds32/nds32.c (nds32_option_override): Use nds32_init_rtx_costs function. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r260411
2018-05-20[NDS32] Print pipeline model in asm header.Chung-Ju Wu2-0/+54
gcc/ * config/nds32/nds32.c (nds32_asm_file_start): Output pipeline model. * config/nds32/nds32.h (TARGET_PIPELINE_N7): Define. (TARGET_PIPELINE_N8): Likewise. (TARGET_PIPELINE_N10): Likewise. (TARGET_PIPELINE_N13): Likewise. (TARGET_PIPELINE_GRAYWOLF): Likewise. From-SVN: r260409
2018-05-19[NDS32] Update copyright year in nds32-fpu.md.Monk Chiang1-1/+1
gcc/ * config/nds32/nds32-fpu.md: Update copyright year. From-SVN: r260402
2018-05-19[NDS32] Adjust ASM spec.Chung-Ju Wu1-1/+6
gcc/ * config/nds32/nds32.h (ASM_SPEC): Adjust spec rule. From-SVN: r260401
2018-05-19[NDS32] New option -minline-asm-r15.Chung-Ju Wu2-2/+9
gcc/ * config/nds32/nds32.c (nds32_md_asm_adjust): Consider flag_inline_asm_r15 variable. * config/nds32/nds32.opt (minline-asm-r15): New option. From-SVN: r260400
2018-05-19[NDS32] Add abssi2 pattern.Chung-Ju Wu1-0/+14
gcc/ * common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Add MASK_HW_ABS. * config/nds32/nds32.md (abssi2): New pattern. From-SVN: r260398
2018-05-19[NDS32] Refine functions that deal with lwm and smw operations.Chung-Ju Wu2-23/+72
gcc/ * config/nds32/nds32-md-auxiliary.c (nds32_valid_smw_lwm_base_p): Refine. (nds32_output_smw_single_word): Refine. (nds32_output_smw_double_word): New. * config/nds32/nds32-protos.h (nds32_output_smw_double_word): New. From-SVN: r260396
2018-05-19[NDS32] Refine nds32-md-auxiliary.c.Chung-Ju Wu1-18/+8
gcc/ * config/nds32/nds32-md-auxiliary.c (nds32_output_stack_push): Refine. (nds32_output_stack_pop): Refine. (nds32_expand_unaligned_load): Refine. (nds32_expand_unaligned_store): Refine. From-SVN: r260394
2018-05-19[NDS32] Support PIC and TLS.Kuan-Lin Chen11-137/+1036
gcc/ * config/nds32/constants.md: Add TP_REGNUM constant. (unspec_element): Add UNSPEC_GOTINIT, UNSPEC_GOT, UNSPEC_GOTOFF, UNSPEC_PLT, UNSPEC_TLSGD, UNSPEC_TLSLD, UNSPEC_TLSIE, UNSPEC_TLSLE and UNSPEC_ADD32. * config/nds32/nds32-doubleword.md: Consider flag_pic. * config/nds32/nds32-dspext.md (mov<mode>): Expand TLS and PIC cases. * config/nds32/nds32-predicates.c (nds32_const_unspec_p): New. * config/nds32/nds32-md-auxiliary.c: Implementation that support TLS and PIC code generation. * config/nds32/nds32-protos.h: Declarations that support TLS and PIC code generation. * config/nds32/nds32-relax-opt.c: Consider TLS and PIC for relax optimization. * config/nds32/nds32.md: Support TLS and PIC. * config/nds32/nds32.c: Support TLS and PIC. * config/nds32/nds32.h (nds32_relax_insn_type): New enum type. * config/nds32/predicates.md (nds32_nonunspec_symbolic_operand): New predicate. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r260393
2018-05-19[NDS32] Use machine mode with E_ prefix.Chung-Ju Wu1-2/+2
gcc/ * config/nds32/nds32-predicates.c (const_vector_to_hwint): Use machine mode with E_ prefix. From-SVN: r260391
2018-05-19[NDS32] Implment indirect funciton call attribute.Kuan-Lin Chen10-25/+461
* config/nds32/constants.md (unspec_element): Add UNSPEC_ICT. * config/nds32/nds32-md-auxiliary.c (symbolic_reference_mentioned_p): New. (nds32_legitimize_ict_address): New. (nds32_expand_ict_move): New. (nds32_indirect_call_referenced_p): New. (nds32_symbol_binds_local_p): Delete. (nds32_long_call_p): Modify. * config/nds32/nds32-opts.h (nds32_ict_model_type): New enum type. * config/nds32/nds32-protos.h (symbolic_reference_mentioned_p): Declare. (nds32_legitimize_ict_address): Declare. (nds32_expand_ict_move): Declare. (nds32_indirect_call_referenced_p): Declare. * config/nds32/nds32-relax-opt.c (nds32_ict_const_p): New. (nds32_relax_group): Use nds32_ict_const_p as condition. * config/nds32/nds32.c (nds32_attribute_table): Add "indirect_call". (nds32_asm_file_start): Output ict_model directive in asm code. (nds32_legitimate_address_p): Consider indirect call. (nds32_print_operand): Consider indirect call. (nds32_print_operand_address): Consider indirect call. (nds32_insert_attributes): Handle "indirect_call" attribute. (TARGET_LEGITIMATE_ADDRESS_P): Define. (TARGET_LEGITIMATE_CONSTANT_P): Define. (TARGET_CANNOT_FORCE_CONST_MEM): Define. (TARGET_DELEGITIMIZE_ADDRESS): Define. (TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA): Define. * config/nds32/nds32.h (SYMBOLIC_CONST_P): Define. (TARGET_ICT_MODEL_SMALL): Define. (TARGET_ICT_MODEL_LARGE): Define. * config/nds32/nds32.md (movsi): Consider ict model. (call, call_value): Consider ict model. (sibcall, sibcall_value): Consider ict model. * config/nds32/nds32.opt (mict-model): New option. * config/nds32/predicates.md (nds32_symbolic_operand): Consider ict model. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r260390
2018-05-13[NDS32] Implment n15 pipeline.Kito Cheng8-7/+765
gcc/ * config.gcc (nds32*-*-*): Check that n15 is valid to --with-cpu. * config/nds32/nds32-graywolf.md: New file. * config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_GRAYWOLF. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for n15 pipeline. * config/nds32/nds32-protos.h: More declarations for n15 pipeline. * config/nds32/nds32-utils.c: More implementations for n15 pipeline. * config/nds32/nds32.md (pipeline_model): Add graywolf. * config/nds32/nds32.opt (mcpu): Support n15 pipeline cpus. * config/nds32/pipelines.md: Include n15 settings. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r260214
2018-05-13[NDS32] Implment n12/n13 pipeline.Kito Cheng7-1/+717
gcc/ * config.gcc (nds32*-*-*): Check that n12/n13 are valid to --with-cpu. * config/nds32/nds32-n13.md: New file. * config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N12 and CPU_N13. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for n12/n13 pipeline. * config/nds32/nds32-protos.h: More declarations for n12/n13 pipeline. * config/nds32/nds32.md (pipeline_model): Add n13. * config/nds32/nds32.opt (mcpu): Support n12/n13 pipeline cpus. * config/nds32/pipelines.md: Include n13 settings. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r260212
2018-05-13[NDS32] Implment n10 pipeline.Kito Cheng8-15/+764
gcc/ * config.gcc (nds32*-*-*): Check that n10/d10 are valid to --with-cpu. * config/nds32/nds32-n10.md: New file. * config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N10. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for n10 pipeline. * config/nds32/nds32-protos.h: More declarations for n10 pipeline. * config/nds32/nds32-utils.c: More implementations for n10 pipeline. * config/nds32/nds32.md (pipeline_model): Add n10. * config/nds32/nds32.opt (mcpu): Support n10 pipeline cpus. * config/nds32/pipelines.md: Include n10 settings. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r260207
2018-05-13[NDS32] Add DSP extension instructions.Monk Chiang17-35/+8113
gcc/ * config.gcc (nds32be-*-*): Handle --with-ext-dsp. * config/nds32/constants.md (unspec_element, unspec_volatile_element): Add enum values for DSP extension instructions. * config/nds32/constraints.md (Iu06, IU06, CVp5, CVs5, CVs2, CVhi): New constraints. * config/nds32/iterators.md (shifts, shiftrt, sat_plus, all_plus, sat_minus, all_minus, plus_minus, extend, sumax, sumin, sumin_max): New code iterators. (su, zs, uk, opcode, add_rsub, add_sub): New code attributes. * config/nds32/nds32-dspext.md: New file for DSP implementation. * config/nds32/nds32-intrinsic.c: Implementation of DSP extension. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32-md-auxiliary.c: Likewise. * config/nds32/nds32-memory-manipulation.c: Consider DSP extension. * config/nds32/nds32-predicates.c (const_vector_to_hwint): New. (nds32_valid_CVp5_p, nds32_valid_CVs5_p): New. (nds32_valid_CVs2_p, nds32_valid_CVhi_p): New. * config/nds32/nds32-protos.h: New declarations for DSP extension. * config/nds32/nds32-utils.c (extract_mac_non_acc_rtx): New case TYPE_DMAC in switch statement. * config/nds32/nds32.c: New checking and implementation for DSP extension instructions. * config/nds32/nds32.h: Likewise. * config/nds32/nds32.md: Likewise. * config/nds32/nds32.opt (mhw-abs, mext-dsp): New options. * config/nds32/predicates.md: Implement new predicates for DSP extension. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r260206
2018-04-25[NDS32] Fix bug in bit-instruction checking functions.Chung-Ju Wu1-3/+6
gcc/ * config/nds32/nds32-predicates.c (nds32_can_use_bclr_p): Mask with GET_MODE_MASK before any checking. (nds32_can_use_bset_p): Likewise. (nds32_can_use_btgl_p): Likewise. From-SVN: r259647
2018-04-25[NDS32] Split movdi/df if reigster number is illegal.Chung-Ju Wu1-0/+18
gcc/ * config/nds32/nds32-doubleword.md: New define_split pattern for illegal register number. From-SVN: r259646
2018-04-25[NDS32] Fix print operand for cctl register.Chung-Ju Wu1-2/+3
gcc/ * config/nds32/nds32.c (nds32_print_operand): Set op_value ealier. From-SVN: r259643
2018-04-25[NDS32] Add missing newline character into ASM_APP_ON macro.Chung-Ju Wu1-1/+1
gcc/ * config/nds32/nds32.h (ASM_APP_ON): Add missing newline character. From-SVN: r259642
2018-04-22[NDS32] Add new option -malways-save-lp.Chung-Ju Wu2-1/+6
gcc/ * config/nds32/nds32.c (nds32_compute_stack_frame): Consider flag_always_save_lp condition. * config/nds32/nds32.opt (malways-save-lp): New option. From-SVN: r259553
2018-04-22[NDS32] Implment USE_LOAD_POST_INCREMENT, USE_LOAD_POST_DECREMENT, ↵Shiva Chen3-0/+16
USE_STORE_POST_DECREMENT and USE_STORE_POST_INCREMENT. gcc/ * config/nds32/nds32-protos.h (nds32_use_load_post_increment): Declare. * config/nds32/nds32.c (nds32_use_load_post_increment): New. * config/nds32/nds32.h (USE_LOAD_POST_INCREMENT, USE_LOAD_POST_DECREMENT): Define. (USE_STORE_POST_INCREMENT, USE_STORE_POST_DECREMENT): Define. From-SVN: r259552
2018-04-22[NDS32] Remove unused function: nds32_ls_333_p().Shiva Chen2-26/+0
gcc/ * config/nds32/nds32-protos.h (nds32_ls_333_p): Remove. * config/nds32/nds32.c (nds32_ls_333_p): Remove. From-SVN: r259551
2018-04-22[NDS32] Refine CASE_VECTOR_SHORTEN_MODE to function.Shiva Chen3-3/+19
gcc/ * config/nds32/nds32-protos.h (nds32_case_vector_shorten_mode): Declare. * config/nds32/nds32.c (nds32_case_vector_shorten_mode): New function. * config/nds32/nds32.h (CASE_VECTOR_SHORTEN_MODE): Modify. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259550
2018-04-22[NDS32] Fix wrong input value of parameter from stack for variable-length ↵Chung-Ju Wu1-4/+6
function. gcc/ * config/nds32/nds32.c (nds32_compute_stack_frame): Fix wrong value. From-SVN: r259549
2018-04-22[NDS32] Implement DATA_ALIGNMENT, LOCAL_ALIGNMENT and TARGET_CONSTANT_ALIGNMENT.Chung-Ju Wu3-0/+68
gcc/ * config/nds32/nds32-protos.h (nds32_data_alignment, nds32_local_alignment): Declare. * config/nds32/nds32.c (nds32_data_alignment, nds32_constant_alignment, nds32_local_alignment): New functions. (TARGET_CONSTANT_ALIGNMENT): Define. * config/nds32/nds32.h (DATA_ALIGNMENT, LOCAL_ALIGNMENT): Define. From-SVN: r259548
2018-04-22[NDS32] Move some target hooks to the bottom of nds32.c file.Chung-Ju Wu1-6/+6
gcc/ * config/nds32/nds32.c (TARGET_HARD_REGNO_MODE_OK): Move to the bottom of file. (TARGET_MODES_TIEABLE_P): Likewise. From-SVN: r259547
2018-04-22[NDS32] Consider -Ofast and -Og in nds32_asm_file_start function.Chung-Ju Wu1-0/+4
gcc/ * config/nds32/nds32.c (nds32_asm_file_start): Display optimization level Ofast and Og. From-SVN: r259546
2018-04-22[NDS32] Add unaligned access support.Monk Chiang7-8/+113
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add enum values for unaligned access. * config/nds32/nds32-intrinsic.c: Implementation of expanding unaligned access. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32.h (nds32_builtins): Likewise. * config/nds32/nds32.opt (munaligned-access): New option. * config/nds32/nds32.c (nds32_asm_file_start): Display flag_unaligned_access status. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259545
2018-04-08[NDS32] Add intrinsic functions for interrupt control.Monk Chiang5-0/+646
gcc/ * config.gcc (nds32le-*-*, nds32be-*-*): Add nds32/nds32_intrinsic.h into tm_file. * config/nds32/constants.md (unspec_volatile_element): Add enum values for interrupt control. * config/nds32/nds32-intrinsic.c: Implementation of intrinsic functions for interrupt control. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32.h (nds32_builtins): Likewise. From-SVN: r259223
2018-04-08[NDS32] Add strict_aligned_p to machine_function and implement ↵Chung-Ju Wu2-4/+49
TARGET_EXPAND_TO_RTL_HOOK. gcc/ * config/nds32/nds32.c (nds32_init_machine_status, nds32_legitimate_index_p, nds32_legitimate_address_p): Consider strict_aligned_p field. (nds32_expand_to_rtl_hook): New function. (TARGET_EXPAND_TO_RTL_HOOK): Define. * config/nds32/nds32.h (machine_function): Add strict_aligned_p field. From-SVN: r259222
2018-04-08[NDS32] Implement n7 pipeline.Kito Cheng7-2/+442
gcc/ * config.gcc (nds32*-*-*): Check that n7 is valid to --with-cpu. * config/nds32/nds32-n7.md: New file. * config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N7. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for n7 pipeline. * config/nds32/nds32-protos.h: More declarations for n7 pipeline. * config/nds32/nds32.md (pipeline_model): Add n7. * config/nds32/nds32.opt (mcpu): Support n7 pipeline cpus. * config/nds32/pipelines.md: Include n7 settings. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259221
2018-04-08[NDS32] Implement e8 pipeline.Kito Cheng7-2/+499
gcc/ * config.gcc (nds32*-*-*): Check that e8 is valid to --with-cpu. * config/nds32/nds32-e8.md: New file. * config/nds32/nds32-opts.h (nds32-cpu_type): Add CPU_E8. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for e8 pipeline. * config/nds32/nds32-protos.h: More declarations for e8 pipeline. * config/nds32/nds32.md (pipeline_model): Add e8. * config/nds32/nds32.opt (mcpu): Support e8 pipeline cpus. * config/nds32/pipelines.md: Include e8 settings. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259220
2018-04-08[NDS32] Implement n8 pipeline.Kito Cheng8-2/+794
gcc/ * config.gcc (nds32*-*-*): Check that n6/n8/s8 are valid to --with-cpu. * config/nds32/nds32-n8.md: New file. * config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N6 and CPU_N8. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for n8 pipeline. * config/nds32/nds32-protos.h: More declarations for n8 pipeline. * config/nds32/nds32-utils.c: More implementations for n8 pipeline. * config/nds32/nds32.md (pipeline_model): Add n8. * config/nds32/nds32.opt (mcpu): Support n8 pipeline cpus. * config/nds32/pipelines.md: Include n8 settings. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259219
2018-04-08[NDS32] Implment n9 pipeline.Kito Cheng11-9/+1850
gcc/ * config.gcc (nds32*): Add nds32-utils.o into extra_objs. * config/nds32/nds32-n9-2r1w.md: New file. * config/nds32/nds32-n9-3r2w.md: New file. * config/nds32/nds32-opts.h (nds32_cpu_type, nds32_mul_type, nds32_register_ports): New or modify for cpu n9. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for n9 pipeline. * config/nds32/nds32-protos.h: More declarations for n9 pipeline. * config/nds32/nds32-utils.c: New file. * config/nds32/nds32.h (TARGET_PIPELINE_N9, TARGET_PIPELINE_SIMPLE, TARGET_MUL_SLOW): Define. * config/nds32/nds32.md (pipeline_model): New attribute. * config/nds32/nds32.opt (mcpu, mconfig-mul, mconfig-register-ports): New options that support cpu n9. * config/nds32/pipelines.md: Include n9 settings. * config/nds32/t-nds32 (nds32-utils.o): Add dependency. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259218
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