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2018-04-08[NDS32] New option -malways-align and -malign-functions.Chung-Ju Wu5-34/+87
gcc/ * config/nds32/nds32-md-auxiliary.c (output_cond_branch): Output align information if necessary. (output_cond_branch_compare_zero): Likewise. * config/nds32/nds32.c (nds32_adjust_insn_length): Consider align case. (nds32_target_alignment): Refine for alignment. * config/nds32/nds32.h (NDS32_ALIGN_P): Define. (FUNCTION_BOUNDARY): Modify. * config/nds32/nds32.md (call_internal, call_value_internal): Consider align case. * config/nds32/nds32.opt (malways-align, malign-functions): New. From-SVN: r259217
2018-04-08[NDS32] Add intrinsic functions for TLB operation and data prefech.Monk Chiang6-0/+260
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add values for TLB operation and data prefetch. * config/nds32/nds32-intrinsic.c: Implementation of intrinsic functions for TLB operation and data prefetch. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32.c (nds32_dpref_names): Likewise. (nds32_print_operand): Likewise. * config/nds32/nds32.h (nds32_builtins): Likewise. From-SVN: r259216
2018-04-07[NDS32] Support dwarf exception handling.Chung-Ju Wu6-9/+257
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add UNSPEC_VOLATILE_EH_RETURN. * config/nds32/nds32-md-auxiliary.c (nds32_output_stack_push, nds32_output_stack_pop): Support dwarf exception handling process. * config/nds32/nds32-protos.h (nds32_dynamic_chain_address): Declare. * config/nds32/nds32.c (nds32_init_machine_status): Support dwarf exception handling process. (nds32_compute_stack_frame): Likewise. (nds32_return_addr_rtx): Likewise. (nds32_initial_elimination_offset): Likewise. (nds32_expand_prologue): Likewise. (nds32_expand_epilogue): Likewise. (nds32_dynamic_chain_address): New function. * config/nds32/nds32.h (machine_function): Add fields for dwarf exception handling. (DYNAMIC_CHAIN_ADDRESS): Define. (EH_RETURN_DATA_REGNO): Define. (EH_RETURN_STACKADJ_RTX): Define. * config/nds32/nds32.md (eh_return, nds32_eh_return): Implement patterns for dwarf exception handling. From-SVN: r259210
2018-04-07[NDS32] Clean up nds32.h.Chung-Ju Wu1-59/+0
gcc/ * config/nds32/nds32.h: Clean up obsolete macros. From-SVN: r259209
2018-04-07[NDS32] Add intrinsic functions for particular instructions.Monk Chiang6-5/+789
gcc/ * config/nds32/constants.md (unspec_element, unspec_volatile_element): Add enum values for particular instructions. * config/nds32/nds32-intrinsic.c: Implementation of expanding particular intrinsic functions. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32.h (nds32_builtins): Likewise. * config/nds32/nds32.md (type): Add pbsad and pbsada. (btst, ave): New patterns for particular instructions. From-SVN: r259208
2018-04-07[NDS32] Add intrinsic functions for atomic load/store and memory sync.Monk Chiang5-0/+314
gcc/ * config/nds32/constants.md (unspec_element, unspec_volatile_element): Add enum values for atomic load/store and memory sync. * config/nds32/nds32-intrinsic.c: Implementation for atomic load/store and memory sync. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32.h (nds32_builtins): Likewise. From-SVN: r259207
2018-04-07[NDS32] Add intrinsic functions for cache control.Monk Chiang8-3/+325
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add cache control enum values. * config/nds32/nds32-intrinsic.c: Add cache control expand functions. * config/nds32/nds32-intrinsic.md: Add cache control patterns. * config/nds32/nds32.c (nds32_cctl_names): New. (nds32_print_operand): Handle cache control register names. * config/nds32/nds32.h (nds32_builtins): New enum values. * config/nds32/nds32_intrinsic.h: Add cache control enum types and macros. * config/nds32/nds32.md (type): Add mmu. * config/nds32/pipelines.md (simple_insn): Add mmu. From-SVN: r259205
2018-04-07[NDS32] Remove unused insn type: call.Chung-Ju Wu2-2/+2
gcc/ * config/nds32/nds32.md (type): Remove call. * config/nds32/pipelines.md (simple_insn): Likewise. From-SVN: r259204
2018-04-07[NDS32] Add intrinsic functions for FPU.Monk Chiang5-0/+144
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add UNSPEC_VOLATILE_FMFCSR, UNSPEC_VOLATILE_FMTCSR and UNSPEC_VOLATILE_FMFCFG. * config/nds32/nds32-intrinsic.c (bdesc_noarg): New builtin description for fmfcfg and fmfcsr. (bdesc_1arg): Add fmtcsr. (bdesc_2arg): Add fcpynss, fcpyss, fcpynsd and fcpysd. (nds32_expand_builtin_impl): Deal with FPU intrinsic functions. * config/nds32/nds32-intrinsic.md (unspec_fcpynsd, unspec_fcpysd, unspec_fcpynss, unspec_fcpysd, unspec_fcpyss, unspec_fmfcsr, unspec_fmfcfg): New patterns. * config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_FMFCFG, NDS32_BUILTIN_FMFCSR, NDS32_BUILTIN_FMTCSR, NDS32_BUILTIN_FCPYNSS, NDS32_BUILTIN_FCPYSS,NDS32_BUILTIN_FCPYNSD and NDS32_BUILTIN_FCPYSD. * config/nds32/nds32_intrinsic.h (__nds32__fcpynsd, __nds32__fcpynss, __nds32__fcpysd, __nds32__fcpyss, __nds32__fmfcsr, __nds32__fmtcsr, __nds32__fmfcfg): Define. From-SVN: r259203
2018-04-07[NDS32] Add more intrinsic register names.Monk Chiang2-3/+467
gcc/ * config/nds32/nds32.c (nds32_intrinsic_register_names): Add more intrinsic register names. * config/nds32/nds32_intrinsic.h (nds32_intrinsic_registers): Add more intrinsic register enum values and macros. From-SVN: r259202
2018-04-07[NDS32] Support [$ra + $rb << 3] form for load/store address.Chung-Ju Wu1-5/+9
gcc/ * config/nds32/nds32.c (nds32_legitimate_index_p): Modify condition for load/store addressing form. (nds32_print_operand_address): Likewise. From-SVN: r259201
2018-04-06[NDS32] Refine ADJUST_INSN_LENGTH implementation.Chung-Ju Wu2-35/+32
gcc/ * config/nds32/nds32.c (nds32_adjust_insn_length): Refine. * config/nds32/nds32.h (ADJUST_INSN_LENGTH): Change the location in file. From-SVN: r259187
2018-04-06[NDS32] Refine call and return patterns.Chung-Ju Wu3-53/+202
gcc/ * config/nds32/nds32-md-auxiliary.c (nds32_output_return, nds32_output_call, nds32_symbol_binds_local_p): New functions. * config/nds32/nds32-protos.h (nds32_output_call, nds32_output_return): Declare. * config/nds32/nds32.md: Refine all the call and return patterns. Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r259186
2018-04-06[NDS32] Refine condition of stack_push and stack_pop patterns.Chung-Ju Wu1-6/+2
gcc/ * config/nds32/nds32.md (*stack_push, *stack_pop): Use NDS32_V3PUSH_AVAILABLE_P macro. From-SVN: r259162
2018-04-06[NDS32] Add hard float support.Monk Chiang14-312/+2755
gcc/ * config.gcc (nds32*-*-*): Add v2j v3f v3s checking. (nds32*-*-*): Add float and fpu_config into supported_defaults. * common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Include TARGET_DEFAULT_FPU_ISA and TARGET_DEFAULT_FPU_FMA. * config/nds32/constants.md (unspec_element): Add UNSPEC_COPYSIGN, UNSPEC_FCPYNSD, UNSPEC_FCPYNSS, UNSPEC_FCPYSD and UNSPEC_FCPYSS. * config/nds32/constraints.md: New constraints and checking for hard float configuration. * config/nds32/iterators.md: New mode iterator and attribute for hard float configuration. * config/nds32/nds32-doubleword.md: Use hard float alternatives and patterns. * config/nds32/nds32-fpu.md: New file. * config/nds32/nds32-md-auxiliary.c: New functions and checkings to deal with hard float code generation. * config/nds32/nds32-opts.h (nds32_arch_type): Add ARCH_V3F and ARCH_V3S. (abi_type, float_reg_number): New enum type. * config/nds32/nds32-predicates.c: New predicates for hard float. * config/nds32/nds32-protos.h: Declare functions for hard float. * config/nds32/nds32.c: Implementation for hard float configuration. * config/nds32/nds32.h: Definitions for hard float configuration. * config/nds32/nds32.md: Include hard float machine description and modify patterns for hard float configuration. * config/nds32/nds32.opt: New options for hard float configuration. * config/nds32/predicates.md: New predicates for hard float configuration. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259161
2018-04-05[NDS32] Fine-tune memory address type.Shiva Chen3-6/+18
gcc/ * config/nds32/constraints.md (U33): Fine-tune checking condition. * config/nds32/nds32-md-auxiliary.c (nds32_mem_format): Ditto. * config/nds32/nds32.h (nds32_16bit_address_type): Add ADDRESS_POST_MODIFY_LO_REG_IMM3U. Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r259122
2018-04-05[NDS32] Add constraint for lwi45.fe instruction.Shiva Chen5-9/+33
gcc/ * config/nds32/constraints.md (Ufe): New memory constraint. * config/nds32/nds32-md-auxiliary.c (nds32_mem_format, nds32_output_16bit_load): Consider r8 register for lwi45.fe format. * config/nds32/nds32.c (nds32_print_operand): Output lwi45.fe operands. * config/nds32/nds32.h (nds32_16bit_address_type): Add ADDRESS_R8_IMM7U. * config/nds32/nds32.md (*mov<mode>): Adjust pattern. Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r259121
2018-04-05[NDS32] Generate alu-shift instructions only for -Os.Chung-Ju Wu1-10/+10
gcc/ * config/nds32/nds32.md: Use optimize_size in the condition for alu-shift instructions. From-SVN: r259120
2018-04-05[NDS32] Add divsi4 and udivsi4 patterns.Chung-Ju Wu1-0/+20
gcc/ * config/nds32/nds32.md (divsi4, udivsi4): New patterns. From-SVN: r259119
2018-04-05[NDS32] Refine negsi2 pattern.Chung-Ju Wu1-5/+5
gcc/ * config/nds32/nds32.md (negsi2): Refine pattern. From-SVN: r259118
2018-04-05[NDS32] Refine bit-wise operation and shift patterns.Kito Cheng6-111/+225
gcc/ * config/nds32/iterators.md (shift_rotate): New code iterator. (shift): New code attribute. * config/nds32/nds32-md-auxiliary.c (nds32_expand_constant): New. * config/nds32/nds32-protos.h (nds32_expand_constant): Declare. * config/nds32/nds32.c (nds32_print_operand): Deal with more cases. * config/nds32/nds32.md (addsi3, *add_srli): Refine implementation for bit-wise operations. (andsi3, *andsi3): Ditto. (iorsi3, *iorsi3, *or_slli, *or_srli): Ditto. (xorsi3, *xorsi3, *xor_slli, *xor_srli): Ditto. (<shift>si3, *ashlsi3, *ashrsi3, *lshrsi3, *rotrsi3): Ditto. * config/nds32/predicates.md (nds32_rimm5u_operand, nds32_and_operand, nds32_ior_operand, nds32_xor_operand): New predicates. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259117
2018-04-05[NDS32] The add and sub pattens should only accept si mode.Chung-Ju Wu1-8/+8
gcc/ * config/nds32/nds32.md (add<mode>3, sub<mode>3): Rename to ... (addsi3, subsi3): ... this. From-SVN: r259116
2018-04-05[NDS32] Fine-tune predicator for alu-shift patterns.Chung-Ju Wu1-12/+12
gcc/ * config/nds32/nds32.md (*sub_srli, *and_slli): Fine-tune predicator. From-SVN: r259115
2018-04-05[NDS32] Adjust asm patterns indention.Chung-Ju Wu1-19/+19
gcc/ * config/nds32/nds32.md: Adjust indention. From-SVN: r259114
2018-04-05[NDS32] Add new instruction attribute: feature.Kito Cheng1-16/+53
gcc/ * config/nds32/nds32.md (feature): New attribute. From-SVN: r259113
2018-04-05[NDS32] Add subtype attribute for instructions.Chung-Ju Wu1-7/+15
gcc/ * config/nds32/nds32.md (subtype): New attribute. From-SVN: r259112
2018-04-04[NDS32] Restrict mov pattern that has at least one register operand.Kito Cheng2-2/+4
gcc/ * config/nds32/nds32-doubleword.md (move_<mode>): Require resiter_operand condition. * config/nds32/nds32.md (*move<mode>): Ditto. From-SVN: r259077
2018-04-04[NDS32] Implement movmisalignsi and movmisaligndi pattern.Kito Cheng1-0/+21
gcc/ * config/nds32/nds32.md (movmisalign<mode>): New pattern. Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com> From-SVN: r259073
2018-04-04[NDS32] Merge movqi and movhi patterns.Chung-Ju Wu1-13/+12
gcc/ * config/nds32/nds32.md (movqi, movhi): Merge into mov<mode>. From-SVN: r259071
2018-04-04[NDS32] Refine movcc, cmov, cstore and cbranch patterns.Chung-Ju Wu5-918/+1228
gcc/ * config/nds32/nds32-md-auxiliary.c (nds32_inverse_cond_code, nds32_cond_code_str, output_cond_branch, output_cond_branch_compare_zero, nds32_expand_cbranch, nds32_expand_cstore, nds32_expand_movcc, nds32_output_cbranchsi4_equality_zero, nds32_output_cbranchsi4_equality_reg, nds32_output_cbranchsi4_equality_reg_or_const_int, nds32_output_cbranchsi4_greater_less_zero: New functions. * config/nds32/nds32-protos.h (nds32_expand_cbranch, nds32_expand_cstore, nds32_expand_movcc, nds32_output_cbranchsi4_equality_zero, nds32_output_cbranchsi4_equality_reg, nds32_output_cbranchsi4_equality_reg_or_const_int, nds32_output_cbranchsi4_greater_less_zero): Declare. * config/nds32/predicates.md (nds32_movecc_comparison_operator, nds32_rimm11s_operand): New predicates. * config/nds32/nds32.h (nds32_expand_result_type): New enum type. * config/nds32/nds32.md: Rewrite all the branch and conditional move patterns. Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r259070
2018-04-04[NDS32] Refine instruction type attribute.Kito Cheng3-42/+45
gcc/ * config/nds32/nds32-doubleword.md: Refine all the instruction type. * config/nds32/nds32.md: Ditto. * config/nds32/pipelines.md: Ditto. From-SVN: r259069
2018-04-04[NDS32] Change enabled attribute to yes/no instead of 1/0.Chung-Ju Wu1-11/+11
gcc/ * config/nds32/nds32.md (enabled): Use yes/no for this attribute. From-SVN: r259066
2018-04-04[NDS32] Refine implementation of sibcall patterns.Chung-Ju Wu5-57/+114
gcc/ * config/nds32/nds32-md-auxiliary.c (nds32_long_call_p): New function. * config/nds32/nds32-protos.h (nds32_long_call_p): Declare. * config/nds32/nds32.c (nds32_function_ok_for_sibcall): New function. (TARGET_FUNCTION_OK_FOR_SIBCALL): Define. * config/nds32/nds32.md (sibcall_internal): New. (sibcall_register): Remove. (sibcall_immediate): Remove. (sibcall_value_internal): New. (sibcall_value_register): Remove. (sibcall_value_immediate): Remove. * config/nds32/predicates.md (nds32_general_register_operand): New. (nds32_call_address_operand): New. Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r259065
2018-04-02[NDS32] Implement TARGET_CANONICALIZE_COMPARISON for specific cases.Chung-Ju Wu1-0/+42
gcc/ * config/nds32/nds32.c (TARGET_CANONICALIZE_COMPARISON): Define. (nds32_canonicalize_comparison): New function. From-SVN: r259004
2018-04-01[NDS32] Add relax optimization as new pass.Chung-Ju Wu8-3/+426
gcc/ * config.gcc (nds32): Add nds32-relax-opt.o into extra_objs. * config/nds32/constants.md (unspec_volatile_element): Add UNSPEC_VOLATILE_RELAX_GROUP. * config/nds32/nds32-relax-opt.c: New file. * config/nds32/nds32-predicates.c (nds32_symbol_load_store_p): New function. * config/nds32/nds32-protos.h (nds32_symbol_load_store_p): Declare function. (make_pass_nds32_relax_opt): Declare new rtl pass function. * config/nds32/nds32.c (nds32_register_pass): New function to register pass. (nds32_register_passes): New function to register passes. * config/nds32/nds32.md (relax_group): New pattern. * config/nds32/nds32.opt (mrelax-hint): New option. * config/nds32/t-nds32 (nds32-relax-opt.o): New dependency. Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> Co-Authored-By: Kuan-Lin Chen <kuanlinchentw@gmail.com> From-SVN: r258998
2018-04-01[NDS32] Correct the dependency in t-nds32.Kito Cheng1-24/+93
gcc/ * config/nds32/t-nds32: Modify files dependency. From-SVN: r258997
2018-04-01[NDS32] Implement PROFILE_HOOK.Chung-Ju Wu1-1/+9
gcc/ * config/nds32/nds32.h (FUNCTION_PROFILER): Output newline character. (PROFILE_HOOK): Define its implementation. From-SVN: r258996
2018-04-01[NDS32] Change wchar type to unsinged int.Chung-Ju Wu1-2/+2
gcc/ * config/nds32/nds32.h (WCHAR_TYPE, WCHAR_TYPE_SIZE): Use unsigned int type and 32-bit size. From-SVN: r258995
2018-03-28[NDS32] Adjust BRANCH_COST to prevent too much jump when compile with -Os.Chung-Ju Wu1-1/+1
gcc/ * config/nds32/nds32.h (BRANCH_COST): Adjust cost. From-SVN: r258921
2018-03-18[NDS32] Fix wrong MAX_REGS_PER_ADDRESS value.Chung-Ju Wu1-1/+1
gcc/ * config/nds32/nds32.h (MAX_REGS_PER_ADDRESS): Fix the value. From-SVN: r258629
2018-03-18[NDS32] Define LOGICAL_OP_NON_SHORT_CIRCUIT.Chung-Ju Wu1-0/+4
gcc/ * config/nds32/nds32.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Define. From-SVN: r258628
2018-03-18[NDS32] Define CLZ_DEFINED_VALUE_AT_ZERO.Chung-Ju Wu1-0/+5
gcc/ * config/nds32/nds32.h (CLZ_DEFINED_VALUE_AT_ZERO): Define. From-SVN: r258627
2018-03-17[NDS32] Implment ADJUST_REG_ALLOC_ORDER for performance requirement.Chung-Ju Wu3-0/+40
gcc/ * config/nds32/nds32-protos.h (nds32_adjust_reg_alloc_order): Declare. * config/nds32/nds32.c (nds32_reg_alloc_order_for_speed): New array. (nds32_adjust_reg_alloc_order): New function. * config/nds32/nds32.h (ADJUST_REG_ALLOC_ORDER): Define. Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r258621
2018-03-17[NDS32] Use HOST_WIDE_INT_PRINT_DEC instead of %ld or %d.Kito Cheng1-9/+13
gcc/ * config/nds32/nds32.c (nds32_asm_output_mi_thunk, nds32_print_operand, nds32_print_operand_address): Use HOST_WIDE_INT_PRINT_DEC instead. From-SVN: r258620
2018-03-17[NDS32] Optimize nds32_register_priority.Chung-Ju Wu1-3/+18
gcc/ * config/nds32/nds32.c (nds32_register_priority): Modify cost. From-SVN: r258619
2018-03-12[NDS32] Implement TARGET_MD_ASM_ADJUST hook.Chung-Ju Wu1-0/+14
gcc/ * config/nds32/nds32.c (nds32_md_asm_adjust): New function. (TARGET_MD_ASM_ADJUST): Define. From-SVN: r258443
2018-03-12[NDS32] Refine prologue and epilogue code generation.Monk Chiang3-309/+238
gcc/ * config/nds32/nds32.c (nds32_compute_stack_frame, nds32_emit_stack_push_multiple, nds32_emit_stack_pop_multiple, nds32_emit_stack_v3push, nds32_emit_stack_v3pop, nds32_emit_adjust_frame, nds32_expand_prologue, nds32_expand_epilogue, nds32_expand_prologue_v3push, nds32_expand_epilogue_v3pop): Refine. * config/nds32/nds32.h (NDS32_FIRST_CALLEE_SAVE_GPR_REGNUM, NDS32_LAST_CALLEE_SAVE_GPR_REGNUM, NDS32_V3PUSH_AVAILABLE_P): New. * config/nds32/nds32.md (prologue, epilogue): Use macro NDS32_V3PUSH_AVAILABLE_P to do checking. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r258442
2018-03-11[NDS32] Add new option -mvh.Kito Cheng2-0/+6
gcc/ * config/nds32/nds32.c (nds32_cpu_cpp_builtins): Modify to define __NDS32_VH__ macro. * config/nds32/nds32.opt (mvh): New option. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r258427
2018-03-11[NDS32] Add new function nds32_cpu_cpp_builtins and use it for ↵Kito Cheng3-32/+53
TARGET_CPU_CPP_BUILTINS. gcc/ * config/nds32/nds32-protos.h (nds32_cpu_cpp_builtins): Declare function. * config/nds32/nds32.c (nds32_cpu_cpp_builtins): New function. * config/nds32/nds32.h (TARGET_CPU_CPP_BUILTINS): Modify its definition. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r258426
2018-03-11[NDS32] Implement strlensi pattern.Kito Cheng3-0/+77
gcc/ * config/nds32/nds32-memory-manipulation.c (nds32_expand_strlen): New function. * config/nds32/nds32-multiple.md (strlensi): New pattern. * config/nds32/nds32-protos.h (nds32_expand_strlen): Declare function. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r258425
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