aboutsummaryrefslogtreecommitdiff
path: root/gcc/config/nds32
AgeCommit message (Expand)AuthorFilesLines
2018-04-06[NDS32] Add hard float support.Monk Chiang14-312/+2755
2018-04-05[NDS32] Fine-tune memory address type.Shiva Chen3-6/+18
2018-04-05[NDS32] Add constraint for lwi45.fe instruction.Shiva Chen5-9/+33
2018-04-05[NDS32] Generate alu-shift instructions only for -Os.Chung-Ju Wu1-10/+10
2018-04-05[NDS32] Add divsi4 and udivsi4 patterns.Chung-Ju Wu1-0/+20
2018-04-05[NDS32] Refine negsi2 pattern.Chung-Ju Wu1-5/+5
2018-04-05[NDS32] Refine bit-wise operation and shift patterns.Kito Cheng6-111/+225
2018-04-05[NDS32] The add and sub pattens should only accept si mode.Chung-Ju Wu1-8/+8
2018-04-05[NDS32] Fine-tune predicator for alu-shift patterns.Chung-Ju Wu1-12/+12
2018-04-05[NDS32] Adjust asm patterns indention.Chung-Ju Wu1-19/+19
2018-04-05[NDS32] Add new instruction attribute: feature.Kito Cheng1-16/+53
2018-04-05[NDS32] Add subtype attribute for instructions.Chung-Ju Wu1-7/+15
2018-04-04[NDS32] Restrict mov pattern that has at least one register operand.Kito Cheng2-2/+4
2018-04-04[NDS32] Implement movmisalignsi and movmisaligndi pattern.Kito Cheng1-0/+21
2018-04-04[NDS32] Merge movqi and movhi patterns.Chung-Ju Wu1-13/+12
2018-04-04[NDS32] Refine movcc, cmov, cstore and cbranch patterns.Chung-Ju Wu5-918/+1228
2018-04-04[NDS32] Refine instruction type attribute.Kito Cheng3-42/+45
2018-04-04[NDS32] Change enabled attribute to yes/no instead of 1/0.Chung-Ju Wu1-11/+11
2018-04-04[NDS32] Refine implementation of sibcall patterns.Chung-Ju Wu5-57/+114
2018-04-02[NDS32] Implement TARGET_CANONICALIZE_COMPARISON for specific cases.Chung-Ju Wu1-0/+42
2018-04-01[NDS32] Add relax optimization as new pass.Chung-Ju Wu8-3/+426
2018-04-01[NDS32] Correct the dependency in t-nds32.Kito Cheng1-24/+93
2018-04-01[NDS32] Implement PROFILE_HOOK.Chung-Ju Wu1-1/+9
2018-04-01[NDS32] Change wchar type to unsinged int.Chung-Ju Wu1-2/+2
2018-03-28[NDS32] Adjust BRANCH_COST to prevent too much jump when compile with -Os.Chung-Ju Wu1-1/+1
2018-03-18[NDS32] Fix wrong MAX_REGS_PER_ADDRESS value.Chung-Ju Wu1-1/+1
2018-03-18[NDS32] Define LOGICAL_OP_NON_SHORT_CIRCUIT.Chung-Ju Wu1-0/+4
2018-03-18[NDS32] Define CLZ_DEFINED_VALUE_AT_ZERO.Chung-Ju Wu1-0/+5
2018-03-17[NDS32] Implment ADJUST_REG_ALLOC_ORDER for performance requirement.Chung-Ju Wu3-0/+40
2018-03-17[NDS32] Use HOST_WIDE_INT_PRINT_DEC instead of %ld or %d.Kito Cheng1-9/+13
2018-03-17[NDS32] Optimize nds32_register_priority.Chung-Ju Wu1-3/+18
2018-03-12[NDS32] Implement TARGET_MD_ASM_ADJUST hook.Chung-Ju Wu1-0/+14
2018-03-12[NDS32] Refine prologue and epilogue code generation.Monk Chiang3-309/+238
2018-03-11[NDS32] Add new option -mvh.Kito Cheng2-0/+6
2018-03-11[NDS32] Add new function nds32_cpu_cpp_builtins and use it for TARGET_CPU_CPP...Kito Cheng3-32/+53
2018-03-11[NDS32] Implement strlensi pattern.Kito Cheng3-0/+77
2018-03-11[NDS32] Add intrinsic function for ffb, ffmism and flmism.Monk Chiang4-0/+60
2018-03-05[NDS32] Implment setmem pattern.Kito Cheng3-0/+439
2018-03-04[NDS32] Rename nds32_expand_movmemqi to nds32_expand_movmemsi and rewrite its...Kito Cheng3-56/+399
2018-03-04[NDS32] Refine load_multiple and store_multiple.Kito Cheng5-23/+3464
2018-03-04[NDS32] Add load_multiple,store_multiple and new attribute combo.Kito Cheng2-31/+51
2018-03-03[NDS32] Change to large model by default.Chung-Ju Wu1-1/+1
2018-03-03[NDS32] Add intrinsic functions for unalignment memory access.Kito Cheng8-0/+503
2018-03-03[NDS32] Rewrite infrastructure for intrinsic.Monk Chiang4-139/+288
2018-02-26[NDS32] Do not use multiple load/store instructions for volatile memory access.Kito Cheng1-2/+6
2018-02-26[NDS32] Basic support for -mcpu= and --with-cpu= options.Kito Cheng2-0/+17
2018-01-03Update copyright years.Jakub Jelinek27-27/+27
2017-12-16poly_int: IN_TARGET_CODERichard Sandiford9-0/+18
2017-12-15tree-core.h (struct attribute_spec): Swap affects_type_identity and handler f...Jakub Jelinek1-14/+14
2017-12-08arc.c (arc_attribute_table): Add exclusions to the comment.Jakub Jelinek1-1/+2
generated by cgit v1.1 at 2024-11-07 03:09:22 +0000