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2018-11-06Enable libsanitizer on Solaris (PR sanitizer/80953)Rainer Orth1-0/+7
2018-11-06avx512fintrin.h: Update VFIXUPIMM* intrinsics.Wei Xiao7-347/+336
2018-11-05re PR target/87853 (_mm_cmpgt_epi8 broken with -funsigned-char)Xuepeng Guo1-3/+4
2018-11-04Enable support for next generation AMD Zen CPU, via -march=znver2.Venkataramanan Kumar8-16/+170
2018-10-28Add D front-end, libphobos library, and D2 testsuite.Iain Buclaw5-0/+60
2018-10-23re PR target/87674 (AVX512: incorrect intrinsic signature)Jakub Jelinek3-6/+6
2018-10-22i386: Enable AVX512 memory broadcast for INT andnotH.J. Lu1-0/+13
2018-10-22i386: Enable AVX512 memory broadcast for INT logicH.J. Lu1-0/+12
2018-10-22i386: Enable AVX512 memory broadcast for INT addH.J. Lu1-1/+28
2018-10-21i386: Enable AVX512 memory broadcast for FNMSUBH.J. Lu5-68/+162
2018-10-21i386: Enable AVX512 memory broadcast for FNMADDH.J. Lu5-106/+203
2018-10-21Enable AVX512 memory broadcast for FMSUBH.J. Lu5-58/+153
2018-10-21i386: Update FP add/sub with AVX512 memory broadcastH.J. Lu1-5/+5
2018-10-21i386: Enable AVX512 memory broadcast for FP mulH.J. Lu1-0/+12
2018-10-21i386: Add missing AVX512VL or/xor intrinsicsH.J. Lu1-0/+48
2018-10-20i386: Enable AVX512 memory broadcast for FP divH.J. Lu1-0/+12
2018-10-19re PR tree-optimization/87657 (SLP ICE in libgfortran matmul_i2_vanilla)Richard Biener1-2/+1
2018-10-19i386: Enable AVX512 memory broadcast for FP addH.J. Lu1-0/+28
2018-10-19i386: Use register_operand in AVX512 FMA with memory broadcastH.J. Lu1-6/+6
2018-10-18i386: Enable AVX512 memory broadcast for FMAH.J. Lu1-0/+50
2018-10-18i386.c (ix86_emit_fp_unordered_jump): Set JUMP_LABEL to the jump insn.Uros Bizjak1-18/+28
2018-10-18i386.c (ix86_builtin_vectorization_cost): Do not feed width-specific load/sto...Richard Biener2-34/+28
2018-10-18i386.c: Fix costing of vector FMA.Richard Biener1-1/+2
2018-10-18i386.c (ix86_vec_cost): Remove !parallel path and argument.Richard Biener1-69/+45
2018-10-14i386: Add register source to movddupH.J. Lu1-1/+1
2018-10-12introduce --enable-large-address-awareAlexandre Oliva2-0/+17
2018-10-12define HAVE_GAS_ALIGNED_COMMAlexandre Oliva1-0/+4
2018-10-11x86-tune-costs.h (bdver?_memcpy, [...]): Unify to ...Richard Biener2-316/+10
2018-10-10re PR target/87573 (error: could not split insn since r264877)Uros Bizjak1-1/+8
2018-10-10re PR target/87550 (Intrinsics for rdpmc (__rdpmc, __builtin_ia32_rdpmc) are ...Jakub Jelinek1-1/+1
2018-10-10sse.md (reduc_plus_scal_v8df, [...]): Merge into pattern reducing to half wid...Richard Biener1-87/+63
2018-10-08i386: Correct _mm512_mask3_fmaddsub_round_pdH.J. Lu1-1/+1
2018-10-08x86-tune-costs.h (znver1_cost): Make AVX256 vector loads cost the same as AVX...Richard Biener1-2/+2
2018-10-05* config/i386/i386.md: Reorder cmpi patterns.Uros Bizjak1-14/+14
2018-10-05i386.md (*cmpxf_cc_i387): Remove pattern.Uros Bizjak2-131/+33
2018-10-05i386.md (*cmpxf_i387): Change operand 2 predicate to reg_or_0_operand.Uros Bizjak1-38/+4
2018-10-05constraints.md ("C"): Do not depend on TARGET_SSE.Uros Bizjak6-78/+77
2018-10-05i386.c (ix86_add_stmt_cost): When scalar cost is asked for initialize mode to...Richard Biener1-1/+5
2018-10-05i386: Don't pass -msse2avx to assembler for -mavxH.J. Lu2-2/+2
2018-10-04i386.md (*fop_<X87MODEF:mode>_2_i387): Macroize insn from *fop_<MODEF:mode>_2...Uros Bizjak1-163/+124
2018-10-03i386.md (*cmp<X87MODEF:mode>_<SWI24:mode>_i387): Change operand 2 predicate t...Uros Bizjak1-2/+2
2018-10-03i386.md (*<absneg:code>extendsfdf2): Remove.Uros Bizjak1-20/+2
2018-10-02i386.md (fxam<mode>2_i387_with_temp): Remove.Uros Bizjak1-75/+0
2018-10-02i386.c (ix86_emit_i387_round): Extend op1 to XFmode before emitting fxam.Uros Bizjak1-53/+33
2018-10-02sse.md (reduc_plus_scal_v4df): Avoid the use of haddv4df...Richard Biener1-10/+14
2018-10-01mmx.md (EMMS): New int iterator.Uros Bizjak3-96/+38
2018-09-29i386: Use TImode for BLKmode values in 2 integer registersH.J. Lu1-2/+15
2018-09-29re PR target/87467 (Incorrect function parameter for _mm512_abs_pd in `includ...Jakub Jelinek1-2/+2
2018-09-28i386.h (SSE_REGNO): Fix check for FIRST_REX_SSE_REG.Uros Bizjak4-14/+14
2018-09-28i386.h (CC_REGNO): Remove FPSR_REGS.Uros Bizjak3-23/+16
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