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Tested on x86-64.
gcc/ChangeLog:
PR target/95483
* config/i386/avx2intrin.h (_mm_broadcastsi128_si256): New intrinsics.
(_mm_broadcastsd_pd): Ditto.
* config/i386/avx512bwintrin.h (_mm512_loadu_epi16): New intrinsics.
(_mm512_storeu_epi16): Ditto.
(_mm512_loadu_epi8): Ditto.
(_mm512_storeu_epi8): Ditto.
* config/i386/avx512dqintrin.h (_mm_reduce_round_sd): New intrinsics.
(_mm_mask_reduce_round_sd): Ditto.
(_mm_maskz_reduce_round_sd): Ditto.
(_mm_reduce_round_ss): Ditto.
(_mm_mask_reduce_round_ss): Ditto.
(_mm_maskz_reduce_round_ss): Ditto.
(_mm512_reduce_round_pd): Ditto.
(_mm512_mask_reduce_round_pd): Ditto.
(_mm512_maskz_reduce_round_pd): Ditto.
(_mm512_reduce_round_ps): Ditto.
(_mm512_mask_reduce_round_ps): Ditto.
(_mm512_maskz_reduce_round_ps): Ditto.
* config/i386/avx512erintrin.h
(_mm_mask_rcp28_round_sd): New intrinsics.
(_mm_maskz_rcp28_round_sd): Ditto.
(_mm_mask_rcp28_round_ss): Ditto.
(_mm_maskz_rcp28_round_ss): Ditto.
(_mm_mask_rsqrt28_round_sd): Ditto.
(_mm_maskz_rsqrt28_round_sd): Ditto.
(_mm_mask_rsqrt28_round_ss): Ditto.
(_mm_maskz_rsqrt28_round_ss): Ditto.
(_mm_mask_rcp28_sd): Ditto.
(_mm_maskz_rcp28_sd): Ditto.
(_mm_mask_rcp28_ss): Ditto.
(_mm_maskz_rcp28_ss): Ditto.
(_mm_mask_rsqrt28_sd): Ditto.
(_mm_maskz_rsqrt28_sd): Ditto.
(_mm_mask_rsqrt28_ss): Ditto.
(_mm_maskz_rsqrt28_ss): Ditto.
* config/i386/avx512fintrin.h (_mm_mask_sqrt_sd): New intrinsics.
(_mm_maskz_sqrt_sd): Ditto.
(_mm_mask_sqrt_ss): Ditto.
(_mm_maskz_sqrt_ss): Ditto.
(_mm_mask_scalef_sd): Ditto.
(_mm_maskz_scalef_sd): Ditto.
(_mm_mask_scalef_ss): Ditto.
(_mm_maskz_scalef_ss): Ditto.
(_mm_mask_cvt_roundsd_ss): Ditto.
(_mm_maskz_cvt_roundsd_ss): Ditto.
(_mm_mask_cvt_roundss_sd): Ditto.
(_mm_maskz_cvt_roundss_sd): Ditto.
(_mm_mask_cvtss_sd): Ditto.
(_mm_maskz_cvtss_sd): Ditto.
(_mm_mask_cvtsd_ss): Ditto.
(_mm_maskz_cvtsd_ss): Ditto.
(_mm512_cvtsi512_si32): Ditto.
(_mm_cvtsd_i32): Ditto.
(_mm_cvtss_i32): Ditto.
(_mm_cvti32_sd): Ditto.
(_mm_cvti32_ss): Ditto.
(_mm_cvtsd_i64): Ditto.
(_mm_cvtss_i64): Ditto.
(_mm_cvti64_sd): Ditto.
(_mm_cvti64_ss): Ditto.
* config/i386/avx512vlbwintrin.h (_mm256_storeu_epi8): New intrinsics.
(_mm_storeu_epi8): Ditto.
(_mm256_loadu_epi16): Ditto.
(_mm_loadu_epi16): Ditto.
(_mm256_loadu_epi8): Ditto.
(_mm_loadu_epi8): Ditto.
(_mm256_storeu_epi16): Ditto.
(_mm_storeu_epi16): Ditto.
* config/i386/avx512vlintrin.h (_mm256_load_epi64): New intrinsics.
(_mm_load_epi64): Ditto.
(_mm256_load_epi32): Ditto.
(_mm_load_epi32): Ditto.
(_mm256_store_epi32): Ditto.
(_mm_store_epi32): Ditto.
(_mm256_loadu_epi64): Ditto.
(_mm_loadu_epi64): Ditto.
(_mm256_loadu_epi32): Ditto.
(_mm_loadu_epi32): Ditto.
(_mm256_mask_cvt_roundps_ph): Ditto.
(_mm256_maskz_cvt_roundps_ph): Ditto.
(_mm_mask_cvt_roundps_ph): Ditto.
(_mm_maskz_cvt_roundps_ph): Ditto.
* config/i386/avxintrin.h (_mm256_cvtsi256_si32): New intrinsics.
* config/i386/emmintrin.h (_mm_loadu_si32): New intrinsics.
(_mm_loadu_si16): Ditto.
(_mm_storeu_si32): Ditto.
(_mm_storeu_si16): Ditto.
* config/i386/i386-builtin-types.def
(V8DF_FTYPE_V8DF_INT_V8DF_UQI_INT): Add new type.
(V16SF_FTYPE_V16SF_INT_V16SF_UHI_INT): Ditto.
(V4SF_FTYPE_V4SF_V2DF_V4SF_UQI_INT): Ditto.
(V2DF_FTYPE_V2DF_V4SF_V2DF_UQI_INT): Ditto.
* config/i386/i386-builtin.def
(__builtin_ia32_cvtsd2ss_mask_round): New builtin.
(__builtin_ia32_cvtss2sd_mask_round): Ditto.
(__builtin_ia32_rcp28sd_mask_round): Ditto.
(__builtin_ia32_rcp28ss_mask_round): Ditto.
(__builtin_ia32_rsqrt28sd_mask_round): Ditto.
(__builtin_ia32_rsqrt28ss_mask_round): Ditto.
(__builtin_ia32_reducepd512_mask_round): Ditto.
(__builtin_ia32_reduceps512_mask_round): Ditto.
(__builtin_ia32_reducesd_mask_round): Ditto.
(__builtin_ia32_reducess_mask_round): Ditto.
* config/i386/i386-expand.c
(ix86_expand_round_builtin): Expand round builtin for new type.
(V8DF_FTYPE_V8DF_INT_V8DF_UQI_INT)
(V16SF_FTYPE_V16SF_INT_V16SF_UHI_INT)
(V4SF_FTYPE_V4SF_V2DF_V4SF_UQI_INT)
(V2DF_FTYPE_V2DF_V4SF_V2DF_UQI_INT)
* config/i386/mmintrin.h ()
Define datatype __m32 and __m16.
Define datatype __m32_u and __m16_u.
* config/i386/sse.md: Adjust pattern.
(<mask_codefor>reducep<mode><mask_name><round_saeonly_name>): Adjust.
(reduces<mode><mask_scalar_name><round_saeonly_scalar_name>): Ditto.
(sse2_cvtsd2ss<mask_name><round_name>): Ditto.
(sse2_cvtss2sd<mask_name><round_saeonly_name>): Ditto.
(avx512er_vmrcp28<mode><mask_name><round_saeonly_name>): Ditto.
(avx512er_vmrsqrt28<mode><mask_name><round_saeonly_name>): Ditto.
gcc/testsuite/ChangeLog:
PR target/95483
* gcc.target/i386/avx-1.c: Add test.
* gcc.target/i386/avx2-vbroadcastsi128-1.c: Ditto.
* gcc.target/i386/avx2-vbroadcastsi128-2.c: Ditto.
* gcc.target/i386/avx512bw-vmovdqu16-1.c: Ditto.
* gcc.target/i386/avx512bw-vmovdqu8-1.c: Ditto.
* gcc.target/i386/avx512dq-vreducesd-1.c: Ditto.
* gcc.target/i386/avx512dq-vreducesd-2.c: Ditto.
* gcc.target/i386/avx512dq-vreducess-1.c: Ditto.
* gcc.target/i386/avx512dq-vreducess-2.c: Ditto.
* gcc.target/i386/avx512er-vrcp28sd-1.c: Ditto.
* gcc.target/i386/avx512er-vrcp28sd-2.c: Ditto.
* gcc.target/i386/avx512er-vrcp28ss-1.c: Ditto.
* gcc.target/i386/avx512er-vrcp28ss-2.c: Ditto.
* gcc.target/i386/avx512er-vrsqrt28sd-1.c: Ditto.
* gcc.target/i386/avx512er-vrsqrt28sd-2.c: Ditto.
* gcc.target/i386/avx512er-vrsqrt28ss-1.c: Ditto.
* gcc.target/i386/avx512er-vrsqrt28ss-2.c: Ditto.
* gcc.target/i386/avx512f-vcvtsd2si-1.c: Ditto.
* gcc.target/i386/avx512f-vcvtsd2si64-1.c: Ditto.
* gcc.target/i386/avx512f-vcvtsd2ss-1.c: Ditto.
* gcc.target/i386/avx512f-vcvtsi2sd64-1.c: Ditto.
* gcc.target/i386/avx512f-vcvtsi2ss-1.c: Ditto.
* gcc.target/i386/avx512f-vcvtsi2ss64-1.c: Ditto.
* gcc.target/i386/avx512f-vcvtss2sd-1.c: Ditto.
* gcc.target/i386/avx512f-vcvtss2si-1.c: Ditto.
* gcc.target/i386/avx512f-vcvtss2si64-1.c: Ditto.
* gcc.target/i386/avx512f-vscalefsd-1.c: Ditto.
* gcc.target/i386/avx512f-vscalefsd-2.c: Ditto.
* gcc.target/i386/avx512f-vscalefss-1.c: Ditto.
* gcc.target/i386/avx512f-vscalefss-2.c: Ditto.
* gcc.target/i386/avx512f-vsqrtsd-1.c: Ditto.
* gcc.target/i386/avx512f-vsqrtsd-2.c: Ditto.
* gcc.target/i386/avx512f-vsqrtss-1.c: Ditto.
* gcc.target/i386/avx512f-vsqrtss-2.c: Ditto.
* gcc.target/i386/avx512vl-vmovdqa32-1.c: Ditto.
* gcc.target/i386/avx512vl-vmovdqa64-1.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/avx512dq-vreducepd-3.c: New test.
* gcc.target/i386/avx512dq-vreducepd-4.c: New test.
* gcc.target/i386/avx512dq-vreduceps-3.c: New test.
* gcc.target/i386/avx512dq-vreduceps-4.c: New test.
* gcc.target/i386/avx512f-vcvtsi2sd-1.c: New test.
* gcc.target/i386/pr95483-1.c: New test.
* gcc.target/i386/pr95483-2.c: New test.
* gcc.target/i386/pr95483-3.c: New test.
* gcc.target/i386/pr95483-4.c: New test.
* gcc.target/i386/pr95483-5.c: New test.
* gcc.target/i386/pr95483-6.c: New test.
* gcc.target/i386/pr95483-7.c: New test.
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From-SVN: r279813
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Allow MMX intrinsic emulation with SSE/SSE2/SSSE3. Don't enable MMX ISA
by default with TARGET_MMX_WITH_SSE.
For pr82483-1.c and pr82483-2.c, "-mssse3 -mno-mmx" compiles in 64-bit
mode since MMX intrinsics can be emulated wit SSE.
gcc/
PR target/89021
* config/i386/i386-builtin.def: Enable MMX intrinsics with
SSE/SSE2/SSSE3.
* config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins):
Likewise.
* config/i386/i386-expand.c (ix86_expand_builtin): Allow
SSE/SSE2/SSSE3 to emulate MMX intrinsics with TARGET_MMX_WITH_SSE.
* config/i386/mmintrin.h: Only require SSE2 if __MMX_WITH_SSE__
is defined.
gcc/testsuite/
PR target/89021
* gcc.target/i386/pr82483-1.c: Error only on ia32.
* gcc.target/i386/pr82483-2.c: Likewise.
From-SVN: r271252
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From-SVN: r267494
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From-SVN: r256169
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PR target/80298
* config/i386/mmintrin.h: Add -msse target option when __SSE__ is
not defined for x86_64 target. Add -mmmx target option when __SSE2__
is not defined.
* config/i386/mm3dnow.h: Add -msse target when __SSE__ is not defined
for x86_64 target. Handle -m3dnowa option.
From-SVN: r246708
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From-SVN: r243994
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PR target/70118
* config/i386/mmintrin.h (__m64_u): New type
* config/i386/emmintrin.h (_mm_loadl_epi64, _mm_storel_epi64):
Make the allowed unaligned memory access explicit.
From-SVN: r243527
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From-SVN: r232055
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From-SVN: r219188
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From-SVN: r206289
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Allow mmintrin headers to work with function specific target opts. Please
see discussion here:
http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00740.html
* config/i386/i386.c (ix86_pragma_target_parse): Restore target
when current target options does not apply.
* config/i386/i386-protos.h (ix86_reset_previous_fndecl): New function.
* config/i386/i386.c (ix86_reset_previous_fndecl): Ditto.
* config/i386/bmiintrin.h: Pass appropriate target attributes to header.
* config/i386/mmintrin.h: Ditto.
* config/i386/nmmintrin.h: Ditto.
* config/i386/avx2intrin.h: Ditto.
* config/i386/fxsrintrin.h: Ditto.
* config/i386/tbmintrin.h: Ditto.
* config/i386/xsaveintrin.h: Ditto.
* config/i386/f16cintrin.h: Ditto.
* config/i386/xtestintrin.h: Ditto.
* config/i386/xsaveoptintrin.h: Ditto.
* config/i386/bmi2intrin.h: Ditto.
* config/i386/lzcntintrin.h: Ditto.
* config/i386/smmintrin.h: Ditto.
* config/i386/wmmintrin.h: Ditto.
* config/i386/x86intrin.h: Remove all header include guards.
* config/i386/prfchwintrin.h: Ditto.
* config/i386/pmmintrin.h: Ditto.
* config/i386/tmmintrin.h: Ditto.
* config/i386/xmmintrin.h: Ditto.
* config/i386/popcntintrin.h: Ditto.
* config/i386/rdseedintrin.h: Ditto.
* config/i386/ammintrin.h: Ditto.
* config/i386/emmintrin.h: Ditto.
* config/i386/immintrin.h: Remove all header include guards.
* config/i386/fma4intrin.h: Ditto.
* config/i386/lwpintrin.h: Ditto.
* config/i386/xopintrin.h: Ditto.
* config/i386/ia32intrin.h: Ditto.
* config/i386/avxintrin.h: Ditto.
* config/i386/rtmintrin.h: Ditto.
* config/i386/fmaintrin.h: Ditto.
* config/i386/mm3dnow.h: Ditto.
* testsuite/gcc.target/i386/intrinsics_1.c: New test.
* testsuite/gcc.target/i386/intrinsics_2.c: Ditto.
* testsuite/gcc.target/i386/intrinsics_3.c: Ditto.
* testsuite/gcc.target/i386/intrinsics_4.c: Ditto.
* testsuite/gcc.target/i386/intrinsics_5.c: Ditto.
* testsuite/gcc.target/i386/intrinsics_6.c: Ditto.
* testsuite/gcc.target/i386/avx-1.c: Provide macros for builtins
needing immediate arguments in f16cintrin.h and rtmintrin.h.
From-SVN: r200349
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From-SVN: r195098
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From-SVN: r145841
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From-SVN: r144324
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2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.c (ix86_special_builtin_type): New.
(bdesc_special_args): Likewise.
(ix86_expand_special_args_builtin): Likewise.
(ix86_init_mmx_sse_builtins): Updated.
(ix86_expand_builtin): Updated.
(ix86_expand_store_builtin): Removed.
(ix86_expand_unop_builtin): Likewise.
* config/i386/mm3dnow.h (__v2sf): Moved to ...
* config/i386/mmintrin.h (__v2sf): Here.
* config/i386/xmmintrin.h (_mm_loadh_pi): Replace __v2si with
const __v2sf.
(_mm_loadl_pi): Likewise.
(_mm_storeh_pi): Replace __v2si with __v2sf.
(_mm_storel_pi): Likewise.
* doc/extend.texi: Correct __builtin_ia32_loadhps,
__builtin_ia32_loadlps, __builtin_ia32_storehps,
__builtin_ia32_storelps, __builtin_ia32_loadhpd and
__builtin_ia32_loadlpd.
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.c (ix86_builtin_type): Add FLOAT_FTYPE_FLOAT,
V4SF_FTYPE_V4SF_VEC_MERGE and V2DF_FTYPE_V2DF_VEC_MERGE.
(bdesc_args): Updated. Add scalar SSE builtins with vec_merge.
(ix86_init_mmx_sse_builtins): Updated.
(ix86_expand_args_builtin): Likewise.
(ix86_expand_builtin): Likewise.
(ix86_expand_unop1_builtin): Renamed to ...
(ix86_expand_unop_vec_merge_builtin): This.
From-SVN: r134886
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system headers in extern inline functions)
PR target/34000
PR target/35553
* config/i386/xmmintrin.h: Change all static inline functions to
extern inline and add __gnu_inline__ attribute.
* config/i386/bmintrin.h: Ditto.
* config/i386/smmintrin.h: Ditto.
* config/i386/tmmintrin.h: Ditto.
* config/i386/mmintrin-common.h: Ditto.
* config/i386/ammintrin.h: Ditto.
* config/i386/emmintrin.h: Ditto.
* config/i386/pmmintrin.h: Ditto.
* config/i386/mmintrin.h: Ditto.
* config/i386/mm3dnow.h: Ditto.
testsuite/ChangeLog:
PR target/34000
PR target/35553
* g++.dg/other/i386-3.C: New test.
* gcc.target/i386/sse-13.c: Redefine extern instead of static.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/mmx-1.c: Ditto.
* gcc.target/i386/mmx-2.c: Ditto.
* gcc.target/i386/3dnow-1.c: Ditto.
* gcc.target/i386/3dnow-2.c: Ditto.
* gcc.target/i386/3dnowA-1.c: Ditto.
* gcc.target/i386/3dnowA-2.c: Ditto.
From-SVN: r133169
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2008-03-08 Uros Bizjak <ubizjak@gmail.com>
PR target/22152
* config/i386/i386-modes.def (V1DI): New vector mode.
* config/i386/i386.h (VALID_MMX_REG_MODE): Add V1DImode.
* config/i386/mmx.md (MMXMODEI8): New mode iterator.
(MMXMODE248): Ditto.
(MMXMODE): Add V1DI mode.
(mmxvecsize): Change DI mode to V1DI mode.
("mov<mode>): Use MMXMODEI8 mode iterator.
("*mov<mode>_internal_rex64"): Ditto.
("*mov<mode>_internal"): Ditto.
("mmx_add<mode>3"): Ditto. Handle V1DImode for TARGET_SSE2.
("mmx_sub<mode>3"): Ditto.
("mmx_adddi3"): Remove insn pattern.
("mmx_subdi3"): Ditto.
("mmx_ashr<mode>3"): Use SImode and "yN" constraint for operand 2.
("mmx_lshr<mode>3"): Ditto. Use MMXMODE248 mode iterator.
("mmx_ashl<mode>3"): Ditto.
("mmx_lshrdi3"): Remove insn pattern.
("mmx_ashldi3"): Ditto.
* config/i386/i386.c (classify_argument): Handle V1DImode.
(function_arg_advance_32): Ditto.
(function_arg_32): Ditto.
(struct builtin_description) [IX86_BUILTIN_PADDQ]: Use
mmx_addv1di3 insn pattern.
[IX86_BUILTIN_PSUBQ]: Use mmx_subv1di3 insn pattern.
[IX86_BUILTIN_PSLL?, IX86_BUILTIN_PSRL?, IX86_BUILTIN_PSRA?,
IX86_BUILTIN_PSLL?I, IX86_BUILTIN_PSRL?I, IX86_BUILTIN_PSRA?I,
IX86_BUILTIN_PSLL?I128, IX86_BUILTIN_PSRL?I128, IX86_BUILTIN_PSRA?I128]:
Remove definitions of built-in functions.
(V1DI_type_node): New node.
(v1di_ftype_v1di_int): Ditto.
(v1di_ftype_v1di_v1di): Ditto.
(v2si_ftype_v2si_si): Ditto.
(v4hi_ftype_v4hi_di): Remove node.
(v2si_ftype_v2si_di): Ditto.
(ix86_init_mmx_sse_builtins): Handle V1DImode.
(__builtin_ia32_psll?, __builtin_ia32_psrl?, __builtin_ia32_psra?):
Redefine builtins using def_builtin_const with *_ftype_*_int node.
(__builtin_ia32_psll?i, __builtin_ia32_psrl?i, __builtin_ia32_psra?i):
Add new builtins using def_builtin_const.
(ix86_expand_builtin) [IX86_BUILTIN_PSLL?, IX86_BUILTIN_PSRL?,
IX86_BUILTIN_PSRA?, IX86_BUILTIN_PSLL?I, IX86_BUILTIN_PSRL?I,
IX86_BUILTIN_PSRA?I]: Handle builtin definitions.
* config/i386/mmintrin.h (__v1di): New typedef.
(_mm_add_si64): Cast arguments to __v1di type.
(_mm_sub_si64): Ditto.
(_mm_sll_pi16): Cast __count to __v4hi type.
(_mm_sll_pi32): Cast __count to __v2si type.
(_mm_sll_si64): Cast arguments to __v1di type.
(_mm_srl_pi16): Cast __count to __v4hi type.
(_mm_srl_pi32): Cast __count to __v2si type.
(_mm_srl_si64): Cast arguments to __v1di type.
(_mm_sra_pi16): Cast __count to __v4hi type.
(_mm_sra_pi32): Cast __count to __v2si type.
(_mm_slli_pi16): Use __builtin_ia32_psllwi.
(_mm_slli_pi32): Use __builtin_ia32_pslldi.
(_mm_slli_si64): Use __builtin_ia32_psllqi. Cast __m to __v1di type.
(_mm_srli_pi16): Use __builtin_ia32_psrlwi.
(_mm_srli_pi32): Use __builtin_ia32_psrldi.
(_mm_srli_si64): Use __builtin_ia32_psrlqi. Cast __m to __v1di type.
(_mm_srai_pi16): Use __builtin_ia32_psrawi.
(_mm_srai_pi32): Use __builtin_ia32_psradi.
* config/i386/i386.md (UNSPEC_NOP): Remove unspec definition.
* doc/extend.texi (X86 Built-in Functions) [__builtin_ia32_psll?,
__builtin_ia32_psrl?, __builtin_ia32_psra?, __builtin_ia32_psll?i,
__builtin_ia32_psrl?i, __builtin_ia32_psra?i]: Add new builtins.
From-SVN: r133023
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* tree.h (block_nonartificial_location): New prototype.
* tree.c (block_nonartificial_location): New function.
* dwarf2out.c (gen_subprogram_die): Add DW_AT_artificial
if artificial attribute is present on abstract inline decl.
* c-common.c (handle_artificial_attribute): New function.
(c_common_attribute_table): Add artificial attribute.
* final.c (override_filename, override_linenum): New variables.
(final_scan_insn): For DBX_DEBUG or SDB_DEBUG, set override_filename
and override_linenum if inside of a block inlined from
__attribute__((__artificial__)) function.
(notice_source_line): Honor override_filename and override_linenum.
* doc/extend.texi: Document __attribute__((__artificial__)).
* config/i386/emmintrin.h: Add __artificial__ attribute to
all __always_inline__ functions.
* config/i386/mmintrin.h: Likewise.
* config/i386/tmmintrin.h: Likewise.
* config/i386/mm3dnow.h: Likewise.
* config/i386/pmmintrin.h: Likewise.
* config/i386/ammintrin.h: Likewise.
* config/i386/xmmintrin.h: Likewise.
* config/i386/smmintrin.h: Likewise.
* config/i386/bmmintrin.h: Likewise.
* config/i386/mmintrin-common.h: Likewise.
From-SVN: r128686
|
|
PR target/31245
* config/i386/emmintrin.h (__m128i, __m128d): Mark may_alias.
* config/i386/mmintrin.h (__m64): Likewise.
* config/i386/xmmintrin.h (__m128): Likewise.
From-SVN: r123112
|
|
2006-01-27 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/emmintrin.h (_mm_cvtsd_f64): Add missing Intel
intrinsic.
(_mm_cvtsi128_si64): Likewise.
(_mm_cvtsd_si64): Likewise.
(_mm_cvttsd_si64): Likewise.
(_mm_cvtsi64_sd): Likewise.
(_mm_cvtsi64_si128): Likewise.
* config/i386/mmintrin.h (_m_from_int64): Likewise.
(_mm_cvtsi64_m64): Likewise.
(_m_to_int64): Likewise.
(_mm_cvtm64_si64): Likewise.
* config/i386/xmmintrin.h (_mm_cvtss_si64): Likewise.
(_mm_cvttss_si64): Likewise.
(_mm_cvtsi64_ss): Likewise.
(_mm_cvtss_f32): Likewise.
From-SVN: r110311
|
|
* config/i386/mmintrin.h (_mm_add_si64): Only define for SSE2.
(_mm_sub_si64): Likewise.
* config/i386/xmmintrin.h (_mm_shuffle_pi16, _m_pshufw): Likewise.
* gcc.target/i386/sse-7.c: Use -msse2.
From-SVN: r108996
|
|
2005-06-29 Stuart Hastings <stuart@apple.com>
* gcc/config/i386/mmintrin.h: Mark vector intrinsics always_inline.
* gcc/config/i386/emmintrin.h: Likewise.
* gcc/config/i386/pmmintrin.h: Likewise.
* gcc/config/i386/xmmintrin.h: Likewise.
From-SVN: r101425
|
|
From-SVN: r101314
|
|
(movlps))
PR target/19530
* config/i386/mmintrin.h (_mm_cvtsi32_si64): Use
__builtin_ia32_vec_init_v2si.
(_mm_cvtsi64_si32): Use __builtin_ia32_vec_ext_v2si.
* config/i386/i386.c (IX86_BUILTIN_VEC_EXT_V2SI): New.
(ix86_init_mmx_sse_builtins): Create it.
(ix86_expand_builtin): Expand it.
(ix86_expand_vector_set): Handle V2SFmode and V2SImode.
* config/i386/mmx.md (vec_extractv2sf_0, vec_extractv2sf_1): New.
(vec_extractv2si_0, vec_extractv2si_1): New.
From-SVN: r93972
|
|
PR target/13366
* config/i386/i386.h (enum ix86_builtins): Move ...
* config/i386/i386.c: ... here.
(IX86_BUILTIN_MOVDDUP, IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_PEXTRW,
IX86_BUILTIN_PINSRW, IX86_BUILTIN_LOADAPS, IX86_BUILTIN_LOADSS,
IX86_BUILTIN_STORESS, IX86_BUILTIN_SSE_ZERO, IX86_BUILTIN_PEXTRW128,
IX86_BUILTIN_PINSRW128, IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADSD,
IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STORESD, IX86_BUILTIN_STOREHPD,
IX86_BUILTIN_STORELPD, IX86_BUILTIN_SETPD1, IX86_BUILTIN_SETPD,
IX86_BUILTIN_CLRPD, IX86_BUILTIN_LOADPD1, IX86_BUILTIN_LOADRPD,
IX86_BUILTIN_STOREPD1, IX86_BUILTIN_STORERPD, IX86_BUILTIN_LOADDQA,
IX86_BUILTIN_STOREDQA, IX86_BUILTIN_CLRTI,
IX86_BUILTIN_LOADDDUP): Remove.
(IX86_BUILTIN_VEC_INIT_V2SI, IX86_BUILTIN_VEC_INIT_V4HI,
IX86_BUILTIN_VEC_INIT_V8QI, IX86_BUILTIN_VEC_EXT_V2DF,
IX86_BUILTIN_VEC_EXT_V2DI, IX86_BUILTIN_VEC_EXT_V4SF,
IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V4HI,
IX86_BUILTIN_VEC_SET_V8HI, IX86_BUILTIN_VEC_SET_V4HI): New.
(ix86_init_builtins): Make static.
(ix86_init_mmx_sse_builtins): Update for changed builtins.
(ix86_expand_binop_builtin): Only use ix86_fixup_binary_operands
if all the modes match. Otherwise, fake it.
(get_element_number, ix86_expand_vec_init_builtin,
ix86_expand_vec_ext_builtin, ix86_expand_vec_set_builtin): New.
(ix86_expand_builtin): Make static. Update for changed builtins.
(ix86_expand_vector_move_misalign): Use sse2_loadlpd with zero
operand instead of sse2_loadsd. Cast sse1 fallback to V4SFmode.
(ix86_expand_vector_init_duplicate): New.
(ix86_expand_vector_init_low_nonzero): New.
(ix86_expand_vector_init_one_var, ix86_expand_vector_init_general):
Split out from ix86_expand_vector_init; handle integer modes.
(ix86_expand_vector_init): Use them.
(ix86_expand_vector_set, ix86_expand_vector_extract): New.
* config/i386/i386-protos.h: Update.
* config/i386/predicates.md (reg_or_0_operand): New.
* config/i386/mmx.md (mov<MMXMODEI>_internal): Add 'r' variants.
(movv2sf_internal): Likewise. And a splitter to match them all.
(vec_dupv2sf, mmx_concatv2sf, vec_setv2sf, vec_extractv2sf,
vec_initv2sf, vec_dupv4hi, vec_dupv2si, mmx_concatv2si, vec_setv2si,
vec_extractv2si, vec_initv2si, vec_setv4hi, vec_extractv4hi,
vec_initv4hi, vec_setv8qi, vec_extractv8qi, vec_initv8qi): New.
(mmx_pinsrw): Fix operand ordering.
* config/i386/sse.md (movv4sf splitter): Use direct pattern,
rather than sse_loadss expander.
(movv2df splitter): Similarly.
(sse_loadss, sse_loadlss): Remove.
(vec_dupv4sf, sse_concatv2sf, sse_concatv4sf, vec_extractv4sf_0): New.
(vec_setv4sf, vec_setv2df): Use ix86_expand_vector_set.
(vec_extractv4sf, vec_extractv2df): Use ix86_expand_vector_extract.
(sse3_movddup): Rename with '*'.
(sse3_movddup splitter): Use gen_rtx_REG instead of gen_lowpart.
(sse2_loadsd): Remove.
(vec_dupv2df_sse3): Rename from sse3_loadddup.
(vec_dupv2df, vec_concatv2df_sse3, vec_concatv2df): New.
(sse2_pinsrw): Fix argument ordering.
(sse2_loadld, sse2_loadq): Add sse1 alternatives.
(sse2_stored): Remove 'r' destination.
(vec_dupv4si, vec_dupv2di, sse2_concatv2si, sse1_concatv2si,
vec_concatv4si_1, vec_concatv2di, vec_setv2di, vec_extractv2di,
vec_initv2di, vec_setv4si, vec_extractv4si, vec_initv4si,
vec_setv8hi, vec_extractv8hi, vec_initv8hi, vec_setv16qi,
vec_extractv16qi, vec_initv16qi): New.
* config/i386/emmintrin.h (__m128i, __m128d): Use typedef, not define.
(_mm_set_sd, _mm_set1_pd, _mm_setzero_pd, _mm_set_epi64x,
_mm_set_epi32, _mm_set_epi16, _mm_set_epi8, _mm_setzero_si128): Use
constructor form.
(_mm_load_pd, _mm_store_pd): Use plain dereference.
(_mm_load_si128, _mm_store_si128): Likewise.
(_mm_load1_pd): Use _mm_set1_pd.
(_mm_load_sd): Use _mm_set_sd.
(_mm_store_sd, _mm_storeh_pd): Use __builtin_ia32_vec_ext_v2df.
(_mm_store1_pd, _mm_storer_pd): Use _mm_store_pd.
(_mm_set_epi64): Use _mm_set_epi64x.
(_mm_set1_epi64x, _mm_set1_epi64, _mm_set1_epi32, _mm_set_epi16,
_mm_set1_epi8, _mm_setr_epi64, _mm_setr_epi32, _mm_setr_epi16,
_mm_setr_epi8): Use _mm_set_foo form.
(_mm_loadl_epi64, _mm_movpi64_epi64, _mm_move_epi64): Use _mm_set_epi64.
(_mm_storel_epi64, _mm_movepi64_pi64): Use __builtin_ia32_vec_ext_v2di.
(_mm_extract_epi16): Use __builtin_ia32_vec_ext_v8hi.
(_mm_insert_epi16): Use __builtin_ia32_vec_set_v8hi.
* config/i386/mmintrin.h (_mm_setzero_si64): Use plain cast.
(_mm_set_pi32): Use __builtin_ia32_vec_init_v2si.
(_mm_set_pi16): Use __builtin_ia32_vec_init_v4hi.
(_mm_set_pi8): Use __builtin_ia32_vec_init_v8qi.
(_mm_set1_pi16, _mm_set1_pi8): Use _mm_set_piN variant.
* config/i386/pmmintrin.h (_mm_loaddup_pd): Use _mm_load1_pd.
(_mm_movedup_pd): Use _mm_shuffle_pd.
* config/i386/xmmintrin.h (_mm_setzero_ps, _mm_set_ss,
_mm_set1_ps, _mm_set_ps, _mm_setr_ps): Use constructor form.
(_mm_cvtpi16_ps, _mm_cvtpu16_ps, _mm_cvtpi8_ps, _mm_cvtpu8_ps,
_mm_cvtps_pi8, _mm_cvtpi32x2_ps): Avoid __builtin_ia32_mmx_zero;
Use _mm_setzero_ps.
(_mm_load_ss, _mm_load1_ps): Use _mm_set* form.
(_mm_load_ps, _mm_loadr_ps): Use raw dereference.
(_mm_store_ss): Use __builtin_ia32_vec_ext_v4sf.
(_mm_store_ps): Use raw dereference.
(_mm_store1_ps): Use _mm_storeu_ps.
(_mm_storer_ps): Use _mm_store_ps.
(_mm_extract_pi16): Use __builtin_ia32_vec_ext_v4hi.
(_mm_insert_pi16): Use __builtin_ia32_vec_set_v4hi.
From-SVN: r93199
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|
* config/i386/i386.c (bdesc_2arg): Update names for mmx_ prefixes.
(ix86_expand_builtin): Likewise. Frob MASKMOVQ wrt the input mem
just like MASKMOVDQU. Return plain zero for MMX_ZERO.
* config/i386/i386.md (MMXMODEI, mov<MMXMODEI>,
mov<MMXMODEI>_internal_rex64, mov<MMXMODEI>_internal, movv2sf,
movv2sf_internal_rex64, movv2sf_internal, MMXMODE,
movmisalign<MMXMODE>, mmx_pmovmskb, mmx_maskmovq, mmx_maskmovq_rex,
sse_movntdi, addv8qi3, addv4hi3, addv2si3, mmx_adddi3, ssaddv8qi3,
ssaddv4hi3, usaddv8qi3, usaddv4hi3, subv8qi3, subv4hi3, subv2si3,
mmx_subdi3, sssubv8qi3, sssubv4hi3, ussubv8qi3, ussubv4hi3,
mulv4hi3, smulv4hi3_highpart, umulv4hi3_highpart, mmx_pmaddwd,
sse2_umulsidi3, mmx_iordi3, mmx_xordi3, mmx_anddi3, mmx_nanddi3,
mmx_uavgv8qi3, mmx_uavgv4hi3, mmx_psadbw, mmx_pinsrw, mmx_pinsrw,
mmx_pextrw, mmx_pshufw, eqv8qi3, eqv4hi3, eqv2si3, gtv8qi3, gtv4hi3,
gtv2si3, umaxv8qi3, smaxv4hi3, uminv8qi3, sminv4hi3, ashrv4hi3,
ashrv2si3, lshrv4hi3, lshrv2si3, mmx_lshrdi3, ashlv4hi3, ashlv2si3,
mmx_ashldi3, mmx_packsswb, mmx_packssdw, mmx_packuswb, mmx_punpckhbw,
mmx_punpckhwd, mmx_punpckhdq, mmx_punpcklbw, mmx_punpcklwd,
mmx_punpckldq, emms, addv2sf3, subv2sf3, subrv2sf3, gtv2sf3, gev2sf3,
eqv2sf3, pfmaxv2sf3, pfminv2sf3, mulv2sf3, femms, pf2id, pf2iw,
pfacc, pfnacc, pfpnacc, pi2fw, floatv2si2, pfrcpv2sf2, pfrcpit1v2sf3,
pfrcpit2v2sf3, pfrsqrtv2sf2, pfrsqit1v2sf3, pmulhrwv4hi3, pswapdv2si2,
pswapdv2sf2): Move to mmx.md; rename as necessary with leading
mmx_ prefix.
(mmx_clrdi, pavgusb): Remove.
(ldmxcsr, stmxcsr, sfence, sfence_insn): Move to sse.md; rename
with leading sse_ prefix.
* config/i386/sse.md: Receive them.
* config/i386/mmx.md: New file.
(MMXMODE12, MMXMODE24, mmxvecsize): New.
(subrv2sf3): Turn into expander for normal subtraction.
(mmx_addv2sf3, mmx_mulv2sf3, mmx_smaxv2sf3, mmx_sminv2sf3,
mmx_eqv2sf3, mmx_mulv4hi3, mmx_smulv4hi3_highpart,
mmx_umulv4hi3_highpart, mmx_pmaddwd, mmx_pmulhrwv4hi3, sse2_umulsidi3,
mmx_umaxv8qi3, mmx_smaxv4hi3, mmx_uminv8qi3, mmx_sminv4hi3): Mark
commutative; use ix86_binary_operator_ok.
(mmx_add<MMXMODEI>3, mmx_ssadd<MMXMODE12>3, mmx_usadd<MMXMODE12>3,
mmx_sub<MMXMODEI>3, mmx_sssub<MMXMODE12>3, mmx_ussub<MMXMODE12>3
mmx_ashr<MMXMODE24>3, mmx_lshr<MMXMODE23>3, mmx_ashl<MMXMODE24>3
mmx_eq<MMXMODEI>3, mmx_gt<MMXMODEI>3, mmx_and<MMXMODEI>3,
mmx_nand<MMXMODEI>3, mmx_ior<MMXMODEI>3, mmx_xor<MMXMODEI>3):
Macroize from existing patterns; use ix86_binary_operator_ok.
(mmx_packsswb, mmx_packssdw, mmx_packuswb): Add memory alternative.
(mmx_punpckhbw, mmx_punpcklbw, mmx_punpckhwd, mmx_punpcklwd,
mmx_punpckhdq, mmx_punpckhdq, mmx_punpckldq): Likewise. Model
with vec_select+vec_concat.
(mmx_pshufw, mmx_pshufw_1): Likewise.
(mmx_uavgv8qi3): Merge pavgusb. Model correcty.
(mmx_uavgv4hi3): Model correctly.
* config/i386/mmintrin.h (_mm_and_si64, _mm_andnot_si64, _mm_or_si64,
_mm_xor_si64): Remove casts.
From-SVN: r93107
|
|
* config/i386/emmintrin.h: Use __vector_size__ instead of vector_size.
* config/i386/mmintrin.h, config/i386/xmmintrin.h: Likewise.
From-SVN: r92412
|
|
gcc/
* dwarf2asm.c, loop.h, pretty-print.c, pretty-print.h,
config/i386/mmintrin.h: Update copyright.
cp/
* cxx-pretty-print.c, cxx-pretty-print.h, decl.h, friend.c:
Update copyright.
From-SVN: r79938
|
|
gcc/ChangeLog
2004-03-16 Paolo Bonzini <bonzini@gnu.org>
* c-common.c (c_common_type_for_mode): Build vector types on
demand.
(handle_mode_attribute): Deprecate using the mode attribute
to create vector types. Fix indentation.
(vector_type_node_list): Remove.
(handle_vector_size_attribute): Create vector types on demand.
Strip a NON_LVALUE_EXPR from the attribute if there is one.
* c-typeck.c (comptypes): Make vector types compatible if they
have the same underlying mode.
(convert_for_assignment): Use comptypes to convert between
vector types.
* tree.c (build_common_tree_nodes_2): Do not create vector types.
* config/arm/arm.c (arm_init_iwmmxt_builtins): Create necessary
vector types.
* tree.h: Remove vector types.
* config/i386/i386.c (i386_init_mmx_sse_builtins): Likewise.
* config/rs6000/rs6000.c (rs6000_init_builtins): Likewise.
(V16QI_type_node, V2SI_type_node, V2SF_type_node, V4HI_type_node,
V4SI_type_node, V4SF_type_node, V8HI_type_node): New globals.
* doc/extend.texi (Vector Types): Document how to use the
vector_size attribute to create vectors, rather than mode.
* config/arm/mmintrin.h: Use vector_size attribute, not mode.
* config/i386/emmintrin.h: Likewise.
* config/i386/mmintrin.h: Likewise.
* config/i386/xmmintrin.h: Likewise.
* config/sh/ushmedia.h: Likwise.
testsuite/ChangeLog
2004-03-16 Paolo Bonzini <bonzini@gnu.org>
* g++.dg/eh/simd-1.C: Use vector_size attribute, not mode.
* g++.dg/eh/simd-2.C: Likewise.
* g++.dg/init/array10.C: Likewise.
* gcc.c-torture/compile/simd-1.c: Likewise.
* gcc.c-torture/compile/simd-2.c: Likewise.
* gcc.c-torture/compile/simd-3.c: Likewise.
* gcc.c-torture/compile/simd-4.c: Likewise.
* gcc.c-torture/compile/simd-6.c: Likewise.
* gcc.c-torture/execute/simd-1.c: Likewise.
* gcc.c-torture/execute/simd-2.c: Likewise.
* gcc.dg/compat/vector-defs.h: Likewise.
* gcc.dg/20020531-1.c: Likewise.
* gcc.dg/altivec-3.c: Likewise.
* gcc.dg/altivec-4.c: Likewise.
* gcc.dg/altivec-varargs-1.c: Likewise.
* testsuite/gcc.dg/compat/vector-defs.h: Likewise.
* gcc.dg/i386-mmx-3.c: Likewise.
* gcc.dg/i386-sse-4.c: Likewise.
* gcc.dg/i386-sse-5.c: Likewise.
* gcc.dg/i386-sse-8.c: Likewise.
* gcc.dg/simd-1.c: Likewise.
* gcc.dg/20030218-1.c: Likewise. Plus, do not declare
__ev64_opaque__ since the machine description provides it.
Index: c-common.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/c-common.c,v
retrieving revision 1.487
diff -u -r1.487 c-common.c
--- c-common.c 26 Feb 2004 01:24:37 -0000 1.487
+++ c-common.c 10 Mar 2004 10:25:28 -0000
@@ -1874,38 +1874,12 @@
if (mode == TYPE_MODE (build_pointer_type (integer_type_node)))
return unsignedp ? make_unsigned_type (mode) : make_signed_type (mode);
- switch (mode)
+ if (VECTOR_MODE_P (mode))
{
- case V16QImode:
From-SVN: r79544
|
|
2003-10-26 Ottavio Campana <ottavio@campana.vi.it>
* config/i386/mmintrin.h (_mm_set1_pi8): Fix comment.
From-SVN: r72956
|
|
* config/i386/i386-aout.h, config/i386/i386-coff.h,
config/i386/i386-interix.h, config/i386/i386-interix3.h,
config/i386/i386-modes.def, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.h, config/i386/i386.md,
config/i386/i386elf.h, config/i386/k6.md, config/i386/kaos-i386.h,
config/i386/linux-aout.h, config/i386/linux.h, config/i386/linux64.h,
config/i386/lynx-ng.h, config/i386/lynx.h, config/i386/mingw32.h,
config/i386/mmintrin.h, config/i386/moss.h: GNU CC -> GCC.
"GNU compiler" -> GCC.
From-SVN: r71811
|
|
From-SVN: r67544
|
|
2003-06-06 H.J. Lu <hongjiu.lu@intel.com>
* config.gcc (extra_headers): Add emmintrin.h for i[34567]86-*-*
and x86_64-*-*.
* config/i386/mmintrin.h: Update version and add alternate
intrinsic names.
* config/i386/xmmintrin.h: Likewise.
* config/i386/xmmintrin.h: Include <emmintrin.h>. Move SSE2
intrinsics to ...
* config/i386/emmintrin.h: Here. New file.
From-SVN: r67543
|
|
* i386.c (def_builtin): Special case 64bit builtins.
(MASK_SSE164, MASK_SSE264): New constants.
(builtin_description): Add 64bit builtins.
(ix86_init_mmx_sse_builtins): Likewise.
* i386.h (enum ix86_builtins): Likewise.
* i386.md (cvtss2siq, cvttss2siq, cvtsd2siq, cvttsd2siq, cvtsi2sdq,
sse2_movq2dq_rex64, sse2_movsq2q_rex64): New.
(sse2_movq2dq, sse2_movsq2q): Disable for 64bit.
* mmintrin.h (_mm_cvtsi64x_si64, _mm_set_pi64x, _mm_cvtsi64_si64x): New.
* xmmintrin.h (_mm_cvtss_si64x, _mm_cvttss_si64x, _mm_cvtsi64x_ss,
_mm_set_epi64x, _mm_set1_epi64x, _mm_cvtsd_si64x, _mm_cvttsd_si64x,
_mm_cvtsi64x_sd, _mm_cvtsi64x_si128, _mm_cvtsi128_si64x): New.
From-SVN: r63267
|
|
* i386.c (builtin_description): Add __builtin_ia32_paddq and
__builtin_ia32_psubq. Fix __builtin_ia32_paddq128
and __builtin_ia32_psubq128.
* i386.h (IX86_BUILTIN_PADDQ, IX86_BUILTIN_PSUBQ): New.
* i386.md (addv*, mmx_ior*, mmx_xoe*, mmx_and*): Add missing '%'.
(mmx_adddi3, mmx_subdi3): New.
* mmintrin.h (_mm_add_si64, _mm_sub_si64): New.
* xmmintrin.h (_mm_movepi64_pi64): New.
(_mm_add_epi64, _mm_sub_epi64): fix.
(_mm_mul_pu16): Rename to...
(_mm_mul_su32): ... this one.
* builtins.c (expand_builtin_expect): Do not predict
flag_guess_branch_prob is not set.
* c-semantics.c (expand_stmt): Likewise.
* predict.c (predict_insn): Likewise.
* stmt.c (expand_continue_loop): Likewise.
* toplev.c (rest_of_compilation): Do not call
note_prediction_to_br_prob and note_prediction_to_br_prob
when not optimizing.
From-SVN: r63263
|
|
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
|
|
* mmintrin.h: Guard by __MMX__
* xmmintrin.h: Guard by __SSE__
PR other/8062
* xmmintrin.h (_MM_SHUFFLE2): New macro.
(_mm_load*_?d): New functions.
(_mm_set*_?d): New functions.
(_mm_store*_?d): New functions.
From-SVN: r58252
|
|
From-SVN: r56075
|
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* config/i386/mmintrin.h: New file.
* config/i386/xmmintrin.h: New file.
* config.gcc (i?86-*-*): Add extra_headers.
* simplify-rtx.c (simplify_unary_operation): Handle saturating
truncation codes.
(simplify_binary_operation): Handle saturating arithmetic codes.
* config/i386/i386.c (ix86_expand_sse_comi): Return the full result,
not the lowpart subreg.
(ix86_expand_builtin): Return a TImode dummy register instead of 0
on error.
* config/i386/i386.md (mmx_clrdi): Override memory attribute.
* gcc.dg/i386-mmx-1.c, gcc.dg/i386-mmx-2.c: New.
* gcc.dg/i386-sse-1.c, gcc.dg/i386-sse-2.c, gcc.dg/i386-sse-1.c: New.
CVs: ----------------------------------------------------------------------
From-SVN: r48793
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