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path: root/gcc/config/i386/i386.h
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2022-05-23[x86_64]: Zhaoxin lujiazui enablementMayshao1-0/+1
2022-03-29Disable gathers for znver3 for vectors with 2 or 4 elementsJan Hubicka1-0/+4
2022-03-18x86: Correct march=sapphirerapids to base on icelake serverCui,Lili1-2/+3
2022-03-15i386: Use no-mmx,no-sse for LIBGCC2_UNWIND_ATTRIBUTE [PR104890]Jakub Jelinek1-3/+3
2022-03-09x86: Define LIBGCC2_UNWIND_ATTRIBUTE on ia32 [PR104781]Jakub Jelinek1-0/+6
2022-02-25i386: Use a new temp slot kind for splitter to floatdi<mode>2_i387_with_xmm [...Jakub Jelinek1-0/+1
2022-01-17Change references of .c files to .cc filesMartin Liska1-8/+8
2022-01-16[i386] GLC tuning: Break false dependency for dest register.wwwhhhyyy1-0/+2
2022-01-05Fix target/103910: missing GTY on x86_mfence causing PCH usage to ICEAndrew Pinski1-1/+1
2022-01-03Update copyright years.Jakub Jelinek1-1/+1
2022-01-02i386: Introduce V2QImode vectorized arithmetic [PR103861]Uros Bizjak1-2/+3
2021-12-16i386: Enable VxHF vector modes lower ABI levels [PR103571]Uros Bizjak1-11/+11
2021-12-06Prefer INT_SSE_REGS for SSE_FLOAT_MODE_P in preferred_reload_class.liuhongt1-0/+2
2021-12-03x86: Add -mmove-max=bits and -mstore-max=bitsH.J. Lu1-11/+7
2021-11-17i386: Introduce LEGACY_SSE_REGNO_P predicateUros Bizjak1-1/+4
2021-11-05x86: Make stringop_algs::stringop_strategy ctor constexpr [PR100246]Jakub Jelinek1-2/+3
2021-09-28AVX512FP16: Support basic 64/32bit vector type and operation.Hongyu Wang1-4/+9
2021-09-18Support embedded broadcast for AVX512FP16 instructions.liuhongt1-1/+2
2021-09-17x86: Add TARGET_SSE_PARTIAL_REG_[FP_]CONVERTS_DEPENDENCYH.J. Lu1-0/+4
2021-09-13x86: Add TARGET_AVX256_[MOVE|STORE]_BY_PIECESH.J. Lu1-3/+7
2021-09-08AVX512FP16: Support vector init/broadcast/set/extract for FP16.liuhongt1-4/+11
2021-09-08AVX512FP16: Initial support for AVX512FP16 feature and scalar _Float16 instru...Guo, Xuepeng1-3/+8
2021-09-02Enable _Float16 type for TARGET_SSE2 and above.liuhongt1-1/+2
2021-08-24Optimize (a & b) | (c & ~b) to vpternlog instruction.liuhongt1-0/+2
2021-08-24Tweak -Os costs for scalar-to-vector pass.Roger Sayle1-0/+5
2021-08-19Revert "Add the member integer_to_sse to processor_cost as a cost simulation ...liuhongt1-1/+0
2021-08-18Add x86 tune to enable v2df vector reduction by paddpd.liuhongt1-0/+2
2021-08-04x86: Update STORE_MAX_PIECESH.J. Lu1-11/+15
2021-08-02x86: Update piecewise move and storeH.J. Lu1-18/+35
2021-07-28Add the member integer_to_sse to processor_cost as a cost simulation for movd...liuhongt1-0/+1
2021-07-15i386: Fix ix86_hard_regno_mode_ok for TDmode on 32bit targets [PR101346]Uros Bizjak1-5/+3
2021-07-14x86: Don't enable UINTR in 32-bit modeH.J. Lu1-3/+4
2021-07-08i386: Add pack/unpack patterns for 32bit vectors [PR100637]Uros Bizjak1-2/+2
2021-07-06X86: Provide a CTOR for stringop_algs [PR100246].Iain Sandoe1-0/+9
2021-06-17Add a target calls hook: TARGET_PUSH_ARGUMENTH.J. Lu1-6/+1
2021-06-13x86: Replace ix86_red_zone_size with ix86_red_zone_usedH.J. Lu1-1/+4
2021-06-07Fix _mm256_zeroupper by representing the instructions as call_insns in which ...liuhongt1-4/+0
2021-05-19i386: Allow 64bit vector modes in general registersUros Bizjak1-2/+4
2021-05-18i386: Implement 4-byte vector support [PR100637]Uros Bizjak1-6/+9
2021-04-29add ASM_OUTPUT_MAX_SKIP_ALIGN to i386.hAlexandre Oliva1-7/+7
2021-04-21Remove TARGET_foo (ix86_tune == PROCESSOR_foo) macros.Martin Liska1-45/+1
2021-04-21Overhaul in isa_flags and handling it.Martin Liska1-187/+7
2021-04-21Generate PTA features from a def file.Martin Liska1-91/+18
2021-04-21x86: Add -mmwait for -mgeneral-regs-onlyH.J. Lu1-0/+2
2021-04-14d: Add TARGET_D_REGISTER_CPU_TARGET_INFOIain Buclaw1-0/+1
2021-04-14d: Add TARGET_D_HAS_STDCALL_CONVENTIONIain Buclaw1-1/+2
2021-04-12Add rocketlake to gcc.Cui,Lili1-0/+3
2021-04-12Change march=alderlake ISA list and add m_ALDERLAKE to m_CORE_AVX2Cui,Lili1-3/+4
2021-03-31x86: Update memcpy/memset inline strategies for Ice LakeH.J. Lu1-0/+2
2021-03-19x86: Issue error for return/argument only with function bodyH.J. Lu1-0/+4
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