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2023-06-10target/109650: Fix wrong code after cc0 -> CCmode transition.Georg-Johann Lay1-8/+14
This patch fixes a wrong-code bug in the wake of PR92729, the transition that turned the AVR backend from cc0 to CCmode. In cc0, the insn that uses cc0 like a conditional branch always follows the cc0 setter, which is no more the case with CCmode where set and use of REG_CC might be in different basic blocks. This patch removes the machine-dependent reorg pass in avr_reorg entirely. It is replaced by a new, AVR specific mini-pass that runs prior to split2. Canonicalization of comparisons away from the "difficult" codes GT[U] and LE[U] is now mostly performed by implementing TARGET_CANONICALIZE_COMPARISON. Moreover: * Text peephole conditions get "dead_or_set_regno_p (*, REG_CC)" as needed. * RTL peephole conditions get "peep2_regno_dead_p (*, REG_CC)" as needed. * Conditional branches no more clobber REG_CC. * insn output for compares looks ahead to determine the branch mode in use. This needs also "dead_or_set_regno_p (*, REG_CC)". * Add RTL peepholes for decrement-and-branch detection. * Some of the patterns like "*cmphi.zero-extend.0" lost their combine-ational part wit PR92729. Restore them. Finally, it fixes some of the many indentation glitches left over from PR92729. gcc/ PR target/109650 PR target/92729 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass. * config/avr/avr.cc (avr_pass_ifelse): New RTL pass. (avr_pass_data_ifelse): New pass_data for it. (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost) (avr_canonicalize_comparison, avr_out_plus_set_ZN) (avr_out_cmp_ext): New functions. (compare_condtition): Make sure REG_CC dies in the branch insn. (avr_rtx_costs_1): Add computation of cbranch costs. (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]: [ADJUST_LEN_CMP_SEXT]Handle them. (TARGET_CANONICALIZE_COMPARISON): New define. (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern) (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions. (TARGET_MACHINE_DEPENDENT_REORG): Remove define. * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto. (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx) (avr_out_cmp_zext): New Protos * config/avr/avr.md (branch, difficult_branch): Don't split insns. (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1") (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns. (*cbranch<mode>4): Rename to cbranch<mode>4_insn. (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed. (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed. Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>. Rework signtest-and-branch peepholes for *sbrx_branch<mode>. (adjust_len) [add_set_ZN, cmp_zext]: New. (QIPSI): New mode iterator. (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators. (gelt): New code iterator. (gelt_eqne): New code attribute. (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch) (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>) (*cmpqi_sign_extend): Remove insns. (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove. * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons. * config/avr/predicates.md (scratch_or_d_register_operand): New. * config/avr/constraints.md (Yxx): New constraint. gcc/testsuite/ PR target/109650 * gcc.target/avr/torture/pr109650-1.c: New test. * gcc.target/avr/torture/pr109650-2.c: New test.
2023-01-02Update copyright years.Jakub Jelinek1-1/+1
2022-01-03Update copyright years.Jakub Jelinek1-1/+1
2021-04-28AVR cc0 conversionSenthil Kumar Selvaraj1-66/+270
See https://gcc.gnu.org/pipermail/gcc-patches/2021-January/563638.html for background. This patch converts the avr backend to MODE_CC. It addresses some of the comments made in the previous submission over here (https://gcc.gnu.org/pipermail/gcc-patches/2020-December/561757.html). Specifically, this patch has 1. Automatic clobber of REG_CC in inline asm statements, via TARGET_MD_ASM_ADJUST hook. 2. Direct clobber of REG_CC in insns emitted after reload (pro and epilogue). 3. Regression testing done on atmega8, atmega128, attiny40 and atxmega128a3 devices (more details below). 4. Verification and fixes for casesi and avr_compare_pattern related code that inspects insns, by looking at avr-casesi and mach RTL dumps. 5. Use length of parallel instead of passing in operand counts when generating code for shift patterns. 6. Fixes for indentation glitches. 7. Removal of CC_xxx stuff in avr-protos.h. In the places where the macros were still used (cond_string), I've replaced them with a bool hardcoded to false. I expect this will go away/get fixed when I eventually add specific CC modes. Things still to do: 1. Adjustment of peepholes/define_splits to match against patterns with REG_CC clobber. 2. Model effect of non-compare insns on REG_CC using additional CC modes. I'm hoping to use of a modified version of the cc attribute and define_subst (again inspired by the cris port), to do this. 3. RTX cost adjustment. gcc/ * config/avr/avr-dimode.md: Turn existing patterns into define_insn_and_split style patterns where the splitter adds a clobber of the condition code register. Drop "cc" attribute. Add new patterns to match output of the splitters. * config/avr/avr-fixed.md: Likewise. * config/avr/avr.c (cc_reg_rtx): New. (avr_parallel_insn_from_insns): Adjust insn count for removal of set of cc0. (avr_is_casesi_sequence): Likewise. (avr_casei_sequence_check_operands): Likewise. (avr_optimize_casesi): Likewise. Also insert new insns after jump_insn. (avr_pass_casesi::avr_rest_of_handle_casesi): Adjust for removal of set of cc0. (avr_init_expanders): Initialize cc_reg_rtx. (avr_regno_reg_class): Handle REG_CC. (cond_string): Remove usage of CC_OVERFLOW_UNUSABLE. (avr_notice_update_cc): Remove function. (ret_cond_branch): Remove usage of CC_OVERFLOW_UNUSABLE. (compare_condition): Adjust for PARALLEL with REG_CC clobber. (out_shift_with_cnt): Likewise. (ashlhi3_out): Likewise. (ashrhi3_out): Likewise. (lshrhi3_out): Likewise. (avr_class_max_nregs): Return single reg for REG_CC. (avr_compare_pattern): Check for REG_CC instead of cc0_rtx. (avr_reorg_remove_redundant_compare): Likewise. (avr_reorg):Adjust for PARALLEL with REG_CC clobber. (avr_hard_regno_nregs): Return single reg for REG_CC. (avr_hard_regno_mode_ok): Allow only CCmode for REG_CC. (avr_md_asm_adjust): Clobber REG_CC. (TARGET_HARD_REGNO_NREGS): Define. (TARGET_CLASS_MAX_NREGS): Define. (TARGET_MD_ASM_ADJUST): Define. * config/avr/avr.h (FIRST_PSEUDO_REGISTER): Adjust for REG_CC. (enum reg_class): Add CC_REG class. (NOTICE_UPDATE_CC): Remove. (CC_OVERFLOW_UNUSABLE): Remove. (CC_NO_CARRY): Remove. * config/avr/avr.md: Turn existing patterns into define_insn_and_split style patterns where the splitter adds a clobber of the condition code register. Drop "cc" attribute. Add new patterns to match output of the splitters. (sez): Remove unused pattern.
2021-01-04Update copyright years.Jakub Jelinek1-1/+1
2020-01-01Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r279813
2019-01-01Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r267494
2018-01-03Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r256169
2017-01-01Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r243994
2016-01-04Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r232055
2015-07-21re PR target/66956 ([avr] Using 32*32=64 multiplicatiion (umulsidi3) for ↵Georg-Johann Lay1-2/+4
32=32*32 without MUL.) PR target/66956 * config/avr/avr-dimode.md (<extend_u>mulsidi3_insn) (<extend_u>mulsidi3): Don't use if !AVR_HAVE_MUL. From-SVN: r226046
2015-01-05Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r219188
2014-11-21Forward-port from 2014-10-30 4_9-branch r216934 PR target/63633Georg-Johann Lay1-0/+7
gcc/ Forward-port from 2014-10-30 4_9-branch r216934 PR target/63633 * config/avr/avr-protos.h (regmask): New inline function. (avr_fix_inputs, avr_emit3_fix_outputs): New protos. * config/avr/avr.c (avr_fix_operands, avr_move_fixed_operands) (avr_fix_inputs, avr_emit3_fix_outputs): New functions. * config/avr/avr-fixed.md (mulqq3_nomul, muluqq3_nomul) (mul<ALL2QA>3, mul<ALL4A>3, <usdiv><ALL1Q>3, <usdiv><ALL2QA>3) (<usdiv><ALL4A>3, round<ALL124QA>3): Fix input operands. * config/avr/avr-dimode.md (add<ALL8>3, sub<ALL8>3) (<ss_addsub><ALL8S>3, <us_addsub><ALL8U>3, cbranch<ALL8>4) (<di_shifts><ALL8>3, <any_extend>mulsidi3): Fix input operands. * config/avr/avr.md (mulqi3_call, mulhi3_call, mulsi3, mulpsi3) (mulu<QIHI>si3, muls<QIHI>si3, mulohisi3, <any_extend>mulhisi3) (usmulhisi3, <any_extend>mulhi3_highpart, mulsqipsi3) (fmul, fmuls, fmulsu): Fix operands. Turn insn into expander as needed. gcc/testsuite/ Forward-port from 2014-10-30 4_9-branch r216934 PR target/63633 * gcc.target/avr/torture/pr63633-ice-mult.c: New test. From-SVN: r217922
2014-01-02Update copyright years in gcc/Richard Sandiford1-1/+1
From-SVN: r206289
2013-02-12re PR target/54222 ([avr] Implement fixed-point support)Georg-Johann Lay1-0/+31
gcc/ PR target/54222 * config/avr/avr-dimode.md (umulsidi3, mulsidi3): New expanders. (umulsidi3_insn, mulsidi3_insn): New insns. libgcc/ PR target/54222 * config/avr/t-avr (LIB2FUNCS_EXCLUDE): Add: _usmulUHA, _usmulUSA, _ssmulHA, _ssmulSA. (LIB1ASMFUNCS): Add: _muldi3_6, _mulsidi3, _umulsidi3, _usmuluha3, _ssmulha3, _usmulusa3, _ssmulsa3. * config/avr/lib1funcs.S (__muldi3_6): Break out of __muldi3. (__muldi3): XCALL __muldi3_6 instead of rcall. (__umulsidi3, __mulsidi3): New functions. (do_prologue_saves, do_epilogue_restores): New .macros. (__divdi3_moddi3): Use them. * config/avr/lib1funcs-fixed.S (__usmuluha3, __ssmulha3) (__usmulusa3, __ssmulsa3): New functions. From-SVN: r195978
2013-01-14* Fix typos. Remove trailing blanks. Fix coding style.Georg-Johann Lay1-3/+3
From-SVN: r195151
2013-01-10Update copyright years in gcc/Richard Sandiford1-2/+1
From-SVN: r195098
2013-01-04Update Copyright years for files modified in 2011 and/or 2012.Jakub Jelinek1-1/+1
From-SVN: r194903
2012-09-15re PR target/54222 ([avr] Implement fixed-point support)Georg-Johann Lay1-8/+103
gcc/ PR target/54222 * config/avr/avr-fixed.md (ALL2S, ALL4S, ALL24S, ALL124S, ALL124U): New mode iterators. (<code_stdname><mode>3): New insns for SS_PLUS, SS_MINUS. (<code_stdname><mode>3): New insns for US_PLUS, US_MINUS. (usneg<mode>2): New insns. (<code_stdname><mode>2): New expanders for SS_NEG, SS_ABS. (*<code_stdname><mode>2): New insns for SS_NEG, SS_ABS. * config/avr/avr-dimode.md (ALL8U, ALL8S): New mode iterators. (avr_out_plus64, avr_out_minus64): Use avr_out_plus instead. (<code_stdname><mode>3): New expanders for SS_PLUS, SS_MINUS. (<code_stdname><mode>3): New expanders for US_PLUS, US_MINUS. (<code_stdname><mode>3_insn): New insns. (<code_stdname><mode>3_const_insn): New insns. * config/avr/avr.md (cc): Add: plus. Remove: out_plus, out_plus_noclobber, minus. (length): Add: plus. Remove: out_plus, out_plus_noclobber, plus64, minus, minus64. (abelian): New code_attr. (code_stdname): Handle: ss_plus, ss_minus, ss_neg, ss_abs, us_plus, us_minus, us_neg. (*add<mode>3, add<mode>3_clobber, add<mode>3, addpsi3, sub<mode>3): Use avr_out_plus to output. * config/avr/avr-protos.h (avr_out_plus): Change prototype. (avr_out_plus_noclobber, avr_out_minus): Remove. (avr_out_plus64, avr_out_minus64): Remove. * config/avr/avr.c (avr_out_plus_1): Add new default arguments code_sat, sign. Saturate after operation if code_sat != UNKNOWN. (avr_out_plus_symbol): New static function. (avr_out_plus): Rewrite. (adjust_insn_length): Handle: ADJUST_LEN_PLUS. Remove handling of: ADJUST_LEN_OUT_PLUS, ADJUST_LEN_PLUS64, ADJUST_LEN_MINUS, ADJUST_LEN_MINUS64, ADJUST_LEN_OUT_PLUS_NOCLOBBER. (notice_update_cc): Handle: CC_PLUS. Remove handling of: CC_MINUS, CC_OUT_PLUS, CC_OUT_PLUS_NOCLOBBER (avr_out_plus_noclobber, avr_out_minus): Remove. (avr_out_plus64, avr_out_minus64): Remove. (avr_print_operand): Print raw REGNO if 'r' is used with REG. libgcc/ PR target/54222 * config/avr/lib1funcs-fixed.S (__ssneg_2, __ssabs_2, __ssneg_4, __ssabs_4, __clr_8, __ssneg_8, __ssabs_8, __usadd_8, __ussub_8, __ssadd_8, __sssub_8): New functions. (__divsa3): Use __negsi2 to negate r_quoL. * config/avr/lib1funcs.S (FALIAS): New macro. (__divmodsi4): Break out and use __divmodsi4_neg1 as... (__negsi2): ...this new function. * config/avr/t-avr (LIB1ASMFUNCS): Add _negsi2, _clr_8, _ssneg_2, _ssneg_4, _ssneg_8, _ssabs_2, _ssabs_4, _ssabs_8, _ssadd_8, _sssub_8, _usadd_8, _ussub_8. (LIB2FUNCS_EXCLUDE): Fix typo for _add _sub. Add: _ssadd*, _sssub*, _ssneg*, _ssabs* for signed fixed modes. Add: _usadd*, _ussub*, _usneg* for unsigned fixed modes. gcc/testsuite/ PR target/54222 * gcc.target/avr/torture/fix-types.h: New. * gcc.target/avr/torture/vals-hr.def: New. * gcc.target/avr/torture/vals-r.def: New. * gcc.target/avr/torture/vals-k.def: New. * gcc.target/avr/torture/vals-ur.def: New. * gcc.target/avr/torture/vals-uk.def: New. * gcc.target/avr/torture/vals-uhr.def: New. * gcc.target/avr/torture/vals-llk.def: New. * gcc.target/avr/torture/vals-ullk.def: New. * gcc.target/avr/torture/sat-hr-plus-minus.c: New. * gcc.target/avr/torture/sat-r-plus-minus.c: New. * gcc.target/avr/torture/sat-k-plus-minus.c: New. * gcc.target/avr/torture/sat-ur-plus-minus.c: New. * gcc.target/avr/torture/sat-uk-plus-minus.c: New. * gcc.target/avr/torture/sat-uhr-plus-minus.c: New. * gcc.target/avr/torture/sat-llk-plus-minus.c: New. * gcc.target/avr/torture/sat-ullk-plus-minus.c: New. From-SVN: r191345
2012-08-24re PR target/54222 ([avr] Implement fixed-point support)Georg-Johann Lay1-59/+130
libgcc/ PR target/54222 * config/avr/lib1funcs-fixed.S: New file. * config/avr/lib1funcs.S: Include it. Undefine some divmodsi after they are used. (neg2, neg4): New macros. (__mulqihi3,__umulqihi3,__mulhi3): Rewrite non-MUL variants. (__mulhisi3,__umulhisi3,__mulsi3): Rewrite non-MUL variants. (__umulhisi3): Speed up MUL variant if there is enough flash. * config/avr/avr-lib.h (TA, UTA): Adjust according to gcc's avr-modes.def. * config/avr/t-avr (LIB1ASMFUNCS): Add: _fractqqsf, _fractuqqsf, _fracthqsf, _fractuhqsf, _fracthasf, _fractuhasf, _fractsasf, _fractusasf, _fractsfqq, _fractsfuqq, _fractsfhq, _fractsfuhq, _fractsfha, _fractsfsa, _mulqq3, _muluqq3, _mulhq3, _muluhq3, _mulha3, _muluha3, _mulsa3, _mulusa3, _divqq3, _udivuqq3, _divhq3, _udivuhq3, _divha3, _udivuha3, _divsa3, _udivusa3. (LIB2FUNCS_EXCLUDE): Add supported functions. gcc/ PR target/54222 * avr-modes.def (HA, SA, DA, TA, UTA): Adjust modes. * avr/avr-fixed.md: New file. * avr/avr.md: Include it. (cc): Add: minus. (adjust_len): Add: minus, minus64, ufract, sfract. (ALL1, ALL2, ALL4, ORDERED234): New mode iterators. (MOVMODE): Add: QQ, UQQ, HQ, UHQ, HA, UHA, SQ, USQ, SA, USA. (MPUSH): Add: HQ, UHQ, HA, UHA, SQ, USQ, SA, USA. (pushqi1, xload8_A, xload_8, movqi_insn, *reload_inqi, addqi3, subqi3, ashlqi3, *ashlqi3, ashrqi3, lshrqi3, *lshrqi3, *cmpqi, cbranchqi4, *cpse.eq): Generalize to handle all 8-bit modes in ALL1. (*movhi, reload_inhi, addhi3, *addhi3, addhi3_clobber, subhi3, ashlhi3, *ashlhi3_const, ashrhi3, *ashirhi3_const, lshrhi3, *lshrhi3_const, *cmphi, cbranchhi4): Generalize to handle all 16-bit modes in ALL2. (subhi3, casesi, strlenhi): Add clobber when expanding minus:HI. (*movsi, *reload_insi, addsi3, subsi3, ashlsi3, *ashlsi3_const, ashrsi3, *ashrhi3_const, *ashrsi3_const, lshrsi3, *lshrsi3_const, *reversed_tstsi, *cmpsi, cbranchsi4): Generalize to handle all 32-bit modes in ALL4. * avr-dimode.md (ALL8): New mode iterator. (adddi3, adddi3_insn, adddi3_const_insn, subdi3, subdi3_insn, subdi3_const_insn, cbranchdi4, compare_di2, compare_const_di2, ashrdi3, lshrdi3, rotldi3, ashldi3_insn, ashrdi3_insn, lshrdi3_insn, rotldi3_insn): Generalize to handle all 64-bit modes in ALL8. * config/avr/avr-protos.h (avr_to_int_mode): New prototype. (avr_out_fract, avr_out_minus, avr_out_minus64): New prototypes. * config/avr/avr.c (TARGET_FIXED_POINT_SUPPORTED_P): Define to... (avr_fixed_point_supported_p): ...this new static function. (TARGET_BUILD_BUILTIN_VA_LIST): Define to... (avr_build_builtin_va_list): ...this new static function. (avr_adjust_type_node): New static function. (avr_scalar_mode_supported_p): Allow if ALL_FIXED_POINT_MODE_P. (avr_builtin_setjmp_frame_value): Use gen_subhi3 and return new pseudo instead of gen_rtx_MINUS. (avr_print_operand, avr_operand_rtx_cost): Handle: CONST_FIXED. (notice_update_cc): Handle: CC_MINUS. (output_movqi): Generalize to handle respective fixed-point modes. (output_movhi, output_movsisf, avr_2word_insn_p): Ditto. (avr_out_compare, avr_out_plus_1): Also handle fixed-point modes. (avr_assemble_integer): Ditto. (output_reload_in_const, output_reload_insisf): Ditto. (avr_compare_pattern): Skip all modes > 4 bytes. (avr_2word_insn_p): Skip movuqq_insn, movqq_insn. (avr_out_fract, avr_out_minus, avr_out_minus64): New functions. (avr_to_int_mode): New function. (adjust_insn_length): Handle: ADJUST_LEN_SFRACT, ADJUST_LEN_UFRACT, ADJUST_LEN_MINUS, ADJUST_LEN_MINUS64. * config/avr/predicates.md (const0_operand): Allow const_fixed. (const_operand, const_or_immediate_operand): New. (nonmemory_or_const_operand): New. * config/avr/constraints.md (Ynn, Y00, Y01, Y02, Ym1, Ym2, YIJ): New constraints. * config/avr/avr.h (LONG_LONG_ACCUM_TYPE_SIZE): Define. From-SVN: r190644
2012-01-02Implement light-weight DImode support.Georg-Johann Lay1-0/+283
gcc/ Implement light-weight DImode support. * config/avr/avr-dimode.md: New file. * config/avr/avr.md: Include it. (adjust_len): Add plus64, compare64. (HIDI): Remove code iterator. (code_stdname): New code attribute. (rotx, rotsmode): Remove DI. (rotl<mode>3, *rotw<mode>, *rotb<mode>): Use HISI instead of HIDI as code iterator. * config/avr/avr-protos.h (avr_have_dimode): New. (avr_out_plus64, avr_out_compare64): New. * config/avr/avr.c (avr_out_compare): Handle DImode. (avr_have_dimode): New variable definition and initialization. (avr_out_compare64, avr_out_plus64): New functions. (avr_out_plus_1): Use simplify_unary_operation to negate xval. (adjust_insn_length): Handle ADJUST_LEN_COMPARE64, ADJUST_LEN_PLUS64. (avr_compare_pattern): Skip DImode comparisons. libgcc/ Implement light-weight DImode support. * config/avr/t-avr (LIB1ASMFUNCS): Add _adddi3, _adddi3_s8, _subdi3, _cmpdi2, _cmpdi2_s8, _rotldi3. * config/avr/lib1funcs.S (__adddi3, __adddi3_s8, __subdi3, __cmpdi2, __cmpdi2_s8, __rotldi3): New functions. From-SVN: r182794