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arm
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arm_mve_builtins.def
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Author
Files
Lines
2023-05-03
arm: [MVE intrinsics] rework vaddq vmulq vsubq
Christophe Lyon
1
-6
/
+0
2023-02-02
arm: Fix MVE predicates synthesis [PR 108443]
Andre Vieira
1
-9
/
+9
2023-01-02
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2022-02-22
arm: Convert more MVE/CDE builtins to predicate qualifiers
Christophe Lyon
1
-29
/
+29
2022-02-22
arm: Convert more MVE builtins to predicate qualifiers
Christophe Lyon
1
-281
/
+281
2022-02-22
arm: Convert remaining MVE vcmp builtins to predicate qualifiers
Christophe Lyon
1
-46
/
+46
2022-02-22
arm: Implement auto-vectorized MVE comparisons with vectors of boolean predic...
Christophe Lyon
1
-17
/
+17
2022-01-03
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2021-05-10
arm: MVE: Remove _s and _u suffixes from vcmp* builtins.
Christophe Lyon
1
-16
/
+16
2021-05-10
arm: MVE: Cleanup vcmpne/vcmpeq builtins
Christophe Lyon
1
-4
/
+0
2021-01-04
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2020-12-16
Arm: MVE: Split refactoring of remaining complex instrinsics
Tamar Christina
1
-8
/
+8
2020-12-16
Arm: Add NEON and MVE RTL patterns for Complex Addition.
Tamar Christina
1
-6
/
+4
2020-12-13
Revert "Arm: Add NEON and MVE RTL patterns for Complex Addition, Multiply and...
Tamar Christina
1
-12
/
+14
2020-12-13
Arm: Add NEON and MVE RTL patterns for Complex Addition, Multiply and FMA.
Tamar Christina
1
-14
/
+12
2020-10-16
arm: Fix wrong code generated for mve scatter store with writeback intrinsics...
Srinath Parvathaneni
1
-10
/
+0
2020-10-08
arm: [MVE] Remove illegal intrinsics (PR target/96914)
Christophe Lyon
1
-4
/
+0
2020-10-08
arm: [MVE[ Add vqdmlashq intrinsics (PR target/96914)
Christophe Lyon
1
-0
/
+2
2020-04-02
[ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317).
Srinath Parvathaneni
1
-10
/
+20
2020-03-23
[ARM][GCC][14x]: MVE ACLE whole vector left shift with carry intrinsics.
Srinath Parvathaneni
1
-0
/
+4
2020-03-23
[ARM][GCC][13x]: MVE ACLE scalar shift intrinsics.
Srinath Parvathaneni
1
-0
/
+14
2020-03-20
[ARM][GCC][11x]: MVE ACLE vector interleaving store and deinterleaving load i...
Srinath Parvathaneni
1
-0
/
+3
2020-03-20
[ARM][GCC][10x]: MVE ACLE intrinsics "add with carry across beats" and "beat-...
Srinath Parvathaneni
1
-0
/
+16
2020-03-20
[ARM][GCC][2/8x]: MVE ACLE gather load and scatter store intrinsics with writ...
Srinath Parvathaneni
1
-0
/
+30
2020-03-20
[ARM][GCC][1/8x]: MVE ACLE vidup, vddup, viwdup and vdwdup intrinsics with wr...
Srinath Parvathaneni
1
-0
/
+12
2020-03-18
[ARM][GCC][8/5x]: Remaining MVE store intrinsics which stores an half word, w...
Srinath Parvathaneni
1
-0
/
+30
2020-03-18
[ARM][GCC][7/5x]: MVE store intrinsics which stores byte,half word or word to...
Srinath Parvathaneni
1
-0
/
+23
2020-03-18
[ARM][GCC][6/5x]: Remaining MVE load intrinsics which loads half word and wor...
Srinath Parvathaneni
1
-0
/
+30
2020-03-18
[ARM][GCC][5/5x]: MVE ACLE load intrinsics which load a byte, halfword, or wo...
Srinath Parvathaneni
1
-0
/
+23
2020-03-18
[ARM][GCC][4/5x]: MVE load intrinsics with zero(_z) suffix.
Srinath Parvathaneni
1
-0
/
+6
2020-03-18
[ARM][GCC][3/5x]: MVE store intrinsics with predicated suffix.
Srinath Parvathaneni
1
-0
/
+6
2020-03-18
[ARM][GCC][2/5x]: MVE load intrinsics.
Srinath Parvathaneni
1
-0
/
+6
2020-03-18
[ARM][GCC][1/5x]: MVE store intrinsics.
Srinath Parvathaneni
1
-0
/
+6
2020-03-18
[ARM][GCC][4/4x]: MVE intrinsics with quaternary operands.
Srinath Parvathaneni
1
-0
/
+31
2020-03-18
[ARM][GCC][3/4x]: MVE intrinsics with quaternary operands.
Srinath Parvathaneni
1
-0
/
+41
2020-03-18
[ARM][GCC][2/4x]: MVE intrinsics with quaternary operands.
Srinath Parvathaneni
1
-0
/
+100
2020-03-18
[ARM][GCC][1/4x]: MVE intrinsics with quaternary operands.
Srinath Parvathaneni
1
-0
/
+11
2020-03-18
[ARM][GCC][3/3x]: MVE intrinsics with ternary operands.
Srinath Parvathaneni
1
-0
/
+108
2020-03-18
[ARM][GCC][2/3x]: MVE intrinsics with ternary operands.
Srinath Parvathaneni
1
-0
/
+85
2020-03-17
[ARM][GCC][1/3x]: MVE intrinsics with ternary operands.
Srinath Parvathaneni
1
-273
/
+291
2020-03-17
[ARM][GCC][5/2x]: MVE intrinsics with binary operands.
Srinath Parvathaneni
1
-195
/
+273
2020-03-17
[ARM][GCC][4/2x]: MVE intrinsics with binary operands.
Srinath Parvathaneni
1
-0
/
+120
2020-03-17
[ARM][GCC][3/2x]: MVE intrinsics with binary operands.
Srinath Parvathaneni
1
-1
/
+7
2020-03-17
[ARM][GCC][2/2x]: MVE intrinsics with binary operands.
Srinath Parvathaneni
1
-1
/
+7
2020-03-17
[ARM][GCC][1/2x]: MVE intrinsics with binary operands.
Srinath Parvathaneni
1
-1
/
+6
2020-03-17
[ARM][GCC][4/1x]: MVE intrinsics with unary operand.
Srinath Parvathaneni
1
-0
/
+5
2020-03-17
[ARM][GCC][3/1x]: MVE intrinsics with unary operand.
Srinath Parvathaneni
1
-0
/
+31
2020-03-17
[ARM][GCC][2/1x]: MVE intrinsics with unary operand.
Srinath Parvathaneni
1
-0
/
+6
2020-03-17
[ARM][GCC][1/1x]: Patch to support MVE ACLE intrinsics with unary operand.
Srinath Parvathaneni
1
-0
/
+15
2020-03-17
[ARM][GCC][4/x]: MVE ACLE vector interleaving store intrinsics.
Srinath Parvathaneni
1
-0
/
+21