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path: root/gcc/config/arc/arc.h
AgeCommit message (Expand)AuthorFilesLines
2024-01-03Update copyright years.Jakub Jelinek1-1/+1
2023-10-30ARC: Improved ARC rtx_costs/insn_cost for SHIFTs and ROTATEs.Roger Sayle1-6/+9
2023-10-05arc: Remove unused/incomplete alignment assembly annotation.Claudiu Zissulescu1-16/+0
2023-09-05arc: Cleanup addsi3 instruction patternClaudiu Zissulescu1-15/+43
2023-01-02Update copyright years.Jakub Jelinek1-1/+1
2022-09-05rename DBX_REGISTER_NUMBER to DEBUGGER_REGNOMartin Liska1-2/+2
2022-09-02STABS: remove -gstabs and -gxcoff functionalityMartin Liska1-9/+1
2022-01-14arc: Add DWARF2 alternate CFA column.Claudiu Zissulescu1-3/+8
2022-01-03Update copyright years.Jakub Jelinek1-1/+1
2021-06-14arc: Add --with-fpu support for ARCv2 cpusClaudiu Zissulescu1-0/+4
2021-06-03arc: Remove obsolete optionsClaudiu Zissulescu1-3/+1
2021-06-02ARC: gcc driver default to hs38_linuxClaudiu Zissulescu1-1/+1
2021-05-10arc: Update ctz/clz patternsClaudiu Zissulescu1-0/+6
2021-05-10arc: Add alternative names for gp and fp registers.Claudiu Zissulescu1-0/+2
2021-01-04Update copyright years.Jakub Jelinek1-1/+1
2020-12-29arc: Make use reg_renumber safe.Claudiu Zissulescu1-1/+1
2020-03-31arc: Cleanup compilation warningClaudiu Zissulescu1-3/+3
2020-01-27[ARC] Save mlo/mhi registers when ISR.Claudiu Zissulescu1-8/+19
2020-01-01Update copyright years.Jakub Jelinek1-1/+1
2019-12-12[ARC] generate signaling FDCMPF for hard float comparisonsVineet Gupta1-1/+1
2019-10-02[ARC] Pass along "-mcode-density" flag to "as"Shahab Vahedi1-1/+2
2019-06-27builtins.c (get_memory_rtx): Fix comment.Aaron Sawdey1-1/+1
2019-04-16[ARC] Refactor deprecated macros.Claudiu Zissulescu1-11/+0
2019-04-16[ARC] Refurb eliminate regs.Claudiu Zissulescu1-13/+18
2019-03-18[ARC] Introduce ADJUST_REG_ALLOC_ORDER.Claudiu Zissulescu1-6/+27
2019-03-06[ARC] Fix logic set UNALIGNED_ACCESSClaudiu Zissulescu1-1/+1
2019-01-01Update copyright years.Jakub Jelinek1-1/+1
2018-12-14[ARC] Fix REG_CLASS_NAMES.Claudiu Zissulescu1-0/+1
2018-11-14[ARC] Cleanup, fix and set LRA default.Claudiu Zissulescu1-69/+36
2018-11-13[ARC] Add support for profiling in glibc.Claudiu Zissulescu1-9/+3
2018-11-13[ARC] Update EH code.Claudiu Zissulescu1-2/+0
2018-10-31[ARC] Add BI/BIH instruction support.Claudiu Zissulescu1-45/+65
2018-09-17[ARC] Enable DBNZ for core3 and newer CPUs.Vineet Gupta1-2/+2
2018-07-25[ARC] Add more additional register namesClaudiu Zissulescu1-1/+9
2018-03-06[ARC] Cleanup unused functions.Claudiu Zissulescu1-3/+0
2018-01-26[ARC] Add ARCv2 core3 tune option.Claudiu Zissulescu1-0/+2
2018-01-26[ARC] Add support for reduced register file setClaudiu Zissulescu1-1/+1
2018-01-08[ARC] Revamp trampoline implementationClaudiu Zissulescu1-1/+1
2018-01-08[ARC] Enable unaligned access.Claudiu Zissulescu1-1/+1
2018-01-03poly_int: GET_MODE_SIZERichard Sandiford1-2/+4
2018-01-03Update copyright years.Jakub Jelinek1-1/+1
2017-11-21[ARC] Reimplement exception handling support.Claudiu Zissulescu1-2/+5
2017-11-19[arc] Remove semicolon after do while (0) in FUNCTION_PROFILERTom de Vries1-1/+1
2017-11-05Remove semicolon after ASM_OUTPUT_BEFORE_CASE_LABEL macro bodyTom de Vries1-1/+1
2017-10-23Convert STARTING_FRAME_OFFSET to a hookRichard Sandiford1-6/+0
2017-09-25Turn CONSTANT_ALIGNMENT into a hookRichard Sandiford1-7/+0
2017-09-15Turn TRULY_NOOP_TRUNCATION into a hookRichard Sandiford1-4/+0
2017-09-12Turn HARD_REGNO_NREGS into a target hookRichard Sandiford1-9/+0
2017-09-04Turn MODES_TIEABLE_P into a target hookRichard Sandiford1-15/+0
2017-09-04Turn HARD_REGNO_MODE_OK into a target hookRichard Sandiford1-9/+3
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