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The arc_ifcvt procedure is removing a label even when it is used by
another jump. This patch fixes dg.exp/pr31507-1.c.
gcc/
2017-07-10 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_ifcvt): Remove use of merge_blocks call.
(arc_ccfsm_advance): Fix checking for delay slots.
(arc_reorg): Add rtl dump after each call to arc_ifcvt
From-SVN: r251588
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We don't want to use anchors for small data: the GP register acts as an anchor in that
case. We also don't want to use them for PC-relative accesses,
where the PC acts as an anchor. TLS symbols require special accesses as well, don't use
anchors for such symbols.
gcc/
2017-04-28 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_use_anchors_for_symbol_p): New function.
(TARGET_USE_ANCHORS_FOR_SYMBOL_P): Define.
gcc/testsuite
2017-04-28 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/pr9001184797.c: New test.
From-SVN: r251586
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Short branches cannot be used to jump between hot/cold
sections. Update the hook.
gcc/
2017-04-26 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_can_follow_jump): Check for short
branches.
From-SVN: r251566
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gcc/
2017-04-24 Claudiu Zissulescu <claziss@synopsys.com>
* config.gcc: Use g.opt for arc.
* config/arc/arc.c (LEGITIMATE_SCALED_ADDRESS_P): Deleted,
functionality moved to ...
(legitimate_scaled_address_p): New function, ...here.
(LEGITIMATE_SMALL_DATA_OFFSET_P): New define.
(LEGITIMATE_SMALL_DATA_ADDRESS_P): Use the above define.
(legitimate_offset_address_p): Delete TARGET_NO_SDATA_SET
condition.
(arc_override_options): Handle G option.
(arc_output_pic_addr_const): Correct function definition.
(arc_legitimate_address_p): Use legitimate_scaled_address_p.
(arc_decl_anon_ns_mem_p): Delete.
(arc_in_small_data_p): Overhaul this function to take into
consideration the value given via G option.
(arc_rewrite_small_data_1): Renamed and corrected old
arc_rewrite_small_data function.
(arc_rewrite_small_data): New function.
(small_data_pattern): Don't use pic_offset_table_rtx.
* config/arc/arc.h (CC1_SPEC): Recognize G option.
* config/arc/simdext.md (movmisalignv2hi): Use
prepare_move_operands function.
(mov*): Likewise.
(movmisalign*): Likewise.
gcc/testsuite/
2017-04-24 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/sdata-5.c: New test.
* gcc.target/arc/arc700-stld-hazard.c: Update test options.
Fix test
From-SVN: r251564
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Add alignment check for short load/store instructions used for sdata,
as they request 32-bit aligned short immediate. Use sdata symbol
alignment information and emit scalled loads/stores whenever is
possible. The scalled address will extend the access range for sdata
symbols. Allow 64-bit datum into small data section, if double
load/store instructions are present.
gcc/
2017-04-12 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (compact_sda_memory_operand): Update
prototype.
* config/arc/arc.c (arc_print_operand): Output scalled address for
sdata whenever is possible.
(arc_in_small_data_p): Allow sdata for 64bit datum when double
load/stores are available.
(compact_sda_memory_operand): Check for the alignment required by
code density instructions.
* config/arc/arc.md (movsi_insn): Use newly introduced Us0
constraint.
* config/arc/constraints.md (Usd): Update constraint.
(Us0): New constraint.
(Usc): Update constraint.
gcc/testsuite/
2017-04-12 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/sdata-3.c: New file.
From-SVN: r251562
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This patch makes the preferred_simd_mode target hook take a scalar_mode
rather than a machine_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (preferred_simd_mode): Take a scalar_mode
instead of a machine_mode.
* targhooks.h (default_preferred_simd_mode): Likewise.
* targhooks.c (default_preferred_simd_mode): Likewise.
* config/arc/arc.c (arc_preferred_simd_mode): Likewise.
* config/arm/arm.c (arm_preferred_simd_mode): Likewise.
* config/c6x/c6x.c (c6x_preferred_simd_mode): Likewise.
* config/epiphany/epiphany.c (epiphany_preferred_simd_mode): Likewise.
* config/i386/i386.c (ix86_preferred_simd_mode): Likewise.
* config/mips/mips.c (mips_preferred_simd_mode): Likewise.
* config/nvptx/nvptx.c (nvptx_preferred_simd_mode): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_preferred_simd_mode):
Likewise.
* config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Likewise.
* config/s390/s390.c (s390_preferred_simd_mode): Likewise.
* config/sparc/sparc.c (sparc_preferred_simd_mode): Likewise.
* config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Likewise.
(aarch64_simd_scalar_immediate_valid_for_move): Update accordingly.
* doc/tm.texi: Regenerate.
* optabs-query.c (can_vec_mask_load_store_p): Return false for
non-scalar modes.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251524
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This patch adds a wrapper around smallest_mode_for_size
for cases in which the mode class is MODE_INT. Unlike
(int_)mode_for_size, smallest_mode_for_size always returns
a mode of the specified class, asserting if no such mode exists.
smallest_int_mode_for_size therefore returns a scalar_int_mode
rather than an opt_scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (smallest_mode_for_size): Fix formatting.
(smallest_int_mode_for_size): New function.
* cfgexpand.c (expand_debug_expr): Use smallest_int_mode_for_size
instead of smallest_mode_for_size.
* combine.c (make_extraction): Likewise.
* config/arc/arc.c (arc_expand_movmem): Likewise.
* config/arm/arm.c (arm_expand_divmod_libfunc): Likewise.
* config/i386/i386.c (ix86_get_mask_mode): Likewise.
* config/s390/s390.c (s390_expand_insv): Likewise.
* config/sparc/sparc.c (assign_int_registers): Likewise.
* config/spu/spu.c (spu_function_value): Likewise.
(spu_function_arg): Likewise.
* coverage.c (get_gcov_type): Likewise.
(get_gcov_unsigned_t): Likewise.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (store_bit_field_1): Likewise.
* expr.c (convert_move): Likewise.
(store_field): Likewise.
* internal-fn.c (expand_arith_overflow): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs.c (expand_twoval_binop_libfunc): Likewise.
* stor-layout.c (layout_type): Likewise.
(initialize_sizetypes): Likewise.
* targhooks.c (default_get_mask_mode): Likewise.
* tree-ssa-loop-manip.c (canonicalize_loop_ivs): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251471
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All case statements need to be updated to use the prefixed names,
since the unprefixed names will eventually not be integer constant
expressions. This patch does a mechanical substitution over the whole
codebase.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_std_type):
Prefix mode names with E_ in case statements.
* config/aarch64/aarch64-elf.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
* config/aarch64/aarch64.c (aarch64_split_simd_combine): Likewise.
(aarch64_split_simd_move): Likewise.
(aarch64_gen_storewb_pair): Likewise.
(aarch64_gen_loadwb_pair): Likewise.
(aarch64_gen_store_pair): Likewise.
(aarch64_gen_load_pair): Likewise.
(aarch64_get_condition_code_1): Likewise.
(aarch64_constant_pool_reload_icode): Likewise.
(get_rsqrte_type): Likewise.
(get_rsqrts_type): Likewise.
(get_recpe_type): Likewise.
(get_recps_type): Likewise.
(aarch64_gimplify_va_arg_expr): Likewise.
(aarch64_simd_container_mode): Likewise.
(aarch64_emit_load_exclusive): Likewise.
(aarch64_emit_store_exclusive): Likewise.
(aarch64_expand_compare_and_swap): Likewise.
(aarch64_gen_atomic_cas): Likewise.
(aarch64_emit_bic): Likewise.
(aarch64_emit_atomic_swap): Likewise.
(aarch64_emit_atomic_load_op): Likewise.
(aarch64_evpc_trn): Likewise.
(aarch64_evpc_uzp): Likewise.
(aarch64_evpc_zip): Likewise.
(aarch64_evpc_ext): Likewise.
(aarch64_evpc_rev): Likewise.
(aarch64_evpc_dup): Likewise.
(aarch64_gen_ccmp_first): Likewise.
(aarch64_gen_ccmp_next): Likewise.
* config/alpha/alpha.c (alpha_scalar_mode_supported_p): Likewise.
(alpha_emit_xfloating_libcall): Likewise.
(emit_insxl): Likewise.
(alpha_arg_type): Likewise.
* config/arc/arc.c (arc_vector_mode_supported_p): Likewise.
(arc_preferred_simd_mode): Likewise.
(arc_secondary_reload): Likewise.
(get_arc_condition_code): Likewise.
(arc_print_operand): Likewise.
(arc_legitimate_constant_p): Likewise.
* config/arc/arc.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
* config/arc/arc.md (casesi_load): Likewise.
(casesi_compact_jump): Likewise.
* config/arc/predicates.md (proper_comparison_operator): Likewise.
(cc_use_register): Likewise.
* config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
* config/arm/arm-builtins.c (arm_simd_builtin_std_type): Likewise.
(arm_init_iwmmxt_builtins): Likewise.
* config/arm/arm.c (thumb1_size_rtx_costs): Likewise.
(neon_expand_vector_init): Likewise.
(arm_attr_length_move_neon): Likewise.
(maybe_get_arm_condition_code): Likewise.
(arm_emit_vector_const): Likewise.
(arm_preferred_simd_mode): Likewise.
(arm_output_iwmmxt_tinsr): Likewise.
(thumb1_output_casesi): Likewise.
(thumb2_output_casesi): Likewise.
(arm_emit_load_exclusive): Likewise.
(arm_emit_store_exclusive): Likewise.
(arm_expand_compare_and_swap): Likewise.
(arm_evpc_neon_vuzp): Likewise.
(arm_evpc_neon_vzip): Likewise.
(arm_evpc_neon_vrev): Likewise.
(arm_evpc_neon_vtrn): Likewise.
(arm_evpc_neon_vext): Likewise.
(arm_validize_comparison): Likewise.
* config/arm/neon.md (neon_vc<cmp_op><mode>): Likewise.
* config/avr/avr-c.c (avr_resolve_overloaded_builtin): Likewise.
* config/avr/avr.c (avr_rtx_costs_1): Likewise.
* config/c6x/c6x.c (c6x_vector_mode_supported_p): Likewise.
(c6x_preferred_simd_mode): Likewise.
* config/epiphany/epiphany.c (get_epiphany_condition_code): Likewise.
(epiphany_rtx_costs): Likewise.
* config/epiphany/predicates.md (proper_comparison_operator):
Likewise.
* config/frv/frv.c (condexec_memory_operand): Likewise.
(frv_emit_move): Likewise.
(output_move_single): Likewise.
(output_condmove_single): Likewise.
(frv_hard_regno_mode_ok): Likewise.
(frv_matching_accg_mode): Likewise.
* config/h8300/h8300.c (split_adds_subs): Likewise.
(h8300_rtx_costs): Likewise.
(h8300_print_operand): Likewise.
(compute_mov_length): Likewise.
(output_logical_op): Likewise.
(compute_logical_op_length): Likewise.
(compute_logical_op_cc): Likewise.
(h8300_shift_needs_scratch_p): Likewise.
(output_a_shift): Likewise.
(compute_a_shift_length): Likewise.
(compute_a_shift_cc): Likewise.
(expand_a_rotate): Likewise.
(output_a_rotate): Likewise.
* config/i386/i386.c (classify_argument): Likewise.
(function_arg_advance_32): Likewise.
(function_arg_32): Likewise.
(function_arg_64): Likewise.
(function_value_64): Likewise.
(ix86_gimplify_va_arg): Likewise.
(ix86_legitimate_constant_p): Likewise.
(put_condition_code): Likewise.
(split_double_mode): Likewise.
(ix86_avx256_split_vector_move_misalign): Likewise.
(ix86_expand_vector_logical_operator): Likewise.
(ix86_split_idivmod): Likewise.
(ix86_expand_adjust_ufix_to_sfix_si): Likewise.
(ix86_build_const_vector): Likewise.
(ix86_build_signbit_mask): Likewise.
(ix86_match_ccmode): Likewise.
(ix86_cc_modes_compatible): Likewise.
(ix86_expand_branch): Likewise.
(ix86_expand_sse_cmp): Likewise.
(ix86_expand_sse_movcc): Likewise.
(ix86_expand_int_sse_cmp): Likewise.
(ix86_expand_vec_perm_vpermi2): Likewise.
(ix86_expand_vec_perm): Likewise.
(ix86_expand_sse_unpack): Likewise.
(ix86_expand_int_addcc): Likewise.
(ix86_split_to_parts): Likewise.
(ix86_vectorize_builtin_gather): Likewise.
(ix86_vectorize_builtin_scatter): Likewise.
(avx_vpermilp_parallel): Likewise.
(inline_memory_move_cost): Likewise.
(ix86_tieable_integer_mode_p): Likewise.
(x86_maybe_negate_const_int): Likewise.
(ix86_expand_vector_init_duplicate): Likewise.
(ix86_expand_vector_init_one_nonzero): Likewise.
(ix86_expand_vector_init_one_var): Likewise.
(ix86_expand_vector_init_concat): Likewise.
(ix86_expand_vector_init_interleave): Likewise.
(ix86_expand_vector_init_general): Likewise.
(ix86_expand_vector_set): Likewise.
(ix86_expand_vector_extract): Likewise.
(emit_reduc_half): Likewise.
(ix86_emit_i387_round): Likewise.
(ix86_mangle_type): Likewise.
(ix86_expand_round_sse4): Likewise.
(expand_vec_perm_blend): Likewise.
(canonicalize_vector_int_perm): Likewise.
(ix86_expand_vec_one_operand_perm_avx512): Likewise.
(expand_vec_perm_1): Likewise.
(expand_vec_perm_interleave3): Likewise.
(expand_vec_perm_even_odd_pack): Likewise.
(expand_vec_perm_even_odd_1): Likewise.
(expand_vec_perm_broadcast_1): Likewise.
(ix86_vectorize_vec_perm_const_ok): Likewise.
(ix86_expand_vecop_qihi): Likewise.
(ix86_expand_mul_widen_hilo): Likewise.
(ix86_expand_sse2_abs): Likewise.
(ix86_expand_pextr): Likewise.
(ix86_expand_pinsr): Likewise.
(ix86_preferred_simd_mode): Likewise.
(ix86_simd_clone_compute_vecsize_and_simdlen): Likewise.
* config/i386/sse.md (*andnot<mode>3): Likewise.
(<mask_codefor><code><mode>3<mask_name>): Likewise.
(*<code><mode>3): Likewise.
* config/ia64/ia64.c (ia64_expand_vecint_compare): Likewise.
(ia64_expand_atomic_op): Likewise.
(ia64_arg_type): Likewise.
(ia64_mode_to_int): Likewise.
(ia64_scalar_mode_supported_p): Likewise.
(ia64_vector_mode_supported_p): Likewise.
(expand_vec_perm_broadcast): Likewise.
* config/iq2000/iq2000.c (iq2000_move_1word): Likewise.
(iq2000_function_arg_advance): Likewise.
(iq2000_function_arg): Likewise.
* config/m32c/m32c.c (m32c_preferred_reload_class): Likewise.
* config/m68k/m68k.c (output_dbcc_and_branch): Likewise.
(m68k_libcall_value): Likewise.
(m68k_function_value): Likewise.
(sched_attr_op_type): Likewise.
* config/mcore/mcore.c (mcore_output_move): Likewise.
* config/microblaze/microblaze.c (microblaze_function_arg_advance):
Likewise.
(microblaze_function_arg): Likewise.
* config/mips/mips.c (mips16_build_call_stub): Likewise.
(mips_print_operand): Likewise.
(mips_mode_ok_for_mov_fmt_p): Likewise.
(mips_vector_mode_supported_p): Likewise.
(mips_preferred_simd_mode): Likewise.
(mips_expand_vpc_loongson_even_odd): Likewise.
(mips_expand_vec_unpack): Likewise.
(mips_expand_vi_broadcast): Likewise.
(mips_expand_vector_init): Likewise.
(mips_expand_vec_reduc): Likewise.
(mips_expand_msa_cmp): Likewise.
* config/mips/mips.md (casesi_internal_mips16_<mode>): Likewise.
* config/mn10300/mn10300.c (mn10300_print_operand): Likewise.
(cc_flags_for_mode): Likewise.
* config/msp430/msp430.c (msp430_print_operand): Likewise.
* config/nds32/nds32-md-auxiliary.c (nds32_mem_format): Likewise.
(nds32_output_casesi_pc_relative): Likewise.
* config/nds32/nds32.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
* config/nvptx/nvptx.c (nvptx_ptx_type_from_mode): Likewise.
(nvptx_gen_unpack): Likewise.
(nvptx_gen_pack): Likewise.
(nvptx_gen_shuffle): Likewise.
(nvptx_gen_wcast): Likewise.
(nvptx_preferred_simd_mode): Likewise.
* config/pa/pa.c (pa_secondary_reload): Likewise.
* config/pa/predicates.md (base14_operand): Likewise.
* config/powerpcspe/powerpcspe-c.c
(altivec_resolve_overloaded_builtin): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_setup_reg_addr_masks):
Likewise.
(rs6000_preferred_simd_mode): Likewise.
(output_vec_const_move): Likewise.
(rs6000_expand_vector_extract): Likewise.
(rs6000_split_vec_extract_var): Likewise.
(reg_offset_addressing_ok_p): Likewise.
(rs6000_legitimate_offset_address_p): Likewise.
(rs6000_legitimize_address): Likewise.
(rs6000_emit_set_const): Likewise.
(rs6000_const_vec): Likewise.
(rs6000_emit_move): Likewise.
(spe_build_register_parallel): Likewise.
(rs6000_darwin64_record_arg_recurse): Likewise.
(swap_selector_for_mode): Likewise.
(spe_init_builtins): Likewise.
(paired_init_builtins): Likewise.
(altivec_init_builtins): Likewise.
(do_load_for_compare): Likewise.
(rs6000_generate_compare): Likewise.
(rs6000_expand_float128_convert): Likewise.
(emit_load_locked): Likewise.
(emit_store_conditional): Likewise.
(rs6000_output_function_epilogue): Likewise.
(rs6000_handle_altivec_attribute): Likewise.
(rs6000_function_value): Likewise.
(emit_fusion_gpr_load): Likewise.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/powerpcspe/predicates.md (easy_fp_constant): Likewise.
(fusion_gpr_mem_load): Likewise.
(fusion_addis_mem_combo_load): Likewise.
(fusion_addis_mem_combo_store): Likewise.
* config/rs6000/predicates.md (easy_fp_constant): Likewise.
(fusion_gpr_mem_load): Likewise.
(fusion_addis_mem_combo_load): Likewise.
(fusion_addis_mem_combo_store): Likewise.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Likewise.
* config/rs6000/rs6000-string.c (do_load_for_compare): Likewise.
* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): Likewise.
(rs6000_preferred_simd_mode): Likewise.
(output_vec_const_move): Likewise.
(rs6000_expand_vector_extract): Likewise.
(rs6000_split_vec_extract_var): Likewise.
(reg_offset_addressing_ok_p): Likewise.
(rs6000_legitimate_offset_address_p): Likewise.
(rs6000_legitimize_address): Likewise.
(rs6000_emit_set_const): Likewise.
(rs6000_const_vec): Likewise.
(rs6000_emit_move): Likewise.
(rs6000_darwin64_record_arg_recurse): Likewise.
(swap_selector_for_mode): Likewise.
(paired_init_builtins): Likewise.
(altivec_init_builtins): Likewise.
(rs6000_expand_float128_convert): Likewise.
(emit_load_locked): Likewise.
(emit_store_conditional): Likewise.
(rs6000_output_function_epilogue): Likewise.
(rs6000_handle_altivec_attribute): Likewise.
(rs6000_function_value): Likewise.
(emit_fusion_gpr_load): Likewise.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/rx/rx.c (rx_gen_move_template): Likewise.
(flags_from_mode): Likewise.
* config/s390/predicates.md (s390_alc_comparison): Likewise.
(s390_slb_comparison): Likewise.
* config/s390/s390.c (s390_handle_vectorbool_attribute): Likewise.
(s390_vector_mode_supported_p): Likewise.
(s390_cc_modes_compatible): Likewise.
(s390_match_ccmode_set): Likewise.
(s390_canonicalize_comparison): Likewise.
(s390_emit_compare_and_swap): Likewise.
(s390_branch_condition_mask): Likewise.
(s390_rtx_costs): Likewise.
(s390_secondary_reload): Likewise.
(__SECONDARY_RELOAD_CASE): Likewise.
(s390_expand_cs): Likewise.
(s390_preferred_simd_mode): Likewise.
* config/s390/vx-builtins.md (vec_packsu_u<mode>): Likewise.
* config/sh/sh.c (sh_print_operand): Likewise.
(dump_table): Likewise.
(sh_secondary_reload): Likewise.
* config/sh/sh.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
* config/sh/sh.md (casesi_worker_1): Likewise.
(casesi_worker_2): Likewise.
* config/sparc/predicates.md (icc_comparison_operator): Likewise.
(fcc_comparison_operator): Likewise.
* config/sparc/sparc.c (sparc_expand_move): Likewise.
(emit_soft_tfmode_cvt): Likewise.
(sparc_preferred_simd_mode): Likewise.
(output_cbranch): Likewise.
(sparc_print_operand): Likewise.
(sparc_expand_vec_perm_bmask): Likewise.
(vector_init_bshuffle): Likewise.
* config/spu/spu.c (spu_scalar_mode_supported_p): Likewise.
(spu_vector_mode_supported_p): Likewise.
(spu_expand_insv): Likewise.
(spu_emit_branch_or_set): Likewise.
(spu_handle_vector_attribute): Likewise.
(spu_builtin_splats): Likewise.
(spu_builtin_extract): Likewise.
(spu_builtin_promote): Likewise.
(spu_expand_sign_extend): Likewise.
* config/tilegx/tilegx.c (tilegx_scalar_mode_supported_p): Likewise.
(tilegx_simd_int): Likewise.
* config/tilepro/tilepro.c (tilepro_scalar_mode_supported_p): Likewise.
(tilepro_simd_int): Likewise.
* config/v850/v850.c (const_double_split): Likewise.
(v850_print_operand): Likewise.
(ep_memory_offset): Likewise.
* config/vax/vax.c (vax_rtx_costs): Likewise.
(vax_output_int_move): Likewise.
(vax_output_int_add): Likewise.
(vax_output_int_subtract): Likewise.
* config/visium/predicates.md (visium_branch_operator): Likewise.
* config/visium/visium.c (rtx_ok_for_offset_p): Likewise.
(visium_print_operand_address): Likewise.
* config/visium/visium.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
* config/xtensa/xtensa.c (xtensa_mem_offset): Likewise.
(xtensa_expand_conditional_branch): Likewise.
(xtensa_copy_incoming_a7): Likewise.
(xtensa_output_literal): Likewise.
* dfp.c (decimal_real_maxval): Likewise.
* targhooks.c (default_libgcc_floating_mode_supported_p): Likewise.
gcc/c-family/
* c-cppbuiltin.c (mode_has_fma): Prefix mode names with E_ in
case statements.
gcc/objc/
* objc-encoding.c (encode_gnu_bitfield): Prefix mode names with E_ in
case statements.
libobjc/
* encoding.c (_darwin_rs6000_special_round_type_align): Prefix mode
names with E_ in case statements.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251453
|
|
.
2017-08-08 Martin Liska <mliska@suse.cz>
* gcc-interface/trans.c: Include header files.
2017-08-08 Martin Liska <mliska@suse.cz>
* objc-gnu-runtime-abi-01.c: Include header files.
* objc-next-runtime-abi-01.c: Likewise.
* objc-next-runtime-abi-02.c: Likewise.
2017-08-08 Martin Liska <mliska@suse.cz>
* asan.c: Include header files.
* attribs.c (build_decl_attribute_variant): New function moved
from tree.[ch].
(build_type_attribute_qual_variant): Likewise.
(cmp_attrib_identifiers): Likewise.
(simple_cst_list_equal): Likewise.
(omp_declare_simd_clauses_equal): Likewise.
(attribute_value_equal): Likewise.
(comp_type_attributes): Likewise.
(build_type_attribute_variant): Likewise.
(lookup_ident_attribute): Likewise.
(remove_attribute): Likewise.
(merge_attributes): Likewise.
(merge_type_attributes): Likewise.
(merge_decl_attributes): Likewise.
(merge_dllimport_decl_attributes): Likewise.
(handle_dll_attribute): Likewise.
(attribute_list_equal): Likewise.
(attribute_list_contained): Likewise.
* attribs.h (lookup_attribute): New function moved from tree.[ch].
(lookup_attribute_by_prefix): Likewise.
* bb-reorder.c: Include header files.
* builtins.c: Likewise.
* calls.c: Likewise.
* cfgexpand.c: Likewise.
* cgraph.c: Likewise.
* cgraphunit.c: Likewise.
* convert.c: Likewise.
* dwarf2out.c: Likewise.
* final.c: Likewise.
* fold-const.c: Likewise.
* function.c: Likewise.
* gimple-expr.c: Likewise.
* gimple-fold.c: Likewise.
* gimple-pretty-print.c: Likewise.
* gimple.c: Likewise.
* gimplify.c: Likewise.
* hsa-common.c: Likewise.
* hsa-gen.c: Likewise.
* internal-fn.c: Likewise.
* ipa-chkp.c: Likewise.
* ipa-cp.c: Likewise.
* ipa-devirt.c: Likewise.
* ipa-fnsummary.c: Likewise.
* ipa-inline.c: Likewise.
* ipa-visibility.c: Likewise.
* ipa.c: Likewise.
* lto-cgraph.c: Likewise.
* omp-expand.c: Likewise.
* omp-general.c: Likewise.
* omp-low.c: Likewise.
* omp-offload.c: Likewise.
* omp-simd-clone.c: Likewise.
* opts-global.c: Likewise.
* passes.c: Likewise.
* predict.c: Likewise.
* sancov.c: Likewise.
* sanopt.c: Likewise.
* symtab.c: Likewise.
* toplev.c: Likewise.
* trans-mem.c: Likewise.
* tree-chkp.c: Likewise.
* tree-eh.c: Likewise.
* tree-into-ssa.c: Likewise.
* tree-object-size.c: Likewise.
* tree-parloops.c: Likewise.
* tree-profile.c: Likewise.
* tree-ssa-ccp.c: Likewise.
* tree-ssa-live.c: Likewise.
* tree-ssa-loop.c: Likewise.
* tree-ssa-sccvn.c: Likewise.
* tree-ssa-structalias.c: Likewise.
* tree-ssa.c: Likewise.
* tree-streamer-in.c: Likewise.
* tree-vectorizer.c: Likewise.
* tree-vrp.c: Likewise.
* tsan.c: Likewise.
* ubsan.c: Likewise.
* varasm.c: Likewise.
* varpool.c: Likewise.
* tree.c: Remove functions moved to attribs.[ch].
* tree.h: Likewise.
* config/aarch64/aarch64.c: Add attrs.h header file.
* config/alpha/alpha.c: Likewise.
* config/arc/arc.c: Likewise.
* config/arm/arm.c: Likewise.
* config/avr/avr.c: Likewise.
* config/bfin/bfin.c: Likewise.
* config/c6x/c6x.c: Likewise.
* config/cr16/cr16.c: Likewise.
* config/cris/cris.c: Likewise.
* config/darwin.c: Likewise.
* config/epiphany/epiphany.c: Likewise.
* config/fr30/fr30.c: Likewise.
* config/frv/frv.c: Likewise.
* config/ft32/ft32.c: Likewise.
* config/h8300/h8300.c: Likewise.
* config/i386/winnt.c: Likewise.
* config/ia64/ia64.c: Likewise.
* config/iq2000/iq2000.c: Likewise.
* config/lm32/lm32.c: Likewise.
* config/m32c/m32c.c: Likewise.
* config/m32r/m32r.c: Likewise.
* config/m68k/m68k.c: Likewise.
* config/mcore/mcore.c: Likewise.
* config/microblaze/microblaze.c: Likewise.
* config/mips/mips.c: Likewise.
* config/mmix/mmix.c: Likewise.
* config/mn10300/mn10300.c: Likewise.
* config/moxie/moxie.c: Likewise.
* config/msp430/msp430.c: Likewise.
* config/nds32/nds32-isr.c: Likewise.
* config/nds32/nds32.c: Likewise.
* config/nios2/nios2.c: Likewise.
* config/nvptx/nvptx.c: Likewise.
* config/pa/pa.c: Likewise.
* config/pdp11/pdp11.c: Likewise.
* config/powerpcspe/powerpcspe.c: Likewise.
* config/riscv/riscv.c: Likewise.
* config/rl78/rl78.c: Likewise.
* config/rx/rx.c: Likewise.
* config/s390/s390.c: Likewise.
* config/sh/sh.c: Likewise.
* config/sol2.c: Likewise.
* config/sparc/sparc.c: Likewise.
* config/spu/spu.c: Likewise.
* config/stormy16/stormy16.c: Likewise.
* config/tilegx/tilegx.c: Likewise.
* config/tilepro/tilepro.c: Likewise.
* config/v850/v850.c: Likewise.
* config/vax/vax.c: Likewise.
* config/visium/visium.c: Likewise.
* config/xtensa/xtensa.c: Likewise.
2017-08-08 Martin Liska <mliska@suse.cz>
* call.c: Include header files.
* cp-gimplify.c: Likewise.
* cp-ubsan.c: Likewise.
* cvt.c: Likewise.
* init.c: Likewise.
* search.c: Likewise.
* semantics.c: Likewise.
* typeck.c: Likewise.
2017-08-08 Martin Liska <mliska@suse.cz>
* lto-lang.c: Include header files.
* lto-symtab.c: Likewise.
2017-08-08 Martin Liska <mliska@suse.cz>
* c-convert.c: Include header files.
* c-typeck.c: Likewise.
2017-08-08 Martin Liska <mliska@suse.cz>
* c-ada-spec.c: Include header files.
* c-ubsan.c: Likewise.
* c-warn.c: Likewise.
2017-08-08 Martin Liska <mliska@suse.cz>
* trans-types.c: Include header files.
From-SVN: r250946
|
|
This patch refactors a number of functions and compiler hooks into using a
single function which checks if a rtx is suited for pic or not. Removed
functions are arc_legitimate_pc_offset_p and arc_legitimate_pic_operand_p
beeing replaced by calls to arc_legitimate_pic_addr_p. Thus we have an
unitary way of checking a rtx beeing pic.
gcc/
2017-07-17 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (arc_legitimate_pc_offset_p): Remove
proto.
(arc_legitimate_pic_operand_p): Likewise.
* config/arc/arc.c (arc_legitimate_pic_operand_p): Remove
function.
(arc_needs_pcl_p): Likewise.
(arc_legitimate_pc_offset_p): Likewise.
(arc_legitimate_pic_addr_p): Remove LABEL_REF case, as this
function is also used in constrains.md.
(arc_legitimate_constant_p): Use arc_legitimate_pic_addr_p to
validate pic constants. Handle CONST_INT, CONST_DOUBLE, MINUS and
PLUS. Only return true/false in known cases, otherwise assert.
(arc_legitimate_address_p): Remove arc_legitimate_pic_addr_p as it
is already called in arc_legitimate_constant_p.
* config/arc/arc.h (CONSTANT_ADDRESS_P): Consider also LABEL for
pic addresses.
(LEGITIMATE_PIC_OPERAND_P): Use
arc_raw_symbolic_reference_mentioned_p function.
* config/arc/constraints.md (Cpc): Use arc_legitimate_pic_addr_p
function.
(Cal): Likewise.
(C32): Likewise.
gcc/testsuite
2017-07-17 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/pr9000674901.c: New file.
* gcc.target/arc/pic-1.c: Likewise.
* gcc.target/arc/pr9001191897.c: Likewise.
From-SVN: r250267
|
|
gcc/
2017-07-17 Claudiu Zissulescu <claziss@synopsys.com>
Andrew Burgess <andrew.burgess@embecosm.com>
* config/arc/arc-protos.h (arc_compute_function_type): Change prototype.
(arc_return_address_register): New function.
* config/arc/arc.c (arc_handle_fndecl_attribute): New function.
(arc_handle_fndecl_attribute): Add naked attribute.
(TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS): Define.
(TARGET_WARN_FUNC_RETURN): Likewise.
(arc_allocate_stack_slots_for_args): New function.
(arc_warn_func_return): Likewise.
(machine_function): Change type fn_type.
(arc_compute_function_type): Consider new naked function type,
change function return type.
(arc_must_save_register): Adapt to handle new
arc_compute_function_type's return type.
(arc_expand_prologue): Likewise.
(arc_expand_epilogue): Likewise.
(arc_return_address_regs): Delete.
(arc_return_address_register): New function.
(arc_epilogue_uses): Use above function.
* config/arc/arc.h (arc_return_address_regs): Delete prototype.
(arc_function_type): Change encoding, add naked type.
(ARC_INTERRUPT_P): Change to handle the new encoding.
(ARC_FAST_INTERRUPT_P): Likewise.
(ARC_NORMAL_P): Define.
(ARC_NAKED_P): Likewise.
(arc_compute_function_type): Delete prototype.
* config/arc/arc.md (in_ret_delay_slot): Use
arc_return_address_register function.
(simple_return): Likewise.
(p_return_i): Likewise.
gcc/testsuite
2017-07-17 Claudiu Zissulescu <claziss@synopsys.com>
Andrew Burgess <andrew.burgess@embecosm.com>
* gcc.target/arc/naked-1.c: New file.
* gcc.target/arc/naked-2.c: Likewise.
Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r250266
|
|
functions.
* profile-count.h (profile_probability::from_reg_br_prob_note,
profile_probability::to_reg_br_prob_note): New functions.
* doc/rtl.texi (REG_BR_PROB_NOTE): Update documentation.
* reg-notes.h (REG_BR_PROB, REG_BR_PRED): Update docs.
* predict.c (probability_reliable_p): Update.
(edge_probability_reliable_p): Update.
(br_prob_note_reliable_p): Update.
(invert_br_probabilities): Update.
(add_reg_br_prob_note): New function.
(combine_predictions_for_insn): Update.
* asan.c (asan_clear_shadow): Update.
* cfgbuild.c (compute_outgoing_frequencies): Update.
* cfgrtl.c (force_nonfallthru_and_redirect): Update.
(update_br_prob_note): Update.
(rtl_verify_edges): Update.
(purge_dead_edges): Update.
(fixup_reorder_chain): Update.
* emit-rtl.c (try_split): Update.
* ifcvt.c (cond_exec_process_insns): Update.
(cond_exec_process_if_block): Update.
(dead_or_predicable): Update.
* internal-fn.c (expand_addsub_overflow): Update.
(expand_neg_overflow): Update.
(expand_mul_overflow): Update.
* loop-doloop.c (doloop_modify): Update.
* loop-unroll.c (compare_and_jump_seq): Update.
* optabs.c (emit_cmp_and_jump_insn_1): Update.
* predict.h: Update.
* reorg.c (mostly_true_jump): Update.
* rtl.h: Update.
* config/aarch64/aarch64.c (aarch64_emit_unlikely_jump): Update.
* config/alpha/alpha.c (emit_unlikely_jump): Update.
* config/arc/arc.c: (emit_unlikely_jump): Update.
* config/arm/arm.c: (emit_unlikely_jump): Update.
* config/bfin/bfin.c (cbranch_predicted_taken_p): Update.
* config/frv/frv.c (frv_print_operand_jump_hint): Update.
* config/i386/i386.c (ix86_expand_split_stack_prologue): Update.
(ix86_print_operand): Update.
(ix86_split_fp_branch): Update.
(predict_jump): Update.
* config/ia64/ia64.c (ia64_print_operand): Update.
* config/mmix/mmix.c (mmix_print_operand): Update.
* config/powerpcspe/powerpcspe.c (output_cbranch): Update.
(rs6000_expand_split_stack_prologue): Update.
* config/rs6000/rs6000.c: Update.
* config/s390/s390.c (s390_expand_vec_strlen): Update.
(s390_expand_vec_movstr): Update.
(s390_expand_cs_tdsi): Update.
(s390_expand_split_stack_prologue): Update.
* config/sh/sh.c (sh_print_operand): Update.
(expand_cbranchsi4): Update.
(expand_cbranchdi4): Update.
* config/sparc/sparc.c (output_v9branch): Update.
* config/spu/spu.c (get_branch_target): Update.
(ea_load_store_inline): Update.
* config/tilegx/tilegx.c (cbranch_predicted_p): Update.
* config/tilepro/tilepro.c: Update.
* gcc.dg/predict-8.c: Update.
From-SVN: r250239
|
|
r216834 did a mass removal of "enum" before "machine_mode". This patch
removes some new uses that have been added since then.
2017-07-05 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_if_then_else): Remove "enum" before
"machine_mode".
* compare-elim.c (can_eliminate_compare): Likewise.
* config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_std_type):
Likewise.
(aarch64_lookup_simd_builtin_type): Likewise.
(aarch64_simd_builtin_type): Likewise.
(aarch64_init_simd_builtin_types): Likewise.
(aarch64_simd_expand_args): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_rglist):
Likewise.
(aarch64_reverse_mask): Likewise.
(aarch64_simd_emit_reg_reg_move): Likewise.
(aarch64_gen_adjusted_ldpstp): Likewise.
(aarch64_ccmp_mode_to_code): Likewise.
(aarch64_operands_ok_for_ldpstp): Likewise.
(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
* config/aarch64/aarch64.c (aarch64_ira_change_pseudo_allocno_class):
Likewise.
(aarch64_min_divisions_for_recip_mul): Likewise.
(aarch64_reassociation_width): Likewise.
(aarch64_get_condition_code_1): Likewise.
(aarch64_simd_emit_reg_reg_move): Likewise.
(aarch64_simd_attr_length_rglist): Likewise.
(aarch64_reverse_mask): Likewise.
(aarch64_operands_ok_for_ldpstp): Likewise.
(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
(aarch64_gen_adjusted_ldpstp): Likewise.
* config/aarch64/cortex-a57-fma-steering.c (fma_node::rename):
Likewise.
* config/arc/arc.c (legitimate_offset_address_p): Likewise.
* config/arm/arm-builtins.c (arm_simd_builtin_std_type): Likewise.
(arm_lookup_simd_builtin_type): Likewise.
(arm_simd_builtin_type): Likewise.
(arm_init_simd_builtin_types): Likewise.
(arm_expand_builtin_args): Likewise.
* config/arm/arm-protos.h (arm_expand_builtin): Likewise.
* config/ft32/ft32.c (ft32_libcall_value): Likewise.
(ft32_setup_incoming_varargs): Likewise.
(ft32_function_arg): Likewise.
(ft32_function_arg_advance): Likewise.
(ft32_pass_by_reference): Likewise.
(ft32_arg_partial_bytes): Likewise.
(ft32_valid_pointer_mode): Likewise.
(ft32_addr_space_pointer_mode): Likewise.
(ft32_addr_space_legitimate_address_p): Likewise.
* config/i386/i386-protos.h (ix86_operands_ok_for_move_multiple):
Likewise.
* config/i386/i386.c (ix86_setup_incoming_vararg_bounds): Likewise.
(ix86_emit_outlined_ms2sysv_restore): Likewise.
(iamcu_alignment): Likewise.
(canonicalize_vector_int_perm): Likewise.
(ix86_noce_conversion_profitable_p): Likewise.
(ix86_mpx_bound_mode): Likewise.
(ix86_operands_ok_for_move_multiple): Likewise.
* config/microblaze/microblaze-protos.h
(microblaze_expand_conditional_branch_reg): Likewise.
* config/microblaze/microblaze.c
(microblaze_expand_conditional_branch_reg): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_init_hard_regno_mode_ok):
Likewise.
(rs6000_reassociation_width): Likewise.
(rs6000_invalid_binary_op): Likewise.
(fusion_p9_p): Likewise.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/riscv/riscv-protos.h (riscv_regno_mode_ok_for_base_p):
Likewise.
(riscv_hard_regno_mode_ok_p): Likewise.
(riscv_address_insns): Likewise.
(riscv_split_symbol): Likewise.
(riscv_legitimize_move): Likewise.
(riscv_function_value): Likewise.
(riscv_hard_regno_nregs): Likewise.
(riscv_expand_builtin): Likewise.
* config/riscv/riscv.c (riscv_build_integer_1): Likewise.
(riscv_build_integer): Likewise.
(riscv_split_integer): Likewise.
(riscv_legitimate_constant_p): Likewise.
(riscv_cannot_force_const_mem): Likewise.
(riscv_regno_mode_ok_for_base_p): Likewise.
(riscv_valid_base_register_p): Likewise.
(riscv_valid_offset_p): Likewise.
(riscv_valid_lo_sum_p): Likewise.
(riscv_classify_address): Likewise.
(riscv_legitimate_address_p): Likewise.
(riscv_address_insns): Likewise.
(riscv_load_store_insns): Likewise.
(riscv_force_binary): Likewise.
(riscv_split_symbol): Likewise.
(riscv_force_address): Likewise.
(riscv_legitimize_address): Likewise.
(riscv_move_integer): Likewise.
(riscv_legitimize_const_move): Likewise.
(riscv_legitimize_move): Likewise.
(riscv_address_cost): Likewise.
(riscv_subword): Likewise.
(riscv_output_move): Likewise.
(riscv_canonicalize_int_order_test): Likewise.
(riscv_emit_int_order_test): Likewise.
(riscv_function_arg_boundary): Likewise.
(riscv_pass_mode_in_fpr_p): Likewise.
(riscv_pass_fpr_single): Likewise.
(riscv_pass_fpr_pair): Likewise.
(riscv_get_arg_info): Likewise.
(riscv_function_arg): Likewise.
(riscv_function_arg_advance): Likewise.
(riscv_arg_partial_bytes): Likewise.
(riscv_function_value): Likewise.
(riscv_pass_by_reference): Likewise.
(riscv_setup_incoming_varargs): Likewise.
(riscv_print_operand): Likewise.
(riscv_elf_select_rtx_section): Likewise.
(riscv_save_restore_reg): Likewise.
(riscv_for_each_saved_reg): Likewise.
(riscv_register_move_cost): Likewise.
(riscv_hard_regno_mode_ok_p): Likewise.
(riscv_hard_regno_nregs): Likewise.
(riscv_class_max_nregs): Likewise.
(riscv_memory_move_cost): Likewise.
* config/rl78/rl78-protos.h (rl78_split_movsi): Likewise.
* config/rl78/rl78.c (rl78_split_movsi): Likewise.
(rl78_addr_space_address_mode): Likewise.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Likewise.
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Likewise.
(rs6000_reassociation_width): Likewise.
(rs6000_invalid_binary_op): Likewise.
(fusion_p9_p): Likewise.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/visium/visium-protos.h (prepare_move_operands): Likewise.
(ok_for_simple_move_operands): Likewise.
(ok_for_simple_move_strict_operands): Likewise.
(ok_for_simple_arith_logic_operands): Likewise.
(visium_legitimize_reload_address): Likewise.
(visium_select_cc_mode): Likewise.
(output_cbranch): Likewise.
(visium_split_double_move): Likewise.
(visium_expand_copysign): Likewise.
(visium_expand_int_cstore): Likewise.
(visium_expand_fp_cstore): Likewise.
* config/visium/visium.c (visium_pass_by_reference): Likewise.
(visium_function_arg): Likewise.
(visium_function_arg_advance): Likewise.
(visium_libcall_value): Likewise.
(visium_setup_incoming_varargs): Likewise.
(visium_legitimate_constant_p): Likewise.
(visium_legitimate_address_p): Likewise.
(visium_legitimize_address): Likewise.
(visium_secondary_reload): Likewise.
(visium_register_move_cost): Likewise.
(visium_memory_move_cost): Likewise.
(prepare_move_operands): Likewise.
(ok_for_simple_move_operands): Likewise.
(ok_for_simple_move_strict_operands): Likewise.
(ok_for_simple_arith_logic_operands): Likewise.
(visium_function_value_1): Likewise.
(rtx_ok_for_offset_p): Likewise.
(visium_legitimize_reload_address): Likewise.
(visium_split_double_move): Likewise.
(visium_expand_copysign): Likewise.
(visium_expand_int_cstore): Likewise.
(visium_expand_fp_cstore): Likewise.
(visium_split_cstore): Likewise.
(visium_select_cc_mode): Likewise.
(visium_split_cbranch): Likewise.
(output_cbranch): Likewise.
(visium_print_operand_address): Likewise.
* expmed.c (flip_storage_order): Likewise.
* expmed.h (emit_cstore): Likewise.
(flip_storage_order): Likewise.
* genrecog.c (validate_pattern): Likewise.
* hsa-gen.c (gen_hsa_addr): Likewise.
* internal-fn.c (expand_arith_overflow): Likewise.
* ira-color.c (allocno_copy_cost_saving): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
(process_invariant_for_inheritance): Likewise.
* lra-eliminations.c (move_plus_up): Likewise.
* omp-low.c (lower_oacc_reductions): Likewise.
* simplify-rtx.c (simplify_subreg): Likewise.
* target.def (TARGET_SETUP_INCOMING_VARARG_BOUNDS): Likewise.
(TARGET_CHKP_BOUND_MODE): Likewise..
* targhooks.c (default_chkp_bound_mode): Likewise.
(default_setup_incoming_vararg_bounds): Likewise.
* targhooks.h (default_chkp_bound_mode): Likewise.
(default_setup_incoming_vararg_bounds): Likewise.
* tree-ssa-math-opts.c (divmod_candidate_p): Likewise.
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
(have_whole_vector_shift): Likewise.
* tree-vect-stmts.c (vectorizable_load): Likewise.
* doc/tm.texi: Regenerate.
gcc/brig/
* brig-c.h (brig_type_for_mode): Remove "enum" before "machine_mode".
* brig-lang.c (brig_langhook_type_for_mode): Likewise.
gcc/jit/
* dummy-frontend.c (jit_langhook_type_for_mode): Remove "enum" before
"machine_mode".
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r250003
|
|
arc_can_eliminate is using arc_frmae_pointer_required() which is wrong
as the frame_pointer_needed can be set on different conditions. Fix it
by calling arc_frame_pointer_needed().
gcc/
2017-06-01 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_can_eliminate): Test against
arc_frame_pointer_needed.
From-SVN: r248782
|
|
If the stack pointer is needed, emit a special barrier that will prevent
the scheduler from moving stores to the frame before the stack adjustment.
For example:
[snip]
mov_s fp,sp ; frame pointer is set here
[snip]
st r1,[fp,-24] ; frame pointer is used here
[snip]
sub_s sp,sp,0x20 ; stack pointer adjusted
So we can easily see that any interrupt between the `st` and `sub`
instruction will lead to faulty code as the interrupt routine will use
a faulty sp register, and, potentially, overwriting the value stored
by 'st' instruction. Thus, adding a scheduler barrier will force the
compiler to emit the `sub` instruction before the store one.
2017-06-01 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_expand_prologue): Emit a special barrier
to prevent store reordering.
* config/arc/arc.md (UNSPEC_ARC_STKTIE): Define.
(type): Add block type.
(stack_tie): Define special instruction to be used in
expand_prologue.
From-SVN: r248781
|
|
gcc/
2018-06-01 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_conditional_register_usage): Allow r30 to
be used by the reg-alloc.
From-SVN: r248778
|
|
Since the combine pass canonicalises shift-add insns using plus and
ashift (as opposed to plus and mult which it previously used to do), it
no longer creates *add_n or *sub_n insns, as the patterns match plus and
mult only. The outcome of this is that some opportunities to generate
add{1,2,3} and sub{1,2,3} instructions are missed.
This change adds additional *add_n and *sub_n insns that match the
plus-ashift pattern. The original *add_n and *sub_n insns are still left
in, as they are sometimes generated later on by constant propagation.
The idea of adding these insns is modelled on the changes in:
https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01882.html
which addresses a similar issue for the PA target.
For the small test cases that are added, even if the combine pass misses
the opportunity to generate addN or subN, constant propagation manages
to do so, so the rtl of the combine pass is checked.
gcc/ChangeLog:
* config/arc/arc.c (arc_print_operand): Handle constant operands.
(arc_rtx_costs): Add costs for new patterns.
* config/arc/arc.md: Additional *add_n and *sub_n patterns.
* config/arc/predicates.md: Add _1_2_3_operand predicate.
gcc/testsuite/ChangeLog:
* gcc.target/arc/add_n-combine.c: New test.
* gcc.target/arc/sub_n-combine.c: New test.
From-SVN: r248735
|
|
gcc/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_conditional_register_usage): Handle ACCL,
ACCH registers.
* config/arc/arc.md (mulsidi3): Use advanced mpy instructions when
available.
(umulsidi3): Likewise.
(mulsidi3_700): Disable this pattern when we have advanced mpy
instructions.
(umulsidi3_700): Likewise.
(maddsidi4): New pattern.
(macd, mac, mac_r, umaddsidi4, macdu, macu, macu_r): Likewise.
(mpyd_arcv2hs, mpyd_imm_arcv2hs, mpydu_arcv2hs): Likewise.
(mpydu_imm_arcv2hs): Likewise.
* config/arc/predicates.md (accl_operand): New predicate.
From-SVN: r247797
|
|
When a processor enters a fast interrupts handler, and duplicate
register banks are configured, the processor saves the user context by
saving the registers in the main register bank to these additional
registers in the duplicate register bank. In this fast interrupt
context, when you specify the rgf_banked_regs option,the compiler does
not save the registers duplicated in the additional register bank are
not saved.
gcc/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
Andrew Burgess <andrew.burgess@embecosm.com>
* config/arc/arc.c (ARC_AUTOBLINK_IRQ_P): Consider fast interrupts
case also.
(ARC_AUTOFP_IRQ_P): Likewise.
(ARC_AUTO_IRQ_P): Likewise.
(rgf_banked_register_count): New variable.
(parse_mrgf_banked_regs_option): New function.
(arc_override_options): Handle rgf_banked_regs option.
(arc_handle_interrupt_attribute): Add firq option.
(arc_compute_function_type): Return fast irq type when required.
(arc_must_save_register): Handle fast interrupts.
(arc_expand_prologue): Do not emit dwarf info for fast interrupts.
(arc_return_address_regs): Update.
* config/arc/arc.h (arc_return_address_regs): Update.
(arc_function_type): Add fast interrupt type.
(ARC_INTERRUPT_P): Update.
(RC_FAST_INTERRUPT_P): Define.
* config/arc/arc.md (simple_return): Update for fast interrupts.
(p_return_i): Likewise.
* config/arc/arc.opt (mrgf-banked-regs): New option.
* doc/invoke.texi (mrgf-banked-regs): Document.
testsuite/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
Andrew Burgess <andrew.burgess@embecosm.com>
* gcc.target/arc/firq-1.c: New file.
* gcc.target/arc/firq-2.c: Likewise.
* gcc.target/arc/firq-3.c: Likewise.
* gcc.target/arc/firq-4.c: Likewise.
* gcc.target/arc/firq-5.c: Likewise.
* gcc.target/arc/firq-6.c: Likewise.
Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r247796
|
|
The AUX_IRQ_CTRL register controls the behavior of automated register
save and restore or prologue and epilogue sequences during a non-fast
interrupt entry and exit, and context save and restore instructions.
A user passes to the compiler the configuration of the AUX_IRQ_CTRL
register via mirq-ctrl-saved option. This option, specifies
gneral-purposes registers that the processor saves/restores on
interrupt entry and exit, and it is only valid for ARC EM and ARC HS
cores.
gcc/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (irq_ctrl_saved): New variable.
(ARC_AUTOBLINK_IRQ_P): Define.
(ARC_AUTOFP_IRQ_P): Likewise.
(ARC_AUTO_IRQ_P): Likewise.
(irq_range): New function.
(arc_must_save_register): Likewise.
(arc_must_save_return_addr): Likewise.
(arc_dwarf_emit_irq_save_regs): Likewise.
(arc_override_options): Handle deferred options.
(MUST_SAVE_REGISTER): Deleted, replaced by arc_must_save_register.
(MUST_SAVE_RETURN_ADDR): Deleted, replaced by
arc_must_save_return_addr.
(arc_compute_frame_size): Handle automated save and restore of
registers.
(arc_expand_prologue): Likewise.
(arc_expand_epilogue): Likewise.
* config/arc/arc.md (stack_irq_dwarf): New unspec instruction.
* config/arc/arc.opt (mirq-ctrl-saved): New option.
* doc/invoke.texi (mirq-ctrl-saved): Document option.
testsuite/
2017-05-09 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/interrupt-5.c: Newfile.
* gcc.target/arc/interrupt-6.c: Likewise.
* gcc.target/arc/interrupt-7.c: Likewise.
* gcc.target/arc/interrupt-8.c: Likewise.
* gcc.target/arc/interrupt-9.c: Likewise.
From-SVN: r247795
|
|
gcc/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (LEGITIMATE_OFFSET_ADDRESS_P): Delete macro.
(legitimate_offset_address_p): New function.
(arc_legitimate_address_p): Use above function.
From-SVN: r247201
|
|
The TARGET_ASM_OUTPUT_MI_THUNK hook doesn't take into account the
variant when we compile for PIC.
gcc/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_output_mi_thunk): Emit PIC calls.
From-SVN: r247200
|
|
gcc/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_conditional_register_usage): Use ACCL,
ACCH registers whenever they are available.
From-SVN: r247199
|
|
gcc/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_conditional_register_usage): Make D0, D1
double regs fix when not used.
From-SVN: r247198
|
|
gcc/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_output_addsi): Check for h-register class
when emitting short ADD instructions.
From-SVN: r247195
|
|
We use a negative ID number to link together the doloop_begin and
doloop_end instructions. This negative ID number is setup within
doloop_begin, at this point the ID is stored into the loop end
instruction (doloop_end_i) and placed into the doloop_begin_i
instruction.
In arc.c (arc_reorg) we extract the ID from the doloop_end_i
instruction in order to find the matching doloop_begin_i instruction,
though the ID is only used in some cases.
Currently in arc_reorg when we extract the ID we negate it. This
negation is invalid. The ID stored in both doloop_end_i and
doloop_begin_i is already negative, the negation in arc_reorg means
that if we need to use the ID to find the doloop_begin_i then we will
never find it (as the IDs will never match).
This commit removes the unneeded negation, moves the extraction of the
ID into a more appropriately scoped block and adds a new test for this
issue.
gcc/ChangeLog:
* config/arc/arc.c (arc_reorg): Move loop_end_id into a more local
block, and do not negate it, the stored id is already negative.
gcc/testsuite/ChangeLog:
* gcc.target/arc/loop-1.c: New file.
Co-Authored-By: Guy Benyei <guybe@mellanox.com>
From-SVN: r246933
|
|
The use of CFA_FRAME_BASE_OFFSET and ARG_POINTER_CFA_OFFSET macros
leads to wrong offset calculation for DW_OP_fbreg constructions.
Remove them.
gcc/
2017-04-14 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (arc_decl_pretend_args): Remove.
* config/arc/arc.c (arc_decl_pretend_args): Likewise.
* config/arc/arc.h (CFA_FRAME_BASE_OFFSET): Likewise.
(ARG_POINTER_CFA_OFFSET): Likewise.
From-SVN: r246926
|
|
Update arc_mode_dependent_address_p to avoid emitting subreg(mem (reg
..)) when expanding by relaxing the conditions.
gcc/
2017-04-14 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_mode_dependent_address_p): Relax
conditions to take advantage of various optimizations.
From-SVN: r246925
|
|
gcc/
2017-03-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_epilogue_uses): BLINK should be also
restored when in interrupt.
* config/arc/arc.md (simple_return): ARCv2 rtie instruction
doesn't have delay slot.
2017-03-27 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gcc.target/arc/interrupt-4.c: New file.
From-SVN: r246495
|
|
gcc/
2017-03-13 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_init): Use multiplier whenever we have it.
(arc_conditional_register_usage): Use a different allocation order
when optimizing for size.
* common/config/arc/arc-common.c (arc_option_optimization_table):
Section anchors default on when optimizing for size.
From-SVN: r246091
|
|
gcc/
2017-03-13 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_output_addsi): Emit code density adds.
* config/arc/arc.md (cpu_facility): Add cd variant.
(*movqi_insn): Add code density variant.
(*movhi_insn): Likewise.
(*movqi_insn): Likewise.
(*addsi3_mixed): Likewise.
(subsi3_insn): Likewise.
From-SVN: r246089
|
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fwprop step is placing in the REG_EQUIV notes constant pic unspecs
expressions. Then, loop may use these notes for optimizations
rezulting in complex patterns that are not supported by the current
implementation.
The patch adds handling of complex PIC addresses having MINUS or UNARY
operations.
gcc/
2017-03-13 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_legitimize_pic_address): Handle PIC
expressions with MINUS and UNARY ops.
gcc/testsuite
2017-03-13 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/pr9001090948.c: New file.
From-SVN: r246087
|
|
* config/arc/arc.c (arc_ccfsm_advance): Only take the PATTERN of
this_insn if it is an INSN or JUMP_INSN.
(force_offsettable): Look at base, not at addr.
* config/arc/predicates.md (brcc_nolimm_operator): Don't call INTVAL
on things that aren' necessarily CONST_INTs.
From-SVN: r245720
|
|
Currently we only make the base_architecture globally available, this
means we can tell if we have selected arc700/archs/etc but it's not
possible to tell if the user has selected a specific cpu variant, for
example nps400.
One problem this causes is, for example, in arc-c.def, if we want to add
an __NPS400__ define then we need a flag we can check to determine if
this is the right thing to do.
In this commit the arc_selected_cpu variable (previously local within
arc.c) has been made global. Two other variables arc_base_cpu and
arc_selected_arch have been deleted, all of this information can be
found within (or through) arc_selected_cpu.
All uses of arc_base_cpu and arc_selected_arch have been updated. This
commit does not introduce any new defines (like __NPS400__), this is
just a restructuring commit.
The declaration of arc_selected_cpu has moved into arc-arch.h, in
contrast to the declaration of arc_base_cpu which was previously in
arc.h. This avoids a compilation issue when building libgcc, as the
structure and enums declared in arc-arch.h are not included for libgcc
then declaring an arc_selected_cpu (a struct type) in arc.h would result
in an unknown struct error. We got away with this for arc_base_cpu as
that was an enum type. The declaration of arc_selected_cpu in
arc.h could have been wrapped in a '#ifndef IN_LIBGCC2 ... #endif', but
it felt neater to simply move the declaration into arc-arch.h.
gcc/ChangeLog:
* config/arc/arc-arch.h (arc_arch_t): Move unchanged to earlier in
file.
(arc_cpu_t): Change base_architecture field, arch, to a arc_arc_t
pointer, arch_info.
(arc_cpu_types): Fill the arch_info field with a pointer into the
arc_arch_types table.
(arc_selected_cpu): Declare.
* config/arc/arc.c (arc_selected_cpu): Make global.
(arc_selected_arch): Delete.
(arc_base_cpu): Delete.
(arc_override_options): Remove references to deleted variables,
update access to arch information.
(ARC_OPT): Update access to arch information.
(ARC_OPTX): Likewise.
* config/arc/arc.h (arc_base_cpu): Remove declaration.
(TARGET_ARC600): Update access to arch information.
(TARGET_ARC601): Likewise.
(TARGET_ARC700): Likewise.
(TARGET_EM): Likewise.
(TARGET_HS): Likewise.
* config/arc/driver-arc.c (arc_cpu_to_as): Update access to arch
information.
From-SVN: r245293
|
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From-SVN: r243994
|
|
gcc/
2016-12-16 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.h (LINK_SPEC): Tidy up.
(ENDFILE_SPEC): Likewise.
(LIB_SPEC): Likewise.
(STARTFILE_SPEC): Include gcrt0 when profiling.
(FUNCTION_PROFILER): Use __mcount.
* config/arc/arc.opt (mucb-mcount): Remove.
* doc/invoke.texi (ARC): Remove mucb-mcount doc.
* arc/arc-protos.h (arc_profile_call): Remove.
* config/arc/arc.c (write_profile_sections): Likewise.
(arc_profile_call): Likewise.
(unspec_prof_hash): Likewise.
(unspec_prof_htab_eq): Likewise.
(arc_legitimate_constant_p): Remove UNSPEC_PROF.
(arc_reorg): Remove call to write_profile_sections.
* config/arc/arc.md (call): Remove call to arc_profile_call.
(call_value): Likewise.
(sibcall): Likewise.
(sibcall_value): Likewise.
(define_constants): Remove UNSPEC_PROF.
libgcc/
* config.host (arc*-*-linux-uclibc*): Remove libgmon, crtg, and
crtgend.
(arc*-*-elf*): Likewise.
* config/arc/t-arc: Remove old gmon lib targets.
* config/arc/crtg.S: Remove.
* config/arc/crtgend.S: Likewise.
* config/arc/gmon/atomic.h: Likewise.
* config/arc/gmon/auxreg.h: Likewise.
* config/arc/gmon/dcache_linesz.S: Likewise.
* config/arc/gmon/gmon.c: Likewise.
* config/arc/gmon/machine-gmon.h: Likewise.
* config/arc/gmon/mcount.c: Likewise.
* config/arc/gmon/prof-freq-stub.S: Likewise.
* config/arc/gmon/prof-freq.c: Likewise.
* config/arc/gmon/profil.S: Likewise.
* config/arc/gmon/sys/gmon.h: Likewise.
* config/arc/gmon/sys/gmon_out.h: Likewise.
* config/arc/t-arc-newlib: Likewise.
* config/arc/t-arc700-uClibc: Renamed to t-arc-uClibc.
From-SVN: r243742
|
|
2016-12-05 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (insn_is_tls_gd_dispatch): Remove.
* config/arc/arc.c (arc_unspec_offset): New function.
(arc_finalize_pic): Change.
(arc_emit_call_tls_get_addr): Likewise.
(arc_legitimize_tls_address): Likewise.
(arc_legitimize_pic_address): Likewise.
(insn_is_tls_gd_dispatch): Remove.
* config/arc/arc.h (INSN_REFERENCES_ARE_DELAYED): Change.
* config/arc/arc.md (ls_gd_load): Remove unused pattern.
(tls_gd_dispatch): Likewise.
From-SVN: r243244
|
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ARC700 targets have a store/load pipeline hazard, if we load within 2
cycles of a store, and the load/store are at the same address, then we
pay a multi-cycle penalty.
This commit avoids this by inserting nop instructions between the store
and the load.
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_store_addr_hazard_p): Declare.
* config/arc/arc.c (arc_store_addr_hazard_p): New function.
(workaround_arc_anomaly): Call arc_store_addr_hazard_p for ARC700.
* config/arc/arc700.md: Add define_bypass for store/load.
gcc/testsuite/ChangeLog:
* gcc.target/arc/arc700-stld-hazard.c: New file.
From-SVN: r243007
|
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gcc/
2016-11-29 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_override_options): Avoid selection of
compact casesi for ARCv2.
From-SVN: r242961
|
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gcc/ChangeLog:
2016-11-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/aarch64/aarch64.c (aarch64_emit_unlikely_jump): split
up variables to make some rtx_insn *.
* config/alpha/alpha.c (emit_unlikely_jump): Likewise.
* config/arc/arc.c: Likewise.
* config/arm/arm.c: Likewise.
* config/mn10300/mn10300.c (mn10300_legitimize_pic_address):
Likewise.
* config/rs6000/rs6000.c (rs6000_expand_split_stack_prologue):
Likewise.
* config/spu/spu.c (spu_emit_branch_hint): Likewise.
From-SVN: r242650
|
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gcc/
2016-11-17 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_ccfsm_post_advance): Handle return
instruction type.
From-SVN: r242548
|
|
gcc/
2016-11-17 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-arches.def: Add FPX quarkse instruction as valid
for arcem.
* config/arc/arc-c.def (__ARC_FPX_QUARK__): Define.
* config/arc/arc-cpus.def (quarkse_em): Add.
* config/arc/arc-options.def (FL_FPX_QUARK, FL_QUARK): Likewise.
* config/arc/arc-opts.h (FPX_QK): Define.
* config/arc/arc-tables.opt: Regenerate.
* config/arc/arc.c (gen_compare_reg): Change.
(arc_register_move_cost): Avoid Dy,Dx moves.
* config/arc/arc.h (TARGET_HARD_FLOAT): Change.
(TARGET_FPX_QUARK, TARGET_FP_ASSIST): Define.
* config/arc/arc.md (divsf3, sqrtsf2, fix_truncsfsi2, floatsisf2):
New expands.
* config/arc/fpu.md (divsf3_fpu, sqrtsf2_fpu, floatsisf2_fpu)
(fix_truncsfsi2_fpu): Rename.
* config/arc/fpx.md (cmp_quark, cmpsf_quark_, cmpsf_quark_ord)
(cmpsf_quark_uneq, cmpsf_quark_eq, divsf3_quark, sqrtsf2_quark)
(fix_truncsfsi2_quark, floatsisf2_quark): New patterns.
* config/arc/t-multilib: Regenerate.
From-SVN: r242546
|
|
The old code still built thanks to the brackets in the definition
of XVECEXP.
gcc/
* config/arc/arc.c (arc_loop_hazard): Add missing brackets.
From-SVN: r242473
|
|
gcc/
2016-11-15 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-arch.h: New file.
* config/arc/arc-arches.def: Likewise.
* config/arc/arc-cpus.def: Likewise.
* config/arc/arc-options.def: Likewise.
* config/arc/t-multilib: Likewise.
* config/arc/genmultilib.awk: Likewise.
* config/arc/genoptions.awk: Likewise.
* config/arc/arc-tables.opt: Likewise.
* config/arc/driver-arc.c: Likewise.
* testsuite/gcc.target/arc/nps400-cpu-flag.c: Likewise.
* common/config/arc/arc-common.c (arc_handle_option): Trace
toggled options.
* config.gcc (arc*-*-*): Add arc-tables.opt to arc's extra
options; check for supported cpu against arc-cpus.def file.
(arc*-*-elf*, arc*-*-linux-uclibc*): Use new make fragment; define
TARGET_CPU_BUILD macro; add driver-arc.o as an extra object.
* config/arc/arc-c.def: Add emacs local variables.
* config/arc/arc-opts.h (processor_type): Use arc-cpus.def file.
(FPU_FPUS, FPU_FPUD, FPU_FPUDA, FPU_FPUDA_DIV, FPU_FPUDA_FMA)
(FPU_FPUDA_ALL, FPU_FPUS_DIV, FPU_FPUS_FMA, FPU_FPUS_ALL)
(FPU_FPUD_DIV, FPU_FPUD_FMA, FPU_FPUD_ALL): New defines.
(DEFAULT_arc_fpu_build): Define.
(DEFAULT_arc_mpy_option): Define.
* config/arc/arc-protos.h (arc_init): Delete.
* config/arc/arc.c (arc_cpu_name): New variable.
(arc_selected_cpu, arc_selected_arch, arc_arcem, arc_archs)
(arc_arc700, arc_arc600, arc_arc601): New variable.
(arc_init): Add static; remove selection of default tune value,
cleanup obsolete error messages.
(arc_override_options): Make use of .def files for selecting the
right cpu and option configurations.
* config/arc/arc.h (stdbool.h): Include.
(TARGET_CPU_DEFAULT): Define.
(CPP_SPEC): Remove mcpu=NPS400 handling.
(arc_cpu_to_as): Declare.
(EXTRA_SPEC_FUNCTIONS): Define.
(OPTION_DEFAULT_SPECS): Likewise.
(ASM_DEFAULT): Remove.
(ASM_SPEC): Use arc_cpu_to_as.
(DRIVER_SELF_SPECS): Remove deprecated options.
(arc_base_cpu): Declare.
(TARGET_ARC600, TARGET_ARC601, TARGET_ARC700, TARGET_EM)
(TARGET_HS, TARGET_V2, TARGET_ARC600): Make them use arc_base_cpu
variable.
(MULTILIB_DEFAULTS): Use ARC_MULTILIB_CPU_DEFAULT.
* config/arc/arc.md (attr_cpu): Remove.
* config/arc/arc.opt (mno-mpy): Deprecate.
(mcpu=ARC600, mcpu=ARC601, mcpu=ARC700, mcpu=NPS400, mcpu=ARCEM)
(mcpu=ARCHS): Remove.
(mcrc, mdsp-packa, mdvbf, mmac-d16, mmac-24, mtelephony, mrtsc):
Deprecate.
(mbarrel_shifte, mspfp_, mdpfp_, mdsp_pack, mmac_): Remove.
(arc_fpu): Use new defines.
(mpy-option): Change to use numeric or string like inputs.
* config/arc/t-arc (driver-arc.o): New target.
(arc-cpus, t-multilib, arc-tables.opt): Likewise.
* config/arc/t-arc-newlib: Delete.
* config/arc/t-arc-uClibc: Renamed to t-uClibc.
* doc/invoke.texi (ARC): Update arc options.
Fixup
From-SVN: r242425
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gcc/
2016-11-04 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_process_double_reg_moves): Use
gen_dexcl_2op call.
* config/arc/arc.md (movsi_insn): Disable unsupported move
instructions for ARCv2 cores.
(movdi): Use prepare_move_operands.
(movsf, movdf): Use move_dest_operand predicate.
* config/arc/constraints.md (Chs): Enable when barrel shifter is
present.
* config/arc/fpu.md (divsf3): Change to divsf3_fpu.
* config/arc/fpx.md (dexcl_3op_peep2_insn): Dx data register is
also a destination.
(dexcl_3op_peep2_insn_nores): Likewise.
* config/arc/arc.h (SHIFT_COUNT_TRUNCATED): Define to one.
(LINK_COMMAND_SPEC): Remove.
From-SVN: r241842
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gcc/ChangeLog:
2016-11-01 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/arc/arc.c (arc_emit_call_tls_get_addr): Make the type
of variables rtx_insn *.
* config/arm/arm.c (arm_call_tls_get_addr): Likewise.
(legitimize_tls_address): Likewise.
* config/bfin/bfin.c (hwloop_optimize): Likewise.
(bfin_gen_bundles): Likewise.
* config/c6x/c6x.c (reorg_split_calls): Likewise.
(c6x_reorg): Likewise.
* config/frv/frv.c (frv_reorder_packet): Likewise.
* config/i386/i386.c (ix86_split_idivmod): Likewise.
* config/ia64/ia64.c (ia64_expand_compare): Likewise.
* config/m32c/m32c.c (m32c_prepare_shift): Likewise.
* config/mn10300/mn10300.c: Likewise.
* config/rl78/rl78.c: Likewise.
* config/s390/s390.c (s390_fix_long_loop_prediction): Likewise.
* config/sh/sh-mem.cc (sh_expand_cmpstr): Likewise.
(sh_expand_cmpnstr): Likewise.
(sh_expand_strlen): Likewise.
(sh_expand_setmem): Likewise.
* config/sh/sh.md: Likewise.
* emit-rtl.c (emit_pattern_before): Likewise.
* except.c: Likewise.
* final.c: Likewise.
* jump.c: Likewise.
From-SVN: r241768
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* config/arc/arc.c (acr_print_operand): Adjust fallthru comment.
(check_if_valid_sleep_operand): Add missing fallthru comment.
(arc_register_move_cost): Increase buffer size.
* config/arc/arc.md (cbranch4si_scratch): Add missing fallthru
comment.
* config/arc/predicates.md (move_str_operand): Avoid fallthru.
From-SVN: r241585
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2016-10-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* coretypes.h: Move MEMMODEL_* macros and enum memmodel definition
into ...
* memmodel.h: This file.
* alias.c, asan.c, auto-inc-dec.c, bb-reorder.c, bt-load.c,
caller-save.c, calls.c, ccmp.c, cfgbuild.c, cfgcleanup.c,
cfgexpand.c, cfgloopanal.c, cfgrtl.c, cilk-common.c, combine.c,
combine-stack-adj.c, common/config/aarch64/aarch64-common.c,
common/config/arm/arm-common.c, common/config/bfin/bfin-common.c,
common/config/c6x/c6x-common.c, common/config/i386/i386-common.c,
common/config/ia64/ia64-common.c, common/config/nvptx/nvptx-common.c,
compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-c.c, config/aarch64/cortex-a57-fma-steering.c,
config/arc/arc.c, config/arc/arc-c.c, config/arm/arm-builtins.c,
config/arm/arm-c.c, config/avr/avr.c, config/avr/avr-c.c,
config/avr/avr-log.c, config/bfin/bfin.c, config/c6x/c6x.c,
config/cr16/cr16.c, config/cris/cris.c, config/darwin-c.c,
config/darwin.c, config/epiphany/epiphany.c,
config/epiphany/mode-switch-use.c,
config/epiphany/resolve-sw-modes.c, config/fr30/fr30.c,
config/frv/frv.c, config/ft32/ft32.c, config/h8300/h8300.c,
config/i386/i386-c.c, config/i386/winnt.c, config/iq2000/iq2000.c,
config/lm32/lm32.c, config/m32c/m32c.c, config/m32r/m32r.c,
config/m68k/m68k.c, config/mcore/mcore.c,
config/microblaze/microblaze.c, config/mmix/mmix.c,
config/mn10300/mn10300.c, config/moxie/moxie.c,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-memory-manipulation.c,
config/nds32/nds32-predicates.c, config/nds32/nds32.c,
config/nios2/nios2.c, config/nvptx/nvptx.c, config/pa/pa.c,
config/pdp11/pdp11.c, config/rl78/rl78.c, config/rs6000/rs6000-c.c,
config/rx/rx.c, config/s390/s390-c.c, config/s390/s390.c,
config/sh/sh.c, config/sh/sh-c.c, config/sh/sh-mem.cc,
config/sh/sh_treg_combine.cc, config/sol2.c, config/spu/spu.c,
config/stormy16/stormy16.c, config/tilegx/tilegx.c,
config/tilepro/tilepro.c, config/v850/v850.c, config/vax/vax.c,
config/visium/visium.c, config/vms/vms-c.c, config/xtensa/xtensa.c,
coverage.c, cppbuiltin.c, cprop.c, cse.c, cselib.c, dbxout.c, dce.c,
df-core.c, df-problems.c, df-scan.c, dojump.c, dse.c, dwarf2asm.c,
dwarf2cfi.c, dwarf2out.c, emit-rtl.c, except.c, explow.c, expmed.c,
expr.c, final.c, fold-const.c, function.c, fwprop.c, gcse.c,
ggc-page.c, haifa-sched.c, hsa-brig.c, hsa-gen.c, hw-doloop.c,
ifcvt.c, init-regs.c, internal-fn.c, ira-build.c, ira-color.c,
ira-conflicts.c, ira-costs.c, ira-emit.c, ira-lives.c, ira.c, jump.c,
loop-doloop.c, loop-invariant.c, loop-iv.c, loop-unroll.c,
lower-subreg.c, lra.c, lra-assigns.c, lra-coalesce.c,
lra-constraints.c, lra-eliminations.c, lra-lives.c, lra-remat.c,
lra-spills.c, mode-switching.c, modulo-sched.c, omp-low.c, passes.c,
postreload-gcse.c, postreload.c, predict.c, print-rtl-function.c,
recog.c, ree.c, reg-stack.c, regcprop.c, reginfo.c, regrename.c,
reload.c, reload1.c, reorg.c, resource.c, rtl-chkp.c, rtl-tests.c,
rtlanal.c, rtlhooks.c, sched-deps.c, sched-rgn.c, sdbout.c,
sel-sched-ir.c, sel-sched.c, shrink-wrap.c, simplify-rtx.c,
stack-ptr-mod.c, stmt.c, stor-layout.c, target-globals.c,
targhooks.c, toplev.c, tree-nested.c, tree-outof-ssa.c,
tree-profile.c, tree-ssa-coalesce.c, tree-ssa-ifcombine.c,
tree-ssa-loop-ivopts.c, tree-ssa-loop.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-vect-data-refs.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Include memmodel.h.
* genattrtab.c (write_header): Include memmodel.h in generated file.
* genautomata.c (main): Likewise.
* gengtype.c (open_base_files): Likewise.
* genopinit.c (main): Likewise.
* genconditions.c (write_header): Include memmodel.h earlier in
generated file.
* genemit.c (main): Likewise.
* genoutput.c (output_prologue): Likewise.
* genpeep.c (main): Likewise.
* genpreds.c (write_insn_preds_c): Likewise.
* genrecog.c (write_header): Likewise.
* Makefile.in (PLUGIN_HEADERS): Include memmodel.h
gcc/ada/
* gcc-interface/utils2.c: Include memmodel.h.
gcc/c-family/
* c-cppbuiltin.c: Include memmodel.h.
* c-opts.c: Likewise.
* c-pragma.c: Likewise.
* c-warn.c: Likewise.
gcc/c/
* c-typeck.c: Include memmodel.h.
gcc/cp/
* decl2.c: Include memmodel.h.
* rtti.c: Likewise.
gcc/fortran/
* trans-intrinsic.c: Include memmodel.h.
gcc/go/
* go-backend.c: Include memmodel.h.
libgcc/
* libgcov-profiler.c: Replace MEMMODEL_* macros by their __ATOMIC_*
equivalent.
* config/tilepro/atomic.c: Likewise and stop casting model to
enum memmodel.
From-SVN: r241121
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gcc/
2016-05-09 Claudiu Zissulescu <claziss@synopsys.com>
* common/config/arc/arc-common.c (arc_option_optimization_table):
Remove compact casesi option.
* config/arc/arc.c (arc_override_options): Use compact casesi
option only for pre-ARCv2 cores.
* doc/invoke.texi (mcompact-casesi): Update text.
From-SVN: r240916
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gcc/ChangeLog:
2016-09-22 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/arc/arc-protos.h (arc_label_align): Change type of
variables from rtx to rtx_insn *.
* config/arc/arc.c (arc_label_align): Likewise.
* config/arm/arm.c (any_sibcall_could_use_r3): Likewise.
* config/bfin/bfin.c (workaround_speculation): Likewise.
* config/c6x/c6x.c (find_next_cycle_insn): Likewise.
(find_last_same_clock): Likewise.
(reorg_split_calls): Likewise.
* config/cris/cris-protos.h (cris_cc0_user_requires_cmp): Likewise.
* config/cris/cris.c (cris_cc0_user_requires_cmp): Likewise.
* config/h8300/h8300-protos.h (same_cmp_preceding_p): Likewise.
(same_cmp_following_p): Likewise.
* config/h8300/h8300.c (same_cmp_preceding_p): Likewise.
(same_cmp_following_p): Likwise.
* config/m32r/m32r.c (m32r_expand_epilogue): Likewise.
* config/nds32/nds32-protos.h (nds32_target_alignment): Likewise.
* config/nds32/nds32.c (nds32_target_alignment): Likewise.
* config/rl78/rl78.c (rl78_alloc_physical_registers_op2):
* Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_calculate_death_notes): Likewise.
* config/s390/s390-protos.h (s390_label_align): Likewise.
* config/s390/s390.c (s390_label_align): Likewise.
* config/sh/sh.c (barrier_align): Likewise.
* config/sparc/sparc-protos.h (emit_cbcond_nop): Likewise.
* config/sparc/sparc.c (sparc_asm_function_epilogue): Likewise.
(emit_cbcond_nop): Likewise.
From-SVN: r240356
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