riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2013-05-23	[AArch64] Support for CLZ	Vidya Praveen	1	-0/+1
2013-05-01	[AArch64] Refactor reduc_<su>plus patterns.	James Greenhalgh	1	-2/+3
2013-05-01	[AArch64] Refactor vector max and min RTL and builtins.	James Greenhalgh	1	-7/+15
2013-05-01	[AArch64] Remap neon vcmp functions to C/TREE	James Greenhalgh	1	-5/+5
2013-05-01	[AArch64] Improve description of <F>CM instructions in RTL	James Greenhalgh	1	-2/+2
2013-04-29	[AArch64] Implement vector float->double widening and double->float narrowing.	James Greenhalgh	1	-0/+6
2013-04-29	[AArch64] Add vector int to float conversions.	James Greenhalgh	1	-0/+9
2013-04-29	[AArch64] Map fcvt intrinsics to builtin name directly.	James Greenhalgh	1	-9/+53
2013-04-29	[AArch64] Map frint intrinsics to standard pattern names directly.	James Greenhalgh	1	-7/+8
2013-04-25	[AArch64] Make vabs<q>_f<32, 64> a tree/gimple intrinsic.	James Greenhalgh	1	-0/+2
2013-04-25	[AArch64] Implement TARGET_GIMPLE_FOLD_BUILTIN for aarch64 backend.	James Greenhalgh	1	-0/+3
2013-04-22	[AArch64] Map standard pattern names to NEON intrinsics directly.	James Greenhalgh	1	-192/+206
2013-04-22	[AArch64] Support vrecp<esx> neon intrinsics in RTL.	James Greenhalgh	1	-0/+9
2013-02-22	[AArch64] Add missing copyright and build dependency for aarch64-simd-builtin...	James Greenhalgh	1	-0/+19
2013-01-25	aarch64-simd-builtins.def: Separate sq<r>dmulh_lane entries into lane and lan...	Tejas Belagod	1	-3/+7
2012-12-05	[AARCH64] Add zip{1, 2}, uzp{1, 2}, trn{1, 2} support	James Greenhalgh	1	-0/+9
2012-12-05	[AARCH64] Add support for vectorizable standard math patterns.	James Greenhalgh	1	-0/+18
2012-11-20	gcc/	James Greenhalgh	1	-0/+208