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2019-08-13MSP430: Consolidate handling of hard-coded MCU dataJozef Lawrynowicz1-1/+2
gcc/ChangeLog: 2019-08-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> * gcc/config.gcc (msp430*-*-*): Add msp430-devices.o to extra_objs and extra_gcc_objs. * gcc/config/msp430/driver-msp430.c: Remove msp430_mcu_data. (msp430_select_cpu): New spec function. (msp430_select_hwmult_lib): Use msp430_extract_mcu_data to extract MCU data. * gcc/config/msp430/msp430-devices.c: New file. * gcc/config/msp430/msp430-devices.h: New file. * gcc/config/msp430/msp430.c: Remove msp430_mcu_data. (msp430_option_override): Use msp430_extract_mcu_data to extract MCU data. (msp430_use_f5_series_hwmult): Likewise. (use_32bit_hwmult): Likewise. (msp430_no_hwmult): Likewise. * gcc/config/msp430/msp430.h (ASM_SPEC): Don't pass -mmcu to the assembler. (DRIVER_SELF_SPECS): Call msp430_select_cpu if -mmcu is used without and -mcpu option. (EXTRA_SPEC_FUNCTIONS): Add msp430_select_cpu. * gcc/config/msp430/t-msp430: Add rule to build msp430-devices.o. Remove hard-coded MCU multilib data. gcc/testsuite/ChangeLog: 2019-08-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> * gcc.target/msp430/msp430.exp (check_effective_target_msp430_430_selected): New. (check_effective_target_msp430_430x_selected): New. (check_effective_target_msp430_mlarge_selected): New. (check_effective_target_msp430_hwmul_not_none): New. (check_effective_target_msp430_hwmul_not_16bit): New. (check_effective_target_msp430_hwmul_not_32bit): New. (check_effective_target_msp430_hwmul_not_f5): New. (msp430_get_opts): New. (msp430_device_permutations_runtest): New. * gcc.target/msp430/devices/README: New file. * gcc.target/msp430/devices-main.c: New test. * gcc.target/msp430/devices/hard-cc430f5123.c: Likewise. * gcc.target/msp430/devices/hard-foo.c: Likewise. * gcc.target/msp430/devices/hard-msp430afe253.c: Likewise. * gcc.target/msp430/devices/hard-msp430cg4616.c: Likewise. * gcc.target/msp430/devices/hard-msp430f4783.c: Likewise. * gcc.target/msp430/devices/hard-rf430frl154h_rom.c: Likewise. From-SVN: r274370
2019-07-31config.gcc (hppa*-*-netbsd*): New target.Matt Thomas1-0/+8
gcc/ChangeLog: * config.gcc (hppa*-*-netbsd*): New target. * config/pa/pa-netbsd.h: New file. * config/pa/pa32-netbsd.h: New file. libgcc/ChangeLog: * config.host (hppa*-*-netbsd*): New case. * config/pa/t-netbsd: New file. Co-Authored-By: Matthew Green <mrg@eterna.com.au> Co-Authored-By: Maya Rashish <coypu@sdf.org> Co-Authored-By: Nick Hudson <nick@nthcliff.demon.co.uk> From-SVN: r273933
2019-07-26AArch64: Make processing less fragile in config.gccTamar Christina1-19/+27
Due to config.gcc all the options need to be on one line because of the grep lines which would select only the first line of the option. This causes it not to select the right bits on options that are spread over multiple lines when the --with-arch configure option is used. The issue happens silently and you just get a compiler with an incorrect set of default flags. The current rules are quite rigid: 1) No space between the AARCH64_OPT_EXTENSION and the opening (. 2) No space between the opening ( and the extension name. 3) No space after the extension name before the ,. 4) Spaces are only allowed after a , and around |. This patch makes this a lot less fragile by using the C pre-processor to flatten the list and then provides much more flexible regex using group matching to process the options instead of string replacement. This removes all the restrictions above and makes the code a bit more readable. gcc/ChangeLog: PR target/89517 * config.gcc: Relax parsing of AARCH64_OPT_EXTENSION. * config/aarch64/aarch64-option-extensions.def: Add new comments and restore easier to read options. From-SVN: r273827
2019-07-24Fix non-GNU style in previous commitsJozef Lawrynowicz1-2/+2
2019-07-24 Jozef Lawrynowicz <jozef.l@mittosystems.com> * config.gcc (msp430*-*-*): Fix non-GNU style in r273774. * config/msp430/msp430.h (ENDFILE_SPEC): Fix non-GNU style in r273773. From-SVN: r273775
2019-07-24config.gcc (msp430*-*-*): Enable initfini_array by default unless explicitly ↵Jozef Lawrynowicz1-0/+6
disabled with... 2019-07-24 Jozef Lawrynowicz <jozef.l@mittosystems.com> * config.gcc (msp430*-*-*): Enable initfini_array by default unless explicitly disabled with --disable-initfini-array. From-SVN: r273774
2019-07-23[Darwin] Fix PR87030 add missed commit hunks.Iain Sandoe1-11/+27
Messed up the commit, and missed changes to gcc/config.gcc and to the comments in some of the headers. 2019-07-24 Iain Sandoe <iain@sandoe.co.uk> gcc/ PR bootstrap/87030 * config/i386/darwin.h (REAL_LIBGCC_SPEC): Move from here... * config/i386/darwin32-biarch.h .. to here. * config/i386/darwin64-biarch.h: Adjust comments. * config/rs6000/darwin32-biarch.h: Likewise. * config/rs6000/darwin64-biarch.h: Likewise. * config.gcc: Missed commit from r273746 (*-*-darwin*): Don't include CPU t-darwin here. (i[34567]86-*-darwin*): Adjust to use biarch files. Produce an error message if i686-darwin configuration is attempted for Darwin >= 18. From-SVN: r273749
2019-07-21or1k: Initial support for FPUStafford Horne1-0/+1
This adds support for OpenRISC hardware floating point instructions. This is enabled with the -mhard-float option. Double-prevision floating point operations work using register pairing as specified in: https://openrisc.io/proposals/orfpx64a32. This has just been added in the OpenRISC architecture specification 1.3. This is enabled with the -mdouble-float option. Not all architectures support unordered comparisons so an option, -munordered-float is added. Currently OpenRISC does not support sf/df or df/sf conversions, but this has also just been added in architecture specification 1.3. gcc/ChangeLog: * config.gcc (or1k*-*-*): Add mhard-float, mdouble-float, msoft-float and munordered-float validations. * config/or1k/constraints.md (d): New register constraint. * config/or1k/predicates.md (fp_comparison_operator): New. * config/or1k/or1k.c (or1k_print_operand): Add support for printing 'd' operands. (or1k_expand_compare): Normalize unordered comparisons. * config/or1k/or1k.h (reg_class): Define DOUBLE_REGS. (REG_CLASS_NAMES): Add "DOUBLE_REGS". (REG_CLASS_CONTENTS): Add contents for DOUBLE_REGS. * config/or1k/or1k.md (type): Add fpu. (fpu): New instruction reservation. (F, f, fr, fi, FI, FOP, fop): New. (<fop><F:mode>3): New ALU instruction definition. (float<fi><F:mode>2): New conversion instruction definition. (fix_trunc<F:mode><fi>2): New conversion instruction definition. (fpcmpcc): New code iterator. (*sf_fp_insn): New instruction definition. (cstore<F:mode>4): New expand definition. (cbranch<F:mode>4): New expand definition. * config/or1k/or1k.opt (msoft-float, mhard-float, mdouble-float, munordered-float): New options. * doc/invoke.texi: Document msoft-float, mhard-float, mdouble-float and munordered-float. From-SVN: r273650
2019-07-21or1k: Add mrori option, fix option docsStafford Horne1-0/+1
gcc/ChangeLog: * config.gcc (or1k*-*-*): Add mrori and mror to validation. * doc/invoke.texi (OpenRISC Options): Add mrori option, rewrite all documenation to be more clear. * config/or1k/elf.opt (mboard=, mnewlib): Rewrite documentation to be more clear. * config/or1k/or1k.opt (mrori): New option. (mhard-div, msoft-div, mhard-mul, msoft-mul, mcmov, mror, msext, msfimm, mshftimm): Rewrite documentation to be more clear. * config/or1k/or1k.md (insn_support): Add ror and rori. (enabled): Add conditions for ror and rori. (rotrsi3): Replace condition for shftimm with ror and rori. gcc/testsuite/ChangeLog: * gcc.target/or1k/ror-4.c: New file. * gcc.target/or1k/shftimm-1.c: Update test from rotate to shift as the shftimm option no longer controls rotate. From-SVN: r273649
2019-07-19[PATCH, rs6000] Split up rs6000.c.Bill Seurer1-4/+4
The source file rs6000.c has grown to unreasonable size and is being split up into several smaller source files. This should improve compilation speed for building gcc. This is the second of several patches to do this and moves most of the function call and builtin code to a new source file. Bootstrapped and tested on powerpc64le-unknown-linux-gnu and powerpc64-unknown-linux-gnu with no regressions. Is this ok for trunk? 2019-07-17 Bill Seurer <seurer@linux.vnet.ibm.com> * config/rs6000/rs6000.c (builtin_description, cpu_is_info, cpu_supports_info, builtin_hash_struct, builtin_hasher, builtin_hash_table, rs6000_builtin_info_type, rs6000_builtin_info, rs6000_aggregate_candidate, rs6000_discover_homogeneous_aggregate, rs6000_return_in_memory, rs6000_return_in_msb, call_ABI_of_interest, init_cumulative_args, rs6000_promote_function_mode, rs6000_must_pass_in_stack, is_complex_IBM_long_double, abi_v4_pass_in_fpr, rs6000_function_arg_padding, rs6000_function_arg_boundary, rs6000_parm_offset, rs6000_parm_start, rs6000_arg_size, rs6000_darwin64_record_arg_advance_flush, rs6000_darwin64_record_arg_advance_recurse, rs6000_darwin64_struct_check_p, rs6000_function_arg_advance_1, rs6000_function_arg_advance, rs6000_darwin64_record_arg_flush, rs6000_darwin64_record_arg_recurse, rs6000_darwin64_record_arg, rs6000_mixed_function_arg, rs6000_psave_function_arg, rs6000_finish_function_arg, rs6000_function_arg, rs6000_arg_partial_bytes, rs6000_pass_by_reference, rs6000_parm_needs_stack, rs6000_function_parms_need_stack, rs6000_reg_parm_stack_space, rs6000_move_block_from_reg, setup_incoming_varargs, rs6000_build_builtin_va_list, rs6000_va_start, rs6000_gimplify_va_arg, def_builtin, bdesc_3arg, bdesc_dst, bdesc_2arg, bdesc_altivec_preds, bdesc_abs, bdesc_1arg, bdesc_0arg, bdesc_htm, rs6000_overloaded_builtin_p, rs6000_overloaded_builtin_name, rs6000_expand_zeroop_builtin, rs6000_expand_mtfsf_builtin, rs6000_expand_mtfsb_builtin, rs6000_expand_set_fpscr_rn_builtin, rs6000_expand_set_fpscr_drn_builtin, rs6000_expand_unop_builtin, altivec_expand_abs_builtin, rs6000_expand_binop_builtin, altivec_expand_predicate_builtin, swap_endian_selector_for_mode, altivec_expand_lv_builtin, altivec_expand_stxvl_builtin, altivec_expand_stv_builtin, htm_spr_num, rs6000_htm_spr_icode, htm_expand_builtin, cpu_expand_builtin, rs6000_expand_ternop_builtin, altivec_expand_dst_builtin, altivec_expand_vec_init_builtin, get_element_number, altivec_expand_vec_set_builtin, altivec_expand_vec_ext_builtin, altivec_expand_builtin, rs6000_builtin_is_supported_p, rs6000_invalid_builtin, rs6000_fold_builtin, rs6000_builtin_valid_without_lhs, fold_build_vec_cmp, fold_compare_helper, fold_mergehl_helper, fold_mergeeo_helper, rs6000_gimple_fold_builtin, rs6000_expand_builtin, rs6000_vector_type, rs6000_init_builtins, rs6000_builtin_decl, altivec_init_builtins, htm_init_builtins, builtin_function_type, rs6000_common_init_builtins, rs6000_internal_arg_pointer, rs6000_output_mi_thunk): Move to rs6000-call.c. * config/rs6000/rs6000-call.c (builtin_description, cpu_is_info, cpu_supports_info, builtin_hash_struct, builtin_hasher, builtin_hash_table, rs6000_builtin_info_type, rs6000_builtin_info, rs6000_aggregate_candidate, rs6000_discover_homogeneous_aggregate, rs6000_return_in_memory, rs6000_return_in_msb, call_ABI_of_interest, init_cumulative_args, rs6000_promote_function_mode, rs6000_must_pass_in_stack, is_complex_IBM_long_double, abi_v4_pass_in_fpr, rs6000_function_arg_padding, rs6000_function_arg_boundary, rs6000_parm_offset, rs6000_parm_start, rs6000_arg_size, rs6000_darwin64_record_arg_advance_flush, rs6000_darwin64_record_arg_advance_recurse, rs6000_darwin64_struct_check_p, rs6000_function_arg_advance_1, rs6000_function_arg_advance, rs6000_darwin64_record_arg_flush, rs6000_darwin64_record_arg_recurse, rs6000_darwin64_record_arg, rs6000_mixed_function_arg, rs6000_psave_function_arg, rs6000_finish_function_arg, rs6000_function_arg, rs6000_arg_partial_bytes, rs6000_pass_by_reference, rs6000_parm_needs_stack, rs6000_function_parms_need_stack, rs6000_reg_parm_stack_space, rs6000_move_block_from_reg, setup_incoming_varargs, rs6000_build_builtin_va_list, rs6000_va_start, rs6000_gimplify_va_arg, def_builtin, bdesc_3arg, bdesc_dst, bdesc_2arg, bdesc_altivec_preds, bdesc_abs, bdesc_1arg, bdesc_0arg, bdesc_htm, rs6000_overloaded_builtin_p, rs6000_overloaded_builtin_name, rs6000_expand_zeroop_builtin, rs6000_expand_mtfsf_builtin, rs6000_expand_mtfsb_builtin, rs6000_expand_set_fpscr_rn_builtin, rs6000_expand_set_fpscr_drn_builtin, rs6000_expand_unop_builtin, altivec_expand_abs_builtin, rs6000_expand_binop_builtin, altivec_expand_predicate_builtin, swap_endian_selector_for_mode, altivec_expand_lv_builtin, altivec_expand_stxvl_builtin, altivec_expand_stv_builtin, htm_spr_num, rs6000_htm_spr_icode, htm_expand_builtin, cpu_expand_builtin, rs6000_expand_ternop_builtin, altivec_expand_dst_builtin, altivec_expand_vec_init_builtin, get_element_number, altivec_expand_vec_set_builtin, altivec_expand_vec_ext_builtin, altivec_expand_builtin, rs6000_builtin_is_supported_p, rs6000_invalid_builtin, rs6000_fold_builtin, rs6000_builtin_valid_without_lhs, fold_build_vec_cmp, fold_compare_helper, fold_mergehl_helper, fold_mergeeo_helper, rs6000_gimple_fold_builtin, rs6000_expand_builtin, rs6000_vector_type, rs6000_init_builtins, rs6000_builtin_decl, altivec_init_builtins, htm_init_builtins, builtin_function_type, rs6000_common_init_builtins, rs6000_internal_arg_pointer, rs6000_output_mi_thunk: Move to here from rs6000.c. * config/rs6000/rs6000-internal.h: (rs6000_darwin64_struct_check_p, rs6000_discover_homogeneous_aggregate, rs6000_output_mi_thunk, rs6000_output_addr_const_extra, rs6000_gimple_fold_builtin, rs6000_invalid_builtin, rs6000_build_builtin_va_list, rs6000_va_start, rs6000_gimplify_va_arg, rs6000_promote_function_mode, rs6000_return_in_memory, rs6000_return_in_msb, rs6000_pass_by_reference, setup_incoming_varargs, rs6000_function_arg_boundary, rs6000_must_pass_in_stack, rs6000_arg_partial_bytes, rs6000_function_arg_advance, rs6000_function_arg_padding, rs6000_function_arg, rs6000_darwin64_record_arg, rs6000_internal_arg_pointer, rs6000_init_builtins, rs6000_builtin_decl, rs6000_expand_builtin, rs6000_fold_builtin, rs6000_passes_ieee128, rs6000_passes_float, rs6000_passes_long_double, rs6000_passes_vector, rs6000_returns_struct, cpu_builtin_p, tree builtin_mode_to_type, altivec_builtin_mask_for_load) Add declarations. * config/rs6000/t-rs6000: Add new source file rs6000-call.c. * config/config.gcc: Add new source file rs6000-call.c to garbage collector and extra_objs. From-SVN: r273607
2019-06-28[Darwin, PPC] Install the same headers as other sub-targets.Iain Sandoe1-2/+0
This is primarily in order to improve testsuite coverage, we might elect to prune the list at some point. 2019-06-28 Iain Sandoe <iain@sandoe.co.uk> * config.gcc (powerpc-*-darwin*, powerpc64-*-darwin*): Remove override on extra_headers. From-SVN: r272790
2019-06-27revert: config.gcc (powerpc-ibm-aix*): Define target_gtfiles.David Edelsohn1-3/+1
Revert 2019-06-26 David Edelsohn <dje.gcc@gmail.com> * config.gcc (powerpc-ibm-aix*): Define target_gtfiles. * config.gcc(rs6000-*-*): Define target_gtfiles. From-SVN: r272753
2019-06-26[PATCH, PPC 1/2] Make sure the gt- files are built for all sub-targets.Iain Sandoe1-1/+1
The new gt-rs6000-logue.h is common to all sub-targets in the port, so it needs to be added for them. It seems better to place the common target_gtfiles in the powerpc*-*-* section, rather than duplicating them in sub-targets. This would make it less likely that a sub-target would be overlooked in any future file introductions. 2019-06-26 Iain Sandoe <iain@sandoe.co.uk> * config.gcc (powerpc*-*-linux*): Move target_gtfiles from here.. (powerpc*-*-*) ... to here. From-SVN: r272708
2019-06-26* config.gcc (powerpc-ibm-aix*): Define target_gtfiles.David Edelsohn1-0/+3
From-SVN: r272693
2019-06-26Enable GCC support for AVX512_VP2INTERSECT which will be in tigerlaker.Hongtao Liu1-2/+2
There are two instructions for AVX512_VP2INTERSECT: VP2INTERSECTD and VP2INTERSECTQ. gcc/ 2019-06-05 Hongtao Liu <hongtao.liu@intel.com> * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VP2INTERSECT_SET, OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET): New macros. (OPTION_MASK_ISA2_AVX512F_UNSET): Add OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET. (ix86_handle_option): Handle -mavx512vp2intersect. * config/i386/avx512vp2intersectintrin.h: New. * config/i386/avx512vp2intersectvlintrin.h: New. * config/i386/cpuid.h (bit_AVX512VP2INTERSECT): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect AVX512VP2INTERSECT. * config/i386/i386-builtin-types.def: Add new types. * config/i386/i386-builtin.def: Add new builtins. * config/i386/i386-builtins.c: (enum processor_features): Add F_AVX512VP2INTERSECT. (static const _isa_names_table isa_names_table): Ditto. * config/i386/i386-c.c (ix86_target_macros_internal): Define __AVX512VP2INTERSECT__. * config/i386/i386-expand.c (ix86_expand_builtin): Expand IX86_BUILTIN_2INTERSECTD512, IX86_BUILTIN_2INTERSECTQ512, IX86_BUILTIN_2INTERSECTD256, IX86_BUILTIN_2INTERSECTQ256, IX86_BUILTIN_2INTERSECTD128, IX86_BUILTIN_2INTERSECTQ128. * config/i386/i386-modes.def (P2QI, P2HI): New modes. * config/i386/i386-options.c (ix86_target_string): Add -mavx512vp2intersect. (ix86_option_override_internal): Handle AVX512VP2INTERSECT. * config/i386/i386.c (ix86_hard_regno_nregs): Allocate two regs for P2HImode and P2QImode. (ix86_hard_regno_mode_ok): Register pair only starts at even hardreg number for P2QImode and P2HImode. (ix86_regmode_natural_size): New function. * config/i386/i386.h (TARGET_AVX512VP2INTERSECT, TARGET_AVX512VP2INTERSECT_P, PTA_AVX512VP2INTERSECT REGMODE_NATURAL_SIZE, MASK_PAIR_REGNO_P): New. * config/i386/i386-protos.h (ix86_regmode_natural_size): Declare * config/i386/i386.opt: Add -mavx512vp2intersect. * config/i386/immintrin.h: Include avx512vp2intersectintrin.h and avx512vp2intersectvlintrin.h. * config/i386/sse.md (define_c_enum "unspec"): Add UNSPEC_VP2INTERSECT. (define_mode_iterator VI48_AVX512VP2VL): New. (avx512vp2intersect_2intersect<mode>, avx512vp2intersect_2intersectv16si): New define_insn patterns. * config.gcc: Add avx512vp2intersectvlintrin.h and avx512vp2intersectintrin.h to extra_headers. * doc/invoke.texi: Document -mavx512vp2intersect. gcc/testsuite 2019-06-06 Hongtao Liu <hongtao.liu@intel.com> Olga Makhotina <olga.makhotina@intel.com> * gcc.target/i386/avx512-check.h: Handle bit_AVX512VP2INTERSECT. * gcc.target/i386/avx512vp2intersect-2intersect-1a.c: New test. * gcc.target/i386/avx512vp2intersect-2intersect-1b.c: Likewise. * gcc.target/i386/avx512vp2intersect-2intersectvl-1a.c: Likewise. * gcc.target/i386/avx512vp2intersect-2intersectvl-1b.c: Likewise. * gcc.target/i386/sse-12.c: Add -mavx512vp2intersect. * gcc.target/i386/sse-13.c: Likewsie. * gcc.target/i386/sse-14.c: Likewise. * gcc.target/i386/sse-22.c: Likewise. * gcc.target/i386/sse-23.c: Likewise. * g++.dg/other/i386-2.C: Likewise. * g++.dg/other/i386-3.C: Likewise. Co-Authored-By: H.J. Lu <hongjiu.lu@intel.com> Co-Authored-By: Olga Makhotina <olga.makhotina@intel.com> From-SVN: r272668
2019-06-25[PATCH, rs6000] Split up rs6000.c.Bill Seurer1-2/+3
The source file rs6000.c has grown to unreasonable size and is being split up into several smaller source files. This should improve compilation speed for building gcc. This is the first of several patches to do this and moves most of the prologue/epilogue code to a new source file. Bootstrapped and tested on powerpc64le-unknown-linux-gnu and powerpc64-unknown-linux-gnu with no regressions. Is this ok for trunk? 2019-06-24 Bill Seurer <seurer@linux.vnet.ibm.com> * config/rs6000/rs6000.c (stack_info, rs6000_pic_labelno, savres_routine_syms, savres_routine_name, morestack_ref, rs6000_init_machine_status, save_reg_p, first_reg_to_save, first_fp_reg_to_save, first_altivec_reg_to_save, compute_vrsave_mask, compute_save_world_info, is_altivec_return_reg, fixed_reg_p, rs6000_savres_strategy, rs6000_stack_info, debug_stack_info, rs6000_return_addr, rs6000_decl_ok_for_sibcall, rs6000_function_ok_for_sibcall, rs6000_ra_ever_killed, rs6000_emit_load_toc_table, rs6000_emit_eh_reg_restore, uses_TOC, create_TOC_reference, rs6000_aix_asm_output_dwarf_table_ref, rs6000_emit_stack_tie, rs6000_emit_allocate_stack_1, get_stack_clash_protection_probe_interval, get_stack_clash_protection_guard_size, rs6000_emit_probe_stack_range_stack_clash, rs6000_emit_allocate_stack, rs6000_emit_probe_stack_range, output_probe_stack_range_1, interesting_frame_related_regno, output_probe_stack_range_stack_clash, output_probe_stack_range, rs6000_frame_related, generate_set_vrsave, gen_frame_set, gen_frame_load, gen_frame_store, emit_frame_save, gen_frame_mem_offset, rs6000_savres_routine_name, rs6000_savres_routine_sym, rs6000_emit_stack_reset, ptr_regno_for_savres, rs6000_emit_savres_rtx, rs6000_emit_prologue_move_from_cr, split_stack_arg_pointer_used_p, rs6000_global_entry_point_prologue_needed_p, rs6000_get_separate_components, rs6000_components_for_bb, rs6000_disqualify_components, rs6000_emit_prologue_components, rs6000_emit_epilogue_components, rs6000_set_handled_components, emit_vrsave_prologue, emit_split_stack_prologue, rs6000_emit_prologue, rs6000_output_savres_externs, rs6000_output_function_prologue, rs6000_keep_leaf_when_profiled, load_cr_save, restore_saved_cr, load_lr_save, restore_saved_lr, add_crlr_cfa_restore, offset_below_red_zone_p, emit_cfa_restores, rs6000_emit_epilogue, rs6000_output_function_epilogue, gen_add3_const, rs6000_expand_split_stack_prologue, rs6000_live_on_entry, rs6000_split_stack_space_check, rs6000_save_toc_in_prologue_p): Moved to rs6000-logue.c. (machine_function): Moved to rs6000.h. (rs6000_stack_t, ALTIVEC_REG_BIT, quad_address_offset_p) Moved to rs6000-internal.h. * config/rs6000/rs6000-logue.c(stack_info, rs6000_pic_labelno, savres_routine_syms, savres_routine_name, morestack_ref, rs6000_init_machine_status, save_reg_p, first_reg_to_save, first_fp_reg_to_save, first_altivec_reg_to_save, compute_vrsave_mask, compute_save_world_info, is_altivec_return_reg, fixed_reg_p, rs6000_savres_strategy, rs6000_stack_info, debug_stack_info, rs6000_return_addr, rs6000_decl_ok_for_sibcall, rs6000_function_ok_for_sibcall, rs6000_ra_ever_killed, rs6000_emit_load_toc_table, rs6000_emit_eh_reg_restore, uses_TOC, create_TOC_reference, rs6000_aix_asm_output_dwarf_table_ref, rs6000_emit_stack_tie, rs6000_emit_allocate_stack_1, get_stack_clash_protection_probe_interval, get_stack_clash_protection_guard_size, rs6000_emit_probe_stack_range_stack_clash, rs6000_emit_allocate_stack, rs6000_emit_probe_stack_range, output_probe_stack_range_1, interesting_frame_related_regno, output_probe_stack_range_stack_clash, output_probe_stack_range, rs6000_frame_related, generate_set_vrsave, gen_frame_set, gen_frame_load, gen_frame_store, emit_frame_save, gen_frame_mem_offset, rs6000_savres_routine_name, rs6000_savres_routine_sym, rs6000_emit_stack_reset, ptr_regno_for_savres, rs6000_emit_savres_rtx, rs6000_emit_prologue_move_from_cr, split_stack_arg_pointer_used_p, rs6000_global_entry_point_prologue_needed_p, rs6000_get_separate_components, rs6000_components_for_bb, rs6000_disqualify_components, rs6000_emit_prologue_components, rs6000_emit_epilogue_components, rs6000_set_handled_components, emit_vrsave_prologue, emit_split_stack_prologue, rs6000_emit_prologue, rs6000_output_savres_externs, rs6000_output_function_prologue, rs6000_keep_leaf_when_profiled, load_cr_save, restore_saved_cr, load_lr_save, restore_saved_lr, add_crlr_cfa_restore, offset_below_red_zone_p, emit_cfa_restores, rs6000_emit_epilogue, rs6000_output_function_epilogue, gen_add3_const, rs6000_expand_split_stack_prologue, rs6000_live_on_entry, rs6000_split_stack_space_check, rs6000_save_toc_in_prologue_p): Moved to here from rs6000.c. * config/rs6000/rs6000.h (machine_function): Moved to here from rs6000.c. * config/rs6000/rs6000-internal.h: (rs6000_stack_t, ALTIVEC_REG_BIT, quad_address_offset_p) Moved to here from rs6000.c. * config/rs6000/t-rs6000: Add new source file rs6000-logue.c. * config/config.gcc: Add new source file rs6000-logue.c to garbage collector. From-SVN: r272658
2019-06-25Create GCN-specific gthreadsKwok Cheung Yeung1-0/+1
2019-06-25 Kwok Cheung Yeung <kcy@codesourcery.com> Andrew Stubbs <ams@codesourcery.com> gcc/ * config.gcc (thread_file): Set to gcn for AMD GCN. * config/gcn/gcn.c (gcn_emutls_var_init): New function. (TARGET_EMUTLS_VAR_INIT): New hook. config/ * gthr.m4 (GCC_AC_THREAD_HEADER): Add case for gcn. libgcc/ * configure: Regenerate. * config/gcn/gthr-gcn.h: New. Co-Authored-By: Andrew Stubbs <ams@codesourcery.com> From-SVN: r272647
2019-06-20[aarch64] Refactor common errata work-around specsRichard Earnshaw1-4/+4
With the addition of the AArch64 NetBSD support code we now have four ports all using and defining the same errata work-around headers. That's silly and long-term becomes a maintenance burden. This patch factors all that code into a single header to eliminate all the duplication. * config/aarch64/aarch64-errata.h: New file. * config/aarch64/aarch64-elf-raw.h (CA53_ERR_835769_SPEC): Delete. (CA53_ERR_843419_SPEC): Delete. (LINK_SPEC): Use AARCH64_ERRATA_LINK_SPEC instead of above. * config/aarch64/aarch64-linux.h: Likewise. * config/aarch64/aarch64-netbsd.h: Likewise. * config/aarch64/aarch64-freebsd.h: Likewise. From-SVN: r272515
2019-06-20fix ARM --with-fpu option checking and error messageAlexandre Oliva1-3/+4
Fix the test for failure in parsecpu's checking of the --with-fpu argument, and the error message that gets printed when the check fails. for gcc/ChangeLog * config.gcc: Fix ARM --with-fpu checking and error message. From-SVN: r272496
2019-06-17[netbsd][aarch64] add netbsd/aarch64 targetMatthew Green1-0/+6
Initial support for AArch64 running NetBSD. Matthew Green <mrg@eterna.com.au> Maya Rashish <coypu@sdf.org> gcc: * config.gcc (aarch64*-*-netbsd*): New target. * config/aarch64/aarch64-netbsd.h: New file. * config/aarch64/t-aarch64-netbsd: Likewise. libgcc: * config.host (aarch64*-*-netbsd*): New case. Co-Authored-By: Maya Rashish <coypu@sdf.org> From-SVN: r272387
2019-06-14[NetBSD] Add support for the Arm EABI.Matt Thomas1-3/+28
This is a roll-up of a set of changes needed to support the Arm EABI on NetBSD. 2019-06-14 Matt Thomas <matt@3am-software.com> Matthew Green <mrg@eterna.com.au> Nick Hudson <skrll@netbsd.org> Maya Rashish <coypu@sdf.org> Richard Earnshaw <rearnsha@arm.com> gcc: * config.gcc (arm*-*-netbsdelf*) Add support for EABI configuration. * config.host (arm*-*-netbsd*): Use driver-arm.o on native NetBSD. * config/arm/netbsd-eabi.h: New file. * config/arm/netbsd-elf.h (TARGET_OS_CPP_BUILTINS): Undefine before redefining. (SUBTARGET_EXTRA_ASM_SPEC): Don't pass -matpcs to the assembler. * config/netbsd-elf.h (NETBSD_LINK_LD_ELF_SO_SPEC): New define. (NETBSD_SUBTARGET_EXTRA_SPECS): New define. (SUBTARGET_EXTRA_SPECS): Define to NETBSD_SUBTARGET_EXTRA_SPECS. libatomic: * configure.tgt (arm*): Handle NetBSD in the same way as FreeBSD. libgcc: * config.host (arm*-*-netbsdelf*): Add support for EABI configurations. * config/arm/t-netbsd (LIB1ASMFUNCS): Add some additional assembler functions to build. * config/arm/t-netbsd-eabi: New file. Co-Authored-By: Matthew Green <mrg@eterna.com.au> Co-Authored-By: Maya Rashish <coypu@sdf.org> Co-Authored-By: Nick Hudson <skrll@netbsd.org> Co-Authored-By: Richard Earnshaw <rearnsha@arm.com> From-SVN: r272290
2019-06-12Initial TI PRU GCC portDimitar Dimitrov1-0/+9
ChangeLog: 2019-06-19 Dimitar Dimitrov <dimitar@dinux.eu> * configure: Regenerate. * configure.ac: Add PRU target. gcc/ChangeLog: 2019-06-19 Dimitar Dimitrov <dimitar@dinux.eu> * common/config/pru/pru-common.c: New file. * config.gcc: Add PRU target. * config/pru/alu-zext.md: New file. * config/pru/constraints.md: New file. * config/pru/predicates.md: New file. * config/pru/pru-opts.h: New file. * config/pru/pru-passes.c: New file. * config/pru/pru-pragma.c: New file. * config/pru/pru-protos.h: New file. * config/pru/pru.c: New file. * config/pru/pru.h: New file. * config/pru/pru.md: New file. * config/pru/pru.opt: New file. * config/pru/t-pru: New file. * doc/extend.texi: Document PRU pragmas. * doc/invoke.texi: Document PRU-specific options. * doc/md.texi: Document PRU asm constraints. From-SVN: r272202
2019-06-06Add -march=gfx906 for AMD GCN.Andrew Stubbs1-1/+1
2019-06-06 Andrew Stubbs <ams@codesourcery.com> gcc/ * config.gcc (amdgcn-*-*): Allow --with-arch=gfx906. * config/gcn/gcn.opt (gpu_type): Add gfx906. * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Add gfx906 multilib. (MULTILIB_DIRNAMES): Rename gcn5 to gfx900. Add gfx906. From-SVN: r272007
2019-05-29config.gcc (rx-*-linux*): New target.Yoshinori Sato1-0/+5
* config.gcc (rx-*-linux*): New target. * config/rx/elf.opt: New file. * config/rx/linux.h: Likewise. * config/rx/t-linux: Likewise. * config/rx/rx.c (TARGET_SAVE_ACC_REGISTER): If not defined, make it zero. * config/rx/rx.h (ASM_APP_ON): Allow to be overridden. (ASM_APP_OFF): Likewise. * config/rx/rx.opt: Drop -msim and -mas100-syntax, they were moved elsewhere. * config.host (rx-*-linux*): Add new case. * config/rx/t-rx (HOST_LIBGCC2_CFLAGS): Force DFmode to SFmode. From-SVN: r271748
2019-05-28Add GCC support to ENQCMD.Xuepeng Guo1-2/+4
gcc/ChangeLog 2019-01-23 Xuepeng Guo <xuepeng.guo@intel.com> * common/config/i386/i386-common.c (OPTION_MASK_ISA_ENQCMD_SET, OPTION_MASK_ISA_ENQCMD_UNSET): New macros. (ix86_handle_option): Handle -menqcmd. * config.gcc (enqcmdintrin.h): New header file. * config/i386/cpuid.h (bit_ENQCMD): New bit. * config/i386/driver-i386.c (host_detect_local_cpu): Handle -menqcmd. * config/i386/i386-builtin-types.def ((INT, PVOID, PCVOID)): New function type. * config/i386/i386-builtin.def (__builtin_ia32_enqcmd, __builtin_ia32_enqcmds): New builtins. * config/i386/i386-c.c (__ENQCMD__): New macro. * config/i386/i386-option.c (ix86_target_string): Add -menqcmd. (ix86_valid_target_attribute_inner_p): Likewise. * config/i386/i386-expand.c (ix86_expand_builtin): Expand IX86_BUILTIN_ENQCMD and IX86_BUILTIN_ENQCMDS. * config/i386/i386.h (TARGET_ENQCMD): New. * config/i386/i386.md (UNSPECV_ENQCMD, UNSPECV_ENQCMDS): New. (@enqcmd<enqcmd_sfx>_<mode>): New insn pattern. (movdir64b_<mode>): Parameterize to enable share expansion code with ENQCMD in function ix86_expand_builtin. * config/i386/i386.opt: Add -menqcmd. * config/i386/immintrin.h: Include enqcmdintrin.h. * config/i386/enqcmdintrin.h: New intrinsic file. * doc/invoke.texi: Add -menqcmd. gcc/testsuite/ChangeLog 2019-01-23 Xuepeng Guo <xuepeng.guo@intel.com> * gcc.target/i386/enqcmd.c: New test. * gcc.target/i386/enqcmds.c: Likewise. * g++.dg/other/i386-2.C: Add -menqcmd. * g++.dg/other/i386-3.C: Likewise. * gcc.target/i386/sse-12.c: Likewise. * gcc.target/i386/sse-13.c: Likewise. * gcc.target/i386/sse-14.c: Likewise. * gcc.target/i386/sse-23.c: Likewise. From-SVN: r271678
2019-05-23Add infrastructure to support -mcpu=future to represent a futureBill Schmidt1-1/+1
architecture level, as yet unnamed. [gcc] 2019-05-22 Bill Schmidt <wschmidt@linux.ibm.com> Michael Meissner <meissner@linux.ibm.com> Segher Boessenkool <segher@kernel.crashing.org> * config.gcc: Add future cpu. * config/rs6000/driver-rs6000.c (asm_names): Add future cpu. * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New #define. (POWERPC_MASKS): Add OPTION_MASK_FUTURE. (RS6000_CPU): New instantiation for future cpu. * config/rs6000/rs6000-opts.h (enum processor_type): Add PROCESSOR_FUTURE. * config/rs6000/rs6000-string.c (expand_compare_loop): Treat PROCESSOR_FUTURE like PROCESSOR_POWER9 for now. * config/rs6000/rs6000-tables.opt: Regenerate. * config/rs6000/rs6000.c (rs6000_option_override_internal): Treat PROCESSOR_FUTURE similarly to PROCESSOR_POWER9 for now. (rs6000_machine_from_flags): Handle future cpu. (rs6000_reassociation_width): Treat PROCESSOR_FUTURE like PROCESSOR_POWER9 for now. (rs6000_adjust_cost): Likewise. (rs6000_issue_rate): Likewise. (rs6000_register_move_cost): Likewise. (rs6000_opt_mask): Add entry for future. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Add future cpu. (MASK_FUTURE): New #define. * config/rs6000/rs6000.md (define_attr "cpu"): Add future cpu. * config/rs6000/rs6000.opt (mfuture): New target option. * doc/invoke.texi (mcpu): Add future cpu. [gcc/testsuite] 2019-05-22 Bill Schmidt <wschmidt@linux.ibm.com> * gcc.target/powerpc/cpu-future.c: New test. Co-Authored-By: Michael Meissner <meissner@linux.ibm.com> Co-Authored-By: Segher Boessenkool <segher@kernel.crashing.org> From-SVN: r271567
2019-05-22Add support for constructors and destuctors on GCNKwok Cheung Yeung1-0/+2
2019-05-22 Kwok Cheung Yeung <kcy@codesourcery.com> Andrew Stubbs <amd@codesourcery.com> gcc/ * config.gcc (gcc_cv_initfini_array): Set for AMD GCN. * config/gcn/gcn-run.c (init_array_kernel, fini_array_kernel): New. (kernel): Rename to... (main_kernel): ... this. (load_image): Load _init_array and _fini_array kernels. (run): Add argument for kernel to run. (main): Run init_array_kernel before main_kernel, and fini_array_kernel after. * config/gcn/gcn.c (gcn_handle_amdgpu_hsa_kernel_attribute): Allow amdgpu_hsa_kernel attribute on functions. (gcn_disable_constructors): Delete. (TARGET_ASM_CONSTRUCTOR, TARGET_ASM_DESTRUCTOR): Delete. * config/gcn/crt0.c (size_t): Define. (_init_array, _fini_array): New. (__preinit_array_start, __preinit_array_end, __init_array_start, __init_array_end, __fini_array_start, __fini_array_end): Declare weak references. Co-Authored-By: Andrew Stubbs <ams@codesourcery.com> From-SVN: r271526
2019-05-14Remove obsolete Solaris 10 supportRainer Orth1-4/+4
libstdc++-v3: * config/os/solaris/solaris2.10: Move to ... * config/os/solaris: ... this. * configure.host (os_include_dir): Adapt. (abi_baseline_pair): Remove Solaris 10 handling. * config/abi/post/i386-solaris2.10: Remove. * config/abi/post/sparc-solaris2.10: Remove. * config/abi/post/i386-solaris2.11: Rename to ... * config/abi/post/i386-solaris: ... this. * config/abi/post/sparc-solaris2.11: Rename to ... * config/abi/post/sparc-solaris: ... this. * libsupc++/new_opa.cc [_GLIBCXX_HAVE_MEMALIGN] [__sun]: Remove workaround. * testsuite/ext/enc_filebuf/char/13598.cc: Remove *-*-solaris2.10 xfail. libsanitizer: * configure.ac (have_dl_iterate_phdr): Remove *-*-solaris2.10* handling. * configure: Regenerate. libgcc: * config.host: Simplify various *-*-solaris2.1[0-9]* to *-*-solaris2*. * configure.ac: Likewise. * configure: Regenerate. * config/i386/sol2-unwind.h (x86_fallback_frame_state): Remove Solaris 10 and Solaris 11 < snv_125 handling. libbacktrace: * configure.ac (have_dl_iterate_phdr): Remove *-*-solaris2.10* handling. * configure: Regenerate. gcc/testsuite: * gcc.dg/atomic/c11-atomic-exec-4.c: Simplify triplet to *-*-solaris2*. * gcc.dg/atomic/c11-atomic-exec-5.c: Likewise. * gcc.dg/c99-math-double-1.c: Likewise. * gcc.dg/c99-math-float-1.c: Likewise. * gcc.dg/c99-math-long-double-1.c: Likewise. * gcc.misc-tests/linkage.exp: Simplify triplet to x86_64-*-solaris2*. * gcc.target/i386/mcount_pic.c: Remove *-*-solaris2.10* && !gld xfail. * gcc.target/i386/pr63620.c: Likewise. * lib/target-supports.exp (check_sse_os_support_available): Remove Solaris 9/x86 workaround. gcc: * config.gcc: Move *-*-solaris2.10* from obsolete configurations to unsupported ones. Simplify x86_64-*-solaris2.1[0-9]* to x86_64-*-solaris2*. * config.host: Likewise. * config/i386/sol2.h (ASM_COMMENT_START): Remove. * config/sparc/driver-sparc.c (host_detect_local_cpu) [__sun__ && __svr4__]: Remove "brand" fallback. [!KSTAT_DATA_STRING]: Remove. * configure.ac (gcc_cv_ld_hidden): Simplify *-*-solaris2.1[0-9]* to *-*-solaris2*. (comdat_group): Likewise. (set_have_as_tls): Likewise. (gcc_cv_target_dl_iterate_phdr): Likewise. (gcc_cv_as_shf_merge): Remove Solaris 10/x86 workaround. (gcc_cv_ld_aligned_shf_merge): Remove Solaris 10/SPARC workaround. * configure: Regenerate. * doc/install.texi: Simplify Solaris target triplets. (Specific, i?86-*-solaris2*): Remove Solaris 10 references. (Specific, *-*-solaris2*): Document Solaris 10 removal. Remove Solaris 10 references. Remove obsolete Solaris bug reference. (Specific, sparc-sun-solaris2.10): Remove. From-SVN: r271183
2019-05-08Enable support for bfloat16 which will be in Future Cooper Lake.Hongtao Liu1-2/+2
There are 3 instructions for AVX512BF16: VCVTNE2PS2BF16, VCVTNEPS2BF16 and DPBF16PS instructions, which are Vector Neural Network Instructions supporting: - VCVTNE2PS2BF16: Convert Two Packed Single Data to One Packed BF16 Data. - VCVTNEPS2BF16: Convert Packed Single Data to Packed BF16 Data. - VDPBF16PS: Dot Product of BF16 Pairs Accumulated into Packed Single Precision. 2019-05-07 Wei Xiao <wei3.xiao@intel.com> * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512BF16_SET OPTION_MASK_ISA_AVX512BF16_UNSET, OPTION_MASK_ISA2_AVX512BW_UNSET): New. (OPTION_MASK_ISA2_AVX512F_UNSET): Add OPTION_MASK_ISA_AVX512BF16_UNSET. (ix86_handle_option): Handle -mavx512bf16. * config.gcc: Add avx512bf16vlintrin.h and avx512bf16intrin.h to extra_headers. * config/i386/avx512bf16vlintrin.h: New. * config/i386/avx512bf16intrin.h: New. * config/i386/cpuid.h (bit_AVX512BF16): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect BF16. * config/i386/i386-builtin-types.def: Add new types. * config/i386/i386-builtin.def: Add new builtins. * config/i386/i386-c.c (ix86_target_macros_internal): Define __AVX512BF16__. * config/i386/i386-option.c (ix86_target_string): Add -mavx512bf16. (ix86_option_override_internal): Handle BF16. (ix86_valid_target_attribute_inner_p): Ditto. * config/i386/i386-expand.c (ix86_expand_args_builtin): Ditto. * config/i386/i386-builtin.c (enum processor_features): Add F_AVX512BF16. (static const _isa_names_table isa_names_table): Ditto. * config/i386/i386.h (TARGET_AVX512BF16, TARGET_AVX512BF16_P): New. (PTA_AVX512BF16): Ditto. * config/i386/i386.opt: Add -mavx512bf16. * config/i386/immintrin.h: Include avx512bf16intrin.h and avx512bf16vlintrin.h. * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode><mask_name>, avx512f_cvtneps2bf16_<mode><mask_name>, avx512f_dpbf16ps_<mode><mask_half_name>): New define_insn patterns. * config/i386/subst.md (mask_half): Add new subst. * doc/invoke.texi: Document -mavx512bf16. 2019-05-07 Wei Xiao <wei3.xiao@intel.com> * gcc.target/i386/avx512bf16-vcvtne2ps2bf16-1.c: New test. * gcc.target/i386/avx512bf16-vcvtneps2bf16-1.c: New test. * gcc.target/i386/avx512bf16-vdpbf16ps-1.c: New test. * gcc.target/i386/avx512bf16vl-vcvtne2ps2bf16-1.c: New test. * gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1.c: New test. * gcc.target/i386/avx512bf16vl-vdpbf16ps-1.c: New test. * gcc.target/i386/builtin_target.c: Handle avx512bf16. * gcc.target/i386/sse-12.c: Add -mavx512bf16. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. 2019-05-07 Hongtao Liu <hongtao.liu@intel.com> * config/i386/cpuinfo.c (get_available_features): Detect BF16. * config/i386/cpuinfo.h (enum processor_features): Add FEATURE_AVX512BF16. From-SVN: r271006
2019-05-06re PR target/89221 (--enable-frame-pointer does not work as intended)Uros Bizjak1-12/+0
PR target/89221 * config.gcc (i[34567]86-*-*, x86_64-*-*): Move tests for enable_cld and enable_frame_pointer ... * configure.ac: ... here. Update help strings for --enable-frame-pointer. * configure: Regenerate. * config/i386/i386-options.c (ix86_option_override_internal): Remove USE_X86_64_FRAME_POINTER define, use USE_IX86_FRAME_POINTER instead. * config/i386/sol2.h (USE_IX86_FRAME_POINTER): Remove. (USE_X86_64_FRAME_POINTER): Ditto. From-SVN: r270914
2019-05-06Append to target_gtfiles in order to fix Darwin bootstrap.Martin Liska1-6/+6
2019-05-06 Martin Liska <mliska@suse.cz> * config.gcc: Append to target_gtfiles and fix indentation. From-SVN: r270913
2019-05-06Split i386.c.Martin Liska1-2/+4
2019-05-06 Martin Liska <mliska@suse.cz> * config/i386/i386-builtins.c: New file. * config/i386/i386-builtins.h: New file. * config/i386/i386-expand.c: New file. * config/i386/i386-expand.h: New file. * config/i386/i386-features.c: New file. * config/i386/i386-features.h: New file. * config/i386/i386-options.c: New file. * config/i386/i386-options.h: New file. * config.gcc: Add new files into extra_objs and target_gtfiles. * config/i386/i386.c: Split content of the file into newly introduced files. * config/i386/i386.h: Declare common variables and macros. * config/i386/t-i386: Define dependencies for new files. From-SVN: r270895
2019-04-29config.gcc (default_gnu_indirect_function): Default to yes for arm*-*-netbsd*...Maya Rashish1-0/+5
* config.gcc (default_gnu_indirect_function): Default to yes for arm*-*-netbsd*, i[34567]86-*-netbsd*, powerpc*-*-netbsd*, sparc*-*-netbsd*, x86_64-*-netbsd* From-SVN: r270661
2019-04-25freebsd64.h: Add bits for 32-bit multilib support.Andreas Tobler1-1/+4
2019-04-25 Andreas Tobler <andreast@gcc.gnu.org> * config/i386/freebsd64.h: Add bits for 32-bit multilib support. * config/i386/t-freebsd64: New file. * config.gcc: Add the t-freebsd64 for multilib support. From-SVN: r270586
2019-04-15[NDS32] nds32*-*-linux* target using init_array/finit_array for ctor/dtor.Monk Chiang1-0/+1
gcc/ * config.gcc (nds32*-*-linux*): Set gcc_cv_initfini_array to yes. From-SVN: r270362
2019-04-02Obsolete Cell Broadband Engine SPU target supportUlrich Weigand1-0/+1
gcc/ChangeLog: 2019-04-02 Ulrich Weigand <uweigand@de.ibm.com> * config.gcc: Mark spu* targets as deprecated/obsolete. From-SVN: r270092
2019-04-02S/390: arch13: Add arch13 as architecture optionAndreas Krebbel1-1/+1
This patch enables the command line options and provides the proper macros for checking. gcc/ChangeLog: 2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> * common/config/s390/s390-common.c (processor_flags_table): New entry for arch13. * config.gcc: Support arch13 with the --with-arch= configure flag. * config/s390/driver-native.c (s390_host_detect_local_cpu): * config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_ARCH13. * config/s390/s390.c (s390_get_sched_attrmask) (s390_get_unit_mask): Add PROCESSOR_ARCH13. * config/s390/s390.h (enum processor_flags): Add PF_VXE2 and PF_ARCH13. * config/s390/s390.md (TARGET_CPU_ARCH13, TARGET_CPU_ARCH13_P) (TARGET_CPU_VXE2, TARGET_CPU_VXE2_P, TARGET_ARCH13) (TARGET_ARCH13_P, TARGET_VXE2, TARGET_VXE2_P): New macro definitions. * config/s390/s390.opt: Support arch13 as processor type in command line options. gcc/testsuite/ChangeLog: 2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com> * gcc.target/s390/s390.exp: Run tests in arch13 subdir. * lib/target-supports.exp (check_effective_target_s390_vxe2): New runtime check for the vxe2 hardware feature on IBM Z. From-SVN: r270077
2019-03-01RISC-V: Generalize -march support, add ELF attribute support.Kito Cheng1-1/+25
Kito Cheng <kito.cheng@gmail.com> Monk Chiang <sh.chiang04@gmail.com> gcc/ * common/config/riscv/riscv-common.c: Include sstream. (riscv_subset_list::to_string): New. (riscv_arch_str): Likewise. * config.gcc (riscv*-*-*): Handle --with-riscv-attribute= * config.in: Regen. * config/riscv/riscv-protos.h (riscv_arch_str): New. * config/riscv/riscv.c (INCLUDE_STRING): Defined. (riscv_emit_attribute): New. (riscv_file_start): Emit attribute if needed. (riscv_option_override): Init riscv_emit_attribute_p. * config/riscv/riscv.opt (mriscv-attribute): New option. * configure.ac (riscv*-*-*): Check binutils is supporting ELF * configure: Regen. * doc/install.texi: Document --with-riscv-attribute. * doc/invoke.texi: Document -mriscv-attribute. * common/config/riscv/riscv-common.c: Include config/riscv/riscv-protos.h. (INCLUDE_STRING): Defined. (RISCV_DONT_CARE_VERSION): Defined. (riscv_subset_t): Declare. (riscv_subset_t::riscv_subset_t): New. (riscv_subset_list): Declare. (riscv_subset_list::riscv_subset_list): New. (riscv_subset_list::~riscv_subset_list): Likewise. (riscv_subset_list::parsing_subset_version): Likewise. (riscv_subset_list::parse_std_ext): Likewise. (riscv_subset_list::parse_sv_or_non_std_ext): Likewise. (riscv_subset_list::add): Likewise. (riscv_subset_list::lookup): Likewise. (riscv_subset_list::xlen): Likewise. (riscv_subset_list::parse): Likewise. (riscv_supported_std_ext): Likewise. (current_subset_list): Likewise. (riscv_parse_arch_string): Using riscv_subset_list::parse to parse. gcc/testsuite/ * gcc.target/riscv/attribute-1.c: New. * gcc.target/riscv/attribute-2.c: Likewise. * gcc.target/riscv/attribute-3.c: Likewise. * gcc.target/riscv/attribute-4.c: Likewise. * gcc.target/riscv/attribute-5.c: Likewise. * gcc.target/riscv/attribute-6.c: Likewise. * gcc.target/riscv/attribute-7.c: Likewise. * gcc.target/riscv/attribute-8.c: Likewise. * gcc.target/riscv/attribute-9.c: Likewise. * gcc.target/riscv/arch-1.c: New. * gcc.target/riscv/arch-2.c: Likewise. * gcc.target/riscv/arch-3.c: Likewise. * gcc.target/riscv/arch-4.c: Likewise. Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com> From-SVN: r269337
2019-02-14Add netbsd support for D compiler and runtimeMaya Rashish1-0/+2
Merges upstream druntime fb4bda91. 2019-02-14 Maya Rashish <coypu@sdf.org> gcc/ChangeLog: * config.gcc (*-*-netbsd*): Add netbsd-d.o * config/netbsd-d.c: New file. * config/t-netbsd: Add netbsd-d.o gcc/d/ChangeLog: * d-system.h: NetBSD is POSIX. libphobos/ChangeLog: * configure.tgt: Add netbsd/x86 as supported target. From-SVN: r268905
2019-02-10[NDS32] Set default --with-nds32-lib correctly.Chung-Ju Wu1-7/+13
gcc/ * config.gcc (with_nds32_lib): Set default --with-nds32-lib correctly. From-SVN: r268744
2019-02-04[NDS32] Remove all -mtlsdesc-trmpoline related things.Chung-Ju Wu1-1/+1
gcc/ * config.gcc (with_nds32_lib, glibc): Remove TARGET_DEFAULT_TLSDESC_TRAMPOLINE=0 setting. * config/nds32/linux.h (TARGET_DEFAULT_TLSDESC_TRAMPOLINE): Delete. (NDS32_TLSDESC_TRAMPOLINE_SPEC): Delete. From-SVN: r268508
2019-01-29[ARC] Enable init_array support.Vineet Gupta1-1/+4
gcc's common configure script has a subtle flaw that it only tests {init,fini.preinit}_array support when NOT cross compiling. This causes cross builds to erroneously deduce that the feature is not supported by the target. | host-gcc-final-ab544139bfee/build/gcc/config.log | |configure:22941: checking for .preinit_array/.init_array/.fini_array support |configure:23106: checking cross compile... guessing |configure:23111: result: no The right fix is to enable this for *all* cross setups (and address any fallouts). However in the short-term to enable ARC glibc port to upstream, force enable this for ARC. This has been discussed at length on glibc mailing list [1], [2] [1] https://sourceware.org/ml/libc-alpha/2018-11/msg00870.html [2] https://sourceware.org/ml/libc-alpha/2019-01/msg00656.html gcc/ 2019-xx-xx Vineet Gupta <vgupta@synopsys.com> * gcc/config.gcc: Force .init_array for ARC From-SVN: r268365
2019-01-17GCN back-end configAndrew Stubbs1-0/+41
This patch contains the configuration adjustments needed to enable the GCN back-end. The new configure check for dlopen is required to allow building the new gcn-run tool. This tool uses libdl to load the HSA runtime libraries, which are required to run programs on the GPU. The tool is disabled if libdl is not available. 2019-01-17 Andrew Stubbs <ams@codesourcery.com> Kwok Cheung Yeung <kcy@codesourcery.com> Julian Brown <julian@codesourcery.com> Tom de Vries <tom@codesourcery.com> Jan Hubicka <hubicka@ucw.cz> Martin Jambor <mjambor@suse.cz> * configure.ac: Likewise. * configure: Regenerate. * contrib/config-list.mk: Add amdgcn-amdhsa. gcc/ * config.gcc: Add amdgcn*-*-amdhsa configuration. * configure.ac: Check for dlopen. * configure: Regenerate. Co-Authored-By: Jan Hubicka <hubicka@ucw.cz> Co-Authored-By: Julian Brown <julian@codesourcery.com> Co-Authored-By: Kwok Cheung Yeung <kcy@codesourcery.com> Co-Authored-By: Martin Jambor <mjambor@suse.cz> Co-Authored-By: Tom de Vries <tom@codesourcery.com> From-SVN: r268024
2019-01-09[AArch64, 5/6] Enable BTI : Add new pass for BTI.Sudakshina Das1-1/+1
This patch is part of a series that enables ARMv8.5-A in GCC and adds Branch Target Identification Mechanism. This patch adds a new pass called "bti" which is triggered by the command line argument -mbranch-protection whenever "bti" is turned on. The pass iterates through the instructions and adds appropriated BTI instructions based on the following: * Add a new "BTI C" at the beginning of a function, unless its already protected by a "PACIASP". We exempt the functions that are only called directly. * Add a new "BTI J" for every target of an indirect jump, jump table targets, non-local goto targets or labels that might be referenced by variables, constant pools, etc (NOTE_INSN_DELETED_LABEL). Since we have already changed the use of indirect tail calls to only x16 and x17, we do not have to use "BTI JC". (check patch 3/6). *** gcc/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o. * gcc/config/aarch64/aarch64.h: Update comment for TRAMPOLINE_SIZE. * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Update if bti is enabled. * config/aarch64/aarch64-bti-insert.c: New file. * config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert bti pass. * config/aarch64/aarch64-protos.h (make_pass_insert_bti): Declare the new bti pass. * config/aarch64/aarch64.md (unspecv): Add UNSPECV_BTI_NOARG, UNSPECV_BTI_C, UNSPECV_BTI_J and UNSPECV_BTI_JC. (bti_noarg, bti_j, bti_c, bti_jc): New define_insns. * config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o. *** gcc/testsuite/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * gcc.target/aarch64/bti-1.c: New test. * gcc.target/aarch64/bti-2.c: New test. * gcc.target/aarch64/bti-3.c: New test. * lib/target-supports.exp (check_effective_target_aarch64_bti_hw): Add new check for BTI hw. Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> From-SVN: r267769
2019-01-01Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r267494
2018-12-29config.gcc (hppa*64*-*-linux*): Add pa/t-pa to tmake_file.John David Anglin1-3/+10
* config.gcc (hppa*64*-*-linux*): Add pa/t-pa to tmake_file. Define d_target_objs. (hppa*-*-openbsd*): Likewise. (hppa[12]*-*-hpux10*): Likewise. (hppa*64*-*-hpux11*): Likewise. (hppa[12]*-*-hpux11*): Likewise. From-SVN: r267463
2018-12-21support --with-multilib-list=@name for ARMAlexandre Oliva1-0/+13
Introduce @name as a means to specify alternate multilib profiles as arguments to --with-multilib-list. So far this is only implemented for ARM. for gcc/ChangeLog * config.gcc (tmake_file): Add name to tmake_file for each @name in --with-multilib-list on arm-*-* targets. * doc/install.texi (with-multilib-list): Document it. From-SVN: r267320
2018-12-19config.gcc: Enable TARGET_DEFAULT_ASYNC_UNWIND_TABLES on aarch64*-*-freebsd*Andreas Tobler1-0/+1
2018-12-19 Andreas Tobler <andreast@gcc.gnu.org> * config.gcc: Enable TARGET_DEFAULT_ASYNC_UNWIND_TABLES on aarch64*-*-freebsd* From-SVN: r267287
2018-12-17config.gcc (powerpc-ibm-aix6.*): Delete extra_headers.David Edelsohn1-3/+0
* config.gcc (powerpc-ibm-aix6.*): Delete extra_headers. (powerpc-ibm-aix7.1.*): Same. (powerpc-ibm-aix[789].*): Same. From-SVN: r267203
2018-12-13i386-common.c (processor_names): Add cascadelake.Wei Xiao1-1/+1
gcc/ * common/config/i386/i386-common.c (processor_names): Add cascadelake. (processor_alias_table): Add cascadelake. * config.gcc: Add -march=cascadelake. * config/i386/i386-c.c (ix86_target_macros_internal): Handle cascadelake. * config/i386/i386.c (Add m_CASCADELAKE): New. (processor_cost_table): Add cascadelake. (get_builtin_code_for_version): Handle cascadelake. * config/i386/i386.h (TARGET_CASCADELAKE, PROCESSOR_CASCADELAKE): New. (PTA_CASCADELAKE): Ditto. * doc/invoke.texi: Add -march=cascadelake. gcc/testsuite/ * gcc.target/i386/funcspec-56.inc: Handle new march. From-SVN: r267080
2018-12-10Delete powerpcspeSegher Boessenkool1-64/+1
This deletes powerpcspe, which was deprecated for GCC 8. This does not change the testsuite, or libgcc for rs6000 (which still is shared code with powerpcspe, so can use some cleanup after this). / * contrib/config-list.mk: Remove powerpc-eabispe and powerpc-linux_spe. gcc/ * config.gcc (Obsolete configurations): Delete powerpc*-*-*spe*. (Unsupported targets): Add powerpc*-*-*spe*. (powerpc*-*-*spe*): Delete. (powerpc-*-eabispe*): Delete. (powerpc-*-rtems*spe*): Delete. (powerpc*-*-linux*spe*): Delete. (powerpc*-*-linux*): Do not handle the linux*spe* targets. (powerpc-wrs-vxworks*spe): Delete. (with_cpu setting code): Delete powerpc*-*-*spe* handling. * config.host (target powerpc*-*-*spe*): Delete. * doc/invoke.texi (PowerPC SPE Options): Delete. (PowerPC SPE Options): Delete. * config/powerpcspe: Delete. From-SVN: r266961
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