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2009-01-05 Joel Sherrill <joel.sherrill@oarcorp.com>
* config.gcc: Add m32r*-*-rtems*.
* config/m32r/rtems.h: New file.
From-SVN: r143079
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2008-12-12 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/i386/x86intrin.h: New header file to support all x86
intrinsics
* config.gcc (extra_headers): For x86 and x86-64, add x86intrin.h
From-SVN: r142713
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2008-12-01 Joel Sherrill <joel.sherrill@oarcorp.com>
* config.gcc: Add m32c*-*-rtems*.
* config/m32c/rtems.h: New file.
From-SVN: r142323
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immintrin.h and avxintrin.h.
gcc/
2008-11-21 H.J. Lu <hongjiu.lu@intel.com>
Xuepeng Guo <xuepeng.guo@intel.com>
* config.gcc (extra_headers): For x86 and x86-64, remove
gmmintrin.h, add immintrin.h and avxintrin.h.
* config/i386/gmmintrin.h: Renamed to ...
* config/i386/avxintrin.h: This. Don't include intrinsics if
_IMMINTRIN_H_INCLUDED is undedined.
* config/i386/immintrin.h: New.
gcc/testsuite/
2008-11-21 H.J. Lu <hongjiu.lu@intel.com>
* gcc.target/i386/avx-1.c: Include <immintrin.h> instead of
<gmmintrin.h>.
* gcc.target/i386/avx-2.c: Likewise.
* gcc.target/i386/m256-check.h: Likewise.
* g++.dg/other/i386-5.C: Likewise.
* g++.dg/other/i386-6.C: Likewise.
Co-Authored-By: Xuepeng Guo <xuepeng.guo@intel.com>
From-SVN: r142090
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version 0: offset 0x0)
gcc:
PR bootstrap/33100
* config.gcc (i[34567]86-*-solaris2*): Don't include
i386/t-crtstuff here.
Move extra_parts, i386/t-sol2 in tmake_file to libgcc/config.host.
* config/i386/t-sol2: Move to libgcc/config/i386.
libgcc:
PR bootstrap/33100
* configure.ac (i?86-*-solaris2.1[0-9]*): Only include
i386/t-crtstuff if linker supports ZERO terminator unwind entries.
* configure: Regenerate.
* config.host (i[34567]86-*-solaris2*): Move i386/t-sol2 in
tmake_file here from gcc/config.gcc.
Move extra_parts here from gcc/config.gcc.
* config/i386/t-sol2: Move here from gcc/config/i386.
Use gcc_srcdir instead of srcdir.
From-SVN: r142050
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* config.gcc: Unobsolete mips-sgi-irix[56]*.
(mips-sgi-irix[56]*): No need to use fixproto.
From-SVN: r142008
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gcc/
* config.gcc (mips*-sde-elf*): Handle mipsisa64r2*.
(mipsisa64r2-*-elf*, mipsisa64r2el-*-elf*): Add new cases to
mipsisa*-*-elf*. Handle mipsisa64r2*.
* config/mips/sde.h (LINK_SPEC): Handle -mips64r2.
* config/mips/t-isa3264 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Add
mips64r2.
(MULTILIB_EXCLUSIONS): Add mips64r2/mfp64.
* config/mips/t-sde (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Add
mips64r2.
(MULTILIB_EXCLUSIONS): Add mips64r2/mfp64. Add mips64r2/mips16.
Fix mips16 if mips64 or mips64r2 are multilib defaults.
* config/mips/t-sdemtk (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Add
mips64r2.
libgcc/
* config.host (mipsisa64r2-*-elf* | mipsisa64r2el-*-elf*): New
case.
From-SVN: r141976
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2008-11-13 Thomas Schwinge <tschwinge@gnu.org>
PR target/28102
* config.gcc (*-*-gnu*): Move Alpha parts into the `alpha*-*-gnu*', x86
parts into the `i[34567]86-*-linux*' and parts that are independent of
the processor architecture into the `*-*-linux*' cases.
(*-*-linux*): Consider `linux.opt' only for Linux-based configurations.
* config/i386/gnu.h (GLIBC_DYNAMIC_LINKER): Redefine.
(TARGET_OS_CPP_BUILTINS, LINK_SPEC): Don't redefine.
[TARGET_LIBC_PROVIDES_SSP] (TARGET_THREAD_SSP_OFFSET): Undefine.
* config/gnu.h (NO_IMPLICIT_EXTERN_C): Don't redefine.
(HURD_TARGET_OS_CPP_BUILTINS): Don't define, but instead...
(LINUX_TARGET_OS_CPP_BUILTINS): Redefine.
From-SVN: r141838
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2008-11-12 Jack Howarth <howarth@bromo.med.uc.edu>
PR bootstrap/38010
* gcc/config.gcc: Use darwin9.h on darwin10 as well.
From-SVN: r141803
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* config.gcc (mips64vrel-*-elf*): Include the tm_file
prior to vr.h.
* config/mips/linux.h (LINUX_DRIVER_SELF_SPECS): New.
(BASE_DRIVER_SELF_SPECS): Remove.
(DRIVER_SELF_SPECS): New definition.
* config/mips/elfoabi.h: (DRIVER_SELF_SPECS): Include
BASE_DRIVER_SELF_SPECS.
* config/mips/sde.h: Likewise.
* config/mips/iris6.h: Likewise.
* config/mips/vr.h: Likewise.
* config/mips/mips.h (BASE_DRIVER_SELF_SPECS): New.
From-SVN: r141754
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2008-10-21 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config.gcc (powerpc-*): Make t-ppcgas imply usegas.h.
* config/svr4.h (SVR4_ASM_SPEC): New.
(ASM_SPEC): Inherit from SVR4_ASM_SPEC.
* config/rs6000/sysv4.h (ASM_SPEC): Inherit from SVR4_ASM_SPEC.
* doc/invoke.texi (Option Summary): Add -T to linker options.
(Link Options): Document -T.
From-SVN: r141267
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2008-10-13 Kai Tietz <kai.tietz@onevision.com>
Fix PR/25502
* c-format.c (convert_format_name_to_system_name): Use
TARGET_OVERRIDES_FORMAT_INIT.
* config.gcc (extra_options): Add for mingw targets mingw.opt.
* config/i386/mingw.opt: New.
* config/i386/mingw32.h (TARGET_OVERRIDES_FORMAT_INIT): New.
* config/i386/msformat-c.c (TARGET_OVERRIDES_FORMAT_INIT): New.
(ms_printf_length_specs): Removed const specifier.
* doc/tm.texi (TARGET_OVERRIDES_FORMAT_INIT): New.
* doc/invoke.texi (Wno-pedantic-ms-format): New.
* testsuite/gcc.dg/format/ms-format1.c: New.
From-SVN: r141087
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2008-10-11 Michael J. Eager <eager@eagercon.com>
* config/rs6000/rs6000.c (rs6000_parse_fpu_option): Interpret
-mfpu options.
(rs6000_handle_option): Process -mfpu options.
* config/rs6000/rs6000.h: (TARGET_XILINX_FPU): New.
(enum fpu_type_t): New.
* config/rs6000/rs6000.md (attr fp_type): New.
Include xfpu.md.
(addsf3, subsf3, mulsf3, adddf3, subdf3, muldf3, trunctfdf2): Set
fp_type.
(floatsisf2): Remove TARGET_SINGLE_FPU condition.
(floatdidf2): Add TARGET_SINGLE_FPU condition.
* config/rs6000/rs6000.opt (-mfpu): New.
(-mxilinx-fpu): New.
* config/rs6000/sysv4.h: (DRIVER_SELF_SPECS): New.
* config/rs6000/xfpu.h: New. Define TARGET_XILINX_FPU.
* config/rs6000/xfpu.md: New. Define Xilinx pipeline.
* gcc/config.gcc: powerpc-xilinx-eabi target: New.
* gcc/doc/invoke.texi (RS/6000 and PowerPC Options): Add -mfpu option.
From-SVN: r141059
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2008-10-07 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
* config.gcc (arm*-*-*): Add aapcs-linux to supported ABIs.
From-SVN: r140936
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* config/rs6000/predicates.md (easy_fp_constant): Single FP consts
are easy.
* config/rs6000/rs6000.c (rs6000_override_options): Move
rs6000_init_hard_regno_mode_ok after all options changed.
Set rs6000_single_float, rs6000_double_float if TARGET_HARD_FLOAT.
(rs6000_handle_option): Process -msingle-float, -mdouble-float,
-msimple-fpu flags. Add warning messages if single FP not configured.
(rs6000_file_start): Output gnu_attribute for single-float.
(legitimate_lo_sum_address_p): Condition on TARGET_DOUBLE_FLOAT.
(rs6000_legitimize_address): Likewise.
(rs6000_legitimize_reload_address): Likewise.
(rs6000_emit_move): Condition on TARGET_DOUBLE_FLOAT,
TARGET_SINGLE_FLOAT.
(function_arg_advance): Likewise (partial conversion).
(setup_incoming_varargs): Condition on TARGET_DOUBLE_FLOAT.
(rs6000_gimplify_va_arg): Condition on TARGET_DOUBLE_FLOAT,
TARGET_SINGLE_FLOAT.
(rs6000_split_multireg_move): Condition on TARGET_DOUBLE_FLOAT.
(rs6000_emit_prologue): Likewise.
(rs6000_function_value): Condition on TARGET_DOUBLE_FLOAT,
TARGET_SINGLE_FLOAT.
(rs6000_libcall_value): Likewise.
* config/rs6000/rs6000.h (TARGET_SINGLE_FLOAT): New default to 1.
(TARGET_DOUBLE_FLOAT): New default to 1
(TARGET_SIMPLE_FPU): New default to 0
(TARGET_SINGLE_FPU): New default to 0
(TARGET_SINGLE_FLOAT_MODE): New.
(TARGET_DOUBLE_FLOAT_MODE): New.
* config/rs6000/singlefp.h: New; redefine TARGET_SINGLE_FLOAT,
TARGET_DOUBLE_FLOAT, TARGET_SIMPLE_FPU, TARGET_SINGLE_FPU,
UNITS_PER_FP_WORD
* config/rs6000/rs6000.md (define_mode_iterator): Condition on
TARGET_DOUBLE_FLOAT, TARGET_SINGLE_FLOAT.
(extendsfdf2, extendsfdf2_fpr, truncdfsf2, truncdfsf2_fpr,
copysigndf3,fseldfsf4, negdf2, negdf2_fpr, absdf2, absdf2_fpr,
nabsdf2_fpr, adddf3, adddf3_fpr, subdf3, subdf3_fpr, muldf3,
muldf3_fpr, divdf3, divdf3_fpr, sqrtdf2, smaxdf3, smindf3,
movdfcc, *fseldfdf4, floatsidf2, *floatsidf2_internal,
floatunssidf2, *floatunssidf2_internal, fix_truncdfsi2,
*fix_truncdfsi2_internal, fix_truncdfsi2_internal_gfxopt,
fix_truncdfsi2_mfpgpr, fctiwz, btruncdf2, ceildf2, floordf2,
rounddf2, floatdidf2, floatsidf_ppc64_mfpgpr, floatsidf_ppc64,
floatunssidf_ppc64, fix_truncdfdi2, movdf_hardfloat32,
movdf_hardfloat64_mfpgpr, movdf_hardfloat64, extenddftf2_fprs,
extenddftf2_internal, trunctfdf2_internal2, fix_trunc_helper,
abstf2_internal, movdf_update1, movdf_update2, cmpdf_internal1,
cmptf_internal1, *cmptf_internal2): Condition on
TARGET_DOUBLE_FLOAT.
(aux_truncdfsf2, negsf2, *negsf2, abssf2, *abssf2, addsf3, subsf3,
mulsf3, divsf3, sqrtsf2, copysignsf3, smaxsf3, sminsf3, movsfcc,
*fselsfsf4, fixuns_truncsfsi2, fix_truncsfsi2, floatunssisf2,
btruncsf2, ceilsf2, floorsf2, roundsf2, floatdisf2_internal1,
floatdisf2_internal2, *movsf_hardfloat, trunctfsf2_fprs,
*movsf_update1, *movsf_update2, *cmpsf_internal1): Condition on
TARGET_SINGLE_FLOAT.
(divsf3, sqrtsf2, divdf3, divdf3_fpr): Condition on TARGET_SIMPLE_FPU.
* config/rs6000/rs6000.opt (-msingle-float): New.
(-mdouble-float): New.
(-msimple-fpu): New.
* doc/invoke.texi (RS/6000 and PowerPC Options): Add
-msingle-float, -mdouble-float, -msimple-fpu options.
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Set
_SOFT_DOUBLE for -msingle-float.
* config.gcc: New config for target=powerpc-xilinx-eabi.
From-SVN: r140757
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From-SVN: r140646
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2008-09-24 Michael J. Eager <eager@eagercon.com>
* config/rs6000/predicates.md (easy_fp_constant): Single FP consts
are easy.
* config/rs6000/rs6000.c (rs6000_override_options): Move
rs6000_init_hard_regno_mode_ok after all options changed.
Set rs6000_single_float, rs6000_double_float if TARGET_HARD_FLOAT.
(rs6000_handle_option): Process -msingle-float, -mdouble-float,
-msimple-fpu flags. Add warning messages if single FP not configured.
(rs6000_file_start): Output gnu_attribute for single-float.
(legitimate_lo_sum_address_p): Condition on TARGET_DOUBLE_FLOAT.
(rs6000_legitimize_address): Likewise.
(rs6000_legitimize_reload_address): Likewise.
(rs6000_emit_move): Condition on TARGET_DOUBLE_FLOAT,
TARGET_SINGLE_FLOAT.
(function_arg_advance): Likewise.
(function_arg): Likewise.
(setup_incoming_varargs): Condition on TARGET_DOUBLE_FLOAT.
(rs6000_gimplify_va_arg): Condition on TARGET_DOUBLE_FLOAT,
TARGET_SINGLE_FLOAT.
(rs6000_split_multireg_move): Condition on TARGET_DOUBLE_FLOAT.
(rs6000_emit_prologue): Likewise.
(rs6000_function_value): Condition on TARGET_DOUBLE_FLOAT,
TARGET_SINGLE_FLOAT.
(rs6000_libcall_value): Likewise.
* config/rs6000/rs6000.h (TARGET_SINGLE_FLOAT): New default to 1.
(TARGET_DOUBLE_FLOAT): New default to 1
(TARGET_SIMPLE_FPU): New default to 0
(TARGET_SINGLE_FPU): New default to 0
(TARGET_SINGLE_FLOAT_MODE): New.
(TARGET_DOUBLE_FLOAT_MODE): New.
* config/rs6000/singlefp.h: New; redefine TARGET_SINGLE_FLOAT,
TARGET_DOUBLE_FLOAT, TARGET_SIMPLE_FPU, TARGET_SINGLE_FPU,
UNITS_PER_FP_WORD
* config/rs6000/rs6000.md (define_mode_iterator): Condition on
TARGET_DOUBLE_FLOAT, TARGET_SINGLE_FLOAT.
(extendsfdf2, extendsfdf2_fpr, truncdfsf2, truncdfsf2_fpr,
copysigndf3,fseldfsf4, negdf2, negdf2_fpr, absdf2, absdf2_fpr,
nabsdf2_fpr, adddf3, adddf3_fpr, subdf3, subdf3_fpr, muldf3,
muldf3_fpr, divdf3, divdf3_fpr, sqrtdf2, smaxdf3, smindf3,
movdfcc, *fseldfdf4, floatsidf2, *floatsidf2_internal,
floatunssidf2, *floatunssidf2_internal, fix_truncdfsi2,
*fix_truncdfsi2_internal, fix_truncdfsi2_internal_gfxopt,
fix_truncdfsi2_mfpgpr, fctiwz, btruncdf2, ceildf2, floordf2,
rounddf2, floatdidf2, floatsidf_ppc64_mfpgpr, floatsidf_ppc64,
floatunssidf_ppc64, fix_truncdfdi2, movdf_hardfloat32,
movdf_hardfloat64_mfpgpr, movdf_hardfloat64, extenddftf2_fprs,
extenddftf2_internal, trunctfdf2_internal2, fix_trunc_helper,
abstf2_internal, movdf_update1, movdf_update2, cmpdf_internal1,
cmptf_internal1, *cmptf_internal2): Condition on
TARGET_DOUBLE_FLOAT.
(aux_truncdfsf2, negsf2, *negsf2, abssf2, *abssf2, addsf3, subsf3,
mulsf3, divsf3, sqrtsf2, copysignsf3, smaxsf3, sminsf3, movsfcc,
*fselsfsf4, fixuns_truncsfsi2, fix_truncsfsi2, floatunssisf2,
btruncsf2, ceilsf2, floorsf2, roundsf2, floatdisf2_internal1,
floatdisf2_internal2, *movsf_hardfloat, trunctfsf2_fprs,
*movsf_update1, *movsf_update2, *cmpsf_internal1): Condition on
TARGET_SINGLE_FLOAT.
(divsf3, sqrtsf2, divdf3, divdf3_fpr): Condition on TARGET_SIMPLE_FPU.
* config/rs6000/rs6000.opt (-msingle-float): New.
(-mdouble-float): New.
(-msimple-fpu): New.
* doc/invoke.texi (RS/6000 and PowerPC Options): Add
-msingle-float, -mdouble-float, -msimple-fpu options.
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Set
_SOFT_DOUBLE for -msingle-float.
* config.gcc: New config for target=powerpc-xilinx-eabi.
From-SVN: r140632
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2008-09-03 Hari Sandanagobalane <hariharan@picochip.com>
Add picoChip port.
* MAINTAINERS: Add picoChip maintainers.
libgcc/
* config.host: Add picochip-*-*.
gcc/
* doc/extend.texi: Document picoChip builtin functions.
* doc/invoke.texi: Document picoChip options.
* doc/contrib.texi: Add picoChip contribution.
* doc/md.texi: Document picoChip constraints.
* config.gcc: Add picochip-*-*.
* config/picochip/: Add new port.
From-SVN: r139932
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2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
Joey Ye <joey.ye@intel.com>
Xuepeng Guo <xuepeng.guo@intel.com>
* config.gcc (extra_headers): Add gmmintrin.h for x86 and x86-64.
* config/i386/cpuid.h (bit_FMA): New.
(bit_XSAVE): Likewise.
(bit_OSXSAVE): Likewise.
(bit_AVX): Likewise.
* config/i386/gas.h (ASM_OUTPUT_OPCODE): Undefine before
define. Use ASM_OUTPUT_AVX_PREFIX.
* config/i386/gmmintrin.h: New.
* config/i386/i386.c (x86_64_reg_class): Add X86_64_AVX_CLASS.
(OPTION_MASK_ISA_AVX_SET): New.
(OPTION_MASK_ISA_FMA_SET): Likewise.
(OPTION_MASK_ISA_AVX_UNSET): Likewise.
(OPTION_MASK_ISA_FMA_SET): Likewise.
(OPTION_MASK_ISA_SSE4_2_UNSET): Updated.
(ix86_handle_option): Handle OPT_mavx and OPT_mfma.
(pta_flags): Add PTA_AVX and PTA_FMA.
(override_options): Handle PTA_AVX and PTA_FMA.
(init_cumulative_args): Handle warn_avx.
(classify_argument): Return 0 for COImode and OImode. Return
1 and X86_64_AVX_CLASS for 256bit vector types.
(examine_argument): Handle X86_64_AVX_CLASS.
(construct_container): Likewise.
(function_arg_advance_32): Pass OImode and 256bit vector types
in AVX register.
(function_arg_advance_64): Take a new argument to indicate if a
parameter is named. Handle 256bit vector types. Return
immediately for unnamed 256bit vector mode parameters.
(function_arg_advance): Updated.
(function_arg_32): Add comments for TImode. Handle OImode
and 256bit vector types.
(function_arg_64): Take a new argument to indicate if a
parameter is named. Handle 256bit vector types. Return NULL
for unnamed 256bit vector mode parameters.
(function_arg): Updated.
(setup_incoming_varargs_64): Support
AVX encoding for *sse_prologue_save_insn.
(ix86_gimplify_va_arg): Handle 256bit vector mode parameters.
(standard_sse_constant_p): Return -2 for all 1s if SSE2 isn't
enabled. For all 1s in 256bit vector modes, return 3 if AVX is
enabled, otherwise return -3.
(standard_sse_constant_opcode): Handle AVX and 256bit vector
modes.
(print_reg): Support AVX registers. Handle 'x' and 't'.
Handle 'd' to duplicate the operand.
(print_operand): Likewise. Also support AVX vector compare
instructions.
(output_387_binary_op): Support AVX.
(output_fp_compare): Likewise.
(ix86_expand_vector_move_misalign): Likewise.
(ix86_attr_length_vex_default): New.
(ix86_builtins): Add IX86_BUILTIN_ADDPD256,
IX86_BUILTIN_ADDPS256, IX86_BUILTIN_ADDSUBPD256,
IX86_BUILTIN_ADDSUBPS256, IX86_BUILTIN_ANDPD256,
IX86_BUILTIN_ANDPS256, IX86_BUILTIN_ANDNPD256,
IX86_BUILTIN_ANDNPS256, IX86_BUILTIN_BLENDPD256,
IX86_BUILTIN_BLENDPS256, IX86_BUILTIN_BLENDVPD256,
IX86_BUILTIN_BLENDVPS256, IX86_BUILTIN_DIVPD256,
IX86_BUILTIN_DIVPS256, IX86_BUILTIN_DPPS256,
IX86_BUILTIN_HADDPD256, IX86_BUILTIN_HADDPS256,
IX86_BUILTIN_HSUBPD256, IX86_BUILTIN_HSUBPS256,
IX86_BUILTIN_MAXPD256, IX86_BUILTIN_MAXPS256,
IX86_BUILTIN_MINPD256, IX86_BUILTIN_MINPS256,
IX86_BUILTIN_MULPD256, IX86_BUILTIN_MULPS256,
IX86_BUILTIN_ORPD256, IX86_BUILTIN_ORPS256,
IX86_BUILTIN_SHUFPD256, IX86_BUILTIN_SHUFPS256,
IX86_BUILTIN_SUBPD256, IX86_BUILTIN_SUBPS256,
IX86_BUILTIN_XORPD256, IX86_BUILTIN_XORPS256,
IX86_BUILTIN_CMPSD, IX86_BUILTIN_CMPSS, IX86_BUILTIN_CMPPD,
IX86_BUILTIN_CMPPS, IX86_BUILTIN_CMPPD256,
IX86_BUILTIN_CMPPS256, IX86_BUILTIN_CVTDQ2PD256,
IX86_BUILTIN_CVTDQ2PS256, IX86_BUILTIN_CVTPD2PS256,
IX86_BUILTIN_CVTPS2DQ256, IX86_BUILTIN_CVTPS2PD256,
IX86_BUILTIN_CVTTPD2DQ256, IX86_BUILTIN_CVTPD2DQ256,
IX86_BUILTIN_CVTTPS2DQ256, IX86_BUILTIN_EXTRACTF128PD256,
IX86_BUILTIN_EXTRACTF128PS256, IX86_BUILTIN_EXTRACTF128SI256,
IX86_BUILTIN_VZEROALL, IX86_BUILTIN_VZEROUPPER,
IX86_BUILTIN_VZEROUPPER_REX64, IX86_BUILTIN_VPERMILVARPD,
IX86_BUILTIN_VPERMILVARPS, IX86_BUILTIN_VPERMILVARPD256,
IX86_BUILTIN_VPERMILVARPS256, IX86_BUILTIN_VPERMILPD,
IX86_BUILTIN_VPERMILPS, IX86_BUILTIN_VPERMILPD256,
IX86_BUILTIN_VPERMILPS256, IX86_BUILTIN_VPERMIL2PD,
IX86_BUILTIN_VPERMIL2PS, IX86_BUILTIN_VPERMIL2PD256,
IX86_BUILTIN_VPERMIL2PS256, IX86_BUILTIN_VPERM2F128PD256,
IX86_BUILTIN_VPERM2F128PS256, IX86_BUILTIN_VPERM2F128SI256,
IX86_BUILTIN_VBROADCASTSS, IX86_BUILTIN_VBROADCASTSD256,
IX86_BUILTIN_VBROADCASTSS256, IX86_BUILTIN_VBROADCASTPD256,
IX86_BUILTIN_VBROADCASTPS256, IX86_BUILTIN_VINSERTF128PD256,
IX86_BUILTIN_VINSERTF128PS256, IX86_BUILTIN_VINSERTF128SI256,
IX86_BUILTIN_LOADUPD256, IX86_BUILTIN_LOADUPS256,
IX86_BUILTIN_STOREUPD256, IX86_BUILTIN_STOREUPS256,
IX86_BUILTIN_LDDQU256, IX86_BUILTIN_LOADDQU256,
IX86_BUILTIN_STOREDQU256, IX86_BUILTIN_MASKLOADPD,
IX86_BUILTIN_MASKLOADPS, IX86_BUILTIN_MASKSTOREPD,
IX86_BUILTIN_MASKSTOREPS, IX86_BUILTIN_MASKLOADPD256,
IX86_BUILTIN_MASKLOADPS256, IX86_BUILTIN_MASKSTOREPD256,
IX86_BUILTIN_MASKSTOREPS256, IX86_BUILTIN_MOVSHDUP256,
IX86_BUILTIN_MOVSLDUP256, IX86_BUILTIN_MOVDDUP256,
IX86_BUILTIN_SQRTPD256, IX86_BUILTIN_SQRTPS256,
IX86_BUILTIN_SQRTPS_NR256, IX86_BUILTIN_RSQRTPS256,
IX86_BUILTIN_RSQRTPS_NR256, IX86_BUILTIN_RCPPS256,
IX86_BUILTIN_ROUNDPD256, IX86_BUILTIN_ROUNDPS256,
IX86_BUILTIN_UNPCKHPD256, IX86_BUILTIN_UNPCKLPD256,
IX86_BUILTIN_UNPCKHPS256, IX86_BUILTIN_UNPCKLPS256,
IX86_BUILTIN_SI256_SI, IX86_BUILTIN_PS256_PS,
IX86_BUILTIN_PD256_PD, IX86_BUILTIN_SI_SI256,
IX86_BUILTIN_PS_PS256, IX86_BUILTIN_PD_PD256,
IX86_BUILTIN_VTESTZPD, IX86_BUILTIN_VTESTCPD,
IX86_BUILTIN_VTESTNZCPD, IX86_BUILTIN_VTESTZPS,
IX86_BUILTIN_VTESTCPS, IX86_BUILTIN_VTESTNZCPS,
IX86_BUILTIN_VTESTZPD256, IX86_BUILTIN_VTESTCPD256,
IX86_BUILTIN_VTESTNZCPD256, IX86_BUILTIN_VTESTZPS256,
IX86_BUILTIN_VTESTCPS256, IX86_BUILTIN_VTESTNZCPS256,
IX86_BUILTIN_PTESTZ256, IX86_BUILTIN_PTESTC256,
IX86_BUILTIN_PTESTNZC256, IX86_BUILTIN_MOVMSKPD256
and IX86_BUILTIN_MOVMSKPS256,
(ix86_special_builtin_type): Add V32QI_FTYPE_PCCHAR,
V8SF_FTYPE_PCV4SF, V8SF_FTYPE_PCFLOAT, V4DF_FTYPE_PCV2DF,
V4DF_FTYPE_PCDOUBLE, V8SF_FTYPE_PCV8SF_V8SF,
V4DF_FTYPE_PCV4DF_V4DF, V4SF_FTYPE_PCV4SF_V4SF,
V2DF_FTYPE_PCV2DF_V2DF, VOID_FTYPE_PCHAR_V32QI,
VOID_FTYPE_PFLOAT_V8SF, VOID_FTYPE_PDOUBLE_V4DF,
VOID_FTYPE_PV8SF_V8SF_V8SF, VOID_FTYPE_PV4DF_V4DF_V4DF,
VOID_FTYPE_PV4SF_V4SF_V4SF and VOID_FTYPE_PV2DF_V2DF_V2DF,
(ix86_builtin_type): Add INT_FTYPE_V8SF_V8SF_PTEST,
INT_FTYPE_V4DI_V4DI_PTEST, INT_FTYPE_V4DF_V4DF_PTEST,
INT_FTYPE_V4SF_V4SF_PTEST, INT_FTYPE_V2DF_V2DF_PTEST,
INT_FTYPE_V8SF, INT_FTYPE_V4DF, V8SI_FTYPE_V8SF, V8SI_FTYPE_V4SI,
V8SF_FTYPE_V8SF, V8SF_FTYPE_V8SI, V8SF_FTYPE_V4SF,
V4SI_FTYPE_V8SI, V4SI_FTYPE_V4DF, V4DF_FTYPE_V4DF,
V4DF_FTYPE_V4SI, V4DF_FTYPE_V4SF, V4DF_FTYPE_V2DF,
V4SF_FTYPE_V4DF, V4SF_FTYPE_V8SF, V2DF_FTYPE_V4DF,
V8SF_FTYPE_V8SF_V8SF, V8SF_FTYPE_V8SF_V8SI,
V4DF_FTYPE_V4DF_V4DF, V4DF_FTYPE_V4DF_V4DI,
V4SF_FTYPE_V4SF_V4SI, V2DF_FTYPE_V2DF_V2DI,
V8SF_FTYPE_V8SF_INT, V4SI_FTYPE_V8SI_INT, V4SF_FTYPE_V8SF_INT,
V2DF_FTYPE_V4DF_INT, V4DF_FTYPE_V4DF_INT,
V8SF_FTYPE_V8SF_V8SF_V8SF, V4DF_FTYPE_V4DF_V4DF_V4DF,
V8SI_FTYPE_V8SI_V8SI_INT, V8SF_FTYPE_V8SF_V8SF_INT,
V4DF_FTYPE_V4DF_V4DF_INT, V4DF_FTYPE_V4DF_V2DF_INT,
V8SF_FTYPE_V8SF_V8SF_V8SI_INT, V4DF_FTYPE_V4DF_V4DF_V4DI_INT,
V4SF_FTYPE_V4SF_V4SF_V4SI_INT and V2DF_FTYPE_V2DF_V2DF_V2DI_INT.
(bdesc_special_args): Add IX86_BUILTIN_VZEROALL,
IX86_BUILTIN_VZEROUPPER. IX86_BUILTIN_VZEROUPPER_REX64,
IX86_BUILTIN_VBROADCASTSS, IX86_BUILTIN_VBROADCASTSD256,
IX86_BUILTIN_VBROADCASTSS256, IX86_BUILTIN_VBROADCASTPD256,
IX86_BUILTIN_VBROADCASTPS256, IX86_BUILTIN_LOADUPD256,
IX86_BUILTIN_LOADUPS256, IX86_BUILTIN_STOREUPD256,
IX86_BUILTIN_STOREUPS256, IX86_BUILTIN_LOADDQU256,
IX86_BUILTIN_STOREDQU256, IX86_BUILTIN_LDDQU256,
IX86_BUILTIN_MASKLOADPD, IX86_BUILTIN_MASKLOADPS,
IX86_BUILTIN_MASKLOADPD256, IX86_BUILTIN_MASKLOADPS256,
IX86_BUILTIN_MASKSTOREPD, IX86_BUILTIN_MASKSTOREPS,
IX86_BUILTIN_MASKSTOREPD256 and IX86_BUILTIN_MASKSTOREPS256.
(ix86_builtins): Add IX86_BUILTIN_ADDPD256,
IX86_BUILTIN_ADDPS256, IX86_BUILTIN_ADDSUBPD256,
IX86_BUILTIN_ADDSUBPS256, IX86_BUILTIN_ANDPD256,
IX86_BUILTIN_ANDPS256, IX86_BUILTIN_ANDNPD256,
IX86_BUILTIN_ANDNPS256, IX86_BUILTIN_DIVPD256,
IX86_BUILTIN_DIVPS256, IX86_BUILTIN_HADDPD256,
IX86_BUILTIN_HSUBPS256, IX86_BUILTIN_HSUBPD256,
IX86_BUILTIN_HADDPS256, IX86_BUILTIN_MAXPD256,
IX86_BUILTIN_MAXPS256, IX86_BUILTIN_MINPD256,
IX86_BUILTIN_MINPS256, IX86_BUILTIN_MULPD256,
IX86_BUILTIN_MULPS256, IX86_BUILTIN_ORPD256,
IX86_BUILTIN_ORPS256, IX86_BUILTIN_SUBPD256,
IX86_BUILTIN_SUBPS256, IX86_BUILTIN_XORPD256,
IX86_BUILTIN_XORPS256, IX86_BUILTIN_VPERMILVARPD,
IX86_BUILTIN_VPERMILVARPS, IX86_BUILTIN_VPERMILVARPD256,
IX86_BUILTIN_VPERMILVARPS256, IX86_BUILTIN_BLENDPD256,
IX86_BUILTIN_BLENDPS256, IX86_BUILTIN_BLENDVPD256,
IX86_BUILTIN_BLENDVPS256, IX86_BUILTIN_DPPS256,
IX86_BUILTIN_SHUFPD256, IX86_BUILTIN_SHUFPS256,
IX86_BUILTIN_CMPSD, IX86_BUILTIN_CMPSS, IX86_BUILTIN_CMPPD,
IX86_BUILTIN_CMPPS,
IX86_BUILTIN_CMPPD256,IX86_BUILTIN_CMPPS256,
IX86_BUILTIN_EXTRACTF128PD256, IX86_BUILTIN_EXTRACTF128PS256,
IX86_BUILTIN_EXTRACTF128SI256, IX86_BUILTIN_CVTDQ2PD256,
IX86_BUILTIN_CVTDQ2PS256, IX86_BUILTIN_CVTPD2PS256,
IX86_BUILTIN_CVTPS2DQ256, IX86_BUILTIN_CVTPS2PD256,
IX86_BUILTIN_CVTTPD2DQ256, IX86_BUILTIN_CVTPD2DQ256,
IX86_BUILTIN_CVTTPS2DQ256, IX86_BUILTIN_VPERM2F128PD256,
IX86_BUILTIN_VPERM2F128PS256, IX86_BUILTIN_VPERM2F128SI256,
IX86_BUILTIN_VPERMILPD, IX86_BUILTIN_VPERMILPS,
IX86_BUILTIN_VPERMILPD256, IX86_BUILTIN_VPERMILPS256,
IX86_BUILTIN_VPERMIL2PD, IX86_BUILTIN_VPERMILPS,
IX86_BUILTIN_VPERMILPD256, IX86_BUILTIN_VPERMILPS256,
IX86_BUILTIN_VPERMIL2PD, IX86_BUILTIN_VPERMIL2PS,
IX86_BUILTIN_VPERMIL2PD256, IX86_BUILTIN_VPERMIL2PS256,
IX86_BUILTIN_VINSERTF128PD256, IX86_BUILTIN_VINSERTF128PS256,
IX86_BUILTIN_VINSERTF128SI256, IX86_BUILTIN_MOVSHDUP256,
IX86_BUILTIN_MOVSLDUP256, IX86_BUILTIN_MOVDDUP256,
IX86_BUILTIN_SQRTPD256, IX86_BUILTIN_SQRTPS256,
IX86_BUILTIN_SQRTPS_NR256, IX86_BUILTIN_RSQRTPS256,
IX86_BUILTIN_RSQRTPS_NR256, IX86_BUILTIN_RCPPS256,
IX86_BUILTIN_ROUNDPD256, IX86_BUILTIN_ROUNDPS256,
IX86_BUILTIN_UNPCKHPD256, IX86_BUILTIN_UNPCKLPD256,
IX86_BUILTIN_UNPCKHPS256, IX86_BUILTIN_UNPCKLPS256,
IX86_BUILTIN_SI256_SI, IX86_BUILTIN_PS256_PS,
IX86_BUILTIN_PD256_PD, IX86_BUILTIN_SI_SI256,
IX86_BUILTIN_PS_PS256, IX86_BUILTIN_PD_PD256,
IX86_BUILTIN_VTESTZPD, IX86_BUILTIN_VTESTCPD,
IX86_BUILTIN_VTESTNZCPD, IX86_BUILTIN_VTESTZPS,
IX86_BUILTIN_VTESTCPS, IX86_BUILTIN_VTESTNZCPS,
IX86_BUILTIN_VTESTZPD256, IX86_BUILTIN_VTESTCPD256,
IX86_BUILTIN_VTESTNZCPD256, IX86_BUILTIN_VTESTZPS256,
IX86_BUILTIN_VTESTCPS256, IX86_BUILTIN_VTESTNZCPS256,
IX86_BUILTIN_PTESTZ256, IX86_BUILTIN_PTESTC256,
IX86_BUILTIN_PTESTNZC256, IX86_BUILTIN_MOVMSKPD256 and
IX86_BUILTIN_MOVMSKPS256.
(ix86_init_mmx_sse_builtins): Support AVX builtins.
(ix86_expand_args_builtin): Likewise.
(ix86_expand_special_args_builtin): Likewise.
(ix86_hard_regno_mode_ok): Handle AVX modes.
(ix86_expand_vector_init_duplicate): Likewise.
(ix86_expand_vector_init_one_nonzero): Likewise.
(ix86_expand_vector_init_one_var): Likewise.
(ix86_expand_vector_init_concat): Likewise.
(ix86_expand_vector_init_general): Likewise.
(ix86_expand_vector_set): Likewise.
(ix86_vector_mode_supported_p): Likewise.
(x86_extended_reg_mentioned_p): Check INSN_P before using
PATTERN.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_AVX and OPTION_MASK_ISA_FMA.
* config/i386/i386.h (TARGET_AVX): New.
(TARGET_FMA): Likewise.
(TARGET_CPU_CPP_BUILTINS): Handle TARGET_AVX and TARGET_FMA.
(BIGGEST_ALIGNMENT): Set to 256 for TARGET_AVX.
(VALID_AVX256_REG_MODE): New.
(AVX256_VEC_FLOAT_MODE_P): Likewise.
(AVX_FLOAT_MODE_P): Likewise.
(AVX128_VEC_FLOAT_MODE_P): Likewise.
(AVX256_VEC_FLOAT_MODE_P): Likewise.
(AVX_VEC_FLOAT_MODE_P): Likewise.
(ASM_OUTPUT_AVX_PREFIX): Likewise.
(ASM_OUTPUT_OPCODE): Likewise.
(UNITS_PER_SIMD_WORD): Add a FIXME for 32byte vectorizer
support.
(SSE_REG_MODE_P): Allow 256bit vector modes.
(ix86_args): Add a warn_avx field.
* config/i386/i386.md (UNSPEC_PCMP): New.
(UNSPEC_VPERMIL): Likewise.
(UNSPEC_VPERMIL2): Likewise.
(UNSPEC_VPERMIL2F128): Likewise.
(UNSPEC_MASKLOAD): Likewise.
(UNSPEC_MASKSTORE): Likewise.
(UNSPEC_CAST): Likewise.
(UNSPEC_VTESTP): Likewise.
(UNSPECV_VZEROALL): Likewise.
(UNSPECV_VZEROUPPER): Likewise.
(XMM0_REG): Likewise.
(XMM1_REG): Likewise.
(XMM2_REG): Likewise.
(XMM3_REG): Likewise.
(XMM4_REG): Likewise.
(XMM5_REG): Likewise.
(XMM6_REG): Likewise.
(XMM8_REG): Likewise.
(XMM9_REG): Likewise.
(XMM10_REG): Likewise.
(XMM11_REG): Likewise.
(XMM12_REG): Likewise.
(XMM13_REG): Likewise.
(XMM14_REG): Likewise.
(XMM15_REG): Likewise.
(prefix): Likewise.
(prefix_vex_imm8): Likewise.
(prefix_vex_w): Likewise.
(length_vex): Likewise.
(maxmin): Likewise.
(movoi): Likewise.
(*avx_ashlti3): Likewise.
(*avx_lshrti3): Likewise.
(*avx_setcc<mode>): Likewise.
(*fop_<mode>_comm_mixed_avx): Likewise.
(*fop_<mode>_comm_avx): Likewise.
(*fop_<mode>_1_mixed_avx): Likewise.
(*fop_<mode>_1_avx): Likewise.
(*avx_<code><mode>3): Likewise.
(*avx_ieee_smin<mode>3): Likewise.
(*avx_ieee_smax<mode>3): Likewise.
(mode): Add OI, V8SF and V4DF.
(length): Support VEX prefix.
(*cmpfp_i_mixed): Set prefix attribute.
(*cmpfp_i_sse): Likewise.
(*cmpfp_iu_mixed): Likewise.
(*cmpfp_iu_sse): Likewise.
(*movsi_1): Support AVX.
(*movdi_2): Likewise.
(*movdi_1_rex64): Likewise.
(*movti_internal): Likewise.
(*movti_rex64): Likewise.
(*movsf_1): Likewise.
(*movdf_nointeger): Likewise.
(*movdf_integer_rex64): Likewise.
(*movtf_internal): Likewise.
(zero_extendsidi2_32): Likewise.
(zero_extendsidi2_rex64): Likewise.
(*extendsfdf2_mixed): Likewise.
(*extendsfdf2_sse): Likewise.
(*truncdfsf_fast_mixed): Likewise.
(*truncdfsf_fast_sse): Likewise.
(*truncdfsf_mixed): Likewise.
(fix_trunc<mode>di_sse): Likewise.
(fix_trunc<mode>si_sse): Likewise.
(*float<SSEMODEI24:mode><MODEF:mode>2_mixed_interunit): Likewise.
(*float<SSEMODEI24:mode><MODEF:mode>2_mixed_nointerunit): Likewise.
(*float<SSEMODEI24:mode><MODEF:mode>2_sse_interunit): Likewise.
(*float<SSEMODEI24:mode><MODEF:mode>2_sse_nointerunit): Likewise.
(*rcpsf2_sse): Likewise.
(*rsqrtsf2_sse): Likewise.
(*sqrt<mode>2_sse): Likewise.
(sse4_1_round<mode>2): Likewise.
(*sse_prologue_save_insn): Disallow REX prefix for AVX.
Support AVX. Set length attribute properly for AVX.
* config/i386/i386-modes.def (VECTOR_MODES (INT, 32)): New.
(VECTOR_MODES (FLOAT, 32)): Likewise.
(VECTOR_MODE (INT, DI, 8)): Likewise.
(VECTOR_MODE (INT, HI, 32)): Likewise.
(VECTOR_MODE (INT, QI, 64)): Likewise.
(VECTOR_MODE (FLOAT, DF, 8)): Likewise.
(VECTOR_MODE (FLOAT, SF, 16)): Likewise.
(VECTOR_MODE (INT, DI, 4)): Removed.
(VECTOR_MODE (INT, SI, 8)): Likewise.
(VECTOR_MODE (INT, HI, 16)): Likewise.
(VECTOR_MODE (INT, QI, 32)): Likewise.
(VECTOR_MODE (FLOAT, SF, 8)): Likewise.
(INT_MODE (OI, 32)): Likewise.
* config/i386/i386.opt (mavx): New.
(mfma): Likewise.
* config/i386/i386-protos.h (ix86_attr_length_vex_default): New.
* config/i386/mmx.md (*mov<mode>_internal_rex64): Support AVX.
(*mov<mode>_internal_avx): New.
(*movv2sf_internal_rex64_avx): Likewise.
(*movv2sf_internal_avx): Likewise.
* config/i386/predicates.md (const_4_to_5_operand): New.
(const_6_to_7_operand): Likewise.
(const_8_to_11_operand): Likewise.
(const_12_to_15_operand): Likewise.
(avx_comparison_float_operator): Likewise.
* config/i386/sse.md (AVX256MODEI): New.
(AVX256MODE): Likewise.
(AVXMODEQI): Likewise.
(AVXMODE): Likewise.
(AVX256MODEF2P): Likewise.
(AVX256MODE2P): Likewise.
(AVX256MODE4P): Likewise.
(AVX256MODE8P): Likewise.
(AVXMODEF2P): Likewise.
(AVXMODEF4P): Likewise.
(AVXMODEDCVTDQ2PS): Likewise.
(AVXMODEDCVTPS2DQ): Likewise.
(avxvecmode): Likewise.
(avxvecpsmode): Likewise.
(avxhalfvecmode): Likewise.
(avxscalarmode): Likewise.
(avxcvtvecmode): Likewise.
(avxpermvecmode): Likewise.
(avxmodesuffixf2c): Likewise.
(avxmodesuffixp): Likewise.
(avxmodesuffixs): Likewise.
(avxmodesuffix): Likewise.
(vpermilbits): Likewise.
(pinsrbits): Likewise.
(mov<mode>): Likewise.
(*mov<mode>_internal): Likewise.
(push<mode>1): Likewise.
(movmisalign<mode>): Likewise.
(avx_movup<avxmodesuffixf2c><avxmodesuffix>): Likewise.
(avx_movdqu<avxmodesuffix>): Likewise.
(avx_lddqu<avxmodesuffix>): Likewise.
(<plusminus_insn><mode>3): Likewise.
(*avx_<plusminus_insn><mode>3): Likewise.
(*avx_vm<plusminus_insn><mode>3): Likewise.
(mul<mode>3): Likewise.
(*avx_mul<mode>3): Likewise.
(*avx_vmmul<mode>3): Likewise.
(divv8sf3): Likewise.
(divv4df3): Likewise.
(avx_div<mode>3): Likewise.
(*avx_div<mode>3): Likewise.
(*avx_vmdiv<mode>3): Likewise.
(avx_rcpv8sf2): Likewise.
(*avx_vmrcpv4sf2): Likewise.
(sqrtv8sf2): Likewise.
(avx_sqrtv8sf2): Likewise.
(*avx_vmsqrt<mode>2): Likewise.
(rsqrtv8sf2): Likewise.
(avx_rsqrtv8sf2): Likewise.
(*avx_vmrsqrtv4sf2): Likewise.
(<code><mode>3): Likewise.
(*avx_<code><mode>3_finite): Likewise.
(*avx_<code><mode>3): Likewise.
(*avx_vm<code><mode>3): Likewise.
(*avx_ieee_smin<mode>3): Likewise.
(*avx_ieee_smax<mode>3): Likewise.
(avx_addsubv8sf3): Likewise.
(avx_addsubv4df3): Likewise.
(*avx_addsubv4sf3): Likewise.
(*avx_addsubv2df3): Likewise.
(avx_h<plusminus_insn>v4df3): Likewise.
(avx_h<plusminus_insn>v8sf3): Likewise.
(*avx_h<plusminus_insn>v4sf3): Likewise.
(*avx_h<plusminus_insn>v2df3): Likewise.
(avx_cmpp<avxmodesuffixf2c><mode>3): Likewise.
(avx_cmps<ssemodesuffixf2c><mode>3): Likewise.
(*avx_maskcmp<mode>3): Likewise.
(avx_nand<mode>3): Likewise.
(*avx_<code><mode>3): Likewise.
(*avx_nand<mode>3): Likewise.
(*avx_<code><mode>3): Likewise.
(*avx_cvtsi2ss): Likewise.
(*avx_cvtsi2ssq): Likewise.
(*avx_cvtsi2sd): Likewise.
(*avx_cvtsi2sdq): Likewise.
(*avx_cvtsd2ss): Likewise.
(avx_cvtss2sd): Likewise.
(avx_cvtdq2ps<avxmodesuffix>): Likewise.
(avx_cvtps2dq<avxmodesuffix>): Likewise.
(avx_cvttps2dq<avxmodesuffix>): Likewise.
(*avx_cvtsi2sd): Likewise.
(*avx_cvtsi2sdq): Likewise.
(avx_cvtdq2pd256): Likewise.
(avx_cvtpd2dq256): Likewise.
(avx_cvttpd2dq256): Likewise.
(*avx_cvtsd2ss): Likewise.
(*avx_cvtss2sd): Likewise.
(avx_cvtpd2ps256): Likewise.
(avx_cvtps2pd256): Likewise.
(*avx_movhlps): Likewise.
(*avx_movlhps): Likewise.
(avx_unpckhps256): Likewise.
(*avx_unpckhps): Likewise.
(avx_unpcklps256): Likewise.
(*avx_unpcklps): Likewise.
(avx_movshdup256): Likewise.
(avx_movsldup256): Likewise.
(avx_shufps256): Likewise.
(avx_shufps256_1): Likewise.
(*avx_shufps_<mode>): Likewise.
(*avx_loadhps): Likewise.
(*avx_storelps): Likewise.
(*avx_loadlps): Likewise.
(*avx_movss): Likewise.
(*vec_dupv4sf_avx): Likewise.
(*vec_concatv2sf_avx): Likewise.
(*vec_concatv4sf_avx): Likewise.
(*vec_setv4sf_0_avx): Likewise.
(*vec_setv4sf_avx): Likewise.
(*avx_insertps): Likewise.
(avx_vextractf128<mode>): Likewise.
(vec_extract_lo_<mode>): Likewise.
(vec_extract_hi_<mode>): Likewise.
(vec_extract_lo_<mode>): Likewise.
(vec_extract_hi_<mode>): Likewise.
(vec_extract_lo_v16hi): Likewise.
(vec_extract_hi_v16hi): Likewise.
(vec_extract_lo_v32qi): Likewise.
(vec_extract_hi_v32qi): Likewise.
(avx_unpckhpd256): Likewise.
(*avx_unpckhpd): Likewise.
(avx_movddup256): Likewise.
(*avx_movddup): Likewise.
(avx_unpcklpd256): Likewise.
(*avx_unpcklpd): Likewise.
(avx_shufpd256): Likewise.
(avx_shufpd256_1): Likewise.
(*avx_punpckhqdq): Likewise.
(*avx_punpcklqdq): Likewise.
(*avx_shufpd_<mode>): Likewise.
(*avx_storehpd): Likewise.
(*avx_loadhpd): Likewise.
(*avx_loadlpd): Likewise.
(*avx_movsd): Likewise.
(*vec_concatv2df_avx): Likewise.
(*avx_<plusminus_insn><mode>3): Likewise.
(*avx_<plusminus_insn><mode>3): Likewise.
(*avx_mulv8hi3): Likewise.
(*avxv8hi3_highpart): Likewise.
(*avx_umulv8hi3_highpart): Likewise.
(*avx_umulv2siv2di3): Likewise.
(*avx_mulv2siv2di3): Likewise.
(*avx_pmaddwd): Likewise.
(*avx_mulv4si3): Likewise.
(*avx_ashr<mode>3): Likewise.
(*avx_lshr<mode>3): Likewise.
(*avx_ashl<mode>3): Likewise.
(*avx_<code><mode>3): Likewise.
(*avx_eq<mode>3): Likewise.
(*avx_gt<mode>3): Likewise.
(*avx_nand<mode>3): Likewise.
(*avx_nand<mode>3): Likewise.
(*avx_<code><mode>3): Likewise.
(*avx_<code><mode>3): Likewise.
(*avx_packsswb): Likewise.
(*avx_packssdw): Likewise.
(*avx_packuswb): Likewise.
(*avx_punpckhbw): Likewise.
(*avx_punpcklbw): Likewise.
(*avx_punpckhwd): Likewise.
(*avx_punpcklwd): Likewise.
(*avx_punpckhdq): Likewise.
(*avx_punpckldq): Likewise.
(*avx_pinsr<avxmodesuffixs>): Likewise.
(*avx_pinsrq): Likewise.
(*avx_loadld): Likewise.
(*vec_extractv2di_1_rex64_avx): Likewise.
(*vec_extractv2di_1_avx): Likewise.
(*vec_dupv2di_avx): Likewise.
(*vec_concatv2si_avx): Likewise.
(*vec_concatv4si_1_avx): Likewise.
(*vec_concatv2di_avx): Likewise.
(*vec_concatv2di_rex64_avx): Likewise.
(*avx_uavgv16qi3): Likewise.
(*avx_uavgv8hi3): Likewise.
(*avx_psadbw): Likewise.
(avx_movmskp<avxmodesuffixf2c>256): Likewise.
(*avx_phaddwv8hi3): Likewise.
(*avx_phadddv4si3): Likewise.
(*avx_phaddswv8hi3): Likewise.
(*avx_phsubwv8hi3): Likewise.
(*avx_phsubdv4si3): Likewise.
(*avx_phsubswv8hi3): Likewise.
(*avx_pmaddubsw128): Likewise.
(*avx_pmulhrswv8hi3): Likewise.
(*avx_pshufbv16qi3): Likewise.
(*avx_psign<mode>3): Likewise.
(*avx_palignrti): Likewise.
(avx_blendp<avxmodesuffixf2c><avxmodesuffix>): Likewise.
(avx_blendvp<avxmodesuffixf2c><avxmodesuffix>): Likewise.
(avx_dpp<avxmodesuffixf2c><avxmodesuffix>): Likewise.
(*avx_mpsadbw): Likewise.
(*avx_packusdw): Likewise.
(*avx_pblendvb): Likewise.
(*avx_pblendw): Likewise.
(avx_vtestp<avxmodesuffixf2c><avxmodesuffix>): Likewise.
(avx_ptest256): Likewise.
(avx_roundp<avxmodesuffixf2c>256): Likewise.
(*avx_rounds<ssemodesuffixf2c>): Likewise.
(*avx_aesenc): Likewise.
(*avx_aesenclast): Likewise.
(*avx_aesdec): Likewise.
(*avx_aesdeclast): Likewise.
(avx_vzeroupper): Likewise.
(avx_vzeroupper_rex64): Likewise.
(avx_vpermil<mode>): Likewise.
(avx_vpermilvar<mode>3): Likewise.
(avx_vpermil2<mode>3): Likewise.
(avx_vperm2f128<mode>3): Likewise.
(avx_vbroadcasts<avxmodesuffixf2c><avxmodesuffix>): Likewise.
(avx_vbroadcastss256): Likewise.
(avx_vbroadcastf128_p<avxmodesuffixf2c>256): Likewise.
(avx_vinsertf128<mode>): Likewise.
(vec_set_lo_<mode>): Likewise.
(vec_set_hi_<mode>): Likewise.
(vec_set_lo_<mode>): Likewise.
(vec_set_hi_<mode>): Likewise.
(vec_set_lo_v16hi): Likewise.
(vec_set_hi_v16hi): Likewise.
(vec_set_lo_v32qi): Likewise.
(vec_set_hi_v32qi): Likewise.
(avx_maskloadp<avxmodesuffixf2c><avxmodesuffix>): Likewise.
(avx_maskstorep<avxmodesuffixf2c><avxmodesuffix>): Likewise.
(avx_<avxmodesuffixp><avxmodesuffix>_<avxmodesuffixp>): Likewise.
(avx_<avxmodesuffixp>_<avxmodesuffixp><avxmodesuffix>): Likewise.
(vec_init<mode>): Likewise.
(*vec_concat<mode>_avx): Likewise.
(blendbits): Support V8SF and V4DF.
(sse2_movq128): Support AVX.
(<sse>_movnt<mode>): Likewise.
(sse2_movntv2di): Likewise.
(sse_rcpv4sf2): Likewise.
(sse_sqrtv4sf2): Likewise.
(sse_rsqrtv4sf2): Likewise.
(<sse>_comi): Likewise.
(<sse>_ucomi): Likewise.
(sse_cvtss2si): Likewise.
(sse_cvtss2si_2): Likewise.
(sse_cvtss2siq): Likewise.
(sse_cvtss2siq_2): Likewise.
(sse_cvttss2si): Likewise.
(sse_cvttss2siq): Likewise.
(sse2_cvtsd2si): Likewise.
(sse2_cvtsd2si_2): Likewise.
(sse2_cvtsd2siq): Likewise.
(sse2_cvtsd2siq_2): Likewise.
(sse2_cvttsd2si): Likewise.
(sse2_cvttsd2siq): Likewise.
(sse2_cvtdq2pd): Likewise.
(*sse2_cvtpd2dq): Likewise.
(*sse2_cvttpd2dq): Likewise.
(*sse2_cvtpd2ps): Likewise.
(sse2_cvtps2pd): Likewise.
(sse3_movshdup): Likewise.
(sse3_movsldup): Likewise.
(sse_storehps): Likewise.
(*sse4_1_extractps): Likewise.
(sse2_storelpd): Likewise.
(vec_dupv2df_sse3): Likewise.
(*vec_concatv2df_sse3): Likewise.
(*sse4_1_pextrb): Likewise.
(*sse4_1_pextrb_memory): Likewise.
(*sse2_pextrw): Likewise.
(*sse4_1_pextrw_memory): Likewise.
(*sse4_1_pextrd): Likewise.
(*sse4_1_pextrq): Likewise.
(sse2_pshufd_1): Likewise.
(sse2_pshuflw_1): Likewise.
(sse2_pshufhw_1): Likewise.
(*sse2_storeq_rex64): Likewise.
(*vec_dupv4si): Likewise.
(<sse>_movmskp<ssemodesuffixf2c>): Likewise.
(sse2_pmovmskb): Likewise.
(*sse2_maskmovdqu): Likewise.
(*sse2_maskmovdqu_rex64): Likewise.
(sse_ldmxcsr): Likewise.
(sse_stmxcsr): Likewise.
(abs<mode>2): Likewise.
(sse4_1_movntdqa): Likewise.
(sse4_1_phminposuw): Likewise.
(sse4_1_extendv8qiv8hi2): Likewise.
(*sse4_1_extendv8qiv8hi2): Likewise.
(sse4_1_extendv4qiv4si2): Likewise.
(*sse4_1_extendv4qiv4si2): Likewise.
(sse4_1_extendv2qiv2di2): Likewise.
(*sse4_1_extendv2qiv2di2): Likewise.
(sse4_1_extendv4hiv4si2): Likewise.
(*sse4_1_extendv4hiv4si2): Likewise.
(sse4_1_extendv2hiv2di2): Likewise.
(*sse4_1_extendv2hiv2di2): Likewise.
(sse4_1_extendv2siv2di2): Likewise.
(*sse4_1_extendv2siv2di2): Likewise.
(sse4_1_zero_extendv8qiv8hi2): Likewise.
(*sse4_1_zero_extendv8qiv8hi2): Likewise.
(sse4_1_zero_extendv4qiv4si2): Likewise.
(*sse4_1_zero_extendv4qiv4si2): Likewise.
(sse4_1_zero_extendv2qiv2di2): Likewise.
(*sse4_1_zero_extendv2qiv2di2): Likewise.
(sse4_1_zero_extendv4hiv4si2): Likewise.
(*sse4_1_zero_extendv4hiv4si2): Likewise.
(sse4_1_zero_extendv2hiv2di2): Likewise.
(*sse4_1_zero_extendv2hiv2di2): Likewise.
(sse4_1_zero_extendv2siv2di2): Likewise.
(*sse4_1_zero_extendv2siv2di2): Likewise.
(sse4_1_ptest): Likewise.
(sse4_1_roundp<ssemodesuffixf2c>): Likewise.
(sse4_2_pcmpestri): Likewise.
(sse4_2_pcmpestrm): Likewise.
(sse4_2_pcmpistri): Likewise.
(sse4_2_pcmpistrm): Likewise.
(aesimc): Likewise.
(aeskeygenassist): Likewise.
2008-08-28 Uros Bizjak <ubizjak@gmail.com>
* config/i386/predicates.md (vzeroall_operation): New.
* config/i386/sse.md (avx_vzeroall): New.
(*avx_vzeroall): Likewise.
From-SVN: r139726
|
|
2008-08-27 Paul Brook <paul@codesourcery.com>
* config.gcc: Loosen checks for arm uclinux eabi targets.
From-SVN: r139627
|
|
* config.gcc (mips64*-*-linux*): Handle mips64octeon*-*-linux*.
* config/mips/mips.h (enum processor_type): Add PROCESSOR_OCTEON.
(TARGET_OCTEON): New macro.
(TARGET_CPU_CPP_BUILTINS): Define __OCTEON__ for Octeon.
(MIPS_ISA_LEVEL_SPEC, MIPS_ARCH_FLOAT_SPEC): Handle -march=octeon.
(ISA_HAS_POP): New macro.
* config/mips/driver-native.c (host_detect_local_cpu): Handle
Octeon.
* config/mips/mips.c (mips_cpu_info_table, mips_rtx_cost_data):
Handle Octeon.
* config/mips/mips.md (cpu): Add octeon.
(type): Add pop attribute value.
(popcount<mode>2): New pattern.
* doc/invoke.texi (-march=@var{arch}): Add octeon.
testsuite/
* gcc.target/mips/octeon-pop-1.c: New test.
From-SVN: r139554
|
|
gcc/
2008-08-17 Daniel Jacobowitz <dan@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* doc/install.texi (--with-mips-plt): Document.
* doc/invoke.texi (-mplt, -mno-plt): Document.
* config.gcc (mips*-*-*): Add mips-plt to supported_defaults
and handle ${with_mips_plt}.
* config/mips/mips.opt (mplt): New option.
* config/mips/mips.h (TARGET_ABICALLS_PIC0): New macro.
(TARGET_ABICALLS_PIC2): Likewise.
(TARGET_GPWORD): Return false for TARGET_ABSOLUTE_ABICALLS.
(OPTION_DEFAULT_SPECS): Add a mips-plt entry.
(ASM_SPEC): Use !mabi=* instead of !mabi*.
(MIPS_CALL): Use TARGET_ABICALLS_PIC2 instead of TARGET_ABICALLS
to decide whether to output ".option picX" directives.
* config/mips/linux.h (SUBTARGET_ASM_SPEC): Remove -mabi=64 handling.
Pass -call_nonpic rather than -KPIC for -mplt.
(BASE_DRIVER_SELF_SPECS): Remove -mplt if -mno-shared is not present
on the command line. Also remove it when -mabi=64 is used without
-msym32.
* config/mips/linux64.h (SUBTARGET_ASM_SPEC): Delete.
* config/mips/mips.c (mips_use_pic_fn_addr_reg_p): Handle
TARGET_ABICALLS_PIC0.
(mips_classify_symbol): Use TARGET_ABICALLS_PIC2 instead of
TARGET_ABICALLS.
(mips16_build_function_stub): Only output ".option pic" directives
and PIC stubs if TARGET_ABICALLS_PIC2. Call through $25 instead of $1.
(mips16_build_call_stub): Fix comment and remove redundant
".set at"/"set .noat" directives.
(mips_function_rodata_section): Use the default behaviour for
TARGET_ABSOLUTE_ABICALLS.
(mips_file_start): Emit ".option pic0" for TARGET_ABICALLS_PIC0.
(mips_global_pointer): Handle TARGET_ABICALLS_PIC0.
(mips_restore_gp): Do nothing if the current function doesn't use
a global pointer.
(mips_expand_prologue): Only save $gp if the current function uses it.
Use a normal move for TARGET_ABICALLS_PIC0.
(mips_override_options): Only set flag_pic if TARGET_ABICALLS_PIC2.
Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com>
From-SVN: r139170
|
|
* configure.ac (mips*-*-*linux*, mips*-*-gnu*): Use mt-mips-gnu.
* configure: Regenerate.
config/
* mt-mips16-compat: New file, taken from mt-mips-elfoabi.
* mt-mips-elfoabi: Include mt-mips16-compat.
* mt-mips-gnu: New file.
gcc/
* config.gcc (mips*-*-linux*, mips64*-*-linux*): Add
mips/t-libgcc-mips16 to tmake_file.
* config/mips/mips-protos.h (mips_call_type): New enum.
(mips_pic_base_register, mips_got_load): Declare.
(mips_restore_gp): Take an rtx argument.
(mips_use_pic_fn_addr_reg_p): Declare.
(mips_expand_call): Replace the sibcall_p argument with
a mips_call_type argument. Add a lazy_p parameter.
(mips_split_call): Declare.
* config/mips/mips.h (MIPS16_PIC_TEMP_REGNUM): New macro.
(MIPS16_PIC_TEMP): Likewise.
(reg_class): Delete M16_NA_REGS.
(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Update accordingly.
(SYMBOL_FLAG_BIND_NOW, SYMBOL_REF_BIND_NOW_P): New macros.
(mips_split_hi_p): Declare.
* config/mips/mips.c (mips_split_hi_p): New array.
(mips_regno_to_class): Change M16_NA_REGS entries to M16_REGS.
(mips_got_symbol_type_p): New function.
(mips_global_symbol_p): Check SYMBOL_REF_EXTERNAL_P.
(mips16_stub_function_p): New function.
(mips16_local_function_p): Likewise.
(mips_use_pic_fn_addr_reg_p): Likewise.
(mips_cannot_force_const_mem): Return false for HIGHs.
Extend CONST_INT and symbolic handling to MIPS16, using
mips_symbol_insns to check that the base symbol type is a
legitimate constant. Reject GOT-based constants if
TARGET_MIPS16_PCREL_LOADS.
(mips_const_insns): Check targetm.cannot_force_const_mem when
decomposing a symbolic base and a large offset.
(mips_emit_call_insn): Add ORIG_ADDR and ADDR parameters.
When calling a function that needs $25 from MIPS16 code,
move the target address into $25 separately and add a USE
to the call insn.
(mips16_gp_pseudo_reg): Insert the initializer immediately
before the first real insn.
(mips_pic_base_register, mips_got_load): New functions.
(mips_split_symbol): Generalize the name of the LO_SUM_OUT
parameter to LOW_OUT. Say that it can be any valid SET_SRC
when splitting a load-address operation. Split SYMBOL_GOT_DISP
constants and highs of SYMBOL_GOT_PAGE_OFST constants.
(mips_call_tls_get_addr): Update the call to mips_expand_call,
also passing NULL_RTX rather than const0_rtx as the aux argument.
(mips_rewrite_small_data_p): Check mips_lo_relocs and mips_split_p
instead of TARGET_EXPLICIT_RELOCS.
(mips_ok_for_lazy_binding_p): Check SYMBOL_REF_BIND_NOW_P.
(mips_load_call_address): Replace the sibcall_p argument with
a mips_call_type argument. Use mips_got_load.
(mips16_local_alias): New structure.
(mips16_local_aliases): New variable.
(mips16_local_aliases_hash): New function.
(mips16_local_aliases_eq): Likewise.
(mips16_local_alias): Likewise.
(mips16_stub_function): Likewise.
(mips16_build_function_stub): Create a local alias for the target
function. Handle TARGET_ABICALLS. For PIC abicalls, emit a
.cpload directive and an R_MIPS_NONE relocation for the target
function, then load the alias rather than the function itself.
Wrap the non-PIC abicalls version in ".option pic0/.option pic2".
(mips16_copy_fpr_return_value): Use mips16_stub_function and
mips_expand_call. Set SYMBOL_REF_BIND_NOW on the symbol.
(mips16_build_call_stub): Replace the FN parameter with an
FN_PTR parameter. Force the address into a register if it
isn't a call_insn_operand; don't rely on the caller to do this.
If a call to a locally-defined and locally-binding MIPS16
function must be made indirectly, redirect the call to the
function's local alias. Use mips16_stub_function_p,
mips16_stub_function, mips_expand_call and use_reg.
Set SYMBOL_FLAG_BIND_NOW on __mips_call_* symbols.
Use explicit %hi and %lo accesses where possible.
Use MIPS_CALL to generate the correct code form of a
jal instruction. Add clobbers of $18 instead of uses.
Update the call to mips_emit_call_insn.
(mips_expand_call): Replace the SIBCALL_P argument with a
mips_call_type argument and handle the new MIPS_CALL_EPILOGUE value.
Take a LAZY_P parameter. Call mips16_build_call_stub first,
allowing it to modify the call address. Update the calls to
mips_load_call_address and mips_emit_call_insn.
(mips_split_call): New function.
(mips_init_relocs): Clear mips_split_hi_p. Only use %gp_rel if
!TARGET_MIPS16. Split SYMBOL_GOT_DISP, and the high parts of
SYMBOL_GOT_PAGE_OFST, for MIPS16 code.
(mips_global_pointer): Check mips16_cfun_returns_in_fpr_p.
(mips_extra_live_on_entry): Include MIPS16_PIC_TEMP_REGNUM
if TARGET_MIPS16.
(mips_cprestore_slot): New function.
(mips_restore_gp): Take a TEMP parameter. Handle TARGET_MIPS16
and use mips_cprestore_slot.
(mips_output_function_prologue): Handle TARGET_MIPS16 for
LOADGP_OLDABI.
(mips_emit_loadgp): Move into MIPS16_PIC_TEMP for MIPS16,
then use a copygp_mips16 instruction to set up $28.
(mips_expand_prologue): Initialize the cprestore slot for MIPS16 too.
(mips16_lay_out_constants): Call split_all_insns_noflow.
(mips_reorg_process_insns): Explicitly set all_noreorder_p to
false if TARGET_MIPS16.
(mips_reorg): Don't call vr4130_align_insns if TARGET_MIPS16.
(mips_output_mi_thunk): Use mips_got_symbol_type_p. Use the
mips_dangerous_for_la25_p approach for MIPS16 PIC calls too.
(mips_set_mips16_mode): Always set MASK_EXPLICIT_RELOCS for
MIPS16 code. Allow MIPS16 o32 PIC.
(mips_override_options): Allow MIPS16 o32 PIC.
* config/mips/mips.md: Lower CONST_GP_P moves into register moves
after reload if TARGET_USE_GOT.
(UNSPEC_COPYGP): New constant.
(length): Use a default length of 8 for MIPS16 GOT loads.
(*got_disp<mode>): Check mips_split_p instead of TARGET_XGOT.
(*got_page<mode>): Check mips_split_hi_p.
(*got_disp<mode>, *got_page<mode>): Use mips_got_load.
(unspec_got<mode>, unspec_call<mode>): New expanders.
(load_got<mode>, load_call<mode>): Remove the length attributes.
Use a got attribute instead of a type attribute.
(copygp_mips16): New insn.
(restore_gp): Add a scratch clobber and pass it to mips_restore_gp.
(load_call<mode>): Use a "d" constraint instead of an "r" constraint.
(sibcall, sibcall_value, call, call_value): Update the calls
to mips_expand_call.
(call_internal, call_value_internal): Use mips_split_call.
(call_value_multiple_internal): Likewise.
(call_split): Move after call_internal (the insn it is split from).
(call_internal_direct, call_value_internal_direct): Turn into
define_insn_and_splits. Split if TARGET_SPLIT_CALLS.
(call_direct_split, call_value_direct_split): New patterns.
* config/mips/constraints.md (c): Handle TARGET_MIPS16 first
and use M16_REGS instead of M16_NA_REGS.
* config/mips/predicates.md (const_call_insn_operand): Replace
the TARGET_ABSOLUTE_ABICALLS-based check with a more general
mips_use_pic_fn_addr_reg_p check.
(move_operand): Reject HIGHs if mips_split_hi_p.
* config/mips/mips16.S: Assembly as empty if the ABI is not suitable.
(__mips16_floatunsisf): Inline __mips16_floatsisf.
(CALL_STUB_NO_RET, CALL_STUB_REG): Copy the target register to $25.
* config/mips/libgcc-mips16.ver: New file.
* config/mips/t-libgcc-mips16 (SHLIB_MAPFILES): Add
$(srcdir)/config/mips/libgcc-mips16.ver.
gcc/testsuite/
* lib/target-supports.exp (check_profiling_available): Return false
for -p and -pg on MIPS16 targets.
From-SVN: r138912
|
|
2008-08-08 Peter Bergner <bergner@vnet.ibm.com>
* doc/invoke.texi: Add cpu_type power7.
* config.in (HAVE_AS_VSX): New.
* config.gcc: Add cpu_type power7.
* configure.ac (HAVE_AS_VSX): Check for assembler support of the
VSX instructions.
* configure: Regenerate.
* config/rs6000/rs6000.c (rs6000_override_options): Alias power7 to
power5.
* config/rs6000/rs6000.h (ASM_CPU_POWER7_SPEC): Define.
(ASM_CPU_SPEC): Pass %(asm_cpu_power7) for -mcpu=power7.
(EXTRA_SPECS): Add asm_cpu_power7 spec string.
From-SVN: r138887
|
|
2008-08-06 Marc Gauthier <marc@tensilica.com>
* config.gcc: Match more processor names for Xtensa.
* configure.ac: Likewise.
* doc/install.texi (Specific): Likewise.
* configure: Regenerate.
testsuite/
* lib/target-supports.exp (check_profiling_available): Match more
processor names for Xtensa.
* g++.old-deja/g++.jason/thunk3.C: Likewise.
* gcc.dg/intmax_t-1.c: Likewise.
* gcc.dg/sibcall-3.c: Likewise.
* gcc.dg/sibcall-4.c: Likewise.
* gcc.c-torture/compile/20001226-1.c: Likewise.
From-SVN: r138810
|
|
* config.gcc (mipsisa64*-*-linux*): New configuration. Set ISA
to MIPS64r2 for mipsisa64r2*.
* config/mips/mips.h (GENERATE_MIPS16E): Update comment.
(ISA_MIPS64R2): New macro.
(TARGET_CPU_CPP_BUILTINS, MULTILIB_ISA_DEFAULT): Handle it.
(ISA_HAS_64BIT_REGS, ISA_HAS_MUL3, ISA_HAS_FP_CONDMOVE,
ISA_HAS_8CC, ISA_HAS_FP4, ISA_HAS_PAIRED_SINGLE,
ISA_HAS_MADD_MSUB, ISA_HAS_NMADD4_NMSUB4, ISA_HAS_CLZ_CLO,
ISA_HAS_ROR, ISA_HAS_PREFETCH, ISA_HAS_PREFETCHX, ISA_HAS_SEB_SEH,
ISA_HAS_EXT_INS, ISA_HAS_MXHC1, ISA_HAS_HILO_INTERLOCKS,
ISA_HAS_SYNCI, MIN_FPRS_PER_FMT): Return true for ISA_MIPS64R2.
(MIPS_ISA_LEVEL_SPEC, ASM_SPEC, LINK_SPEC): Handle -mips64r2.
(TARGET_LOONGSON_2E, TARGET_LOONGSON_2F, TARGET_LOONGSON_2EF):
Move up to keep list alphabetically sorted.
(TUNE_20KC, TUNE_24K, TUNE_74K, TUNE_LOONGSON_2EF): Likewise.
* config/mips/mips.c (mips_cpu_info_table): Add default MIPS64r2
processor.
* doc/invoke.texi (MIPS Options): Add -mips64r2.
(-march=@var{arch}): Add mips64r2.
testsuite/
* gcc.target/mips/ext-1.c: New test.
From-SVN: r138448
|
|
function specific basis
From-SVN: r138075
|
|
arm/eabi.opt.
2008-07-14 Doug Kwan <dougkwan@google.com>
* config.gcc (arm*-*-eabi*): Include arm/eabi.h and use
additional option file arm/eabi.opt.
* config/arm/eabi.h (File): New configuration file for EABI targets.
* config/arm/elf.h (SUBTARGET_EXTRA_SPECS): Add
SUBSUBTARGET_EXTRA_SPECS.
(SUBSUBTARGET_EXTRA_SPECS): Provide empty default.
* config/arm/unknown-elf.h (UNKNOWN_ELF_STARTFILE_SPEC): Renamed
from STARTFILE_SPEC so that it can be referenced in an override.
(STARTFILE_SPEC): Use UNKNOWN_ELF_STARTFILE_SPEC.
(UNKNOWN_ELF_ENDFILE_SPEC): Renamed from ENDFILE_SPEC so that it
can be referenced in an override.
(ENDFILE_SPEC): Use UNKNOWN_ELF_ENDFILE_SPEC.
* config/arm/bpabi.h (BPABI_LINK_SPEC): Renamed from LINK_SPEC
so that it can be referenced in an override.
(LINK_SPEC): Use BPABI_LINK_SPEC.
* config/arm/eabi.opt (File): New.
From-SVN: r137798
|
|
h8300-*-* and sh-*-* targets.
* config.gcc (arm-*-coff*, armel-*-coff*, h8300-*-*,
i[34567]86-*-aout*, i[34567]86-*-coff*, m68k-*-aout*,
m68k-*-coff*, sh-*-*, mips-sgi-irix[56]*, pdp11-*-bsd,
rs6000-ibm-aix4.[12]*, powerpc-ibm-aix4.[12]*): Deprecate targets,
excluding more specific h8300-*-* and sh-*-* targets.
From-SVN: r137697
|
|
* config.gcc (m68k-*-linux*): Add with_arch. Add sysroot-suffix.h
to tm_file. Add m68k/t-floatlib, m68k/t-linux & m68k/t-mlibs to
tmake_file.
* config/m68k/t-linux: New.
* doc/install.texi: Document m68k-*-linux is now multilibbed by
default.
From-SVN: r137557
|
|
i?86-*-*.
2008-07-06 Kai Tietz <kai.tietz@onevision.com>
* config.gcc (extra_headers): Add cross-stdarg.h for target
x86_64-*-* and i?86-*-*.
* config/i386/cross-stdarg.h: New.
* builtins.c (std_fn_abi_va_list): New.
(std_canonical_va_list_type): New.
(stabilize_va_list): Replace va_list_type_node use by
mtarget.canonical_va_list_type.
(gimplify_va_arg_expr): Likewise.
(expand_builtin_va_copy): Replace va_list_type_node use by
mtarget.fn_abi_va_list.
* tree-sra.c (is_va_list_type): New helper.
(decl_can_be_decomposed_p): Replace
va_list_type_node use by is_va_list_type.
* tree-ssa-ccp.c (optimize_stdarg_builtin): Likewise.
* tree-stdarg.c (execute_optimize_stdarg): Likewise.
* c-common.c (c_common_nodes_and_builtins): Use TARGET_ENUM_VA_LIST.
* config/i386/i386-protos.h (ix86_get_valist_type): New.
(ix86_enum_va_list): New.
* config/i386/i386.c (sysv_va_list_type_node): New.
(ms_va_list_type_node): New.
(ix86_function_type_abi): Remove sorry.
(ix86_build_builtin_va_list_abi): New.
(ix86_build_builtin_va_list): Call ix86_build_builtin_va_list_abi
for 64-bit targets.
(ix86_va_start): Replace va_list_type_node by sysv_va_list_type_node.
(ix86_init_builtins_va_builtins_abi): New.
(ix86_init_builtins): Use ix86_init_builtins_va_builtins_abi
for 64-bit targets.
(ix86_handle_abi_attribute): New.
(attribute_spec): Add sysv_abi and ms_abi.
(ix86_fn_abi_va_list): New.
(ix86_canonical_va_list_type): New.
(ix86_enum_va_list): New.
(TARGET_FN_ABI_VA_LIST): New.
(TARGET_CANONICAL_VA_LIST_TYPE): New.
* config/i386/i386.h (TARGET_ENUM_VA_LIST): New.
* doc/tm.texi (TARGET_FN_ABI_VA_LIST): New.
(TARGET_CANONICAL_VA_LIST_TYPE): New.
(TARGET_ENUM_VA_LIST): New.
* expr.h (std_fn_abi_va_list): New.
(std_canonical_va_list_type): New.
* target-def.h (TARGET_FN_ABI_VA_LIST): New.
(TARGET_CANONICAL_VA_LIST_TYPE): New.
(TARGET_INITIALIZER): Add TARGET_FN_ABI_VA_LIST and
TARGET_CANONICAL_VA_LIST_TYPE.
* target.h (struct gcc_target): Add fn_abi_va_list hook
and canonical_va_list_type hook.
From-SVN: r137525
|
|
From-SVN: r137457
|
|
i?86-*-*.
2008-07-04 Kai Tietz <kai.tietz@onevision.com>
* config.gcc (extra_headers): Add cross-stdarg.h for target
x86_64-*-* and i?86-*-*.
* config/i386/cross-stdarg.h: New.
* builtins.c (std_fn_abi_va_list): New.
(std_canonical_va_list_type): New.
(stabilize_va_list): Replace va_list_type_node use by
mtarget.canonical_va_list_type.
(gimplify_va_arg_expr): Likewise.
(expand_builtin_va_copy): Replace va_list_type_node use by
mtarget.fn_abi_va_list.
* tree-sra.c (is_va_list_type): New helper.
(decl_can_be_decomposed_p): Replace
va_list_type_node use by is_va_list_type.
* tree-ssa-ccp.c (optimize_stdarg_builtin): Likewise.
* tree-stdarg.c (execute_optimize_stdarg): Likewise.
* c-common.c (c_common_nodes_and_builtins): Use TARGET_ENUM_VA_LIST.
* config/i386/i386-protos.h (ix86_get_valist_type): New.
(ix86_enum_va_list): New.
* config/i386/i386.c (sysv_va_list_type_node): New.
(ms_va_list_type_node): New.
(ix86_function_type_abi): Remove sorry.
(ix86_build_builtin_va_list_abi): New.
(ix86_build_builtin_va_list): Call ix86_build_builtin_va_list_abi
for 64-bit targets.
(ix86_va_start): Replace va_list_type_node by sysv_va_list_type_node.
(ix86_init_builtins_va_builtins_abi): New.
(ix86_init_builtins): Use ix86_init_builtins_va_builtins_abi
for 64-bit targets.
(ix86_handle_abi_attribute): New.
(attribute_spec): Add sysv_abi and ms_abi.
(ix86_fn_abi_va_list): New.
(ix86_canonical_va_list_type): New.
(ix86_enum_va_list): New.
(TARGET_FN_ABI_VA_LIST): New.
(TARGET_CANONICAL_VA_LIST_TYPE): New.
* config/i386/i386.h (TARGET_ENUM_VA_LIST): New.
* doc/tm.texi (TARGET_FN_ABI_VA_LIST): New.
(TARGET_CANONICAL_VA_LIST_TYPE): New.
(TARGET_ENUM_VA_LIST): New.
* expr.h (std_fn_abi_va_list): New.
(std_canonical_va_list_type): New.
* target-def.h (TARGET_FN_ABI_VA_LIST): New.
(TARGET_CANONICAL_VA_LIST_TYPE): New.
(TARGET_INITIALIZER): Add TARGET_FN_ABI_VA_LIST and
TARGET_CANONICAL_VA_LIST_TYPE.
* target.h (struct gcc_target): Add fn_abi_va_list hook
and canonical_va_list_type hook.
2008-07-04 Kai Tietz <kai.tietz@onevision.com>
* gcc.dg/callabi/callabi.h: New.
* gcc.dg/callabi/vaarg-1.c: New.
* gcc.dg/callabi/vaarg-2.c: New.
* gcc.dg/callabi/vaarg-3.c: New.
* gcc.dg/callabi/func-1.c: New.
From-SVN: r137452
|
|
gcc/
2008-07-02 H.J. Lu <hongjiu.lu@intel.com>
PR target/36669
* config/libgcc-glibc.ver: Add %exclude.
* config/m32r/libgcc-glibc.ver: Likwise.
* config/s390/libgcc-glibc.ver: Likwise.
* config/sh/libgcc-glibc.ver: Likwise.
* config/sparc/libgcc-sparc-glibc.ver: Likwise.
* config/i386/libgcc-glibc.ver: New.
* config/i386/libgcc-x86_64-glibc.ver: Removed.
2008-07-02 H.J. Lu <hongjiu.lu@intel.com>
* config.gcc: Remove i386/t-fprules-softfp64 soft-fp/t-softfp
from tmake_file from i[34567]86-*-darwin*, x86_64-*-darwin*,
i[34567]86-*-linux*, x86_64-*-linux*. Add
i386/t-fprules-softfp and soft-fp/t-softfp to tmake_file for
i[34567]86-*-darwin*, x86_64-*-darwin*, i[34567]86-*-linux*,
x86_64-*-linux*. Add i386/t-linux to tmake_file for
i[34567]86-*-linux*, x86_64-*-linux*.
* libgcc-std.ver: Add empty GCC_4.4.0.
* mkmap-symver.awk: Support multiple versions per symbol.
* config/i386/i386.c (ix86_init_builtins): Always define
__builtin_fabsq and __builtin_copysignq with fallbacks.
(ix86_expand_builtin): Emit normal call for __builtin_fabsq
and __builtin_copysignq if SSE2 isn't available.
* config/i386/linux.h (LIBGCC2_HAS_TF_MODE): Defined.
(LIBGCC2_TF_CEXT): Likwise.
(TF_SIZE): Likwise.
* config/i386/linux64.h (LIBGCC2_HAS_TF_MODE): Defined as 1.
* config/i386/sfp-machine.h: Moved to libgcc.
* config/i386/sfp-machine.h: New.
* config/i386/t-linux: Likwise.
* config/i386/t-darwin: Remove softfp_wrap_start and
softfp_wrap_end.
* config/i386/t-darwin64: Likewise.
* config/i386/t-fprules-softfp64: Renamed to ...
* config/i386/t-fprules-softfp: This.
* config/i386/t-linux64: Remove SHLIB_MAPFILES, softfp_wrap_start
and softfp_wrap_end.
libgcc/
2008-07-02 H.J. Lu <hongjiu.lu@intel.com>
PR target/36669
* shared-object.mk ($(base)_s$(objext)): Add -DSHARED.
* config/i386/64/_divtc3-compat.c: New.
* config/i386/64/_multc3-compat.c: Likewise.
* config/i386/64/_powitf2-compat.c: Likewise.
* config/i386/64/eqtf2.c: Likewise.
* config/i386/64/getf2.c: Likewise.
* config/i386/64/letf2.c: Likewise.
* config/i386/64/t-fprules-softfp: Likewise.
2008-07-02 H.J. Lu <hongjiu.lu@intel.com>
* config.host: Add i386/${host_address}/t-fprules-softfp to
tmake_file for i[34567]86-*-darwin*, x86_64-*-darwin*,
i[34567]86-*-linux*, x86_64-*-linux*.
* configure.ac: Set host_address to 64 or 32 for x86.
* configure: Regenerated.
* Makefile.in (config.status): Also depend on
$(srcdir)/config.host.
* config/i386/32/t-fprules-softfp: New.
* config/i386/32/tf-signs.c: Likewise.
* config/i386/64/sfp-machine.h: New. Moved from gcc.
2008-07-02 H.J. Lu <hongjiu.lu@intel.com>
Uros Bizjak <ubizjak@gmail.com>
* config/i386/32/sfp-machine.h: New.
Co-Authored-By: Uros Bizjak <ubizjak@gmail.com>
From-SVN: r137369
|
|
2008-06-27 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/t-aix52: Append large data option to LDFLAGS for
genautomata.
2008-06-27 Edmar Wienskoski <edmar@freescale.com>
* config.gcc (powerpc*-*-*): Add new core e500mc.
* config/rs6000/e500mc.md: New file.
* config/rs6000/rs6000.c (processor_costs): Add new costs for
e500mc.
(rs6000_override_options): Add e500mc case to
processor_target_table. Altivec and Spe options not allowed
with e500mc. Add isel instruction to e500mc by
default. Initialize rs6000_cost for e500mc.
(rs6000_issue_rate): Set issue rate for e500mc.
* config/rs6000/rs6000.h (processor_type): Add
PROCESSOR_PPCE500MC.
(ASM_CPU_SPEC): Add e500mc.
Set TARGET_ISEL to rs6000_isel.
* config/rs6000/e500.h: Remove redefinition of TARGET_ISEL.
(CHECK_E500_OPTIONS): Remove TARGET_ISEL.
* config/rs6000/rs6000.md (define_attr "cpu"): Add ppce500mc..
Include e500mc.md.
* doc/invoke.texi: Add e500mc to list of cpus.
From-SVN: r137176
|
|
* config.gcc (hppa[12]*-*-hpux10*): Don't use fixproto.
From-SVN: r137138
|
|
* config.gcc (mips64el-st-linux-gnu): Use mips/st.h and mips/t-st.
* config.host: Use driver-native.o and mips/x-native for mips*-linux*.
* config/mips/linux.h (host_detect_local_cpu): Declare, add to
EXTRA_SPEC_FUNCTIONS.
(MARCH_MTUNE_NATIVE_SPECS, BASE_DRIVER_SELF_SPECS): New macros.
(DRIVER_SELF_SPECS): Adjust.
* config/mips/linux64.h (DRIVER_SELF_SPECS): Update.
* config/mips/st.h, config/mips/t-st: New.
* config/mips/driver-native.c, config/mips/x-native: New.
* doc/invoke.texi (MIPS): Document 'native' value for -march and
-mtune options.
Co-Authored-By: Kazu Hirata <kazu@codesourcery.com>
From-SVN: r136888
|
|
2008-06-15 Mark Shinwell <shinwell@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/mips/mips-modes.def: Add V8QI, V4HI and V2SI modes.
* config/mips/mips-protos.h (mips_expand_vector_init): New.
* config/mips/mips-ftypes.def: Add function types for Loongson-2E/2F
builtins.
* config/mips/mips.c (mips_split_doubleword_move): Handle new modes.
(mips_hard_regno_mode_ok_p): Allow 64-bit vector modes for Loongson.
(mips_vector_mode_supported_p): Add V2SImode, V4HImode and
V8QImode cases.
(LOONGSON_BUILTIN, LOONGSON_BUILTIN_ALIAS): New.
(CODE_FOR_loongson_packsswh, CODE_FOR_loongson_packsshb,
(CODE_FOR_loongson_packushb, CODE_FOR_loongson_paddw,
(CODE_FOR_loongson_paddh, CODE_FOR_loongson_paddb,
(CODE_FOR_loongson_paddsh, CODE_FOR_loongson_paddsb)
(CODE_FOR_loongson_paddush, CODE_FOR_loongson_paddusb)
(CODE_FOR_loongson_pmaxsh, CODE_FOR_loongson_pmaxub)
(CODE_FOR_loongson_pminsh, CODE_FOR_loongson_pminub)
(CODE_FOR_loongson_pmulhuh, CODE_FOR_loongson_pmulhh)
(CODE_FOR_loongson_biadd, CODE_FOR_loongson_psubw)
(CODE_FOR_loongson_psubh, CODE_FOR_loongson_psubb)
(CODE_FOR_loongson_psubsh, CODE_FOR_loongson_psubsb)
(CODE_FOR_loongson_psubush, CODE_FOR_loongson_psubusb)
(CODE_FOR_loongson_punpckhbh, CODE_FOR_loongson_punpckhhw)
(CODE_FOR_loongson_punpckhwd, CODE_FOR_loongson_punpcklbh)
(CODE_FOR_loongson_punpcklhw, CODE_FOR_loongson_punpcklwd): New.
(mips_builtins): Add Loongson builtins.
(mips_loongson_2ef_bdesc): New.
(mips_bdesc_arrays): Add mips_loongson_2ef_bdesc.
(mips_builtin_vector_type): Handle unsigned versions of vector modes.
(MIPS_ATYPE_UQI, MIPS_ATYPE_UDI, MIPS_ATYPE_V2SI, MIPS_ATYPE_UV2SI)
(MIPS_ATYPE_V4HI, MIPS_ATYPE_UV4HI, MIPS_ATYPE_V8QI, MIPS_ATYPE_UV8QI):
New.
(mips_expand_vector_init): New.
* config/mips/mips.h (HAVE_LOONGSON_VECTOR_MODES): New.
(TARGET_CPU_CPP_BUILTINS): Define __mips_loongson_vector_rev
if appropriate.
* config/mips/mips.md: Add unspec numbers for Loongson
builtins. Include loongson.md.
(MOVE64): Include Loongson vector modes.
(SPLITF): Include Loongson vector modes.
(HALFMODE): Handle Loongson vector modes.
* config/mips/loongson.md: New.
* config/mips/loongson.h: New.
* config.gcc: Add loongson.h header for mips*-*-* targets.
* doc/extend.texi (MIPS Loongson Built-in Functions): New.
2008-06-15 Mark Shinwell <shinwell@codesourcery.com>
* lib/target-supports.exp (check_effective_target_mips_loongson): New.
* gcc.target/mips/loongson-simd.c: New.
Co-Authored-By: Maxim Kuvyrkov <maxim@codesourcery.com>
Co-Authored-By: Nathan Sidwell <nathan@codesourcery.com>
Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com>
From-SVN: r136800
|
|
* config.gcc (arc-*-elf*, avr-*-*, fr30-*-elf, frv-*-elf,
h8300-*-elf*, h8300-*-*, i[34567]86-*-elf*, x86_64-*-elf*,
i[34567]86-*-aout*, i[34567]86-*-coff*, ia64*-*-elf*,
iq2000*-*-elf*, m32r-*-elf*, m32rle-*-elf*, m32r-*-linux*,
m32rle-*-linux*, m68hc11-*-*|m6811-*-*, m68hc12-*-*|m6812-*-*,
m68k-*-coff*, mcore-*-elf, mcore-*-pe*, mipsisa64sr71k-*-elf*,
mipsisa64sb1-*-elf* | mipsisa64sb1el-*-elf*, mips-*-elf* |
mipsel-*-elf*, mips64-*-elf* | mips64el-*-elf*, mips64vr-*-elf* |
mips64vrel-*-elf*, mips64orion-*-elf* | mips64orionel-*-elf*,
mipstx39-*-elf* | mipstx39el-*-elf*, mn10300-*-*, pdp11-*-,
powerpc-*-elf*, powerpcle-*-elf*, sh-*-elf* | sh[12346l]*-*-elf* |
sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | sh-*-linux* |
sh[2346lbe]*-*-linux* | sh-*-netbsdelf* | shl*-*-netbsdelf* |
sh5-*-netbsd* | sh5l*-*-netbsd* | sh64-*-netbsd* |
sh64l*-*-netbsd*, sh-*-*, sparc-*-elf*, sparc64-*-elf*,
v850e1-*-*, v850e-*-*, v850-*-*, xstormy16-*-elf, m32c-*-elf*):
Remove use_fixproto=yes.
(ia64*-*-hpux*): Remove comment about using fixproto.
(m68k-*-uclinuxoldabi*, m68k-*-uclinux*): Remove use_fixproto=no.
From-SVN: r136783
|
|
* config.gcc (all_defaults): Add arch_32 arch_64 cpu_32 cpu_64
tune_32 tune_64.
(i[34567]86-*-* | x86_64-*-*): Add arch_32 arch_64 cpu_32 cpu_64
tune_32 tune_64 to supported_defaults. Allow values not
supporting 64-bit mode for arch_32, cpu_32 and tune_32 for
x86_64. Do not override cpu_32 or cpu_64 values from target name.
(i[34567]86-*-linux*, i[34567]86-*-solaris2.1[0-9]*): Only default
with_cpu_64 to generic for 64-bit-supporting configurations, not
with_cpu. Remove FIXMEs.
* doc/install.texi (--with-cpu-32, --with-cpu-64, --with-arch-32,
--with-arch-64, --with-tune-32, --with-tune-64): Document.
* config/i386/i386.h (OPT_ARCH32, OPT_ARCH64): Define.
(OPTION_DEFAULT_SPECS): Add tune_32, tune_64, cpu_32, cpu_64,
arch_32 and arch_64.
From-SVN: r136674
|
|
From-SVN: r136596
|
|
* MAINTAINERS (mt port): Remove.
(sco5, unixware, sco udk): Remove.
(Kean Johnston): Add to Write After Approval.
fixincludes:
* inclhack.def (AAB_svr4_replace_byteorder,
AAB_ultrix_ansi_compat, AAB_ultrix_limits, AAB_ultrix_memory,
libc1_G_va_list, libc1_ifdefd_memx, nested_motorola,
ptx_sys_mc_param_h, sco_regset, sco_static_func, sco_utime,
solaris_mutex_init_1, solaris_socket, solaris_unistd,
solaris_widec, svr4_krnl, ultrix_atexit_param, ultrix_atof_param,
ultrix_const3, ultrix_fix_fixproto, ultrix_ifdef, ultrix_locale,
ultrix_math_ifdef, ultrix_nested_ioctl, ultrix_nested_svc,
ultrix_stat, ultrix_static, ultrix_stdlib, ultrix_strings,
ultrix_strings2, ultrix_sys_time, ultrix_unistd,
unicosmk_restrict, uw7_byteorder_fix, windiss_math1,
windiss_math2, windiss_valist): Remove.
* fixincl.x: Regenerate.
* mkfixinc.sh: (arm-semi-aof, hppa1.1-*-osf*, hppa1.1-*-bsd*,
i370-*-openedition, i?86-*-moss*, i?86-*-uwin*,
powerpc-*-eabiaix*): Remove.
* tests/base/math.h: Update.
* tests/base/pthread.h: Update.
* tests/base/stdio.h: Update.
* tests/base/stdlib.h: Update.
* tests/base/string.h: Update.
* tests/base/strings.h: Update.
* tests/base/sys/file.h: Update.
* tests/base/sys/limits.h: Update.
* tests/base/sys/socket.h: Update.
* tests/base/sys/stat.h: Update.
* tests/base/sys/time.h: Update.
* tests/base/testing.h: Update.
* tests/base/unistd.h: Update.
* tests/base/_G_config.h: Remove.
* tests/base/arpa: Remove directory.
* tests/base/fs: Remove directory.
* tests/base/locale.h: Remove.
* tests/base/machine: Remove directory.
* tests/base/rpc/svc.h: Remove.
* tests/base/sys/ioctl.h: Remove.
* tests/base/sys/regset.h: Remove.
* tests/base/sys/times.h: Remove.
* tests/base/sys/utsname.h: Remove.
* tests/base/widec.h: Remove.
gcc:
* config.gcc (Obsolete configurations): Remove list of
configurations.
(Unsupported targets list): Add *-*-linux*aout*, *-*-linux*libc1*,
*-*-solaris2.[0-6], *-*-solaris2.[0-6].*, *-*-sysv*. Remove other
targets matched by those patterns.
(strongarm*-*-*, ep9312*-*-*, xscale-*-*, parisc*-*-*,
m680[012]0-*-*, *-*-linux*libc1*, *-*-linux*aout*,
alpha*-*-unicosmk*, strongarm*-*-freebsd*, ep9312-*-elf,
arm*-*-kaos*, cris-*-aout, parisc*64*-*-linux*, parisc*-*-linux*,
hppa1.1-*-pro*, hppa1.1-*-osf*, hppa1.1-*-bsd*,
i[34567]86-sequent-ptx4*, i[34567]86-sequent-sysv4*,
i[34567]86-*-beoself*, i[34567]86-*-beos*, i[34567]86-*-sco3.2v5*,
i[34567]86-*-sysv5*, i[34567]86-*-sysv4*, i[34567]86-*-uwin*,
i[34567]86-*-kaos*, m68020-*-elf*, m68010-*-netbsdelf*,
mips-wrs-windiss, mt-*-elf, powerpc-*-beos*, powerpc-*-chorusos*,
powerpc-wrs-windiss*, powerpcle-*-sysv*, powerpc-*-kaos*,
powerpcle-*-kaos*, sh*-*-kaos*, sparc-*-sysv4*, strongarm-*-elf*,
strongarm-*-pe, strongarm-*-kaos*, vax-*-bsd*, vax-*-sysv*,
vax-*-ultrix*, xscale-*-elf, xscale-*-coff,
i[34567]86-*-linux*aout*, i[34567]86-*-linux*libc1): Remove.
Make code for Solaris 7 and greater unconditional for Solaris.
(ep9312-*-*, parisc1*, m680[012]0-*-*, parisc*-*-*, mt-*-*):
Remove --with-* handling.
* config/rs6000/sysv4.h (-mwindiss): Remove from all specs.
(LIB_WINDISS_SPEC, CPP_OS_WINDISS_SPEC, STARTFILE_WINDISS_SPEC,
ENDFILE_WINDISS_SPEC, LINK_START_WINDISS_SPEC,
LINK_OS_WINDISS_SPEC): Remove.
* config/rs6000/sysv4.opt (mwindiss): Remove.
* configure.ac (strongarm*-*-*, xscale*-*-*): Remove.
* configure: Regenerate.
* doc/cpp.texi: Don't mention BeOS.
* doc/extend.texi (interrupt): Don't mention MS1.
* doc/install.texi: (i386-@var{any}-sysv, m68k-bull-sysv,
m68k-hp-hpux, m68000-hp-hpux, m68000-att-sysv,
alphaev5-cray-unicosmk*, xscale-*-*, i?86-*-linux*aout,
i?86-*-sco3.2v5*, i?86-*-udk, m68k-hp-hpux, powerpc-*-sysv4,
powerpc-*-sysv4, powerpcle-*-sysv4, *-*-sysv*, vax-dec-ultrix):
Remove.
* doc/invoke.texi (MT Options): Remove.
(-mwindiss): Remove.
(CRIS Options): Remove cris-axis-aout references.
(HPPA Options): Don't mention hppa1.1-*-pro.
* doc/md.texi: (MorphoTech family): Remove.
* libgcc2.c: Don't handle UWIN.
* config/alpha/t-unicosmk: Remove.
* config/alpha/unicosmk.h: Remove.
* config/arm/kaos-arm.h: Remove.
* config/arm/kaos-strongarm.h: Remove.
* config/arm/strongarm-coff.h: Remove.
* config/arm/strongarm-elf.h: Remove.
* config/arm/strongarm-pe.h: Remove.
* config/arm/t-strongarm-pe: Remove.
* config/arm/t-xscale-coff: Remove.
* config/arm/t-xscale-elf: Remove.
* config/arm/xscale-coff.h: Remove.
* config/arm/xscale-elf.h: Remove.
* config/chorus.h: Remove.
* config/cris/aout.h: Remove.
* config/cris/aout.opt: Remove.
* config/cris/t-aout: Remove.
* config/i386/beos-elf.h: Remove.
* config/i386/kaos-i386.h: Remove.
* config/i386/ptx4-i.h: Remove.
* config/i386/sco5.h: Remove.
* config/i386/sco5.opt: Remove.
* config/i386/sysv4-cpp.h: Remove.
* config/i386/sysv5.h: Remove.
* config/i386/t-beos: Remove.
* config/i386/t-sco5: Remove.
* config/i386/t-uwin: Remove.
* config/i386/uwin.asm: Remove.
* config/i386/uwin.h: Remove.
* config/kaos.h: Remove.
* config/mips/windiss.h: Remove.
* config/mt: Remove directory.
* config/pa/pa-osf.h: Remove.
* config/pa/pa-pro-end.h: Remove.
* config/pa/t-pro: Remove.
* config/ptx4.h: Remove.
* config/rs6000/beos.h: Remove.
* config/rs6000/kaos-ppc.h: Remove.
* config/rs6000/t-beos: Remove.
* config/rs6000/windiss.h: Remove.
* config/sh/kaos-sh.h: Remove.
* config/sol2-6.h: Remove.
* config/sparc/sol26-sld.h: Remove.
* config/sparc/sysv4-only.h: Remove.
* config/vax/bsd.h: Remove.
* config/vax/t-memfuncs: Remove.
* config/vax/ultrix.h: Remove.
* config/vax/vaxv.h: Remove.
* config/windiss.h: Remove.
gcc/testsuite:
* g++.dg/abi/arm_cxa_vec1.C: Don't handle xscale*-*-*.
* g++.dg/eh/spbp.C: Don't handle *-*-solaris2.[56]*.
* g++.dg/warn/miss-format-1.C: Don't handle Solaris before Solaris
7.
* gcc.c-torture/compile/981006-1.c: Don't handle xscale*-*-*,
strongarm*-*-* and cris-*-aout*.
* gcc.c-torture/execute/941014-1.x: Don't handle xscale*-*-* and
strongarm*-*-*.
* gcc.dg/20030909-1.c: Don't handle xscale*-*-* and
strongarm*-*-*.
* gcc.dg/20031108-1.c: Don't handle xscale*-*-* and
strongarm*-*-*.
* gcc.dg/20040813-1.c: Don't handle *-*-sysv5*.
* gcc.dg/arm-asm.c: Don't handle strongarm*-*-* and xscale*-*-*.
* gcc.dg/arm-scd42-1.c: Use target arm*-*-*.
* gcc.dg/arm-scd42-3.c: Use target arm*-*-*.
* gcc.dg/cpp/assert4.c: Don't handle BeOS.
* gcc.dg/debug/pr35154.c: Don't handle *-*-sysv5*.
* gcc.dg/intmax_t-1.c: Don't handle *-*-solaris2.5.1 and
xscale*-*-elf*.
* gcc.dg/pragma-align.c: Don't handle i?86-*-sco3.2v5*.
* gcc.dg/pthread-init-2.c: Don't handle *-*-solaris2.5.1.
* gcc.misc-tests/arm-isr.exp: Use target arm*-*-*.
* gcc.target/powerpc/ppc-sdata-1.c: Don't handle powerpc-*-sysv*.
* gcc.target/powerpc/ppc-sdata-2.c: Don't handle powerpc-*-sysv*.
* gcc.target/powerpc/ppc-stackalign-1.c: Don't handle
powerpc-*-sysv*.
* gfortran.dg/debug/pr35154-stabs.f: Don't handle *-*-sysv5*.
* lib/target-supports.exp: Don't handle strongarm*-*-elf,
xscale*-*-elf and *-*-windiss.
* obj-c++.dg/dwarf-2.mm: Don't handle *-*-solaris2.[56]*.
* objc.dg/dwarf-1.m: Don't handle *-*-solaris2.[56]*.
* objc.dg/dwarf-2.m: Don't handle *-*-solaris2.[56]*.
* gcc.dg/mt-loopi1.c: Remove.
gnattools:
* configure.ac (xscale*-wrs-vx*, xscale*-wrs-coff): Remove.
* configure: Regenerate.
libcpp:
* configure.ac (parisc*64*-*-*): Remove.
* configure: Regenerate.
libffi:
* configure.ac (parisc*-*-linux*, powerpc-*-sysv*,
powerpc-*-beos*): Remove.
* configure: Regenerate.
libgcc:
* config.host (strongarm*-*-*, ep9312*-*-*, xscale-*-*,
parisc*-*-*, m680[012]0-*-*, *-*-linux*libc1*, *-*-linux*aout*,
alpha*-*-unicosmk*, strongarm*-*-freebsd*, ep9312-*-elf,
arm*-*-kaos*, cris-*-aout, parisc*64*-*-linux*, parisc*-*-linux*,
hppa1.1-*-pro*, hppa1.1-*-osf*, hppa1.1-*-bsd*,
i[34567]86-sequent-ptx4*, i[34567]86-sequent-sysv4*,
i[34567]86-*-beoself*, i[34567]86-*-beos*, i[34567]86-*-sco3.2v5*,
i[34567]86-*-sysv5*, i[34567]86-*-sysv4*, i[34567]86-*-uwin*,
i[34567]86-*-kaos*, m68020-*-elf*, m68010-*-netbsdelf*,
mips-wrs-windiss, mt-*-elf, powerpc-*-beos*, powerpc-*-chorusos*,
powerpc-wrs-windiss*, powerpcle-*-sysv*, powerpc-*-kaos*,
powerpcle-*-kaos*, sh*-*-kaos*, sparc-*-sysv4*, strongarm-*-elf*,
strongarm-*-pe, strongarm-*-kaos*, vax-*-bsd*, vax-*-sysv*,
vax-*-ultrix*, xscale-*-elf, xscale-*-coff): Remove.
libjava:
* configure.host (strongarm*-elf, xscale*-elf): Remove.
libstdc++-v3:
* configure.host (xscale, ep9312, m680[246]0, solaris2.5,
solaris2.5.[0-9], solaris2.6, windiss*): Remove.
* crossconfig.m4 (*-solaris2.5, *-solaris2.6, *-windiss*): Remove.
* configure: Regenerate.
* config/os/solaris/solaris2.5: Remove directory.
* config/os/solaris/solaris2.6: Remove directory.
* config/os/windiss: Remove directory.
From-SVN: r136534
|
|
* config.gcc (powerpc-*-linux*spe*): Use t-dfprules.
* config/rs6000/dfp.md (negdd2, absdd2, negtd2, abstd2): Do not
enable for TARGET_E500_DOUBLE.
(*movdd_softfloat32): Also enable for !TARGET_FPRS.
* config/rs6000/rs6000.c (invalid_e500_subreg): Treat decimal
floating-point modes like integer modes for E500 double.
(rs6000_legitimate_offset_address_p): Likewise.
(rs6000_legitimize_address): Likewise. Do not allow REG+REG
addressing for DDmode for E500 double.
(rs6000_hard_regno_nregs): Do not treat decimal floating-point
modes as using 64-bits of registers for E500 double.
(spe_build_register_parallel): Do not handle DDmode or TDmode.
(rs6000_spe_function_arg): Do not handle DDmode or TDmode
specially for E500 double.
(function_arg): Do not call rs6000_spe_function_arg for DDmode or
TDmode for E500 double.
(rs6000_gimplify_va_arg): Only handle SDmode in registers
specially if TARGET_HARD_FLOAT && TARGET_FPRS.
(rs6000_split_multireg_move): Do not handle TDmode specially for
E500 double.
(spe_func_has_64bit_regs_p): Do not treat DDmode or TDmode as
using 64-bit registers for E500 double.
(emit_frame_save): Do not handle DDmode specially for E500 double.
(gen_frame_mem_offset): Likewise.
(rs6000_function_value): Do not call spe_build_register_parallel
for DDmode or TDmode.
(rs6000_libcall_value): Likewise.
* config/rs6000/rs6000.h (LOCAL_ALIGNMENT, MEMBER_TYPE_FORCES_BLK,
DATA_ALIGNMENT, CLASS_MAX_NREGS): Do not handle DDmode specially
for E500 double.
From-SVN: r136416
|
|
gcc:
2008-05-29 Daniel Franke <franke.daniel@gmail.com>
PR target/36348
* config/darwin-f.c: New.
* config/t-darwin: Added rule to build darwin-f.o.
* config.gcc: Defined new variable, fortran_target_objs.
(*-*-darwin*): Set fortran_target_objs.
* Makefile.in: Defined new variable FORTRAN_TARGET_OBJS.
* configure.ac: Substitute fortran_target_objs, set
FORTRAN_TARGET_OBJS.
* configure: Regenerated.
gcc/fortran:
2008-05-29 Daniel Franke <franke.daniel@gmail.com>
PR target/36348
* Make-lang.in (F95_OBJS): Added dependency on FORTRAN_TARGET_OBJS.
From-SVN: r136178
|
|
2008-05-28 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390/s390.c (z10_cost): New cost function for z10.
(s390_handle_arch_option, override_options): Support
-march=z10 switch.
(s390_issue_rate): Adjust issue rate for z10.
* config/s390/s390.h (processor_type): Add PROCESSOR_2097_Z10.
(processor_flags): Add PF_Z10.
(TARGET_CPU_Z10, TARGET_Z10): New macro definitions.
* config/s390/s390.md (cpu, cpu_facility attributes): Add z10.
* gcc/config.gcc: Add z10.
From-SVN: r136097
|
|
* config.gcc (sh2[lbe]*-*-linux*): Allow target.
* config.host (sh2[lbe]*-*-linux*): Allow target.
From-SVN: r135861
|
|
PR target/36079
* configure.ac: Handle --enable-cld.
* configure: Regenerated.
* config.gcc: Add USE_IX86_CLD to tm_defines for x86 targets.
* config/i386/i386.h (struct machine_function): Add needs_cld field.
(ix86_current_function_needs_cld): New define.
* config/i386/i386.md (UNSPEC_CLD): New unspec volatile constant.
(cld): New isns pattern.
(strmov_singleop, rep_mov, strset_singleop, rep_stos, cmpstrnqi_nz_1,
cmpstrnqi_1, strlenqi_1): Set ix86_current_function_needs_cld flag.
* config/i386/i386.opt (mcld): New option.
* config/i386/i386.c (ix86_expand_prologue): Emit cld insn if
TARGET_CLD and ix86_current_function_needs_cld.
(override_options): Use -mcld by default for 32-bit code if
USE_IX86_CLD.
* doc/install.texi (Options specification): Document --enable-cld.
* doc/invoke.texi (Machine Dependent Options)
[i386 and x86-64 Options]: Add -mcld option.
(Intel 386 and AMD x86-64 Options): Document -mcld option.
From-SVN: r135792
|
|
* doc/invoke.texi: Add cpu_type's 464 and 464fp.
(-mmulhw): Add 464 to description.
(-mdlmzb): Likewise.
* config.gcc: Handle --with-cpu=464 and --with-cpu=464fp.
* config/rs6000/rs6000.c (processor_target_table): Add 464 and
464fp entries.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add 464 and 464fp support.
* config/rs6000/t-fprules (MULTILIB_MATCHES_FLOAT): Include -mcpu=464.
* config/rs6000/rs6000.md: Update comments for 464.
From-SVN: r135730
|
|
* config.gcc (sparc-*-linux*): Always include sparc/t-linux in
tmake_file.
From-SVN: r135713
|
|
2008-05-20 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config.gcc (tm_file): Update comments about relative pathnames.
From-SVN: r135656
|
