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2017-06-07rs6000: Remove spe.md, spe.h, linuxspe.hSegher Boessenkool1-2/+2
* config.gcc (powerpc*-*-*): Don't add spe.h to extra_headers. (powerpc*-linux*spe*): Use ${cpu_type} instead of rs6000. * config/rs6000/linuxspe.h: Delete file. * config/rs6000/rs6000.md: Don't include spe.md. * config/rs6000/spe.h: Delete file. * config/rs6000/spe.md: Delete file. * config/rs6000/t-rs6000: Remove spe.md. From-SVN: r248983
2017-05-24Split off powerpcspe from rs6000 portSegher Boessenkool1-8/+41
* config/powerpcspe: New port. Files are copied from the rs6000 port, with "rs6000" in filenames replaced by "powerpcspe". * config.gcc (powerpc*-*-*spe*): New. (powerpc-*-eabispe*): Use ${cpu_type} instead of hardcoded pathnames. (powerpc-*-rtems*spe*): New. (powerpc*-*-linux*spe*): New. (powerpc-wrs-vxworksspe): New. (powerpc*-*-*, rs6000-*-*): Use ${cpu_type}. (misc flags) [powerpc*-*-*, rs6000-*-*): Use ${cpu_type}. * config.host (powerpc*-*-*spe*): New. From-SVN: r248429
2017-05-12config.gcc (powerpc*-*-*): Add bmi2intrin.h, bmiintrin.h, and x86intrin.hSteven Munroe1-1/+4
[gcc] 2017-05-12 Steven Munroe <munroesj@gcc.gnu.org> * config.gcc (powerpc*-*-*): Add bmi2intrin.h, bmiintrin.h, and x86intrin.h * config/rs6000/bmiintrin.h: New file. * config/rs6000/bmi2intrin.h: New file. * config/rs6000/x86intrin.h: New file. [gcc/testsuite] 2017-05-12 Steven Munroe <munroesj@gcc.gnu.org> * gcc.target/powerpc/bmi-andn-1.c: New file * gcc.target/powerpc/bmi-andn-2.c: New file. * gcc.target/powerpc/bmi-bextr-1.c: New file. * gcc.target/powerpc/bmi-bextr-2.c: New file. * gcc.target/powerpc/bmi-bextr-4.c: New file. * gcc.target/powerpc/bmi-bextr-5.c: New file. * gcc.target/powerpc/bmi-blsi-1.c: New file. * gcc.target/powerpc/bmi-blsi-2.c: New file. * gcc.target/powerpc/bmi-blsmsk-1.c: new file. * gcc.target/powerpc/bmi-blsmsk-2.c: New file. * gcc.target/powerpc/bmi-blsr-1.c: New file. * gcc.target/powerpc/bmi-blsr-2.c: New File. * gcc.target/powerpc/bmi-check.h: New File. * gcc.target/powerpc/bmi-tzcnt-1.c: new file. * gcc.target/powerpc/bmi-tzcnt-2.c: New file. * gcc.target/powerpc/bmi2-bzhi32-1.c: New file. * gcc.target/powerpc/bmi2-bzhi64-1.c: New file. * gcc.target/powerpc/bmi2-bzhi64-1a.c: New file. * gcc.target/powerpc/bmi2-check.h: New file. * gcc.target/powerpc/bmi2-mulx32-1.c: New file. * gcc.target/powerpc/bmi2-mulx32-2.c: New file. * gcc.target/powerpc/bmi2-mulx64-1.c: New file. * gcc.target/powerpc/bmi2-mulx64-2.c: New file. * gcc.target/powerpc/bmi2-pdep32-1.c: New file. * gcc.target/powerpc/bmi2-pdep64-1.c: New file. * gcc.target/powerpc/bmi2-pext32-1.c: New File. * gcc.target/powerpc/bmi2-pext64-1.c: New file. * gcc.target/powerpc/bmi2-pext64-1a.c: New File. From-SVN: r247988
2017-05-08Define TM_MULTILIB_CONFIG for ARM multilibThomas Preud'homme1-1/+2
TM_MULTILIB_CONFIG is not set in config.gcc when building with multilib for arm targets, leading to config/arm/t-multilib not including any of the files (t-aprofile and t-rmprofile) definining the architecture and FPU to build multilib for. This patch fixes that by setting TM_MULTILIB_CONFIG to with_multilib_list's value after it has been checked. It also fix a trailing whitespace issue. 2017-05-08 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ * config.gcc (arm*-*-*): Set TM_MULTILIB_CONFIG from with_multilib_list after it has been checked. From-SVN: r247741
2017-05-05* config.gcc (arm*-*-*): Add missing 'fi'.Nathan Sidwell1-0/+1
From-SVN: r247650
2017-05-05[ARM] Allow combination of aprofile and rmprofile multilibsThomas Preud'homme1-28/+12
2017-05-05 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ * config.gcc: Allow combinations of aprofile and rmprofile values for --with-multilib-list. * config/arm/t-multilib: New file. * config/arm/t-aprofile: Remove initialization of MULTILIB_* variables. Remove setting of ISA and floating-point ABI in MULTILIB_OPTIONS and MULTILIB_DIRNAMES. Set architecture and FPU in MULTI_ARCH_OPTS_A and MULTI_ARCH_DIRS_A rather than MULTILIB_OPTIONS and MULTILIB_DIRNAMES respectively. Add comment to introduce all matches. Add architecture matches for marvel-pj4 and generic-armv7-a CPU options. * config/arm/t-rmprofile: Likewise except for the matches changes. * doc/install.texi (--with-multilib-list): Document the combination of aprofile and rmprofile values and warn about pitfalls in doing that. From-SVN: r247646
2017-03-24S/390: arch12: Add arch12 option.Andreas Krebbel1-1/+1
This patch covers the mechanical work of making the new architecture option arch12 available wherever it will be needed later. gcc/testsuite/ChangeLog: 2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gcc.target/s390/s390.exp: Run tests in arch12 and vxe dirs. * lib/target-supports.exp: Add effective target check s390_vxe. gcc/ChangeLog: 2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * common/config/s390/s390-common.c (processor_flags_table): Add arch12. * config.gcc: Add arch12. * config/s390/driver-native.c (s390_host_detect_local_cpu): Default to arch12 for unknown CPU model numbers. * config/s390/s390-builtins.def: Add B_VXE builtin flag. * config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Adjust PROCESSOR_max sanity check. * config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_ARCH12. * config/s390/s390.c (processor_table): Add arch12. (s390_expand_builtin): Add check for B_VXE flag. (s390_issue_rate): Add PROCESSOR_ARCH12. (s390_get_sched_attrmask): Likewise. (s390_get_unit_mask): Likewise. (s390_sched_score): Enable z13 scheduling for arch12. (s390_sched_reorder): Likewise. (s390_sched_variable_issue): Likewise. * config/s390/s390.h (enum processor_flags): Add PF_ARCH12 and PF_VXE. (s390_tune_attr): Use z13 scheduling also for arch12. (TARGET_CPU_ARCH12, TARGET_CPU_ARCH12_P, TARGET_CPU_VXE) (TARGET_CPU_VXE_P, TARGET_ARCH12, TARGET_ARCH12_P, TARGET_VXE) (TARGET_VXE_P): New macros. * config/s390/s390.md: Add arch12 to cpu attribute. Add arch12 and vxe to cpu_facility. Add arch12 and vxe to enabled attribute. * config/s390/s390.opt: Add arch12 as processor_type. From-SVN: r246452
2017-02-27[ARC] Clean up arc header file.Claudiu Zissulescu1-9/+6
gcc/ 2017-02-27 Claudiu Zissulescu <claziss@synopsys.com> * config.gcc (arc*-): Clean up, use arc/big.h, arc/elf.h, and arc/linux.h headers. * config/arc/arc.h (TARGET_OS_CPP_BUILTINS): Remove. (LINK_SPEC): Likewise. (ARC_TLS_EXTRA_START_SPEC): Likewise. (EXTRA_SPECS): Likewise. (STARTFILE_SPEC): Likewise. (ENDFILE_SPEC): Likewise. (LIB_SPEC): Likewise. (TARGET_SDATA_DEFAULT): Likewise. (TARGET_MMEDIUM_CALLS_DEFAULT): Likewise. (MULTILIB_DEFAULTS): Likewise. (DWARF2_UNWIND_INFO): Likewise. * config/arc/big.h: New file. * config/arc/elf.h: Likewise. * config/arc/linux.h: Likewise. * config/arc/t-uClibc: Remove. From-SVN: r245759
2017-02-14rs6000: Synchronize the --with-cpu list in config.gcc with realitySegher Boessenkool1-2/+3
power, power2, rios, rios1, rios2, rsc, rsc2 support was removed. rs64a never was a supported option; it's spelled rs64. power5+ and powerpc64le are supported options but could not be set as default. * config.gcc (supported_defaults) [powerpc*-*-*]: Update. From-SVN: r245435
2017-02-06RISC-V Port: gccPalmer Dabbelt1-0/+96
gcc/ChangeLog: 2017-02-06 Palmer Dabbelt <palmer@dabbelt.com> * config/riscv/riscv.c: New file. * gcc/common/config/riscv/riscv-common.c: Likewise. * config.gcc: Likewise. * config/riscv/constraints.md: Likewise. * config/riscv/elf.h: Likewise. * config/riscv/generic.md: Likewise. * config/riscv/linux.h: Likewise. * config/riscv/multilib-generator: Likewise. * config/riscv/peephole.md: Likewise. * config/riscv/pic.md: Likewise. * config/riscv/predicates.md: Likewise. * config/riscv/riscv-builtins.c: Likewise. * config/riscv/riscv-c.c: Likewise. * config/riscv/riscv-ftypes.def: Likewise. * config/riscv/riscv-modes.def: Likewise. * config/riscv/riscv-opts.h: Likewise. * config/riscv/riscv-protos.h: Likewise. * config/riscv/riscv.h: Likewise. * config/riscv/riscv.md: Likewise. * config/riscv/riscv.opt: Likewise. * config/riscv/sync.md: Likewise. * config/riscv/t-elf-multilib: Likewise. * config/riscv/t-linux: Likewise. * config/riscv/t-linux-multilib: Likewise. * config/riscv/t-riscv: Likewise. * configure.ac: Likewise. * doc/contrib.texi: Add Kito Cheng, Palmer Dabbelt, and Andrew Waterman as RISC-V maintainers. * doc/install.texi: Add RISC-V entries. * doc/invoke.texi: Add RISC-V options section. * doc/md.texi: Add RISC-V constraints section. From-SVN: r245224
2017-01-30re PR target/79260 (missing header files for plugins: arm-isa.h, arm-flags.h)Richard Earnshaw1-1/+1
PR target/79260 * config.gcc (arm*-*-*): Add arm/arm-flags.h and arm/arm-isa.h to tm_p_file. * arm/arm-protos.h: Don't directly include arm-flags.h and arm-isa.h. From-SVN: r245029
2017-01-19config.gcc (supported_defaults): Add madd4.Matthew Fortune1-2/+17
gcc/ 2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com> Yunqiang Su <yunqiang.su@imgtec.com> * config.gcc (supported_defaults): Add madd4. (with_madd4): Add validation. (all_defaults): Add madd4. * config/mips/mips.opt (mmadd4): New option. * gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for mmadd4. (TARGET_CPU_CPP_BUILTINS): Add builtin_define for __mips_no_madd4. (ISA_HAS_UNFUSED_MADD4): Gate with mips_madd4. (ISA_HAS_FUSED_MADD4): Likewise. * gcc/doc/invoke.texi (-mmadd4): Document the new option. * gcc/doc/install.texi (--with-madd4): Document the new option. gcc/testsuite/ 2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com> * gcc.target/mips/madd4-1.c: New file. * gcc.target/mips/madd4-2.c: Likewise. * gcc.target/mips/mips.exp (mips_option_groups): Add ghost option HAS_MADD4. (mips_option_groups): Add -m[no-]madd4. (mips-dg-init): Detect default -mno-madd4. (mips-dg-options): Handle HAS_MADD4 arch upgrade/downgrade. * gcc.target/mips/mips-ps-type.c: Add -mmadd4 test option. * gcc.target/mips/mips-ps-type-2.c: Likewise. * gcc.target/mips/nmadd-1.c: Likewise. * gcc.target/mips/nmadd-2.c: Likewise. * gcc.target/mips/nmadd-3.c: Likewise. Co-Authored-By: Yunqiang Su <yunqiang.su@imgtec.com> From-SVN: r244676
2017-01-19config.gcc (x86_64-*-rtems*): Use i386/rtemself.h instead of i386/rtems-64.h.Uros Bizjak1-1/+1
* config.gcc (x86_64-*-rtems*): Use i386/rtemself.h instead of i386/rtems-64.h. * config/i386/rtems-64.h: Remove. From-SVN: r244655
2017-01-19MIPS: PR target/78176 add -mlxc1-sxc1.Matthew Fortune1-2/+17
gcc/ PR target/78176 * config.gcc (supported_defaults): Add lxc1-sxc1. (with_lxc1_sxc1): Add validation. (all_defaults): Add lxc1-sxc1. * config/mips/mips.opt (mlxc1-sxc1): New option. * gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for mlxc1-sxc1. (TARGET_CPU_CPP_BUILTINS): Add builtin_define for __mips_no_lxc1_sxc1. (ISA_HAS_LXC1_SXC1): Gate with mips_lxc1_sxc1. * gcc/doc/invoke.texi (-mlxc1-sxc1): Document the new option. * doc/install.texi (--with-lxc1-sxc1): Document the new option. gcc/testsuite/ * gcc.target/mips/lxc1-sxc1-1.c: New file. * gcc.target/mips/lxc1-sxc1-2.c: Likewise. * gcc.target/mips/mips.exp (mips_option_groups): Add ghost option HAS_LXC1. (mips_option_groups): Add -m[no-]lxc1-sxc1. (mips-dg-init): Detect default -mno-lxc1-sxc1. (mips-dg-options): Handle HAS_LXC1 arch upgrade/downgrade. From-SVN: r244640
2017-01-11i386-common.c (OPTION_MASK_ISA_SGX_UNSET): New.Julia Koval1-2/+2
* common/config/i386/i386-common.c (OPTION_MASK_ISA_SGX_UNSET): New. (OPTION_MASK_ISA_SGX_SET): New. (ix86_handle_option): Handle OPT_msgx. * config.gcc: Added sgxintrin.h. * config/i386/driver-i386.c (host_detect_local_cpu): Detect sgx. * config/i386/i386-c.c (ix86_target_macros_internal): Define __SGX__. * config/i386/i386.c (ix86_target_string): Add -msgx. (PTA_SGX): New. (ix86_option_override_internal): Handle new options. (ix86_valid_target_attribute_inner_p): Add sgx. * config/i386/i386.h (TARGET_SGX, TARGET_SGX_P): New. * config/i386/i386.opt: Add msgx. * config/i386/sgxintrin.h: New file. * config/i386/x86intrin.h: Add sgxintrin.h. testsuite/ChangeLog: * gcc.target/i386/sgx.c New test. * gcc.target/i386/sse-12.c: Add -msgx. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. Co-Authored-By: Uros Bizjak <ubizjak@gmail.com> From-SVN: r244339
2017-01-11[arm] Replace command-line option .def files with single definition fileRichard Earnshaw1-40/+23
The files arm-cores.def, arm-fpus.def and arm-arches.def are parsed and used in several places and the format is slightly awkward to maintain as they must be parsable in C and by certain scripts. Furthermore, changes to the content that affects every entry is particularly awkward for dealing with merges. This patch replaces all three files with a single file that specifies all the command-line related definitions in a new format that allows for better checking for consistency as well as (hopefully) easier to merge changes. The awk script used to parse it is relatively complicated, but should be pretty portable. It works by parsing in all the data and then operating one of a number of possible sub-commands to generate the desired output. The new method picked up one error. The CPU descriptions referred to an architecture ARMv5tej which was not supported by -march. This has been fixed by adding the relevant entry to the architecture list. gcc: * config.gcc: Use new awk script to check CPU, FPU and architecture parameters for --with-... options. * config/arm/parsecpu.awk: New file * config/arm/arm-cpus.in: New file. * config/arm/arm-opts.h: Include arm-cpu.h instead of processing .def files. * config/arm/arm.c: Include arm-cpu-data.h instead of processing .def files. * config/arm/t-arm: Update dependency rules. * common/config/arm/arm-common.c: Include arm-cpu-cdata.h instead of processing .def files. * config/arm/genopt.sh: Deleted. * config/arm/gentune.sh: Deleted. * config/arm/arm-cores.def: Deleted. * config/arm/arm-arches.def: Deleted. * config/arm/arm-fpus.def: Deleted. * config/arm/arm-tune.md: Regenerated. * config/arm/arm-tables.opt: Regenerated. * config/arm/arm-cpu.h: New generated file. * config/arm/arm-cpu-data.h: New generated file. * config/arm/arm-cpu-cdata.h: New generated file. Contrib: * gcc_update: Adjust touch list. From-SVN: r244316
2017-01-10fuchsia-elf.h: New file.Joshua Conner1-2/+17
2017-01-10 Joshua Conner <joshconner@google.com> * config/arm/fuchsia-elf.h: New file. * config/fuchsia.h: New file. * config.gcc (*-*-fuchsia*): Set native_system_header_dir. (aarch64*-*-fuchsia*, arm*-*-fuchsia*, x86_64-*-fuchsia*): Add to targets. * config.host: (aarch64*-*-fuchsia*, arm*-*-fuchsia*): Add to hosts. From-SVN: r244281
2017-01-10Enable AVX-512 VPOPCNTD/VPOPCNTQ instructions.Andrew Senkevich1-2/+4
gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET, OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET): New. * config.gcc: Add avx512vpopcntdqintrin.h. * config/i386/avx512vpopcntdqintrin.h: New. * config/i386/cpuid.h (bit_AVX512VPOPCNTDQ): New. * config/i386/i386-builtin-types.def: Add new types. * config/i386/i386-builtin.def (__builtin_ia32_vpopcountd_v16si, __builtin_ia32_vpopcountd_v16si_mask, __builtin_ia32_vpopcountq_v8di, __builtin_ia32_vpopcountq_v8di_mask): New. * config/i386/i386-c.c (ix86_target_macros_internal): Define __AVX512VPOPCNTDQ__. * config/i386/i386.c (ix86_target_string): Add -mavx512vpopcntdq. (PTA_AVX512VPOPCNTDQ): Define. * config/i386/i386.h (TARGET_AVX512VPOPCNTDQ, TARGET_AVX512VPOPCNTDQ_P): Define. * config/i386/i386.opt: Add mavx512vpopcntdq. * config/i386/immintrin.h: Include avx512vpopcntdqintrin.h. * config/i386/sse.md (define_insn "vpopcount<mode><mask_name>"): New. libgcc/ * config/i386/cpuinfo.h (processor_features): Add FEATURE_AVX512VPOPCNTDQ. * config/i386/cpuinfo.c (get_available_features): Habdle new feature. gcc/testsuite/ * g++.dg/other/i386-2.C: Add -mavx512vpopcntdq. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/builtin_target.c: Handle new option. * gcc.target/i386/funcspec-56.inc: Test new attributes. * gcc.target/i386/avx512vpopcntdq-vpopcntd.c: New test. * gcc.target/i386/avx512vpopcntdq-vpopcntq.c: Ditto. From-SVN: r244263
2017-01-01Update copyright years.Jakub Jelinek1-1/+1
From-SVN: r243994
2016-12-10config.gcc (i386-*-netbsd*): Make i486 the default arch on NetBSD.Krister Walfridsson1-0/+6
2016-12-10 Krister Walfridsson <krister.walfridsson@gmail.com> * config.gcc (i386-*-netbsd*): Make i486 the default arch on NetBSD. Generally use cpu generic. From-SVN: r243519
2016-12-05* config.gcc (*-*-uclinux*): Enable posix threads.Waldemar Brodkorb1-0/+3
From-SVN: r243268
2016-12-05[ARC] Fix PIE.Cupertino Miranda1-1/+1
gcc/ 2016-12-05 Cupertino Miranda <cmiranda@synopsys.com> * config/arc/arc.h (STARTFILE_SPEC): Use default linux specs. (ENDFILE_SPEC): Likewise. libgcc/ 2016-12-05 Cupertino Miranda <cmiranda@synopsys.com> * config.host (arc*-*-linux-uclibc*): Use default extra objects. Include linux-android header. * config/arc/crti.S (_init): Declare symbol as function. (_fini): Likewise. From-SVN: r243245
2016-12-03config.gcc (powerpc*-*-linux*): Set gnu-indirect-function by default on ↵Michael Meissner1-0/+8
PowerPC linux systems. 2016-12-02 Michael Meissner <meissner@linux.vnet.ibm.com> * config.gcc (powerpc*-*-linux*): Set gnu-indirect-function by default on PowerPC linux systems. From-SVN: r243215
2016-12-02Add support for ARMv8-M's Secure Extensions flag and intrinsicsAndre Vieira1-1/+1
gcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config.gcc (extra_headers): Added arm_cmse.h. * config/arm/arm-arches.def (ARM_ARCH): (armv8-m): Add FL2_CMSE. (armv8-m.main): Likewise. (armv8-m.main+dsp): Likewise. * config/arm/arm-c.c (arm_cpu_builtins): Added __ARM_FEATURE_CMSE macro. * config/arm/arm-flags.h: Define FL2_CMSE. * config/arm.c (arm_arch_cmse): New. (arm_option_override): New error for unsupported cmse target. * config/arm/arm.h (arm_arch_cmse): New. * config/arm/arm.opt (mcmse): New. * config/arm/arm_cmse.h: New file. * doc/invoke.texi (ARM Options): Add -mcmse. * doc/sourcebuild.texi (arm_cmse_ok): Add new effective target. * doc/extend.texi: Add ARMv8-M Security Extensions entry. gcc/testsuite/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse.exp: New. * gcc.target/arm/cmse/cmse-1.c: New. * gcc.target/arm/cmse/cmse-12.c: New. * lib/target-supports.exp (check_effective_target_arm_cmse_ok): New. libgcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/t-arm (HAVE_CMSE): New. * config/arm/cmse.c: New. Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com> From-SVN: r243187
2016-11-22Add multilib support for embedded bare-metal targetsThomas Preud'homme1-3/+14
2016-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ * config.gcc: Allow new rmprofile value for configure option --with-multilib-list. * config/arm/t-rmprofile: New file. * doc/install.texi (--with-multilib-list): Document new rmprofile value for ARM. From-SVN: r242696
2016-11-19config.gcc (*-*-netbsd): Set use_gcc_stdint=wrap.Krister Walfridsson1-0/+1
2016-11-19 Krister Walfridsson <krister.walfridsson@gmail.com> * config.gcc (*-*-netbsd): Set use_gcc_stdint=wrap. From-SVN: r242621
2016-11-17Enable AVX512_4FMAPS and AVX512_4VNNIW instructionsKirill Yukhin1-4/+4
This requires additional patch for register allocator from Vladimir Makarov. gcc/ 2016-11-17 Kirill Yukhin <kirill.yukhin@gmail.com> Andrew Senkevich <andrew.senkevich@intel.com> * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX5124FMAPS_SET, OPTION_MASK_ISA_AVX5124FMAPS_UNSET, OPTION_MASK_ISA_AVX5124VNNIW_SET, OPTION_MASK_ISA_AVX5124VNNIW_UNSET): New. (ix86_handle_option): Handle OPT_mavx5124fmaps, OPT_mavx5124vnniw. * config.gcc: Add avx5124fmapsintrin.h, avx5124vnniwintrin.h. * config/i386/avx5124fmapsintrin.h: New file. * config/i386/avx5124vnniwintrin.h: Ditto. * config/i386/constraints.md (h): New constraint. * config/i386/cpuid.h: (bit_AVX5124VNNIW, bit_AVX5124FMAPS): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect avx5124fmaps, avx5124vnniw. * config/i386/i386-builtin-types.def: Add types V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF_V16SF_UHI, V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF, V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF, V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF_V4SF_UQI, V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI, V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI. * config/i386/i386-builtin.def (__builtin_ia32_4fmaddps_mask, __builtin_ia32_4fmaddps, __builtin_ia32_4fmaddss, __builtin_ia32_4fmaddss_mask, __builtin_ia32_4fnmaddps_mask, __builtin_ia32_4fnmaddps, __builtin_ia32_4fnmaddss, __builtin_ia32_4fnmaddss_mask, __builtin_ia32_vp4dpwssd, __builtin_ia32_vp4dpwssd_mask, __builtin_ia32_vp4dpwssds, __builtin_ia32_vp4dpwssds_mask): New. * config/i386/i386-c.c (ix86_target_macros_internal): Define __AVX5124FMAPS__, __AVX5124VNNIW__. * config/i386/i386-modes.def: Fixed comment typos, added new modes (VECTOR_MODES (FLOAT, 256), VECTOR_MODE (INT, SI, 64)). * config/i386/i386.c (ix86_target_string): Add -mavx5124fmaps, -mavx5124vnniw. (PTA_AVX5124FMAPS, PTA_AVX5124VNNIW): Define. (ix86_option_override_internal): Handle new options. (ix86_valid_target_attribute_inner_p): Add avx5124fmaps, avx5124vnniw. (ix86_expand_builtin): Handle new builtins. (ix86_additional_allocno_class_p): New. * config/i386/i386.h (TARGET_AVX5124FMAPS, TARGET_AVX5124FMAPS_P, TARGET_AVX5124VNNIW, TARGET_AVX5124VNNIW_P): Define. (reg_class): Add MOD4_SSE_REGS. (MOD4_SSE_REG_P, MOD4_SSE_REGNO_P): New. * config/i386/i386.opt: Add mavx5124fmaps, mavx5124vnniw. * config/i386/immintrin.h: Include avx5124fmapsintrin.h, avx5124vnniwintrin.h. * config/i386/sse.md (unspec): Add UNSPEC_VP4FMADD, UNSPEC_VP4FNMADD, UNSPEC_VP4DPWSSD, UNSPEC_VP4DPWSSDS. (define_mode_iterator IMOD4): New. (define_mode_attr imod4_narrow): Ditto. (define_insn "mov<mode>"): Ditto. (define_insn "avx5124fmaddps_4fmaddps"): Ditto. (define_insn "avx5124fmaddps_4fmaddps_mask"): Ditto. (define_insn "avx5124fmaddps_4fmaddps_maskz"): Ditto. (define_insn "avx5124fmaddps_4fmaddss"): Ditto. (define_insn "avx5124fmaddps_4fmaddss_mask"): Ditto. (define_insn "avx5124fmaddps_4fmaddss_maskz"): Ditto. (define_insn "avx5124fmaddps_4fnmaddps"): Ditto. (define_insn "avx5124fmaddps_4fnmaddps_mask"): Ditto. (define_insn "avx5124fmaddps_4fnmaddps_maskz"): Ditto. (define_insn "avx5124fmaddps_4fnmaddss"): Ditto. (define_insn "avx5124fmaddps_4fnmaddss_mask"): Ditto. (define_insn "avx5124fmaddps_4fnmaddss_maskz"): Ditto. (define_insn "avx5124vnniw_vp4dpwssd"): Ditto. (define_insn "avx5124vnniw_vp4dpwssd_mask"): Ditto. (define_insn "avx5124vnniw_vp4dpwssd_maskz"): Ditto. (define_insn "avx5124vnniw_vp4dpwssds"): Ditto. (define_insn "avx5124vnniw_vp4dpwssds_mask"): Ditto. (define_insn "avx5124vnniw_vp4dpwssds_maskz"): Ditto. * init-regs.c (initialize_uninitialized_regs): Add emit_clobber call. * genmodes.c (mode_size_inline): Extend return type. * machmode.h (mode_size, mode_base_align): Extend type. gcc/testsuite/ 2016-11-17 Kirill Yukhin <kirill.yukhin@gmail.com> Andrew Senkevich <andrew.senkevich@intel.com> * gcc.target/i386/avx5124fmadd-v4fmaddps-1.c: New test. * gcc.target/i386/avx5124fmadd-v4fmaddps-2.c: Ditto. * gcc.target/i386/avx5124fmadd-v4fmaddss-1.c: Ditto. * gcc.target/i386/avx5124fmadd-v4fnmaddps-1.c: Ditto. * gcc.target/i386/avx5124fmadd-v4fnmaddps-2.c: Ditto. * gcc.target/i386/avx5124fmadd-v4fnmaddss-1.c: Ditto. * gcc.target/i386/avx5124fmaps-check.h: Ditto. * gcc.target/i386/avx5124vnniw-check.h: Ditto. * gcc.target/i386/avx5124vnniw-vp4dpwssd-1.c: Ditto. * gcc.target/i386/avx5124vnniw-vp4dpwssd-2.c: Ditto. * gcc.target/i386/avx5124vnniw-vp4dpwssds-1.c: Ditto. * gcc.target/i386/avx5124vnniw-vp4dpwssds-2.c: Ditto. * gcc.target/i386/avx512f-helper.h: Add avx5124fmaps-check.h, avx5124vnniw-check.h. * gcc.target/i386/i386.exp (check_effective_target_avx5124fmaps, check_effective_target_avx5124vnniw): New. * gcc.target/i386/m128-check.h (ESP_FLOAT, ESP_DOUBLE): Set under ifndef. * gcc.target/i386/sse-12.c: Add -mavx5124fmaps, -mavx5124vnniw. * gcc.target/i386/sse-13.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. From-SVN: r242569
2016-11-17netbsd-stdint.h: New.Krister Walfridsson1-2/+2
2016-11-17 Krister Walfridsson <krister.walfridsson@gmail.com> * config/netbsd-stdint.h: New. * config.gcc (i[34567]86-*-netbsd): Add netbsd-stdint.h to tm_file. (x86_64-*-netbsd*): Likewise. From-SVN: r242533
2016-11-15[ARC] New option handling, refurbish multilib support.Claudiu Zissulescu1-22/+25
gcc/ 2016-11-15 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc-arch.h: New file. * config/arc/arc-arches.def: Likewise. * config/arc/arc-cpus.def: Likewise. * config/arc/arc-options.def: Likewise. * config/arc/t-multilib: Likewise. * config/arc/genmultilib.awk: Likewise. * config/arc/genoptions.awk: Likewise. * config/arc/arc-tables.opt: Likewise. * config/arc/driver-arc.c: Likewise. * testsuite/gcc.target/arc/nps400-cpu-flag.c: Likewise. * common/config/arc/arc-common.c (arc_handle_option): Trace toggled options. * config.gcc (arc*-*-*): Add arc-tables.opt to arc's extra options; check for supported cpu against arc-cpus.def file. (arc*-*-elf*, arc*-*-linux-uclibc*): Use new make fragment; define TARGET_CPU_BUILD macro; add driver-arc.o as an extra object. * config/arc/arc-c.def: Add emacs local variables. * config/arc/arc-opts.h (processor_type): Use arc-cpus.def file. (FPU_FPUS, FPU_FPUD, FPU_FPUDA, FPU_FPUDA_DIV, FPU_FPUDA_FMA) (FPU_FPUDA_ALL, FPU_FPUS_DIV, FPU_FPUS_FMA, FPU_FPUS_ALL) (FPU_FPUD_DIV, FPU_FPUD_FMA, FPU_FPUD_ALL): New defines. (DEFAULT_arc_fpu_build): Define. (DEFAULT_arc_mpy_option): Define. * config/arc/arc-protos.h (arc_init): Delete. * config/arc/arc.c (arc_cpu_name): New variable. (arc_selected_cpu, arc_selected_arch, arc_arcem, arc_archs) (arc_arc700, arc_arc600, arc_arc601): New variable. (arc_init): Add static; remove selection of default tune value, cleanup obsolete error messages. (arc_override_options): Make use of .def files for selecting the right cpu and option configurations. * config/arc/arc.h (stdbool.h): Include. (TARGET_CPU_DEFAULT): Define. (CPP_SPEC): Remove mcpu=NPS400 handling. (arc_cpu_to_as): Declare. (EXTRA_SPEC_FUNCTIONS): Define. (OPTION_DEFAULT_SPECS): Likewise. (ASM_DEFAULT): Remove. (ASM_SPEC): Use arc_cpu_to_as. (DRIVER_SELF_SPECS): Remove deprecated options. (arc_base_cpu): Declare. (TARGET_ARC600, TARGET_ARC601, TARGET_ARC700, TARGET_EM) (TARGET_HS, TARGET_V2, TARGET_ARC600): Make them use arc_base_cpu variable. (MULTILIB_DEFAULTS): Use ARC_MULTILIB_CPU_DEFAULT. * config/arc/arc.md (attr_cpu): Remove. * config/arc/arc.opt (mno-mpy): Deprecate. (mcpu=ARC600, mcpu=ARC601, mcpu=ARC700, mcpu=NPS400, mcpu=ARCEM) (mcpu=ARCHS): Remove. (mcrc, mdsp-packa, mdvbf, mmac-d16, mmac-24, mtelephony, mrtsc): Deprecate. (mbarrel_shifte, mspfp_, mdpfp_, mdsp_pack, mmac_): Remove. (arc_fpu): Use new defines. (mpy-option): Change to use numeric or string like inputs. * config/arc/t-arc (driver-arc.o): New target. (arc-cpus, t-multilib, arc-tables.opt): Likewise. * config/arc/t-arc-newlib: Delete. * config/arc/t-arc-uClibc: Renamed to t-uClibc. * doc/invoke.texi (ARC): Update arc options. Fixup From-SVN: r242425
2016-11-07config.gcc (powerpc*-*-*, [...]): Remove setting of INCLUDE_EXTRA_SPEC for ↵Peter Bergner1-10/+0
Advance Toolchain builds. * config.gcc (powerpc*-*-*, rs6000*-*-*): Remove setting of INCLUDE_EXTRA_SPEC for Advance Toolchain builds. From-SVN: r241937
2016-11-03Add missing hunk from previous commit.Richard Earnshaw1-3/+16
From-SVN: r241829
2016-10-28S/390: Add support for arch<n> arch/tune options.Andreas Krebbel1-1/+1
This patch adds an alternate CPU level naming following the architecture level number in the Principles of Operations manual. So instead of having z196, zEC12, and z13 you can use arch9, arch10, and arch11. The old cpu names stay valid and should preferably be used. The alternate names are supposed to improve compatibility with the IBM XL compiler toolchain which uses the arch numbering. gcc/testsuite/ChangeLog: 2016-10-28 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gcc.target/s390/target-attribute/tattr-m64-33.c: New test. gcc/ChangeLog: 2016-10-28 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/s390.opt: Support alternate cpu level naming (archXX). * config.gcc: Support alternate archXX cpu levels with --with-arch= and --with-tune=. * config/s390/linux.h: Translate new archXX cpu levels to the original names when calling GAS. * config/s390/tpf.h: Likewise. * doc/invoke.texi: Document the alternate cpu level names. From-SVN: r241643
2016-10-25config.gcc (sparc*-*-solaris2*): Adjust.Eric Botcazou1-2/+2
* config.gcc (sparc*-*-solaris2*): Adjust. (sparc64-*-linux*): Likewise. * config/sparc/default-64.h: Rename to... * config/sparc/default64.h: ...this. * config/sparc/sparc.c (sparc_option_override): Replace TARGET_64BIT with TARGET_ARCH64. (sparc_mangle_type): Replace !TARGET_64BIT with TARGET_ARCH32. * config/sparc/sparc.h: Minor tweaks. * config/sparc/sparc.md: Replace !TARGET_64BIT and !TARGET_ARCH64 with TARGET_ARCH32 throughout. Minor various tweaks throughout. From-SVN: r241538
2016-10-11alpha-passes.def: New file.Uros Bizjak1-2/+5
* config/alpha/alpha-passes.def: New file. * config/alpha/t-alpha: New file. * config/alpha/alpha-protos.h (gcc::context, rtl_opt_pass): Declare. (make_pass_handle_trap_shadows): New prototype. (make_pass_align_insns): Ditto. * config/alpha/alpha.c (alpha_option_override): Don't register passes here. * config.gcc (alpha*-*-*) Add alpha/t-alpha to tmake_file. From-SVN: r240996
2016-10-10configure.ac: Add aarch64-*-freebsd*.Andreas Tobler1-0/+5
toplevel: 2016-10-10 Andreas Tobler <andreast@gcc.gnu.org> * configure.ac: Add aarch64-*-freebsd*. * configure: Regenerate. gcc: 2016-10-10 Andreas Tobler <andreast@gcc.gnu.org> * config.gcc: Add aarch64-*-freebsd* support. * config.host: Likewise. * config/aarch64/aarch64-freebsd.h: New file. * config/aarch64/t-aarch64-freebsd: Ditto. libgcc: 2016-10-10 Andreas Tobler <andreast@gcc.gnu.org> * config.host: Add support for aarch64-*-freebsd*. From-SVN: r240949
2016-10-05Delete x86 deprecated pcommit instruction supportAndrew Senkevich1-4/+4
Delete x86 pcommit instruction support, which has been deprecated: https://software.intel.com/en-us/blogs/2016/09/12/deprecate-pcommit-instruction gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET, OPTION_MASK_ISA_PCOMMIT_SET): Deleted definitions. (ix86_handle_option): Deleted handle of OPT_mpcommit. * config.gcc: Deleted pcommitintrin.h * config/i386/pcommitintrin.h: Deleted file. * config/i386/cpuid.h (bit_PCOMMIT): Deleted. * config/i386/driver-i386.c (host_detect_local_cpu): Deleted pcommit detection. * config/i386/i386-c.c (ix86_target_macros_internal): Deleted define __PCOMMIT__. * config/i386/i386.c (ix86_target_string): Deleted -mpcommit. (PTA_PCOMMIT): Deleted define. (ix86_option_override_internal): Deleted handle of option. (ix86_valid_target_attribute_inner_p): Deleted pcommit. * config/i386/i386-builtin.def (IX86_BUILTIN_PCOMMIT, __builtin_ia32_pcommit): Deleted. * config/i386/i386.h (TARGET_PCOMMIT, TARGET_PCOMMIT_P): Deleted. * config/i386/i386.md (unspecv): Deleted UNSPECV_PCOMMIT. (pcommit): Deleted instruction. * config/i386/i386.opt: Mention -mpcommit deprecation. * config/i386/x86intrin.h: Deleted inclusion of pcommitintrin.h. gcc/testsuite/ * gcc.target/i386/pcommit-1.c: Deleted. * gcc.target/i386/sse-12.c: Deleted -pcommit option. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * g++.dg/other/i386-2.C: Ditto. From-SVN: r240816
2016-09-28[ARC] New CPU C-define handler.Claudiu Zissulescu1-0/+2
gcc/ 2016-09-29 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc-c.c: New file. * config/arc/arc-c.def: Likewise. * config/arc/t-arc: Likewise. * config.gcc: Include arc-c.o as c and cpp object. * config/arc/arc-protos.h (arc_cpu_cpp_builtins): Add prototype. * config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Use arc_cpu_cpp_builtins. From-SVN: r240577
2016-09-23[PATCH 13/17][ARM] Add VFP FP16 instrinsics.Matthew Wahab1-1/+1
gcc/ 2016-09-23 Matthew Wahab <matthew.wahab@arm.com> * config.gcc (extra_headers): Add arm_fp16.h * config/arm/arm_fp16.h: New. * config/arm/arm_neon.h: Include "arm_fp16.h". From-SVN: r240423
2016-09-14Infer architecture from ABI for mips-mti* and mips-img* triplets.Matthew Fortune1-0/+8
gcc/ * config.gcc (mips*-mti-elf*, mips*-mti-linux*): Set mips32r2 and mips64r2 as default 32-bit and 64-bit architectures. (mips*-img-elf*, mips*-img-linux*): Set mips32r6 and mips64r6 as default 32-bit and 64-bit architectures. From-SVN: r240145
2016-08-30disable ifunc on *-musl by defaultSzabolcs Nagy1-2/+2
gcc/ * config.gcc (*-*-*musl*): Disable gnu-indirect-function. From-SVN: r239859
2016-07-25[AArch64][7/10] ARMv8.2-A FP16 one operand scalar intrinsicsJiong Wang1-1/+1
gcc/ * config.gcc (aarch64*-*-*): Install arm_fp16.h. * config/aarch64/aarch64-builtins.c (hi_UP): New. * config/aarch64/aarch64-simd-builtins.def: Register new builtins. * config/aarch64/aarch64-simd.md (aarch64_frsqrte<mode>): Extend to HF mode. (aarch64_frecp<FRECP:frecp_suffix><mode>): Likewise. (aarch64_cm<optab><mode>): Likewise. * config/aarch64/aarch64.md (<frint_pattern><mode>2): Likewise. (l<fcvt_pattern><su_optab><GPF:mode><GPI:mode>2): Likewise. (fix_trunc<GPF:mode><GPI:mode>2): Likewise. (sqrt<mode>2): Likewise. (abs<mode>2): Likewise. (<optab><mode>hf2): New pattern for HF mode. (<optab>hihf2): Likewise. * config/aarch64/arm_neon.h: Include arm_fp16.h. * config/aarch64/iterators.md (GPF_F16, GPI_F16, VHSDF_HSDF): New. (w1, w2, v, s, q, Vmtype, V_cmp_result, fcvt_iesize, FCVT_IESIZE): Support HF mode. * config/aarch64/arm_fp16.h: New file. (vabsh_f16, vceqzh_f16, vcgezh_f16, vcgtzh_f16, vclezh_f16, vcltzh_f16, vcvth_f16_s16, vcvth_f16_s32, vcvth_f16_s64, vcvth_f16_u16, vcvth_f16_u32, vcvth_f16_u64, vcvth_s16_f16, vcvth_s32_f16, vcvth_s64_f16, vcvth_u16_f16, vcvth_u32_f16, vcvth_u64_f16, vcvtah_s16_f16, vcvtah_s32_f16, vcvtah_s64_f16, vcvtah_u16_f16, vcvtah_u32_f16, vcvtah_u64_f16, vcvtmh_s16_f16, vcvtmh_s32_f16, vcvtmh_s64_f16, vcvtmh_u16_f16, vcvtmh_u32_f16, vcvtmh_u64_f16, vcvtnh_s16_f16, vcvtnh_s32_f16, vcvtnh_s64_f16, vcvtnh_u16_f16, vcvtnh_u32_f16, vcvtnh_u64_f16, vcvtph_s16_f16, vcvtph_s32_f16, vcvtph_s64_f16, vcvtph_u16_f16, vcvtph_u32_f16, vcvtph_u64_f16, vnegh_f16, vrecpeh_f16, vrecpxh_f16, vrndh_f16, vrndah_f16, vrndih_f16, vrndmh_f16, vrndnh_f16, vrndph_f16, vrndxh_f16, vrsqrteh_f16, vsqrth_f16): New. From-SVN: r238722
2016-06-23config.gcc: Add support for arm*-*-phoenix* targets.Jakub Sejdak1-0/+11
2016-06-23 Jakub Sejdak <jakub.sejdak@phoesys.com> * config.gcc: Add support for arm*-*-phoenix* targets. * config/arm/t-phoenix: New. * config/phoenix.h: New. From-SVN: r237728
2016-06-21remove mep-* supportTrevor Saunders1-12/+1
libgcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.host: Remove support for mep-*. * config/mep/lib1funcs.S: Remove. * config/mep/lib2funcs.c: Remove. * config/mep/t-mep: Remove. * config/mep/tramp.c: Remove. gcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * common/config/mep/mep-common.c: Remove. * config.gcc: Remove mep-* support. * config/mep/constraints.md: Remove. * config/mep/default.h: Remove. * config/mep/intrinsics.h: Remove. * config/mep/intrinsics.md: Remove. * config/mep/ivc2-template.h: Remove. * config/mep/mep-c5.cpu: Remove. * config/mep/mep-core.cpu: Remove. * config/mep/mep-default.cpu: Remove. * config/mep/mep-ext-cop.cpu: Remove. * config/mep/mep-intrin.h: Remove. * config/mep/mep-ivc2.cpu: Remove. * config/mep/mep-pragma.c: Remove. * config/mep/mep-protos.h: Remove. * config/mep/mep.c: Remove. * config/mep/mep.cpu: Remove. * config/mep/mep.h: Remove. * config/mep/mep.md: Remove. * config/mep/mep.opt: Remove. * config/mep/predicates.md: Remove. * config/mep/t-mep: Remove. * doc/install.texi: Remove mep-* documentation. * doc/md.texi: Likewise. gcc/testsuite/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * gcc.dg/tree-ssa/forwprop-28.c: Remove mep-* support. * gcc.dg/tree-ssa/reassoc-32.c: Likewise. * gcc.dg/tree-ssa/reassoc-33.c: Likewise. * gcc.dg/tree-ssa/reassoc-34.c: Likewise. * gcc.dg/tree-ssa/reassoc-35.c: Likewise. * gcc.dg/tree-ssa/reassoc-36.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise. * gcc.dg/tree-ssa/ssa-thread-11.c: Likewise. * gcc.dg/tree-ssa/vrp87.c: Likewise. * lib/target-supports.exp: Likewise. contrib/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config-list.mk: Stop testing mep-elf. libstdc++-v3/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * configure.host: Remove mep-* support. From-SVN: r237666
2016-06-21remove avr-rtems supportTrevor Saunders1-9/+1
contrib/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config-list.mk: Stop testing avr-rtems. libgcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.host: Remove support for avr-rtems. * config/avr/t-rtems: Remove. ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * configure: Regenerate. * configure.ac: Remove support for avr-rtems. gcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.gcc: Remove support for avr-rtems. * config/avr/gen-avr-mmcu-specs.c: Likewise. * config/avr/rtems.h: Remove. * config/avr/t-rtems: Remove. contrib/header-tools/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * README: Remove references to avr-rtems. * reduce-headers: Likewise. From-SVN: r237665
2016-06-21remove m32-rtems supportTrevor Saunders1-5/+0
libgcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.host: Remove m32r-rtems support. gcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.gcc: Remove m32r-rtems support. * config/m32r/rtems.h: Remove. contrib/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config-list.mk: Stop testing m32r-rtems. From-SVN: r237664
2016-06-21remove h8300-rtems supportTrevor Saunders1-5/+0
contrib/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config-list.mk: Remove h8300-rtems support. libgcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.host: Remove h8300-rtems support. gcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.gcc: Remove h8300-rtems support. * config/h8300/rtems.h: Remove. * config/h8300/t-rtems: Remove. From-SVN: r237663
2016-06-21remove knetbsd supportTrevor Saunders1-12/+5
gcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.gcc: Remove support for knetbsd. * configure.ac: Likewise. * config/i386/knetbsd-gnu.h: Remove. * config/i386/knetbsd-gnu64.h: Remove. * config/knetbsd-gnu.h: Remove. * configure: Regenerate. libgcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.host: Remove support for knetbsd. libstdc++-v3/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * configure: Regenerate. * configure.host: Remove support for knetbsd. * crossconfig.m4: Likewise. contrib/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config-list.mk: stop testing knetbsd. From-SVN: r237662
2016-06-21remove support for targeting openbsd 2 or 3Trevor Saunders1-14/+0
contrib/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config-list.mk: Stop testing openbsd3.0. libgcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.host: Remove support for openbsd 2 and 3. gcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.gcc: Remove support for openbsd 2 and 3. * config/openbsd-oldgas.h: Remove. From-SVN: r237661
2016-06-21remove support for the interix targetTrevor Saunders1-15/+1
contrib/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config-list.mk: Remove interix target. libgcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.host: Remove interix support. * config/i386/t-interix: Remove. config/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * elf.m4: Remove interix support. * picflag.m4: Likewise. fixincludes/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * mkfixinc.sh: Remove interix support. gcc/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * config.gcc: Remove interix support. * config/i386/i386-interix.h: Remove. * config/i386/interix.opt: Remove. * config/i386/t-interix: Remove. * configure: Regenerate. * configure.ac: Remove interix support. * doc/install.texi: Remove interix documentation. gcc/testsuite/ChangeLog: 2016-06-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * gcc.dg/attr-ms_struct-1.c: Stop testing interix. * gcc.dg/attr-ms_struct-2.c: Likewise. * gcc.dg/attr-ms_struct-packed1.c: Likewise. * gcc.dg/bf-ms-attrib.c: Likewise. * gcc.dg/bf-ms-layout-2.c: Likewise. * gcc.dg/bf-ms-layout-3.c: Likewise. * gcc.dg/bf-ms-layout.c: Likewise. * gcc.dg/bf-no-ms-layout.c: Likewise. * gcc.target/i386/bitfield1.c: Likewise. * gcc.target/i386/bitfield2.c: Likewise. * gcc.target/i386/bitfield3.c: Likewise. From-SVN: r237660
2016-06-06sparc: support for the SPARC M7 and VIS 4.0Jose E. Marchesi1-1/+1
gcc/ChangeLog: 2016-06-06 Jose E. Marchesi <jose.marchesi@oracle.com> * config/sparc/sparc.md (cpu): Add niagara7 cpu type. Include the M7 SPARC DFA scheduler. New attribute v3pipe. Annotate insns with v3pipe where appropriate. Define cpu_feature vis4. Add lzd instruction type and set it on clzdi_sp64 and clzsi_sp64. Add (V8QI "8") to vbits. Add insns {add,sub}v8qi3 Add insns ss{add,sub}v8qi3 Add insns us{add,sub}{v8qi,v4hi}3 Add insns {min,max}{v8qi,v4hi,v2si}3 Add insns {minu,maxu}{v8qi,v4hi,v2si}3 Add insns fpcmp{le,gt,ule,ug,ule,ugt}{8,16,32}_vis. * config/sparc/niagara4.md: Add a comment explaining the discrepancy between the documented latenty numbers and the implemented ones. * config/sparc/niagara7.md: New file. * configure.ac (HAVE_AS_SPARC5_VIS4): Define if the assembler supports SPARC5 and VIS 4.0 instructions. * configure: Regenerate. * config.in: Likewise. * config.gcc: niagara7 is a supported cpu in sparc*-*-* targets. * config/sparc/sol2.h (ASM_CPU32_DEFAUILT_SPEC): Set for TARGET_CPU_niagara7. (ASM_CPU64_DEFAULT_SPEC): Likewise. (CPP_CPU_SPEC): Handle niagara7. (ASM_CPU_SPEC): Likewise. * config/sparc/sparc-opts.h (processor_type): Add PROCESSOR_NIAGARA7. (mvis4): New option. * config/sparc/sparc.h (TARGET_CPU_niagara7): Define. (AS_NIAGARA7_FLAG): Define. (ASM_CPU64_DEFAULT_SPEC): Set for niagara7. (CPP_CPU64_DEFAULT_SPEC): Likewise. (CPP_CPU_SPEC): Handle niagara7. (ASM_CPU_SPEC): Likewise. * config/sparc/sparc.c (niagara7_costs): Define. (sparc_option_override): Handle niagara7 and adjust cache-related parameters with better values for niagara cpus. Also support VIS4. (sparc32_initialize_trampoline): Likewise. (sparc_use_sched_lookahead): Likewise. (sparc_issue_rate): Likewise. (sparc_register_move_cost): Likewise. (dump_target_flag_bits): Support VIS4. (sparc_vis_init_builtins): Likewise. (sparc_builtins): Likewise. * config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__ for VIS4 4.0. * config/sparc/driver-sparc.c (cpu_names): Add SPARC-M7 and UltraSparc M7. * config/sparc/sparc.opt (sparc_processor_type): New value niagara7. * config/sparc/visintrin.h (__attribute__): Prototypes for the VIS4 builtins. * doc/invoke.texi (SPARC Options): Document -mcpu=niagara7 and -mvis4. * doc/extend.texi (SPARC VIS Built-in Functions): Document the VIS4 builtins. gcc/testsuite/ChangeLog: 2016-06-06 Jose E. Marchesi <jose.marchesi@oracle.com> * gcc.target/sparc/vis4misc.c: New file. * gcc.target/sparc/fpcmp.c: Likewise. * gcc.target/sparc/fpcmpu.c: Likewise. From-SVN: r237132
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