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Age
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Author
Files
Lines
2023-01-02
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2022-12-19
RISC-V: Support VSETVL PASS for RVV support
Ju-Zhe Zhong
1
-1
/
+1
2022-12-18
build: doc: Obsolete Solaris 11.3 support
Rainer Orth
1
-5
/
+16
2022-12-07
gcc: xtensa: allow dynamic configuration
Max Filippov
1
-0
/
+1
2022-11-07
Initial Grand Ridge support
Hu, Lin1
1
-1
/
+1
2022-11-07
Support Intel RAO-INT
konglin1
1
-1
/
+2
2022-11-07
Initial Granite Rapids Support
Haochen Jiang
1
-1
/
+1
2022-11-07
Support Intel prefetchit0/t1
Haochen Jiang
1
-1
/
+1
2022-11-04
Remove support for Intel MIC offloading
Thomas Schwinge
1
-8
/
+0
2022-11-04
Support Intel AMX-FP16 ISA
Hongyu Wang
1
-1
/
+1
2022-11-04
Initial Sierra Forest Support
Haochen Jiang
1
-1
/
+2
2022-11-04
Support Intel CMPccXADD
Haochen Jiang
1
-1
/
+2
2022-10-31
Support Intel AVX-NE-CONVERT
konglin1
1
-1
/
+1
2022-10-29
d: Remove D-specific version definitions from target headers
Iain Buclaw
1
-4
/
+20
2022-10-26
RISC-V: Support load/store in mov<mode> pattern for RVV modes.
Ju-Zhe Zhong
1
-1
/
+1
2022-10-25
MIPS: add builtime option for -mcompact-branches
YunQiang Su
1
-2
/
+11
2022-10-21
Enable AMD znver4 support and add instruction reservations
Tejas Joshi
1
-1
/
+9
2022-10-21
RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.
Ju-Zhe Zhong
1
-1
/
+1
2022-10-21
RISC-V: Add RVV intrinsic basic framework.
Ju-Zhe Zhong
1
-0
/
+2
2022-10-21
Support Intel AVX-VNNI-INT8
Kong Lingling
1
-1
/
+1
2022-10-21
Support Intel AVX-IFMA
Hongyu Wang
1
-1
/
+2
2022-10-19
gcc: Add 'mcf' thread model support from mcfgthread
LIU Hao
1
-0
/
+3
2022-10-17
elf: ELF toolchain --without-{headers, newlib} should provide stdint.h
Arsen Arsenovic
1
-0
/
+5
2022-10-11
Generic configury support for shared libs on VxWorks
Olivier Hainque
1
-0
/
+9
2022-10-09
MIPS: improve -march=native arch detection
YunQiang Su
1
-0
/
+2
2022-10-05
RISC-V: Introduce RVV header to enable builtin types
Ju-Zhe Zhong
1
-0
/
+1
2022-10-02
Define GCC_DRIVER_HOST_INITIALIZATION for VxWorks targets
Marc Poulhiès
1
-0
/
+2
2022-09-29
aarch64: Small config.gcc cleanups
Richard Sandiford
1
-8
/
+0
2022-09-29
RISC-V: Add ABI-defined RVV types.
Ju-Zhe Zhong
1
-0
/
+1
2022-09-26
nvptx: Allow '--with-arch' to override the default '-misa'
Thomas Schwinge
1
-0
/
+5
2022-09-26
nvptx: Introduce dummy multilib option for default '-misa=sm_30'
Thomas Schwinge
1
-0
/
+1
2022-09-26
nvptx: Make default '-misa=sm_30' explicit
Thomas Schwinge
1
-0
/
+16
2022-09-23
RISC-V: Support poly move manipulation and selftests.
zhongjuzhe
1
-1
/
+1
2022-09-02
d: Fix #error You must define PREFERRED_DEBUGGING_TYPE if DWARF is not supported
Iain Buclaw
1
-4
/
+6
2022-09-02
STABS: remove -gstabs and -gxcoff functionality
Martin Liska
1
-116
/
+116
2022-08-31
32-bit PA-RISC with HP-UX: remove deprecated ports
Martin Liska
1
-82
/
+3
2022-08-31
cr16: remove leftover in config.gcc
Martin Liska
1
-7
/
+1
2022-08-30
m32c-rtems: remove obsoleted port
Martin Liska
1
-6
/
+0
2022-08-17
arm: Define with_float to hard when target name ends with hf
Christophe Lyon
1
-0
/
+7
2022-06-25
Remove long deprecated tilegx and tilepro ports
Jeff Law
1
-29
/
+1
2022-05-24
amdgcn: Add gfx90a support
Andrew Stubbs
1
-1
/
+1
2022-05-23
[x86_64]: Zhaoxin lujiazui enablement
Mayshao
1
-1
/
+9
2022-05-20
AArch64: Cleanup CPU option processing code
Wilco Dijkstra
1
-42
/
+1
2022-04-12
IBM zSystems: Add support for z16 as CPU name.
Andreas Krebbel
1
-1
/
+1
2022-04-11
RISC-V: Support -misa-spec for arch-canonicalize and multilib-generator. [PR1...
Kito Cheng
1
-1
/
+2
2022-04-08
aarch64: PR target/105157 Increase number of cores TARGET_CPU_DEFAULT can encode
Andre Vieira
1
-1
/
+1
2022-03-29
LoongArch Port: gcc build
chenglulu
1
-1
/
+434
2022-03-01
[nvptx] Add nvptx-gen.h and nvptx-gen.opt
Tom de Vries
1
-0
/
+1
2022-02-05
RISC-V: Always pass -misa-spec to assembler [PR104219]
Kito Cheng
1
-1
/
+3
2022-02-03
rs6000: Consolidate target built-ins code
Bill Schmidt
1
-1
/
+1
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