Age | Commit message (Collapse) | Author | Files | Lines |
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* config.gcc: Identify FreeBSD 3.x and 4.x as unsupported.
* config/freebsd-spec.h (FBSD_LIB_SPEC): Only consider FreeBSD 5
and later.
From-SVN: r260852
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We used to build baremetal (AKA Elf32) multilibbed toolchains for years
now but never made that for Linux targets since there were problems with
uClibc n multilib setup. Now with help of Crosstool-NG it is finally
possible to create uClibc-based multilibbed toolchains and so we add
relevant CPUs for multilib in case of configuration for "arc*-*-linux*".
This will be essentially useful for glibc-based multilibbbed toolchains
in the future.
gcc/
2018-05-16 Alexey Brodkin <abrodkin@synopsys.com>
* config.gcc: Add arc/t-multilib-linux to tmake_file for
arc*-*-linux*.
* config/arc/t-multilib-linux: Specify MULTILIB_OPTIONS and
MULTILIB_DIRNAMES
From-SVN: r260434
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Kito Cheng <kito.cheng@gmail.com>
Monk Chiang <sh.chiang04@gmail.com>
gcc/
* common/config/riscv/riscv-common.c (riscv_parse_arch_string):
Add support to parse rv32e*. Clear MASK_RVE for rv32i and rv64i.
* config.gcc (riscv*-*-*): Add support for rv32e* and ilp32e.
* config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define
__riscv_32e when TARGET_RVE. Handle ABI_ILP32E as soft-float ABI.
* config/riscv/riscv-opts.h (riscv_abi_type): Add ABI_ILP32E.
* config/riscv/riscv.c (riscv_compute_frame_info): When TARGET_RVE,
compute save_libcall_adjustment properly.
(riscv_option_override): Call error if TARGET_RVE and not ABI_ILP32E.
(riscv_conditional_register_usage): Handle TARGET_RVE and ABI_ILP32E.
* config/riscv/riscv.h (UNITS_PER_FP_ARG): Handle ABI_ILP32E.
(STACK_BOUNDARY, ABI_STACK_BOUNDARY): Handle TARGET_RVE.
(GP_REG_LAST, MAX_ARGS_IN_REGISTERS): Likewise.
(ABI_SPEC): Handle mabi=ilp32e.
* config/riscv/riscv.opt (abi_type): Add ABI_ILP32E.
(RVE): Add RVE mask.
* doc/invoke.texi (RISC-V options) <-mabi>: Add ilp32e info.
<-march>: Add rv32e as an example.
gcc/testsuite/
* gcc.dg/stack-usage-1.c: Add support for rv32e.
libgcc/
* config/riscv/save-restore.S: Add support for rv32e.
Co-Authored-By: Jim Wilson <jimw@sifive.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>
From-SVN: r260384
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2018-05-17 Olga Makhotina <olga.makhotina@intel.com>
gcc/
* config.gcc: Support "goldmont-plus".
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
"goldmont-plus".
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
PROCESSOR_GOLDMONT_PLUS.
* config/i386/i386.c (m_GOLDMONT_PLUS): Define.
(processor_target_table): Add "goldmont-plus".
(PTA_GOLDMONT_PLUS): Define.
(ix86_lea_outperforms): Add TARGET_GOLDMONT_PLUS.
(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT_PLUS.
(fold_builtin_cpu): Add M_INTEL_GOLDMONT_PLUS.
(fold_builtin_cpu): Add "goldmont-plus".
(ix86_add_stmt_cost): Add TARGET_GOLDMONT_PLUS.
(ix86_option_override_internal): Add "goldmont-plus".
* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT_PLUS.
(processor_type): Add PROCESSOR_GOLDMONT_PLUS.
* config/i386/x86-tune.def: Add m_GOLDMONT_PLUS.
* doc/invoke.texi: Add goldmont-plus as x86 -march=/-mtune= CPU type.
libgcc/
* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT_PLUS.
* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont Plus.
gcc/testsuite/
* gcc.target/i386/builtin_target.c: Test goldmont-plus.
* gcc.target/i386/funcspec-56.inc: Test arch=goldmont-plus.
From-SVN: r260307
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2018-05-14 Sebastian Peryt <sebastian.peryt@intel.com>
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_CLDEMOTE_SET,
OPTION_MASK_ISA_CLDEMOTE_UNSET): New defines.
(ix86_handle_option): Handle -mcldemote.
* config.gcc: New header.
* config/i386/cldemoteintrin.h: New file.
* config/i386/cpuid.h (bit_CLDEMOTE): New bit.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
-mcldemote.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_CLDEMOTE.
* config/i386/i386.c (ix86_target_string): Add -mcldemote.
(ix86_valid_target_attribute_inner_p): Ditto.
(enum ix86_builtins): Add IX86_BUILTIN_CLDEMOTE.
(ix86_init_mmx_sse_builtins): Define __builtin_ia32_cldemote.
(ix86_expand_builtin): Expand IX86_BUILTIN_CLDEMOTE.
* config/i386/i386.h (TARGET_CLDEMOTE, TARGET_CLDEMOTE_P): New.
* config/i386/i386.md (UNSPECV_CLDEMOTE): New.
(cldemote): New.
* config/i386/i386.opt: Add -mcldemote.
* config/i386/x86intrin.h: New header.
* doc/invoke.texi: Add -mcldemote.
gcc/testsuite/
* gcc.target/i386/cldemote-1.c: New test.
From-SVN: r260224
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gcc/
* config.gcc (nds32*-*-*): Check that n15 is valid to --with-cpu.
* config/nds32/nds32-graywolf.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_GRAYWOLF.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n15
pipeline.
* config/nds32/nds32-protos.h: More declarations for n15 pipeline.
* config/nds32/nds32-utils.c: More implementations for n15 pipeline.
* config/nds32/nds32.md (pipeline_model): Add graywolf.
* config/nds32/nds32.opt (mcpu): Support n15 pipeline cpus.
* config/nds32/pipelines.md: Include n15 settings.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r260214
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gcc/
* config.gcc (nds32*-*-*): Check that n12/n13 are valid to --with-cpu.
* config/nds32/nds32-n13.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N12 and CPU_N13.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n12/n13
pipeline.
* config/nds32/nds32-protos.h: More declarations for n12/n13 pipeline.
* config/nds32/nds32.md (pipeline_model): Add n13.
* config/nds32/nds32.opt (mcpu): Support n12/n13 pipeline cpus.
* config/nds32/pipelines.md: Include n13 settings.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r260212
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gcc/
* config.gcc (nds32*-*-*): Check that n10/d10 are valid to --with-cpu.
* config/nds32/nds32-n10.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N10.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n10
pipeline.
* config/nds32/nds32-protos.h: More declarations for n10 pipeline.
* config/nds32/nds32-utils.c: More implementations for n10 pipeline.
* config/nds32/nds32.md (pipeline_model): Add n10.
* config/nds32/nds32.opt (mcpu): Support n10 pipeline cpus.
* config/nds32/pipelines.md: Include n10 settings.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r260207
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gcc/
* config.gcc (nds32be-*-*): Handle --with-ext-dsp.
* config/nds32/constants.md (unspec_element, unspec_volatile_element):
Add enum values for DSP extension instructions.
* config/nds32/constraints.md (Iu06, IU06, CVp5, CVs5, CVs2, CVhi):
New constraints.
* config/nds32/iterators.md (shifts, shiftrt, sat_plus, all_plus,
sat_minus, all_minus, plus_minus, extend, sumax, sumin, sumin_max):
New code iterators.
(su, zs, uk, opcode, add_rsub, add_sub): New code attributes.
* config/nds32/nds32-dspext.md: New file for DSP implementation.
* config/nds32/nds32-intrinsic.c: Implementation of DSP extension.
* config/nds32/nds32-intrinsic.md: Likewise.
* config/nds32/nds32_intrinsic.h: Likewise.
* config/nds32/nds32-md-auxiliary.c: Likewise.
* config/nds32/nds32-memory-manipulation.c: Consider DSP extension.
* config/nds32/nds32-predicates.c (const_vector_to_hwint): New.
(nds32_valid_CVp5_p, nds32_valid_CVs5_p): New.
(nds32_valid_CVs2_p, nds32_valid_CVhi_p): New.
* config/nds32/nds32-protos.h: New declarations for DSP extension.
* config/nds32/nds32-utils.c (extract_mac_non_acc_rtx): New case
TYPE_DMAC in switch statement.
* config/nds32/nds32.c: New checking and implementation for DSP
extension instructions.
* config/nds32/nds32.h: Likewise.
* config/nds32/nds32.md: Likewise.
* config/nds32/nds32.opt (mhw-abs, mext-dsp): New options.
* config/nds32/predicates.md: Implement new predicates for DSP
extension.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
From-SVN: r260206
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2018-05-11 Sebastian Peryt <sebastian.peryt@intel.com>
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_WAITPKG_SET,
OPTION_MASK_ISA_WAITPKG_UNSET): New defines.
(ix86_handle_option): Handle -mwaitpkg.
* config.gcc: New header.
* config/i386/cpuid.h (bit_WAITPKG): New bit.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect -mwaitpkg.
* config/i386/i386-builtin-types.def ((UINT8, UNSIGNED, UINT64)): New
function type.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_WAITPKG.
* config/i386/i386.c (ix86_target_string): Add -mwaitpkg.
(ix86_option_override_internal): Add PTA_WAITPKG.
(ix86_valid_target_attribute_inner_p): Add -mwaitpkg.
(enum ix86_builtins): Add IX86_BUILTIN_UMONITOR, IX86_BUILTIN_UMWAIT,
IX86_BUILTIN_TPAUSE.
(ix86_init_mmx_sse_builtins): Define __builtin_ia32_umonitor,
__builtin_ia32_umwait and __builtin_ia32_tpause.
(ix86_expand_builtin): Expand IX86_BUILTIN_UMONITOR,
IX86_BUILTIN_UMWAIT, IX86_BUILTIN_TPAUSE.
* config/i386/i386.h (TARGET_WAITPKG, TARGET_WAITPKG_P): New.
* config/i386/i386.md (UNSPECV_UMWAIT, UNSPECV_UMONITOR,
UNSPECV_TPAUSE): New.
(umwait, umwait_rex64, umonitor_<mode>, tpause, tpause_rex64): New.
* config/i386/i386.opt: Add -mwaitpkg.
* config/i386/waitpkgintrin.h: New file.
* config/i386/x86intrin.h: New header.
* doc/invoke.texi: Add -mwaitpkg.
gcc/testsuite/
* gcc.target/i386/tpause-1.c: New test.
* gcc.target/i386/umonitor-1.c: New test.
From-SVN: r260161
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gcc/
PR target/84797
* config.gcc (riscv*-*-*): Handle --with-multilib-list.
* config/riscv/t-withmultilib: New.
* config/riscv/withmultilib.h: New.
* doc/install.texi: Document RISC-V --with-multilib-list support.
From-SVN: r260096
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2018-05-08 Olga Makhotina <olga.makhotina@intel.com>
gcc/
* config.gcc: Support "goldmont".
* config/i386/driver-i386.c (host_detect_local_cpu): Detect "goldmont".
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
PROCESSOR_GOLDMONT.
* config/i386/i386.c (m_GOLDMONT): Define.
(processor_target_table): Add "goldmont".
(PTA_GOLDMONT): Define.
(ix86_lea_outperforms): Add TARGET_GOLDMONT.
(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT.
(fold_builtin_cpu): Add M_INTEL_GOLDMONT.
(fold_builtin_cpu): Add "goldmont".
(ix86_add_stmt_cost): Add TARGET_GOLDMONT.
(ix86_option_override_internal): Add "goldmont".
* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT.
(processor_type): Add PROCESSOR_GOLDMONT.
* config/i386/i386.md: Add CPU "glm".
* config/i386/glm.md: New file.
* config/i386/x86-tune.def: Add m_GOLDMONT.
* doc/invoke.texi: Add goldmont as x86 -march=/-mtune= CPU type.
libgcc/
* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT.
* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont.
gcc/testsuite/
* gcc.target/i386/builtin_target.c: Test goldmont.
* gcc.target/i386/funcspec-56.inc: Tests for arch=goldmont and
arch=silvermont.
From-SVN: r260042
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This removes the special Xilinx FP support. It was deprecated in
GCC 8.
After this patch all of TARGET_{DOUBLE,SINGLE}_FLOAT,
TARGET_{DF,SF}_INSN, and TARGET_{DF,SF}_FPR are replaced by
TARGET_HARD_FLOAT. Also the fp_type attribute is deleted.
* common/config/rs6000/rs6000-common.c (rs6000_handle_option): Remove
Xilinx FP support.
* config.gcc (powerpc-xilinx-eabi*): Remove.
* config/rs6000/predicates.md (easy_fp_constant): Remove Xilinx FP
support.
(fusion_addis_mem_combo_load): Ditto.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Remove Xilinx
FP support.
(rs6000_cpu_cpp_builtins): Ditto.
* config/rs6000/rs6000-linux.c
(rs6000_linux_float_exceptions_rounding_supported_p): Ditto.
* config/rs6000/rs6000-opts.h (enum fpu_type_t): Delete.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Remove Xilinx FP
support.
(rs6000_setup_reg_addr_masks): Ditto.
(rs6000_init_hard_regno_mode_ok): Ditto.
(rs6000_option_override_internal): Ditto.
(legitimate_lo_sum_address_p): Ditto.
(rs6000_legitimize_address): Ditto.
(rs6000_legitimize_reload_address): Ditto.
(rs6000_legitimate_address_p): Ditto.
(abi_v4_pass_in_fpr): Ditto.
(setup_incoming_varargs): Ditto.
(rs6000_gimplify_va_arg): Ditto.
(rs6000_split_multireg_move): Ditto.
(rs6000_savres_strategy): Ditto.
(rs6000_emit_prologue_components): Ditto.
(rs6000_emit_epilogue_components): Ditto.
(rs6000_emit_prologue): Ditto.
(rs6000_emit_epilogue): Ditto.
(rs6000_elf_file_end): Ditto.
(rs6000_function_value): Ditto.
(rs6000_libcall_value): Ditto.
* config/rs6000/rs6000.h: Ditto.
(TARGET_MINMAX_SF, TARGET_MINMAX_DF): Delete, merge to ...
(TARGET_MINMAX): ... this. New.
(TARGET_SF_FPR, TARGET_DF_FPR, TARGET_SF_INSN, TARGET_DF_INSN): Delete.
* config/rs6000/rs6000.md: Remove Xilinx FP support.
(*movsi_internal1_single): Delete.
* config/rs6000/rs6000.opt (msingle-float, mdouble-float, msimple-fpu,
mfpu=, mxilinx-fpu): Delete.
* config/rs6000/singlefp.h: Delete.
* config/rs6000/sysv4.h: Remove Xilinx FP support.
* config/rs6000/t-rs6000: Ditto.
* config/rs6000/t-xilinx: Delete.
* gcc/config/rs6000/titan.md: Adjust for fp_type removal.
* gcc/config/rs6000/vsx.md: Remove Xilinx FP support.
(VStype_simple): Delete.
(VSfptype_simple, VSfptype_mul, VSfptype_div, VSfptype_sqrt): Delete.
* config/rs6000/xfpu.h: Delete.
* config/rs6000/xfpu.md: Delete.
* config/rs6000/xilinx.h: Delete.
* config/rs6000/xilinx.opt: Delete.
* gcc/doc/invoke.texi (RS/6000 and PowerPC Options): Remove
-msingle-float, -mdouble-float, -msimple-fpu, -mfpu=, and -mxilinx-fpu.
From-SVN: r259929
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This removes paired single (used on the 750CL and friends). It was
deprecated in GCC 8. Removing it means we only have one vector model
to deal with (VMX+VSX, 16-byte vectors).
* config.gcc (powerpc*-*-*): Remove paired.h. Unsupport the
powerpc*-*-linux*paired* target.
* config/rs6000/750cl.h: Delete.
* config/rs6000/paired.h: Delete.
* config/rs6000/paired.md: Delete.
* config/rs6000/predicates.md (easy_vector_constant): Remove paired
float support.
* config/rs6000/rs6000-builtin.def: Remove paired float support.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Update
comment. Remove paired float support.
* config/rs6000/rs6000-modes.def: Remove V2SF and V2SI.
* config/rs6000/rs6000-opts.h (enum rs6000_vector): Delete
VECTOR_PAIRED.
* config/rs6000/rs6000-protos.h (paired_expand_vector_init,
paired_emit_vector_cond_expr, paired_expand_vector_move): Delete
declarations.
* config/rs6000/rs6000.c: Remove paired float support.
(paired_expand_vector_init, paired_expand_vector_move,
paired_emit_vector_compare, paired_emit_vector_cond_expr,
(paired_expand_lv_builtin, paired_expand_stv_builtin,
paired_expand_builtin, paired_expand_predicate_builtin,
paired_init_builtins): Delete.
* config/rs6000/rs6000.h: Remove paired float support.
* config/rs6000/rs6000.md: Remove paired float support.
(move_from_CR_ov_bit): Delete.
* config/rs6000/rs6000.opt (mpaired): Delete.
* config/rs6000/t-rs6000: Remove paired.md from MD_INCLUDES.
* doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mpaired.
From-SVN: r259833
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From-SVN: r259724
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2018-04-19 Sebastian Peryt <sebastian.peryt@intel.com>
gcc/
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_MOVDIRI_SET, OPTION_MASK_ISA_MOVDIR64B_SET,
OPTION_MASK_ISA_MOVDIRI_UNSET,
OPTION_MASK_ISA_MOVDIR64B_UNSET): New defines.
(ix86_handle_option): Handle -mmovdiri and -mmovdir64b.
* config.gcc (movdirintrin.h): New header.
* config/i386/cpuid.h (bit_MOVDIRI,
bit_MOVDIR64B): New bits.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect -mmovdiri
and -mmvodir64b.
* config/i386/i386-builtin-types.def ((VOID, PUNSIGNED, UNSIGNED),
(VOID, PVOID, PCVOID)): New function types.
* config/i386/i386-builtin.def (__builtin_ia32_directstoreu_u32,
__builtin_ia32_directstoreu_u64,
__builtin_ia32_movdir64b): New builtins.
* config/i386/i386-c.c (__MOVDIRI__, __MOVDIR64B__): New.
* config/i386/i386.c (ix86_target_string): Added -mmovdir64b
and -mmovdiri.
(ix86_valid_target_attribute_inner_p): Ditto.
(ix86_expand_special_args_builtin): Added VOID_FTYPE_PUNSIGNED_UNSIGNED
and VOID_FTYPE_PUNSIGNED_UNSIGNED.
(ix86_expand_builtin): Expand IX86_BUILTIN_MOVDIR64B.
* config/i386/i386.h (TARGET_MOVDIRI, TARGET_MOVDIRI_P,
TARGET_MOVDIR64B, TARGET_MOVDIR64B_P): New.
* config/i386/i386.md (UNSPECV_MOVDIRI, UNSPECV_MOVDIR64B): New.
(movdiri<mode>, movdir64b_<mode>): New.
* config/i386/i386.opt: Add -mmovdiri and -mmovdir64b.
* config/i386/immintrin.h: Include movdirintrin.h.
* config/i386/movdirintrin.h: New file.
* doc/invoke.texi: Added -mmovdiri and -mmovdir64b.
gcc/testsuite/
* gcc.target/i386/movdir-1.c: New test.
From-SVN: r259495
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command-line options not related to SPE)
PR target/81084
* config.gcc: Obsolete powerpc*-*-*spe*.
From-SVN: r259461
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gcc/
PR target/84331
* gcc/config.gcc: Support "skylake".
* gcc/config/i386/i386-c.c (ix86_target_macros_internal): Handle
PROCESSOR_SKYLAKE.
* gcc/config/i386/i386.c (m_SKYLAKE): Define.
(processor_target_table): Add "skylake".
(ix86_option_override_internal): Add "skylake".
(get_builtin_code_for_version): Handle PROCESSOR_SKYLAKE,
PROCESSOR_CANNONLAKE.
(get_builtin_code_for_version): Fix priority for
PROCESSOR_ICELAKE_CLIENT, PROCESSOR_ICELAKE_SERVER,
PROCESSOR_SKYLAKE-AVX512.
* gcc/config/i386/i386.h (processor_costs): Define TARGET_SKYLAKE.
(processor_type): Add PROCESSOR_SKYLAKE.
gcc/testsuite/
PR target/84331
* gcc/testsuite/gcc.target/i386/funcspec-56.inc: Test arch=skylake.
From-SVN: r259399
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gcc/
* config.gcc (nds32le-*-*, nds32be-*-*): Add nds32/nds32_intrinsic.h
into tm_file.
* config/nds32/constants.md (unspec_volatile_element): Add enum values
for interrupt control.
* config/nds32/nds32-intrinsic.c: Implementation of intrinsic
functions for interrupt control.
* config/nds32/nds32-intrinsic.md: Likewise.
* config/nds32/nds32_intrinsic.h: Likewise.
* config/nds32/nds32.h (nds32_builtins): Likewise.
From-SVN: r259223
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gcc/
* config.gcc (nds32*-*-*): Check that n7 is valid to --with-cpu.
* config/nds32/nds32-n7.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N7.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n7
pipeline.
* config/nds32/nds32-protos.h: More declarations for n7 pipeline.
* config/nds32/nds32.md (pipeline_model): Add n7.
* config/nds32/nds32.opt (mcpu): Support n7 pipeline cpus.
* config/nds32/pipelines.md: Include n7 settings.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r259221
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gcc/
* config.gcc (nds32*-*-*): Check that e8 is valid to --with-cpu.
* config/nds32/nds32-e8.md: New file.
* config/nds32/nds32-opts.h (nds32-cpu_type): Add CPU_E8.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for e8
pipeline.
* config/nds32/nds32-protos.h: More declarations for e8 pipeline.
* config/nds32/nds32.md (pipeline_model): Add e8.
* config/nds32/nds32.opt (mcpu): Support e8 pipeline cpus.
* config/nds32/pipelines.md: Include e8 settings.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r259220
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|
gcc/
* config.gcc (nds32*-*-*): Check that n6/n8/s8 are valid to --with-cpu.
* config/nds32/nds32-n8.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N6 and CPU_N8.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n8
pipeline.
* config/nds32/nds32-protos.h: More declarations for n8 pipeline.
* config/nds32/nds32-utils.c: More implementations for n8 pipeline.
* config/nds32/nds32.md (pipeline_model): Add n8.
* config/nds32/nds32.opt (mcpu): Support n8 pipeline cpus.
* config/nds32/pipelines.md: Include n8 settings.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r259219
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|
gcc/
* config.gcc (nds32*): Add nds32-utils.o into extra_objs.
* config/nds32/nds32-n9-2r1w.md: New file.
* config/nds32/nds32-n9-3r2w.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type, nds32_mul_type,
nds32_register_ports): New or modify for cpu n9.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n9
pipeline.
* config/nds32/nds32-protos.h: More declarations for n9 pipeline.
* config/nds32/nds32-utils.c: New file.
* config/nds32/nds32.h (TARGET_PIPELINE_N9, TARGET_PIPELINE_SIMPLE,
TARGET_MUL_SLOW): Define.
* config/nds32/nds32.md (pipeline_model): New attribute.
* config/nds32/nds32.opt (mcpu, mconfig-mul, mconfig-register-ports):
New options that support cpu n9.
* config/nds32/pipelines.md: Include n9 settings.
* config/nds32/t-nds32 (nds32-utils.o): Add dependency.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r259218
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2018-04-06 Amaan Cheval <amaan.cheval@gmail.com>
* config.gcc (x86_64-*-rtems*): Add rtems.h to tm_file for
custom LIB_SPEC setup.
From-SVN: r259192
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|
gcc/
* config.gcc (riscv*-*-freebsd*): Add RISC-V FreeBSD support.
* config/riscv/freebsd.h: New.
libgcc/
* config.host (riscv*-*-freebsd*): Add RISC-V FreeBSD support.
From-SVN: r259190
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gcc/
* config.gcc (nds32*-*-*): Add v2j v3f v3s checking.
(nds32*-*-*): Add float and fpu_config into supported_defaults.
* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS):
Include TARGET_DEFAULT_FPU_ISA and TARGET_DEFAULT_FPU_FMA.
* config/nds32/constants.md (unspec_element): Add UNSPEC_COPYSIGN,
UNSPEC_FCPYNSD, UNSPEC_FCPYNSS, UNSPEC_FCPYSD and UNSPEC_FCPYSS.
* config/nds32/constraints.md: New constraints and checking for hard
float configuration.
* config/nds32/iterators.md: New mode iterator and attribute for hard
float configuration.
* config/nds32/nds32-doubleword.md: Use hard float alternatives and
patterns.
* config/nds32/nds32-fpu.md: New file.
* config/nds32/nds32-md-auxiliary.c: New functions and checkings to
deal with hard float code generation.
* config/nds32/nds32-opts.h (nds32_arch_type): Add ARCH_V3F and
ARCH_V3S.
(abi_type, float_reg_number): New enum type.
* config/nds32/nds32-predicates.c: New predicates for hard float.
* config/nds32/nds32-protos.h: Declare functions for hard float.
* config/nds32/nds32.c: Implementation for hard float configuration.
* config/nds32/nds32.h: Definitions for hard float configuration.
* config/nds32/nds32.md: Include hard float machine description and
modify patterns for hard float configuration.
* config/nds32/nds32.opt: New options for hard float configuration.
* config/nds32/predicates.md: New predicates for hard float
configuration.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r259161
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gcc/
* config.gcc (nds32): Add nds32-relax-opt.o into extra_objs.
* config/nds32/constants.md (unspec_volatile_element): Add
UNSPEC_VOLATILE_RELAX_GROUP.
* config/nds32/nds32-relax-opt.c: New file.
* config/nds32/nds32-predicates.c
(nds32_symbol_load_store_p): New function.
* config/nds32/nds32-protos.h
(nds32_symbol_load_store_p): Declare function.
(make_pass_nds32_relax_opt): Declare new rtl pass function.
* config/nds32/nds32.c
(nds32_register_pass): New function to register pass.
(nds32_register_passes): New function to register passes.
* config/nds32/nds32.md (relax_group): New pattern.
* config/nds32/nds32.opt (mrelax-hint): New option.
* config/nds32/t-nds32 (nds32-relax-opt.o): New dependency.
Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
Co-Authored-By: Kuan-Lin Chen <kuanlinchentw@gmail.com>
From-SVN: r258998
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default
2018-03-27 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config.gcc (aarch64*-*-linux*): New TARGET_DEFAULT_ASYNC_UNWIND_TABLES
* common/config/aarch64/aarch64-common.c (aarch64_optimization_table[]):
Turn on fasynchronous-unwind-tables and funwind-tables.
From-SVN: r258871
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Split-up -march=icelake on -march=icelake-server and -march=icelake-client
gcc/
* config.gcc (icelake-client, icelake-server): New.
(icelake): Remove.
* config/i386/i386.c (initial_ix86_tune_features): Extend to 64 bit.
(initial_ix86_arch_features): Ditto.
(PTA_SKYLAKE): Add SGX.
(PTA_ICELAKE): Remove.
(PTA_ICELAKE_CLIENT): New.
(PTA_ICELAKE_SERVER): New.
(ix86_option_override_internal): Split up icelake on icelake client and
icelake server.
(get_builtin_code_for_version): Ditto.
(fold_builtin_cpu): Ditto.
* config/i386/driver-i386.c (config/i386/driver-i386.c): Ditto.
* config/i386/i386-c.c (ix86_target_macros_internal): Ditto
* config/i386/i386.h (processor_type): Ditto.
* doc/invoke.texi: Ditto.
gcc/testsuite/
* g++.dg/ext/mv16.C: Split up icelake on icelake client and
icelake-server.
* gcc.target/i386/funcspec-56.inc: Ditto.
libgcc/
* config/i386/cpuinfo.h (processor_subtypes): Split up icelake on
icelake-client and icelake-server.
From-SVN: r258518
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2018-03-05 Olga Makhotina <olga.makhotina@intel.com>
Enable WBOINVD and PCONFIG instructions.
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PCONFIG_SET,
OPTION_MASK_ISA_PCONFIG_UNSET, OPTION_MASK_ISA_WBNOINVD_SET,
OPTION_MASK_ISA_WBNOINVD_UNSET): New definitions.
(ix86_handle_option): Handle -mpconfig and -mwbnoinvd.
* config.gcc (pconfigintrin.h, wbnoinvdintrin.h) : Add headers.
* config/i386/cpuid.h (bit_PCONFIG, bit_WBNOINVD): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect -mpconfig
and -mwbnoinvd.
* config/i386/i386-builtin.def (__builtin_ia32_wbnoinvd,
__builtin_ia32_wbinvd): New builtins.
(SPECIAL_ARGS2): New.
* config/i386/i386-c.c (__WBNOINVD__, __PCONFIG__): New.
(SPECIAL_ARGS2): New.
* config/i386/i386.c (ix86_target_string): Add -mpconfig and -mwbnoinvd.
(ix86_valid_target_attribute_inner_p): Ditto.
(ix86_init_mmx_sse_builtins): Add special_args2.
* config/i386/i386.h (TARGET_PCONFIG, TARGET_PCONFIG_P, TARGET_WBNOINVD,
TARGET_WBNOINVD_P): New.
* config/i386/i386.md (UNSPECV_WBINVD, UNSPECV_WBNOINVD): New.
(define_insn "wbinvd", define_insn "wbnoinvd"): New.
* config/i386/i386.opt: Add -mpconfig and -mwbnoinvd.
* config/i386/immintrin.h (_wbinvd): New intrinsic.
* config/i386/pconfigintrin.h: New file.
* config/i386/wbnoinvdintrin.h: Ditto.
* config/i386/x86intrin.h: Add headers pconfigintrin.h and wbnoinvdintrin.h.
* doc/invoke.texi (-mpconfig, -mwbnoinvd): New.
gcc/testsuite/
* g++.dg/other/i386-2.C: Add -mpconfig and -mwbnoinvd.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/sse-12.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-23.c: Add pconfig and wbnoinvd.
* gcc.target/i386/wbinvd-1.c: New test.
* gcc.target/i386/wbnoinvd-1.c: Ditto.
* gcc.target/i386/pconfig-1.c: Ditto.
From-SVN: r258247
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* config.gcc (powerpc-ibm-aix7.1.*): New stanza.
(powerpc-ibm-aix[789]*): Default to AIX 7.2.
* config/rs6000/aix71.h (TARGET_DEFAULT): Revert to Power4 ISA.
* config/rs6000/aix72.h: New file.
From-SVN: r258082
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gcc/
* config.gcc: Add --with-cpu support for nds32 target.
* config/nds32/nds32-opts.h(nds32_cpu_type): New.
* config/nds32/nds32.opt: Add -mcpu= option.
From-SVN: r257982
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gcc/
* config.gcc: Add -march=icelake.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect icelake.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle icelake.
* config/i386/i386.c (processor_costs): Add m_ICELAKE.
(PTA_ICELAKE, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES, PTA_AVX512VBMI2,
PTA_VPCLMULQDQ, PTA_RDPID, PTA_AVX512BITALG): New.
(processor_target_table): Add icelake.
(ix86_option_override_internal): Handle new PTAs.
(get_builtin_code_for_version): Handle icelake.
(M_INTEL_COREI7_ICELAKE): New.
(fold_builtin_cpu): Handle icelake.
* config/i386/i386.h (TARGET_ICELAKE, PROCESSOR_ICELAKE): New.
* doc/invoke.texi: Add -march=icelake.
gcc/testsuite/
* gcc.target/i386/funcspec-56.inc: Handle new march.
* g++.dg/ext/mv16.C: Ditto.
libgcc/
* config/i386/cpuinfo.h (processor_subtypes): Add INTEL_COREI7_ICELAKE.
From-SVN: r257331
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systems to optionally enable...
2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
* config.gcc (powerpc*-linux*-*): Add support for 64-bit little
endian Linux systems to optionally enable multilibs for selecting
the long double type if the user configured an explicit type.
* config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
have no long double multilibs if not defined.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
warn if the user used -mabi={ieee,ibm}longdouble and we built
multilibs for long double.
* config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
appropriate multilib option.
(MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
multilib options.
* config/rs6000/t-ldouble-linux64le-ibm: New configuration files
for building long double multilibs.
* config/rs6000/t-ldouble-linux64le-ieee: Likewise.
From-SVN: r256775
|
|
* config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
copies.
From-SVN: r256774
|
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extra_headers.
* config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
entry from extra_headers.
(x86_64-*-*): Remove two duplicate gfniintrin.h entries from
extra_headers, make the list bitwise identical to the i?86-*-* one.
From-SVN: r256667
|
|
2018-01-12 Tom de Vries <tom@codesourcery.com>
PR target/83737
* config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
From-SVN: r256591
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option to change the default long double...
2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
* configure.ac (--with-long-double-format): Add support for the
configuration option to change the default long double format on
PowerPC systems.
* config.gcc (powerpc*-linux*-*): Likewise.
* configure: Regenerate.
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
used without modification.
From-SVN: r256558
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gcc/
* config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
* config/epiphany/rtems.h: New file.
libgcc/
* config.host (epiphany-*-elf*): Add (epiphany-*-rtems*)
configuration.
From-SVN: r256273
|
|
From-SVN: r256169
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gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512BITALG_SET,
OPTION_MASK_ISA_AVX512BITALG_UNSET): New.
(ix86_handle_option): Handle -mavx512bitalg, fix 4VNNIW formatting.
* config.gcc: Add avx512vpopcntdqvlintrin.h and avx512bitalgintrin.h.
* config/i386/avx512bitalgintrin.h (_mm512_popcnt_epi8, _mm512_popcnt_epi16,
_mm512_mask_popcnt_epi8, _mm512_maskz_popcnt_epi8, _mm512_mask_popcnt_epi16,
_mm512_maskz_popcnt_epi16, _mm512_bitshuffle_epi64_mask, _mm256_popcnt_epi8,
_mm512_mask_bitshuffle_epi64_mask, _mm256_mask_popcnt_epi8, _mm_popcnt_epi8,
_mm256_maskz_popcnt_epi8, _mm_bitshuffle_epi64_mask, _mm256_popcnt_epi16,
_mm_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
_mm256_mask_bitshuffle_epi64_mask, _mm_popcnt_epi16, _mm_maskz_popcnt_epi8,
_mm256_mask_popcnt_epi16, _mm256_maskz_popcnt_epi16, _mm_mask_popcnt_epi8,
_mm_mask_popcnt_epi16, _mm_maskz_popcnt_epi16): New intrinsics.
* config/i386/avx512vpopcntdqvlintrin.h (_mm_popcnt_epi32, _mm_popcnt_epi64,
_mm_mask_popcnt_epi32, _mm_maskz_popcnt_epi32, _mm256_popcnt_epi32,
_mm256_mask_popcnt_epi32, _mm256_maskz_popcnt_epi32, _mm_mask_popcnt_epi64,
_mm_maskz_popcnt_epi64, _mm256_popcnt_epi64, _mm256_mask_popcnt_epi64,
_mm256_maskz_popcnt_epi64): New intrinsics.
* config/i386/cpuid.h (bit_AVX512BITALG): New bit.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect -mavx512bitalg.
* config/i386/i386-builtin-types.def (V64QI_FTYPE_V64QI, V64QI_FTYPE_V64QI,
V4DI_FTYPE_V4DI, UHI_FTYPE_V2DI_V2DI_UHI, USI_FTYPE_V4DI_V4DI_USI,
V4SI_FTYPE_V4SI_V4SI_UHI, V8SI_FTYPE_V8SI_V8SI_UHI): New types.
* config/i386/i386-builtin.def (__builtin_ia32_vpopcountq_v4di,
__builtin_ia32_vpopcountq_v4di_mask, __builtin_ia32_vpopcountq_v2di,
__builtin_ia32_vpopcountq_v2di_mask, __builtin_ia32_vpopcountd_v4si,
__builtin_ia32_vpopcountd_v4si_mask, __builtin_ia32_vpopcountd_v8si,
__builtin_ia32_vpopcountd_v8si_mask, __builtin_ia32_vpopcountb_v64qi,
__builtin_ia32_vpopcountb_v64qi_mask, __builtin_ia32_vpopcountb_v32qi,
__builtin_ia32_vpopcountb_v32qi_mask, __builtin_ia32_vpopcountb_v16qi,
__builtin_ia32_vpopcountb_v16qi_mask, __builtin_ia32_vpopcountw_v32hi,
__builtin_ia32_vpopcountw_v32hi_mask, __builtin_ia32_vpopcountw_v16hi,
__builtin_ia32_vpopcountw_v16hi_mask, __builtin_ia32_vpopcountw_v8hi,
__builtin_ia32_vpopcountw_v8hi_mask, __builtin_ia32_vpshufbitqmb128_mask,
__builtin_ia32_vpshufbitqmb256_mask,
__builtin_ia32_vpshufbitqmb512_mask): New builtins.
* config/i386/i386-c.c (__AVX512BITALG__): New.
* config/i386/i386.c (isa2_opts): Add -mavx512bitalg.
(ix86_valid_target_attribute_inner_p): Ditto.
(ix86_expand_args_builtin): Handle new types.
* config/i386/i386.h (TARGET_AVX512BITALG, TARGET_AVX512BITALG_P): New.
* config/i386/i386.opt: Add -mavx512bitalg.
* config/i386/immintrin.h: Add avx512vpopcntdqvlintrin.h and
avx512bitalgintrin.h.
* config/i386/sse.md (VI48_AVX512VLBW): New iterator.
(vpopcount<mode><mask_name>): Add more types.
(avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): New.
* doc/invoke.texi: Add -mavx512bitalg and -mavx512vpopcntdq.
gcc/testsuite/
* g++.dg/other/i386-2.C: Add new options.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/sse-12.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/avx512-check.h: Handle bit_AVX512BITALG.
* gcc.target/i386/avx512bitalg-vpopcntb-1.c: New.
* gcc.target/i386/avx512bitalg-vpopcntb.c: Ditto.
* gcc.target/i386/avx512bitalg-vpopcntbvl.c: Ditto.
* gcc.target/i386/avx512bitalg-vpopcntw-1.c: Ditto.
* gcc.target/i386/avx512bitalg-vpopcntw.c: Ditto.
* gcc.target/i386/avx512bitalg-vpopcntwvl.c: Ditto.
* gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c: Ditto.
* gcc.target/i386/avx512bitalg-vpshufbitqmb.c: Ditto.
* gcc.target/i386/avx512bitalgvl-vpopcntb-1.c: Ditto.
* gcc.target/i386/avx512bitalgvl-vpopcntw-1.c: Ditto.
* gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c: Ditto.
* gcc.target/i386/avx512vpopcntdqvl-vpopcntd-1.c: Ditto.
* gcc.target/i386/avx512vpopcntdqvl-vpopcntq-1.c: Ditto.
* gcc.target/i386/i386.exp (check_effective_target_avx512bitalg): New.
* gcc.target/i386/avx512vpopcntdq-vpopcntd-1.c: Add more types.
* gcc.target/i386/avx512vpopcntdq-vpopcntd.c: Handle new intrinsics.
* gcc.target/i386/avx512vpopcntdq-vpopcntq-1.c: Ditto.
* gcc.target/i386/avx512vpopcntdq-vpopcntq.c: Ditto.
Co-Authored-By: Sebastian Peryt <sebastian.peryt@intel.com>
From-SVN: r255975
|
|
When GCC for ARM/linux is configured with --with-float=hard, or
--with-float=softfp the compiler will now die when trying to build the
support libraries because the baseline architecture is too old to
support VFP (older versions of GCC just emitted the VFP instructions
anyway, even though they wouldn't run on that version of the
architecture; but we're now more prickly about it).
This patch fixed the problem by raising the default architecture
(actually the default CPU) to ARMv5te (ARM10e) when we need to generate
HW floating-point code.
PR target/83105
* config.gcc (arm*-*-linux*): When configured with --with-float=hard
or --with-float=softfp, set the default CPU to arm10e.
From-SVN: r255858
|
|
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_VPCLMULQDQ_SET,
OPTION_MASK_ISA_VPCLMULQDQ_UNSET): New.
(ix86_handle_option): Handle -mvpclmulqdq, move cx6 to flags2.
* config.gcc: Include vpclmulqdqintrin.h.
* config/i386/cpuid.h: Handle bit_VPCLMULQDQ.
* config/i386/driver-i386.c (host_detect_local_cpu): Handle -mvpclmulqdq.
* config/i386/i386-builtin.def (__builtin_ia32_vpclmulqdq_v2di,
__builtin_ia32_vpclmulqdq_v4di, __builtin_ia32_vpclmulqdq_v8di): New.
* config/i386/i386-c.c (__VPCLMULQDQ__): New.
* config/i386/i386.c (isa2_opts): Add -mcx16.
(isa_opts): Add -mpclmulqdq, remove -mcx16.
(ix86_option_override_internal): Move mcx16 to flags2.
(ix86_valid_target_attribute_inner_p): Add vpclmulqdq.
(ix86_expand_builtin): Handle OPTION_MASK_ISA_VPCLMULQDQ.
* config/i386/i386.h (TARGET_VPCLMULQDQ, TARGET_VPCLMULQDQ_P): New.
* config/i386/i386.opt: Add mvpclmulqdq, move mcx16 to flags2.
* config/i386/immintrin.h: Include vpclmulqdqintrin.h.
* config/i386/sse.md (vpclmulqdq_<mode>): New pattern.
* config/i386/vpclmulqdqintrin.h (_mm512_clmulepi64_epi128,
_mm_clmulepi64_epi128, _mm256_clmulepi64_epi128): New intrinsics.
* doc/invoke.texi: Add -mvpclmulqdq.
gcc/testsuite/
* gcc.target/i386/avx-1.c: Handle new intrinsics.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/avx512-check.h: Handle bit_VPCLMULQDQ.
* gcc.target/i386/avx512f-vpclmulqdq-2.c: New test.
* gcc.target/i386/avx512vl-vpclmulqdq-2.c: Ditto.
* gcc.target/i386/vpclmulqdq.c: Ditto.
* gcc.target/i386/i386.exp (check_effective_target_vpclmulqdq): New.
From-SVN: r255850
|
|
gcc/
* config.gcc: Add vaesintrin.h.
* config/i386/i386-builtin-types.def (V64QI_FTYPE_V64QI_V64QI): New type.
* config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
__builtin_ia32_vaesdec_v32qi, __builtin_ia32_vaesdec_v64qi): New builtins.
* config/i386/i386.c (ix86_expand_args_builtin): Handle new type.
* config/i386/immintrin.h: Include vaesintrin.h.
* config/i386/sse.md (vaesdec_<mode>): New pattern.
* config/i386/vaesintrin.h (_mm256_aesdec_epi128, _mm512_aesdec_epi128,
_mm_aesdec_epi128): New intrinsics.
gcc/testsuite/
* gcc.target/i386/avx512-check.h: Handle bit_VAES.
* gcc.target/i386/avx512f-aesdec-2.c: New test.
* gcc.target/i386/avx512fvl-vaes-1.c: Ditto.
* gcc.target/i386/avx512vl-aesdec-2.c: Ditto.
* gcc.target/i386/i386.exp (check_effective_target_avx512vaes): New.
From-SVN: r255572
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gcc/
* config.gcc: Add vaesintrin.h.
* config/i386/i386-builtin-types.def (V64QI_FTYPE_V64QI_V64QI): New type.
* config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
__builtin_ia32_vaesdec_v32qi, __builtin_ia32_vaesdec_v64qi): New builtins.
* config/i386/i386.c (ix86_expand_args_builtin): Handle new type.
* config/i386/immintrin.h: Include vaesintrin.h.
* config/i386/sse.md (vaesdec_<mode>): New pattern.
* config/i386/vaesintrin.h (_mm256_aesdec_epi128, _mm512_aesdec_epi128,
_mm_aesdec_epi128): New intrinsics.
gcc/testsuite/
* gcc.target/i386/avx512-check.h: Handle bit_VAES.
* gcc.target/i386/avx512f-aesdec-2.c: New test.
* gcc.target/i386/avx512fvl-vaes-1.c: Ditto.
* gcc.target/i386/avx512vl-aesdec-2.c: Ditto.
* gcc.target/i386/i386.exp (check_effective_target_avx512vaes): New.
From-SVN: r255461
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* config/i386/i386.c (processor_target_table): Add skylake_cost for
skylake-avx512.
* config/i386/x86-tune-costs.h (skylake_memcpy, skylake_memset,
skylake_cost): New.
* config/i386/driver-i386.c (host_detect_local_cpu):
Detect skylake-avx512.
* config.gcc: Add -march=cannonlake.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect cannonlake.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle cannonlake.
* config/i386/i386.c (processor_costs): Add m_CANNONLAKE.
(PTA_CANNONLAKE): New.
(processor_target_table): Add cannonlake.
(ix86_option_override_internal): Ditto.
(fold_builtin_cpu): Ditto.
(get_builtin_code_for_version): Handle cannonlake.
(M_INTEL_COREI7_CANNONLAKE): New.
* config/i386/i386.h (TARGET_CANNONLAKE, PROCESSOR_CANNONLAKE): New.
* doc/invoke.texi: Add -march=cannonlake.
gcc/testsuite/
* gcc.target/i386/funcspec-56.inc: Handle new march.
* g++.dg/ext/mv16.C: Ditto.
libgcc/
* config/i386/cpuinfo.c (get_intel_cpu): Handle cannonlake.
* config/i386/cpuinfo.h (processor_subtypes): Add
INTEL_COREI7_CANNONLAKE.
From-SVN: r255155
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From-SVN: r255132
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Enable building libgcc with CET options by default on Linux/x86 if
binutils supports CET v2.0. It can be disabled with --disable-cet.
It is an error to configure GCC with --enable-cet if bintuiils
doesn't support CET v2.0.
ENDBR instruction is added to __morestack_large_model since it is
called indirectly.
2017-11-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
config/
* cet.m4: New file.
gcc/
* config.gcc (extra_headers): Add cet.h for x86 targets.
* config/i386/cet.h: New file.
* doc/install.texi: Add --enable-cet/--disable-cet.
libgcc/
* Makefile.in (configure_deps): Add $(srcdir)/../config/cet.m4.
(CET_FLAGS): New.
* config/i386/morestack.S: Include <cet.h>.
(__morestack_large_model): Add _CET_ENDBR at function entrance.
* config/i386/resms64.h: Include <cet.h>.
* config/i386/resms64f.h: Likewise.
* config/i386/resms64fx.h: Likewise.
* config/i386/resms64x.h: Likewise.
* config/i386/savms64.h: Likewise.
* config/i386/savms64f.h: Likewise.
* config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Add $(CET_FLAGS).
(CRTSTUFF_T_CFLAGS): Likewise.
* configure.ac: Include ../config/cet.m4.
Set and substitute CET_FLAGS.
* configure: Regenerated.
From-SVN: r254868
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libgcc:
* config.host (*-*-solaris2*): Adapt comment for Solaris 12
renaming.
* config/sol2/crtpg.c (__start_crt_compiler): Likewise.
* configure.ac (libgcc_cv_solaris_crts): Likewise.
* configure: Regenerate.
gcc:
* config.gcc (*-*-solaris2*): Enable default_use_cxa_atexit since
Solaris 11. Update comment.
* configure.ac (gcc_cv_ld_pid): Adapt comment for Solaris 12
renaming.
* config/sol2.h (STARTFILE_SPEC): Likewise.
* configure: Regenerate.
gcc/testsuite:
* lib/target-supports.exp (check_effective_target_pie): Adapt
comment for Solaris 12 renaming.
* gcc.dg/torture/pr60092.c: Remove *-*-solaris2.11* dg-xfail-run-if.
From-SVN: r254737
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gcc/
* config.gcc: Add gfniintrin.h.
* config/i386/gfniintrin.h: New.
* config/i386/i386-builtin-types.def (
__builtin_ia32_vgf2p8affineinvqb_v64qi,
__builtin_ia32_vgf2p8affineinvqb_v64qi_mask,
__builtin_ia32_vgf2p8affineinvqb_v32qi
__builtin_ia32_vgf2p8affineinvqb_v32qi_mask,
__builtin_ia32_vgf2p8affineinvqb_v16qi,
__builtin_ia32_vgf2p8affineinvqb_v16qi_mask): New builtins.
* config/i386/i386-builtin.def (V64QI_FTYPE_V64QI_V64QI_INT_V64QI_UDI,
V32QI_FTYPE_V32QI_V32QI_INT_V32QI_USI,
V16QI_FTYPE_V16QI_V16QI_INT_V16QI_UHI,
V64QI_FTYPE_V64QI_V64QI_INT): New types.
* config/i386/i386.c (ix86_expand_args_builtin): Handle new types.
* config/i386/immintrin.h: Include gfniintrin.h.
* config/i386/sse.md (vgf2p8affineinvqb_*) New pattern.
gcc/testsuite/
* gcc.target/i386/avx-1.c: Handle new intrinsics.
* gcc.target/i386/avx512-check.h: Check GFNI bit.
* gcc.target/i386/avx512f-gf2p8affineinvqb-2.c: Runtime test.
* gcc.target/i386/avx512vl-gf2p8affineinvqb-2.c: Runtime test.
* gcc.target/i386/gfni-1.c: New.
* gcc.target/i386/gfni-2.c: New.
* gcc.target/i386/gfni-3.c: New.
* gcc.target/i386/gfni-4.c: New.
* gcc.target/i386/i386.exp: (check_effective_target_gfni): New.
* gcc.target/i386/sse-12.c: Handle new intrinsics.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
From-SVN: r254250
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