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2023-01-02Update copyright years.Jakub Jelinek1-1/+1
2022-12-19RISC-V: Support VSETVL PASS for RVV supportJu-Zhe Zhong1-1/+1
This patch is to support VSETVL PASS for RVV support. 1.The optimization and performance is guaranteed LCM (Lazy code motion). 2.Base on RTL_SSA framework to gain better optimization chances. 3.Also we do VL/VTYPE, demand information backward propagation across blocks by RTL_SSA reverse order in CFG. 4.It has been well and fully tested by about 200+ testcases for VLMAX AVL situation (Only for VLMAX since we don't have an intrinsics to test non-VLMAX). 5.Will support AVL model in the next patch. gcc/ChangeLog: * config.gcc: Add riscv-vsetvl.o. * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Add VSETVL PASS location. * config/riscv/riscv-protos.h (make_pass_vsetvl): New function. (enum avl_type): New enum. (get_ta): New function. (get_ma): Ditto. (get_avl_type): Ditto. (calculate_ratio): Ditto. (enum tail_policy): New enum. (enum mask_policy): Ditto. * config/riscv/riscv-v.cc (calculate_ratio): New function. (emit_pred_op): change the VLMAX mov codgen. (get_ta): New function. (get_ma): Ditto. (enum tail_policy): Change enum. (get_prefer_tail_policy): New function. (enum mask_policy): Change enum. (get_prefer_mask_policy): New function. * config/riscv/t-riscv: Add riscv-vsetvl.o * config/riscv/vector.md: Adjust attribute and pattern for VSETVL PASS. (@vlmax_avl<mode>): Ditto. (@vsetvl<mode>_no_side_effects): Delete. (vsetvl_vtype_change_only): New MD pattern. (@vsetvl_discard_result<mode>): Ditto. * config/riscv/riscv-vsetvl.cc: New file. * config/riscv/riscv-vsetvl.h: New file.
2022-12-18build: doc: Obsolete Solaris 11.3 supportRainer Orth1-5/+16
This patch implements the Solaris 11.[0-3] obsoletion just announced in https://gcc.gnu.org/pipermail/gcc/2022-December/240322.html Bootstrapped without regressions on Solaris 11.3 (i386-pc-solaris2.11, sparc-sun-solaris2.11 without and with --enable-obsolete) and 11.4. 2022-12-09 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> gcc: * config.gcc: Determine Solaris minor version. Obsolete *-*-solaris2.11.[0-3]*. * doc/install.texi (Specific, *-*-solaris2*): Document it.
2022-12-07gcc: xtensa: allow dynamic configurationMax Filippov1-0/+1
Import include/xtensa-dynconfig.h that defines XCHAL_* macros as fields of a structure returned from the xtensa_get_config_v<x> function call. Define that structure and fill it with default parameter values specified in the include/xtensa-config.h. Define reusable function xtensa_load_config that tries to load configuration and return an address of an exported object from it. Define the function xtensa_get_config_v1 that uses xtensa_load_config to get structure xtensa_config_v1, either dynamically configured or the default. Provide essential XCHAL_* configuration parameters as __XCHAL_* built-in macros. This way it will be possible to use them in libgcc and libc without need to patch libgcc or libc source for the specific xtensa core configuration. gcc/ * config.gcc (xtensa*-*-*): Add xtensa-dynconfig.o to extra_objs. * config/xtensa/t-xtensa (TM_H): Add xtensa-dynconfig.h. (xtensa-dynconfig.o): New rule. * config/xtensa/xtensa-dynconfig.c: New file. * config/xtensa/xtensa-protos.h (xtensa_get_config_strings): New declaration. * config/xtensa/xtensa.h (xtensa-config.h): Replace #include with xtensa-dynconfig.h (XCHAL_HAVE_MUL32_HIGH, XCHAL_HAVE_RELEASE_SYNC) (XCHAL_HAVE_S32C1I, XCHAL_HAVE_THREADPTR) (XCHAL_HAVE_FP_POSTINC): Drop definitions. (TARGET_DIV32): Replace with __XCHAL_HAVE_DIV32. (TARGET_CPU_CPP_BUILTINS): Add new 'builtin' variable and loop through string array returned by the xtensa_get_config_strings function call. include/ * xtensa-dynconfig.h: New file.
2022-11-07Initial Grand Ridge supportHu, Lin11-1/+1
gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Grand Ridge. * common/config/i386/i386-common.cc (processor_names): Add grandridge. (processor_alias_table): Ditto. * common/config/i386/i386-cpuinfo.h: (enum processor_types): Add INTEL_GRANDRIDGE. * config.gcc: Add -march=grandridge. * config/i386/driver-i386.cc (host_detect_local_cpu): Handle grandridge. * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto. * config/i386/i386-options.cc (m_GRANDRIDGE): New define. (processor_cost_table): Add grandridge. * config/i386/i386.h (enum processor_type): Add PROCESSOR_GRANDRIDGE. (PTA_GRANDRIDGE): Ditto. * doc/extend.texi: Add grandridge. * doc/invoke.texi: Ditto. gcc/testsuite/ChangeLog: * g++.target/i386/mv16.C: Add grandridge. * gcc.target/i386/funcspec-56.inc: Handle new march.
2022-11-07Support Intel RAO-INTkonglin11-1/+2
gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available_features): Detect raoint. * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_RAOINT_SET, OPTION_MASK_ISA2_RAOINT_UNSET): New. (ix86_handle_option): Handle -mraoint. * common/config/i386/i386-cpuinfo.h (enum processor_features): Add FEATURE_RAOINT. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for raoint. * config.gcc: Add raointintrin.h * config/i386/cpuid.h (bit_RAOINT): New. * config/i386/i386-builtin.def (BDESC): Add new builtins. * config/i386/i386-c.cc (ix86_target_macros_internal): Define __RAOINT__. * config/i386/i386-isa.def (RAOINT): Add DEF_PTA(RAOINT). * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p): Add -mraoint. * config/i386/sync.md (rao_a<raointop><mode>): New define insn. * config/i386/i386.opt: Add option -mraoint. * config/i386/x86gprintrin.h: Include raointintrin.h. * doc/extend.texi: Document raoint. * doc/invoke.texi: Document -mraoint. * doc/sourcebuild.texi: Document target raoint. * config/i386/raointintrin.h: New file. gcc/testsuite/ChangeLog: * g++.dg/other/i386-2.C: Add -mraoint. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * gcc.target/i386/sse-12.c: Add -mraoint. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Add raoint target. * gcc.target/i386/sse-23.c: Ditto. * lib/target-supports.exp: Add check_effective_target_raoint. * gcc.target/i386/rao-helper.h: New test. * gcc.target/i386/raoint-1.c: Ditto. * gcc.target/i386/raoint-aadd-2.c: Ditto. * gcc.target/i386/raoint-aand-2.c: Ditto. * gcc.target/i386/raoint-aor-2.c: Ditto. * gcc.target/i386/raoint-axor-2.c: Ditto. * gcc.target/i386/x86gprintrin-1.c: Ditto. * gcc.target/i386/x86gprintrin-2.c: Ditto. * gcc.target/i386/x86gprintrin-3.c: Ditto. * gcc.target/i386/x86gprintrin-4.c: Ditto. * gcc.target/i386/x86gprintrin-5.c: Ditto.
2022-11-07Initial Granite Rapids SupportHaochen Jiang1-1/+1
gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Granite Rapids. * common/config/i386/i386-common.cc: (processor_names): Add graniterapids. (processor_alias_table): Ditto. * common/config/i386/i386-cpuinfo.h (enum processor_subtypes): Add INTEL_GRANTIERAPIDS. * config.gcc: Add -march=graniterapids. * config/i386/driver-i386.cc (host_detect_local_cpu): Handle graniterapids. * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto. * config/i386/i386-options.cc (m_GRANITERAPIDS): New. (processor_cost_table): Add graniterapids. * config/i386/i386.h (enum processor_type): Add PROCESSOR_GRANITERAPIDS. (PTA_GRANITERAPIDS): Ditto. * doc/extend.texi: Add graniterapids. * doc/invoke.texi: Ditto. gcc/testsuite/ChangeLog: * g++.target/i386/mv16.C: Add graniterapids. * gcc.target/i386/funcspec-56.inc: Handle new march.
2022-11-07Support Intel prefetchit0/t1Haochen Jiang1-1/+1
gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available_features): Detect PREFETCHI. * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_PREFETCHI_SET, OPTION_MASK_ISA2_PREFETCHI_UNSET): New. (ix86_handle_option): Handle -mprefetchi. * common/config/i386/i386-cpuinfo.h (enum processor_features): Add FEATURE_PREFETCHI. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for prefetchi. * config.gcc: Add prfchiintrin.h. * config/i386/cpuid.h (bit_PREFETCHI): New. * config/i386/i386-builtin-types.def: Add DEF_FUNCTION_TYPE (VOID, PCVOID, INT) and DEF_FUNCTION_TYPE (VOID, PCVOID, INT, INT, INT). * config/i386/i386-builtin.def (BDESC): Add new builtins. * config/i386/i386-c.cc (ix86_target_macros_internal): Define __PREFETCHI__. * config/i386/i386-expand.cc: Handle new builtins. * config/i386/i386-isa.def (PREFETCHI): Add DEF_PTA(PREFETCHI). * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p): Handle prefetchi. * config/i386/i386.md (prefetchi): New define_insn. * config/i386/i386.opt: Add option -mprefetchi. * config/i386/predicates.md (local_func_symbolic_operand): New predicates. * config/i386/x86gprintrin.h: Include prfchiintrin.h. * config/i386/xmmintrin.h (enum _mm_hint): New enum for prefetchi. (_mm_prefetch): Handle the highest bit of enum. * doc/extend.texi: Document prefetchi. * doc/invoke.texi: Document -mprefetchi. * doc/sourcebuild.texi: Document target prefetchi. * config/i386/prfchiintrin.h: New file. gcc/testsuite/ChangeLog: * g++.dg/other/i386-2.C: Add -mprefetchi. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/avx-1.c: Ditto. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * gcc.target/i386/sse-13.c: Add -mprefetchi. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/x86gprintrin-1.c: Ditto. * gcc.target/i386/x86gprintrin-2.c: Ditto. * gcc.target/i386/x86gprintrin-3.c: Ditto. * gcc.target/i386/x86gprintrin-4.c: Ditto. * gcc.target/i386/x86gprintrin-5.c: Ditto. * gcc.target/i386/prefetchi-1.c: New test. * gcc.target/i386/prefetchi-2.c: Ditto. * gcc.target/i386/prefetchi-3.c: Ditto. * gcc.target/i386/prefetchi-4.c: Ditto. Co-authored-by: Hongtao Liu <hongtao.liu@intel.com>
2022-11-04Remove support for Intel MIC offloadingThomas Schwinge1-8/+0
... after its deprecation in GCC 12. * Makefile.def: Remove module 'liboffloadmic'. * Makefile.in: Regenerate. * configure.ac: Remove 'liboffloadmic' handling. * configure: Regenerate. contrib/ * gcc-changelog/git_commit.py (default_changelog_locations): Remove 'liboffloadmic'. * gcc_update (files_and_dependencies): Remove 'liboffloadmic' files. * update-copyright.py (GCCCmdLine): Remove 'liboffloadmic' comment. gcc/ * config.gcc [target *-intelmic-* | *-intelmicemul-*]: Remove. * config/i386/i386-options.cc (ix86_omp_device_kind_arch_isa) [ACCEL_COMPILER]: Remove. * config/i386/intelmic-mkoffload.cc: Remove. * config/i386/intelmic-offload.h: Likewise. * config/i386/t-intelmic: Likewise. * config/i386/t-omp-device: Likewise. * configure.ac [target *-intelmic-* | *-intelmicemul-*]: Remove. * configure: Regenerate. * doc/install.texi (--enable-offload-targets=[...]): Update. * doc/sourcebuild.texi: Remove 'liboffloadmic' documentation. include/ * gomp-constants.h (GOMP_DEVICE_INTEL_MIC): Comment out. (GOMP_VERSION_INTEL_MIC): Remove. libgomp/ * libgomp-plugin.h (OFFLOAD_TARGET_TYPE_INTEL_MIC): Remove. * libgomp.texi (OpenMP Context Selectors): Remove Intel MIC documentation. * plugin/configfrag.ac <enable_offload_targets> [*-intelmic-* | *-intelmicemul-*]: Remove. * configure: Regenerate. * testsuite/lib/libgomp.exp (libgomp_init): Remove 'liboffloadmic' handling. (offload_target_to_openacc_device_type) [$offload_target = *-intelmic*]: Remove. (check_effective_target_offload_device_intel_mic) (check_effective_target_offload_device_any_intel_mic): Remove. * testsuite/libgomp.c-c++-common/on_device_arch.h (device_arch_intel_mic, on_device_arch_intel_mic, any_device_arch) (any_device_arch_intel_mic): Remove. * testsuite/libgomp.c-c++-common/target-45.c: Remove 'offload_device_any_intel_mic' XFAIL. * testsuite/libgomp.fortran/target10.f90: Likewise. liboffloadmic/ * ChangeLog: Remove. * Makefile.am: Likewise. * Makefile.in: Likewise. * aclocal.m4: Likewise. * configure: Likewise. * configure.ac: Likewise. * configure.tgt: Likewise. * doc/doxygen/config: Likewise. * doc/doxygen/header.tex: Likewise. * include/coi/common/COIEngine_common.h: Likewise. * include/coi/common/COIEvent_common.h: Likewise. * include/coi/common/COIMacros_common.h: Likewise. * include/coi/common/COIPerf_common.h: Likewise. * include/coi/common/COIResult_common.h: Likewise. * include/coi/common/COISysInfo_common.h: Likewise. * include/coi/common/COITypes_common.h: Likewise. * include/coi/sink/COIBuffer_sink.h: Likewise. * include/coi/sink/COIPipeline_sink.h: Likewise. * include/coi/sink/COIProcess_sink.h: Likewise. * include/coi/source/COIBuffer_source.h: Likewise. * include/coi/source/COIEngine_source.h: Likewise. * include/coi/source/COIEvent_source.h: Likewise. * include/coi/source/COIPipeline_source.h: Likewise. * include/coi/source/COIProcess_source.h: Likewise. * liboffloadmic_host.spec.in: Likewise. * liboffloadmic_target.spec.in: Likewise. * plugin/Makefile.am: Likewise. * plugin/Makefile.in: Likewise. * plugin/aclocal.m4: Likewise. * plugin/configure: Likewise. * plugin/configure.ac: Likewise. * plugin/libgomp-plugin-intelmic.cpp: Likewise. * plugin/offload_target_main.cpp: Likewise. * runtime/cean_util.cpp: Likewise. * runtime/cean_util.h: Likewise. * runtime/coi/coi_client.cpp: Likewise. * runtime/coi/coi_client.h: Likewise. * runtime/coi/coi_server.cpp: Likewise. * runtime/coi/coi_server.h: Likewise. * runtime/compiler_if_host.cpp: Likewise. * runtime/compiler_if_host.h: Likewise. * runtime/compiler_if_target.cpp: Likewise. * runtime/compiler_if_target.h: Likewise. * runtime/dv_util.cpp: Likewise. * runtime/dv_util.h: Likewise. * runtime/emulator/coi_common.h: Likewise. * runtime/emulator/coi_device.cpp: Likewise. * runtime/emulator/coi_device.h: Likewise. * runtime/emulator/coi_host.cpp: Likewise. * runtime/emulator/coi_host.h: Likewise. * runtime/emulator/coi_version_asm.h: Likewise. * runtime/emulator/coi_version_linker_script.map: Likewise. * runtime/liboffload_error.c: Likewise. * runtime/liboffload_error_codes.h: Likewise. * runtime/liboffload_msg.c: Likewise. * runtime/liboffload_msg.h: Likewise. * runtime/mic_lib.f90: Likewise. * runtime/offload.h: Likewise. * runtime/offload_common.cpp: Likewise. * runtime/offload_common.h: Likewise. * runtime/offload_engine.cpp: Likewise. * runtime/offload_engine.h: Likewise. * runtime/offload_env.cpp: Likewise. * runtime/offload_env.h: Likewise. * runtime/offload_host.cpp: Likewise. * runtime/offload_host.h: Likewise. * runtime/offload_iterator.h: Likewise. * runtime/offload_omp_host.cpp: Likewise. * runtime/offload_omp_target.cpp: Likewise. * runtime/offload_orsl.cpp: Likewise. * runtime/offload_orsl.h: Likewise. * runtime/offload_table.cpp: Likewise. * runtime/offload_table.h: Likewise. * runtime/offload_target.cpp: Likewise. * runtime/offload_target.h: Likewise. * runtime/offload_target_main.cpp: Likewise. * runtime/offload_timer.h: Likewise. * runtime/offload_timer_host.cpp: Likewise. * runtime/offload_timer_target.cpp: Likewise. * runtime/offload_trace.cpp: Likewise. * runtime/offload_trace.h: Likewise. * runtime/offload_util.cpp: Likewise. * runtime/offload_util.h: Likewise. * runtime/ofldbegin.cpp: Likewise. * runtime/ofldend.cpp: Likewise. * runtime/orsl-lite/include/orsl-lite.h: Likewise. * runtime/orsl-lite/lib/orsl-lite.c: Likewise. * runtime/orsl-lite/version.txt: Likewise.
2022-11-04Support Intel AMX-FP16 ISAHongyu Wang1-1/+1
gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available_features): Detect amx-fp16. * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_FP16_SET, OPTION_MASK_ISA2_AMX_FP16_UNSET): New macros. (ix86_handle_option): Handle -mamx-fp16. * common/config/i386/i386-cpuinfo.h (enum processor_features): Add FEATURE_AMX_FP16. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for amx-fp16. * config.gcc: Add amxfp16intrin.h. * config/i386/cpuid.h (bit_AMX_FP16): New. * config/i386/i386-c.cc (ix86_target_macros_internal): Define __AMX_FP16__. * config/i386/i386-isa.def: Add DEF_PTA for AMX_FP16. * config/i386/i386-options.cc (isa2_opts): Add -mamx-fp16. (ix86_valid_target_attribute_inner_p): Add new ATTR. (ix86_option_override_internal): Handle AMX-FP16. * config/i386/i386.opt: Add -mamx-fp16. * config/i386/immintrin.h: Include amxfp16intrin.h. * doc/extend.texi: Document -mamx-fp16. * doc/invoke.texi: Document amx-fp16. * doc/sourcebuild.texi: Document amx_fp16. * config/i386/amxfp16intrin.h: New file. gcc/testsuite/ChangeLog: * g++.dg/other/i386-2.C: Add -mamx-fp16. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * lib/target-supports.exp: (check_effective_target_amx_fp16): New proc. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * gcc.target/i386/amx-check.h: Add AMX_FP16. * gcc.target/i386/amx-helper.h: New file to support amx-fp16. * gcc.target/i386/amxfp16-asmatt-1.c: New test. * gcc.target/i386/amxfp16-asmintel-1.c: Ditto. * gcc.target/i386/amxfp16-dpfp16ps-2.c: Ditto. Co-authored-by: Haochen Jiang <haochen.jiang@intel.com>
2022-11-04Initial Sierra Forest SupportHaochen Jiang1-1/+2
gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_intel_cpu): Add Sierra Forest. * common/config/i386/i386-common.cc (processor_names): Add Sierra Forest. (processor_alias_table): Ditto. * common/config/i386/i386-cpuinfo.h (enum processor_types): Add INTEL_SIERRAFOREST. * config.gcc: Add -march=sierraforest. * config/i386/driver-i386.cc (host_detect_local_cpu): Handle Sierra Forest. * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto. * config/i386/i386-options.cc (m_SIERRAFOREST): New define. (processor_cost_table): Add sierra forest. * config/i386/i386.h (enum processor_type): Add PROCESSOR_SIERRA_FOREST. (PTA_SIERRAFOREST): Ditto. * doc/extend.texi: Add sierra forest. * doc/invoke.texi: Ditto. gcc/testsuite/ChangeLog: * g++.target/i386/mv16.C: Add sierra forest. * gcc.target/i386/funcspec-56.inc: Handle new march.
2022-11-04Support Intel CMPccXADDHaochen Jiang1-1/+2
gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available_features): Detect cmpccxadd. * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_CMPCCXADD_SET, OPTION_MASK_ISA2_CMPCCXADD_UNSET): New. (ix86_handle_option): Handle -mcmpccxadd. * common/config/i386/i386-cpuinfo.h (enum processor_features): Add FEATURE_CMPCCXADD. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for cmpccxadd. * config.gcc: Add cmpccxaddintrin.h. * config/i386/cpuid.h (bit_CMPCCXADD): New. * config/i386/i386-builtin-types.def: Add DEF_FUNCTION_TYPE(INT, PINT, INT, INT, INT) and DEF_FUNCTION_TYPE(LONGLONG, PLONGLONG, LONGLONG, LONGLONG, INT). * config/i386/i386-builtin.def (BDESC): Add new builtins. * config/i386/i386-c.cc (ix86_target_macros_internal): Define __CMPCCXADD__. * config/i386/i386-expand.cc (ix86_expand_special_args_builtin): Add new parameter to indicate constant position. Handle INT_FTYPE_PINT_INT_INT_INT and LONGLONG_FTYPE_PLONGLONG_LONGLONG_LONGLONG_INT. * config/i386/i386-isa.def (CMPCCXADD): Add DEF_PTA(CMPCCXADD). * config/i386/i386-options.cc (isa2_opts): Add -mcmpccxadd. (ix86_valid_target_attribute_inner_p): Handle cmpccxadd. * config/i386/i386.opt: Add option -mcmpccxadd. * config/i386/sync.md (cmpccxadd_<mode>): New define insn. * config/i386/x86gprintrin.h: Include cmpccxaddintrin.h. * doc/extend.texi: Document cmpccxadd. * doc/invoke.texi: Document -mcmpccxadd. * doc/sourcebuild.texi: Document target cmpccxadd. * config/i386/cmpccxaddintrin.h: New file. gcc/testsuite/ChangeLog: * g++.dg/other/i386-2.C: Add -mcmpccxadd. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/avx-1.c: Ditto. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * gcc.target/i386/sse-13.c: Add -mcmpccxadd. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/x86gprintrin-1.c: Ditto. * gcc.target/i386/x86gprintrin-2.c: Ditto. * gcc.target/i386/x86gprintrin-3.c: Ditto. * gcc.target/i386/x86gprintrin-4.c: Ditto. * gcc.target/i386/x86gprintrin-5.c: Ditto. * lib/target-supports.exp (check_effective_target_cmpccxadd): New. * gcc.target/i386/cmpccxadd-1.c: New test. * gcc.target/i386/cmpccxadd-2.c: Ditto.
2022-10-31Support Intel AVX-NE-CONVERTkonglin11-1/+1
gcc/ChangeLog: * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AVXNECONVERT_SET, OPTION_MASK_ISA2_AVXNECONVERT_UNSET): New. (ix86_handle_option): Handle -mavxneconvert, unset avxneconvert when avx2 is disabled. * common/config/i386/i386-cpuinfo.h (processor_types): Add FEATURE_AVXNECONVERT. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for avxneconvert. * common/config/i386/cpuinfo.h (get_available_features): Detect avxneconvert. * config.gcc: Add avxneconvertintrin.h * config/i386/avxneconvertintrin.h: New. * config/i386/avx512bf16vlintrin.h (_mm256_cvtneps_pbh): Unified builtin with avxneconvert. (_mm_cvtneps_pbh): Ditto. * config/i386/cpuid.h (bit_AVXNECONVERT): New. * config/i386/i386-builtin-types.def: Add DEF_POINTER_TYPE (PCV8HF, V8HF, CONST), DEF_POINTER_TYPE (PCV8BF, V8BF, CONST), DEF_POINTER_TYPE (PCV16HF, V16HF, CONST), DEF_POINTER_TYPE (PCV16BF, V16BF, CONST), DEF_FUNCTION_TYPE (V4SF, PCBFLOAT16), DEF_FUNCTION_TYPE (V4SF, PCFLOAT16), DEF_FUNCTION_TYPE (V8SF, PCBFLOAT16), DEF_FUNCTION_TYPE (V8SF, PCFLOAT16), DEF_FUNCTION_TYPE (V4SF, PCV8BF), DEF_FUNCTION_TYPE (V4SF, PCV8HF), DEF_FUNCTION_TYPE (V8SF, PCV16HF), DEF_FUNCTION_TYPE (V8SF, PCV16BF), * config/i386/i386-builtin.def: Add new builtins. * config/i386/i386-c.cc (ix86_target_macros_internal): Define __AVXNECONVERT__. * config/i386/i386-expand.cc (ix86_expand_special_args_builtin): Handle V4SF_FTYPE_PCBFLOAT16,V8SF_FTYPE_PCBFLOAT16, V4SF_FTYPE_PCFLOAT16, V8SF_FTYPE_PCFLOAT16,V4SF_FTYPE_PCV8BF, V4SF_FTYPE_PCV8HF,V8SF_FTYPE_PCV16BF,V8SF_FTYPE_PCV16HF. * config/i386/i386-isa.def : Add DEF_PTA(AVXNECONVERT) New. * config/i386/i386-options.cc (isa2_opts): Add -mavxneconvert. (ix86_valid_target_attribute_inner_p): Handle avxneconvert. * config/i386/i386.md: Add attr avx512bf16vl and avxneconvert. * config/i386/i386.opt: Add option -mavxneconvert. * config/i386/immintrin.h: Inculde avxneconvertintrin.h. * config/i386/sse.md (vbcstnebf162ps_<mode>): New define_insn. (vbcstnesh2ps_<mode>): Ditto. (vcvtnee<bf16_ph>2ps_<mode>):Ditto. (vcvtneo<bf16_ph>2ps_<mode>):Ditto. (vcvtneps2bf16_v4sf): Ditto. (*vcvtneps2bf16_v4sf): Ditto. (vcvtneps2bf16_v8sf): Ditto. * doc/invoke.texi: Document -mavxneconvert. * doc/extend.texi: Document avxneconvert. * doc/sourcebuild.texi: Document target avxneconvert. gcc/testsuite/ChangeLog: * gcc.target/i386/avx-check.h: Add avxneconvert check. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * gcc.target/i386/sse-12.c: Add -mavxneconvert. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. * lib/target-supports.exp:add check_effective_target_avxneconvert. * gcc.target/i386/avx-ne-convert-1.c: New test. * gcc.target/i386/avx-ne-convert-vbcstnebf162ps-2.c: Ditto. * gcc.target/i386/avx-ne-convert-vbcstnesh2ps-2.c: Ditto. * gcc.target/i386/avx-ne-convert-vcvtneebf162ps-2.c: Ditto. * gcc.target/i386/avx-ne-convert-vcvtneeph2ps-2.c: Ditto. * gcc.target/i386/avx-ne-convert-vcvtneobf162ps-2.c: Ditto. * gcc.target/i386/avx-ne-convert-vcvtneoph2ps-2.c: Ditto. * gcc.target/i386/avx-ne-convert-vcvtneps2bf16-2.c: Ditto. * gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1.c: Rename.. * gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1a.c: To this. * gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1b.c: New test.
2022-10-29d: Remove D-specific version definitions from target headersIain Buclaw1-4/+20
This splits up the targetdm sources so that each file only handles one target platform. Having all logic kept in the headers means that they could become out of sync when a new target is added (loongarch*-*-linux*) or accidentally broken if some headers in tm_file are changed about. gcc/ChangeLog: * config.gcc: Split out glibc-d.o into linux-d.o, kfreebsd-d.o, kopensolaris-d.o, and gnu-d.o. Split out cygwin-d.o from winnt-d.o. * config/arm/linux-eabi.h (EXTRA_TARGET_D_OS_VERSIONS): Remove. * config/gnu.h (GNU_USER_TARGET_D_OS_VERSIONS): Remove. * config/i386/cygwin.h (EXTRA_TARGET_D_OS_VERSIONS): Remove. * config/i386/linux-common.h (EXTRA_TARGET_D_OS_VERSIONS): Remove. * config/i386/mingw32.h (EXTRA_TARGET_D_OS_VERSIONS): Remove. * config/i386/t-cygming: Add cygwin-d.o. * config/i386/winnt-d.cc (winnt_d_os_builtins): Only add MinGW-specific version condition. * config/kfreebsd-gnu.h (GNU_USER_TARGET_D_OS_VERSIONS): Remove. * config/kopensolaris-gnu.h (GNU_USER_TARGET_D_OS_VERSIONS): Remove. * config/linux-android.h (ANDROID_TARGET_D_OS_VERSIONS): Remove. * config/linux.h (GNU_USER_TARGET_D_OS_VERSIONS): Remove. * config/mips/linux-common.h (EXTRA_TARGET_D_OS_VERSIONS): Remove. * config/t-glibc: Remove glibc-d.o, add gnu-d.o, kfreebsd-d.o, kopensolaris-d.o. * config/t-linux: Add linux-d.o. * config/glibc-d.cc: Remove file. * config/gnu-d.cc: New file. * config/i386/cygwin-d.cc: New file. * config/kfreebsd-d.cc: New file. * config/kopensolaris-d.cc: New file. * config/linux-d.cc: New file.
2022-10-26RISC-V: Support load/store in mov<mode> pattern for RVV modes.Ju-Zhe Zhong1-1/+1
gcc/ChangeLog: * config.gcc (riscv*): Add riscv-v.o to extra_objs. * config/riscv/constraints.md (vu): New constraint. (vi): Ditto. (Wc0): Ditto. (Wc1): Ditto. * config/riscv/predicates.md (vector_length_operand): New. (reg_or_mem_operand): Ditto. (vector_move_operand): Ditto. (vector_mask_operand): Ditto. (vector_merge_operand): Ditto. * config/riscv/riscv-protos.h (riscv_regmode_natural_size) New. (riscv_vector::const_vec_all_same_in_range_p): Ditto. (riscv_vector::legitimize_move): Ditto. (tail_policy): Ditto. (mask_policy): Ditto. * config/riscv/riscv-v.cc: New. * config/riscv/riscv-vector-builtins-bases.cc (vsetvl::expand): Refactor how LMUL encoding. * config/riscv/riscv.cc (riscv_print_operand): Update how LMUL print and mask operand print. (riscv_regmode_natural_size): New. * config/riscv/riscv.h (REGMODE_NATURAL_SIZE): New. * config/riscv/riscv.md (mode): Add vector modes. * config/riscv/t-riscv (riscv-v.o) New. * config/riscv/vector-iterators.md: New. * config/riscv/vector.md (vundefined<mode>): New. (mov<mode>): New. (*mov<mode>): New. (@vsetvl<mode>_no_side_effects): New. (@pred_mov<mode>): New. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/mov-1.c: New. * gcc.target/riscv/rvv/base/mov-10.c: New. * gcc.target/riscv/rvv/base/mov-11.c: New. * gcc.target/riscv/rvv/base/mov-12.c: New. * gcc.target/riscv/rvv/base/mov-13.c: New. * gcc.target/riscv/rvv/base/mov-2.c: New. * gcc.target/riscv/rvv/base/mov-3.c: New. * gcc.target/riscv/rvv/base/mov-4.c: New. * gcc.target/riscv/rvv/base/mov-5.c: New. * gcc.target/riscv/rvv/base/mov-6.c: New. * gcc.target/riscv/rvv/base/mov-7.c: New. * gcc.target/riscv/rvv/base/mov-8.c: New. * gcc.target/riscv/rvv/base/mov-9.c: New.
2022-10-25MIPS: add builtime option for -mcompact-branchesYunQiang Su1-2/+11
For R6+ target, it allows to configure gcc to use compact branches only if avaiable. gcc/ChangeLog: * config.gcc: add -with-compact-branches=policy build option. * doc/install.texi: Likewise. * config/mips/mips.h: Likewise.
2022-10-21Enable AMD znver4 support and add instruction reservationsTejas Joshi1-1/+9
2022-09-28 Tejas Joshi <TejasSanjay.Joshi@amd.com> gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_amd_cpu): Recognize znver4. * common/config/i386/i386-common.cc (processor_names): Add znver4. (processor_alias_table): Add znver4 and modularize old znvers. * common/config/i386/i386-cpuinfo.h (processor_subtypes): AMDFAM19H_ZNVER4. * config.gcc (x86_64-*-* |...): Likewise. * config/i386/driver-i386.cc (host_detect_local_cpu): Let -march=native recognize znver4 cpus. * config/i386/i386-c.cc (ix86_target_macros_internal): Add znver4. * config/i386/i386-options.cc (m_ZNVER4): New definition. (m_ZNVER): Include m_ZNVER4. (processor_cost_table): Add znver4. * config/i386/i386.cc (ix86_reassociation_width): Likewise. * config/i386/i386.h (processor_type): Add PROCESSOR_ZNVER4. (PTA_ZNVER1): New definition. (PTA_ZNVER2): Likewise. (PTA_ZNVER3): Likewise. (PTA_ZNVER4): Likewise. * config/i386/i386.md (define_attr "cpu"): Add znver4 and rename md file. * config/i386/x86-tune-costs.h (znver4_cost): New definition. * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add znver4. (ix86_adjust_cost): Likewise. * config/i386/znver1.md: Rename to znver.md. * config/i386/znver.md: Add new reservations for znver4. * doc/extend.texi: Add details about znver4. * doc/invoke.texi: Likewise. gcc/testsuite/ChangeLog: * gcc.target/i386/funcspec-56.inc: Handle new march. * g++.target/i386/mv29.C: Likewise.
2022-10-21RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.Ju-Zhe Zhong1-1/+1
gcc/ChangeLog: * config.gcc: Add riscv-vector-builtins-bases.o and riscv-vector-builtins-shapes.o * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New macro. (DEF_RVV_FUNCTION): Ditto. (handle_pragma_vector): Add intrinsic framework. * config/riscv/riscv.cc (riscv_print_operand): Add operand print for vsetvl/vsetvlmax. * config/riscv/riscv.md: include vector.md. * config/riscv/t-riscv: Add riscv-vector-builtins-bases.o and riscv-vector-builtins-shapes.o * config/riscv/riscv-vector-builtins-bases.cc: New file. * config/riscv/riscv-vector-builtins-bases.h: New file. * config/riscv/riscv-vector-builtins-functions.def: New file. * config/riscv/riscv-vector-builtins-shapes.cc: New file. * config/riscv/riscv-vector-builtins-shapes.h: New file. * config/riscv/riscv-vector-builtins-types.def: New file. * config/riscv/vector.md: New file. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/vsetvl-1.c: New test.
2022-10-21RISC-V: Add RVV intrinsic basic framework.Ju-Zhe Zhong1-0/+2
gcc/ChangeLog: * config.gcc: Add gt files since function_instance is GTY ((user)). * config/riscv/riscv-builtins.cc (riscv_init_builtins): Add RVV intrinsic framework. (riscv_builtin_decl): Ditto. (riscv_expand_builtin): Ditto. * config/riscv/riscv-protos.h (builtin_decl): New function. (expand_builtin): Ditto. (enum riscv_builtin_class): New enum to classify RVV intrinsic and RISC-V general built-in. * config/riscv/riscv-vector-builtins.cc (class GTY): New declaration. (struct registered_function_hasher): New struct. (DEF_RVV_OP_TYPE): New macro. (DEF_RVV_TYPE): Ditto. (DEF_RVV_PRED_TYPE): Ditto. (GTY): New declaration. (add_attribute): New function. (check_required_extensions): Ditto. (rvv_arg_type_info::get_tree_type): Ditto. (function_instance::function_instance): Ditto. (function_instance::operator==): Ditto. (function_instance::any_type_float_p): Ditto. (function_instance::get_return_type): Ditto. (function_instance::get_arg_type): Ditto. (function_instance::hash): Ditto. (function_instance::call_properties): Ditto. (function_instance::reads_global_state_p): Ditto. (function_instance::modifies_global_state_p): Ditto. (function_instance::could_trap_p): Ditto. (function_builder::function_builder): Ditto. (function_builder::~function_builder): Ditto. (function_builder::allocate_argument_types): Ditto. (function_builder::register_function_group): Ditto. (function_builder::append_name): Ditto. (function_builder::finish_name): Ditto. (function_builder::get_attributes): Ditto. (function_builder::add_function): Ditto. (function_builder::add_unique_function): Ditto. (function_call_info::function_call_info): Ditto. (function_expander::function_expander): Ditto. (function_expander::add_input_operand): Ditto. (function_expander::generate_insn): Ditto. (registered_function_hasher::hash): Ditto. (registered_function_hasher::equal): Ditto. (builtin_decl): Ditto. (expand_builtin): Ditto. (gt_ggc_mx): Define for using GCC garbage collect. (gt_pch_nx): Define for using GCC garbage collect. * config/riscv/riscv-vector-builtins.def (DEF_RVV_OP_TYPE): New macro. (DEF_RVV_PRED_TYPE): Ditto. (vbool64_t): Add suffix. (vbool32_t): Ditto. (vbool16_t): Ditto. (vbool8_t): Ditto. (vbool4_t): Ditto. (vbool2_t): Ditto. (vbool1_t): Ditto. (vint8mf8_t): Ditto. (vuint8mf8_t): Ditto. (vint8mf4_t): Ditto. (vuint8mf4_t): Ditto. (vint8mf2_t): Ditto. (vuint8mf2_t): Ditto. (vint8m1_t): Ditto. (vuint8m1_t): Ditto. (vint8m2_t): Ditto. (vuint8m2_t): Ditto. (vint8m4_t): Ditto. (vuint8m4_t): Ditto. (vint8m8_t): Ditto. (vuint8m8_t): Ditto. (vint16mf4_t): Ditto. (vuint16mf4_t): Ditto. (vint16mf2_t): Ditto. (vuint16mf2_t): Ditto. (vint16m1_t): Ditto. (vuint16m1_t): Ditto. (vint16m2_t): Ditto. (vuint16m2_t): Ditto. (vint16m4_t): Ditto. (vuint16m4_t): Ditto. (vint16m8_t): Ditto. (vuint16m8_t): Ditto. (vint32mf2_t): Ditto. (vuint32mf2_t): Ditto. (vint32m1_t): Ditto. (vuint32m1_t): Ditto. (vint32m2_t): Ditto. (vuint32m2_t): Ditto. (vint32m4_t): Ditto. (vuint32m4_t): Ditto. (vint32m8_t): Ditto. (vuint32m8_t): Ditto. (vint64m1_t): Ditto. (vuint64m1_t): Ditto. (vint64m2_t): Ditto. (vuint64m2_t): Ditto. (vint64m4_t): Ditto. (vuint64m4_t): Ditto. (vint64m8_t): Ditto. (vuint64m8_t): Ditto. (vfloat32mf2_t): Ditto. (vfloat32m1_t): Ditto. (vfloat32m2_t): Ditto. (vfloat32m4_t): Ditto. (vfloat32m8_t): Ditto. (vfloat64m1_t): Ditto. (vfloat64m2_t): Ditto. (vfloat64m4_t): Ditto. (vfloat64m8_t): Ditto. (vv): Ditto. (vx): Ditto. (v): Ditto. (wv): Ditto. (wx): Ditto. (x_x_v): Ditto. (vf2): Ditto. (vf4): Ditto. (vf8): Ditto. (vvm): Ditto. (vxm): Ditto. (x_x_w): Ditto. (v_v): Ditto. (v_x): Ditto. (vs): Ditto. (mm): Ditto. (m): Ditto. (vf): Ditto. (vm): Ditto. (wf): Ditto. (vfm): Ditto. (v_f): Ditto. (ta): Ditto. (tu): Ditto. (ma): Ditto. (mu): Ditto. (tama): Ditto. (tamu): Ditto. (tuma): Ditto. (tumu): Ditto. (tam): Ditto. (tum): Ditto. * config/riscv/riscv-vector-builtins.h (GCC_RISCV_VECTOR_BUILTINS_H): New macro. (RVV_REQUIRE_RV64BIT): Ditto. (RVV_REQUIRE_ZVE64): Ditto. (RVV_REQUIRE_ELEN_FP_32): Ditto. (RVV_REQUIRE_ELEN_FP_64): Ditto. (enum operand_type_index): New enum. (DEF_RVV_OP_TYPE): New macro. (enum predication_type_index): New enum. (DEF_RVV_PRED_TYPE): New macro. (enum rvv_base_type): New enum. (struct rvv_builtin_suffixes): New struct. (struct rvv_arg_type_info): Ditto. (struct rvv_type_info): Ditto. (struct rvv_op_info): Ditto. (class registered_function): New class. (class function_base): Ditto. (class function_shape): Ditto. (struct function_group_info): New struct. (class GTY): New class. (class function_builder): Ditto. (class function_call_info): Ditto. (function_call_info::function_returns_void_p): New function. (class function_expander): New class. (function_instance::operator!=): New function. (function_expander::expand): Ditto. (function_expander::add_input_operand): Ditto. (function_base::call_properties): Ditto.
2022-10-21Support Intel AVX-VNNI-INT8Kong Lingling1-1/+1
gcc/ChangeLog * common/config/i386/cpuinfo.h (get_available_features): Detect avxvnniint8. * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AVXVNNIINT8_SET): New. (OPTION_MASK_ISA2_AVXVNNIINT8_UNSET): Ditto. (ix86_handle_option): Handle -mavxvnniint8. * common/config/i386/i386-cpuinfo.h (enum processor_features): Add FEATURE_AVXVNNIINT8. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for avxvnniint8. * config.gcc: Add avxvnniint8intrin.h. * config/i386/avxvnniint8intrin.h: New file. * config/i386/cpuid.h (bit_AVXVNNIINT8): New. * config/i386/i386-builtin.def: Add new builtins. * config/i386/i386-c.cc (ix86_target_macros_internal): Define __AVXVNNIINT8__. * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint8. (ix86_valid_target_attribute_inner_p): Handle avxvnniint8. * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT8) New.. * config/i386/i386.opt: Add option -mavxvnniint8. * config/i386/immintrin.h: Include avxvnniint8intrin.h. * config/i386/sse.md (UNSPEC_VPMADDUBSWACCD UNSPEC_VPMADDUBSWACCSSD,UNSPEC_VPMADDWDACCD, UNSPEC_VPMADDWDACCSSD): Rename according to new style. (vpdp<vpdotprodtype>_<mode>): New define_insn. * doc/extend.texi: Document avxvnniint8. * doc/invoke.texi: Document -mavxvnniint8. * doc/sourcebuild.texi: Document target avxvnniint8. gcc/testsuite/ChangeLog * g++.dg/other/i386-2.C: Add -mavxvnniint8. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/avx-check.h: Add avxvnniint8 check. * gcc.target/i386/sse-12.c: Add -mavxvnniint8. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * lib/target-supports.exp (check_effective_target_avxvnniint8): New. * gcc.target/i386/avxvnniint8-1.c: Ditto. * gcc.target/i386/avxvnniint8-vpdpbssd-2.c: Ditto. * gcc.target/i386/avxvnniint8-vpdpbssds-2.c: Ditto. * gcc.target/i386/avxvnniint8-vpdpbsud-2.c: Ditto. * gcc.target/i386/avxvnniint8-vpdpbsuds-2.c: Ditto. * gcc.target/i386/avxvnniint8-vpdpbuud-2.c: Ditto. * gcc.target/i386/avxvnniint8-vpdpbuuds-2.c: Ditto. Co-authored-by: Hongyu Wang <hongyu.wang@intel.com> Co-authored-by: Haochen Jiang <haochen.jiang@intel.com>
2022-10-21Support Intel AVX-IFMAHongyu Wang1-1/+2
gcc/ * common/config/i386/i386-common.cc (OPTION_MASK_ISA_AVXIFMA_SET, OPTION_MASK_ISA2_AVXIFMA_UNSET, OPTION_MASK_ISA2_AVX2_UNSET): New macro. (ix86_handle_option): Handle -mavxifma. * common/config/i386/i386-cpuinfo.h (processor_types): Add FEATURE_AVXIFMA. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for avxifma. * common/config/i386/cpuinfo.h (get_available_features): Detect avxifma. * config.gcc: Add avxifmaintrin.h * config/i386/avx512ifmavlintrin.h: (_mm_madd52lo_epu64): Change to macro. (_mm_madd52hi_epu64): Likewise. (_mm256_madd52lo_epu64): Likewise. (_mm256_madd52hi_epu64): Likewise. * config/i386/avxifmaintrin.h: New header. * config/i386/cpuid.h (bit_AVXIFMA): New. * config/i386/i386-builtin.def: Add new builtins, and correct pattern names for AVX512IFMA. * config/i386/i386-builtins.cc (def_builtin): Handle AVX-IFMA builtins like AVX-VNNI. * config/i386/i386-c.cc (ix86_target_macros_internal): Define __AVXIFMA__. * config/i386/i386-expand.cc (ix86_check_builtin_isa_match): Relax ISA masks for AVXIFMA. * config/i386/i386-isa.def: Add AVXIFMA. * config/i386/i386-options.cc (isa2_opts): Add -mavxifma. (ix86_valid_target_attribute_inner_p): Handle avxifma. * config/i386/i386.md (isa): Add attr avxifma and avxifmavl. * config/i386/i386.opt: Add option -mavxifma. * config/i386/immintrin.h: Inculde avxifmaintrin.h. * config/i386/sse.md (avx_vpmadd52<vpmadd52type>_<mode>): Remove. (vpamdd52<vpmadd52type><mode><sd_maskz_name>): Remove. (vpamdd52huq<mode>_maskz): Rename to ... (vpmadd52huq<mode>_maskz): ... this. (vpamdd52luq<mode>_maskz): Rename to ... (vpmadd52luq<mode>_maskz): ... this. (vpmadd52<vpmadd52type><mode>): New define_insn. (vpmadd52<vpmadd52type>v8di): Likewise. (vpmadd52<vpmadd52type><mode>_maskz_1): Likewise. (vpamdd52<vpmadd52type><mode>_mask): Rename to ... (vpmadd52<vpmadd52type><mode>_mask): ... this. * doc/invoke.texi: Document -mavxifma. * doc/extend.texi: Document avxifma. * doc/sourcebuild.texi: Document target avxifma. gcc/testsuite/ * gcc.target/i386/avx-check.h: Add avxifma check. * gcc.target/i386/avx512ifma-vpmaddhuq-1.c: Remane.. * gcc.target/i386/avx512ifma-vpmaddhuq-1a.c: To this. * gcc.target/i386/avx512ifma-vpmaddluq-1.c: Ditto. * gcc.target/i386/avx512ifma-vpmaddluq-1a.c: Ditto. * gcc.target/i386/avx512ifma-vpmaddhuq-1b.c: New Test. * gcc.target/i386/avx512ifma-vpmaddluq-1b.c: Ditto. * gcc.target/i386/avx-ifma-1.c: Ditto. * gcc.target/i386/avx-ifma-2.c: Ditto. * gcc.target/i386/avx-ifma-3.c: Ditto. * gcc.target/i386/avx-ifma-4.c: Ditto. * gcc.target/i386/avx-ifma-5.c: Ditto. * gcc.target/i386/avx-ifma-6.c: Ditto. * gcc.target/i386/avx-ifma-vpmaddhuq-2.c: Ditto. * gcc.target/i386/avx-ifma-vpmaddluq-2.c: Ditto. * gcc.target/i386/sse-12.c: Add -mavxifma. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * lib/target-supports.exp (check_effective_target_avxifma): New.
2022-10-19gcc: Add 'mcf' thread model support from mcfgthreadLIU Hao1-0/+3
This patch adds the new thread model `mcf`, which implements mutexes and condition variables with the mcfgthread library. Source code for mcfgthread is available at <https://github.com/lhmouse/mcfgthread>. config/ChangeLog: * gthr.m4 (GCC_AC_THREAD_HEADER): Add new case for `mcf` thread model gcc/ChangeLog: * config/i386/mingw-mcfgthread.h: New file * config/i386/mingw32.h: Add builtin macro and default libraries for mcfgthread when thread model is `mcf` * config.gcc: Include 'i386/mingw-mcfgthread.h' when thread model is `mcf` * configure.ac: Recognize `mcf` as a valid thread model * config.in: Regenerate * configure: Regenerate libatomic/ChangeLog: * configure.tgt: Add new case for `mcf` thread model libgcc/ChangeLog: * config.host: Add new cases for `mcf` thread model * config/i386/gthr-mcf.h: New file * config/i386/t-mingw-mcfgthread: New file * config/i386/t-slibgcc-cygming: Add mcfgthread for libgcc DLL * configure: Regenerate libstdc++-v3/ChangeLog: * libsupc++/atexit_thread.cc (__cxa_thread_atexit): Use implementation from mcfgthread if available * libsupc++/guard.cc (__cxa_guard_acquire, __cxa_guard_release, __cxa_guard_abort): Use implementations from mcfgthread if available * configure: Regenerate
2022-10-17elf: ELF toolchain --without-{headers, newlib} should provide stdint.hArsen Arsenovic1-0/+5
stdint.h is considered a freestanding headers by C, and a valid stdint.h is required for certain parts of libstdc++' configuration, so we should simply provide one when we have no other way (i.e. newlib or user-specified sysroot) of getting one. * config.gcc: --target=*-elf --without-{newlib,headers} should provide stdint.h.
2022-10-11Generic configury support for shared libs on VxWorksOlivier Hainque1-0/+9
This change adds the configury bits to activate the build of shared libs on VxWorks ports configured with --enable-shared, for libraries variants where this is generally supported (rtp, code model !large - currently not compatible with -fPIC). Set lt_cv_deplibs_check_method in libtool.m4, so the build of libraries know how to establish dependencies. This is useful in configurations such as aarch64 where proper support of LSE relies on accurate dependency information between libstdc++ and libgcc_s to begin with. Regenerate configure scripts to reflect libtool.m4 change. 2022-10-09 Olivier Hainque <hainque@adacore.com> * libtool.m4 (*vxworks*): When enable_shared, set dynamic_linker and friends for rtp !large. Assume the linker has the required abilities and set lt_cv_deplibs_check_method. gcc/ * config.gcc (*vxworks*): Add t-slibgcc fragment if enable_shared. libgcc/ * config.host (*vxworks*): When enable_shared, add libgcc and crtstuff "shared" fragments for rtp except large code model. (aarch64*-wrs-vxworks7*): Remove t-slibgcc-libgcc from the list of fragments. 2022-10-09 Olivier Hainque <hainque@adacore.com> gcc/ * configure: Regenerate. libatomic/ * configure: Regenerate. libbacktrace/ * configure: Regenerate. libcc1/ * configure: Regenerate. libffi/ * configure: Regenerate. libgfortran/ * configure: Regenerate. libgomp/ * configure: Regenerate. libitm/ * configure: Regenerate. libobjc/ * configure: Regenerate. liboffloadmic/ * configure: Regenerate. liboffloadmic/ * plugin/configure: Regenerate. libphobos/ * configure: Regenerate. libquadmath/ * configure: Regenerate. libsanitizer/ * configure: Regenerate. libssp/ * configure: Regenerate. libstdc++-v3/ * configure: Regenerate. libvtv/ * configure: Regenerate. lto-plugin/ * configure: Regenerate. zlib/ * configure: Regenerate.
2022-10-09MIPS: improve -march=native arch detectionYunQiang Su1-0/+2
If we cannot get info from options and cpuinfo, we try to get from: 1. getauxval(AT_BASE_PLATFORM), introduced since Linux 5.7 2. _MIPS_ARCH from host compiler. mnan=2008 option is also used if __mips_nan2008__ is used. This can fix the wrong loader usage on r5/r6 platform with -march=native. gcc/ChangeLog: * config.gcc: set with_arch to default_mips_arch if no defined. * config/mips/driver-native.cc (host_detect_local_cpu): try getauxval(AT_BASE_PLATFORM) and _MIPS_ARCH, too. pass -mnan=2008 if __mips_nan2008__ is defined. * config.in: define HAVE_SYS_AUXV_H and HAVE_GETAUXVAL. * configure.ac: detect sys/auxv.h and getauxval. * configure: regenerated.
2022-10-05RISC-V: Introduce RVV header to enable builtin typesJu-Zhe Zhong1-0/+1
gcc/ChangeLog: * config.gcc: Add riscv_vector.h. * config/riscv/riscv-builtins.cc: Add RVV builtin types support. * config/riscv/riscv-c.cc (riscv_pragma_intrinsic): New function. (riscv_register_pragmas): Ditto. * config/riscv/riscv-protos.h (riscv_register_pragmas): Ditto. (init_builtins): Move declaration from riscv-vector-builtins.h to riscv-protos.h. (mangle_builtin_type): Ditto. (verify_type_context): Ditto. (handle_pragma_vector): New function. * config/riscv/riscv-vector-builtins.cc (GTY): New variable. (register_vector_type): New function. (init_builtins): Add RVV builtin types support. (handle_pragma_vector): New function. * config/riscv/riscv-vector-builtins.h (GCC_RISCV_V_BUILTINS_H): Change name according to file name. (GCC_RISCV_VECTOR_BUILTINS_H): Ditto. (init_builtins): Remove declaration in riscv-vector-builtins.h. (mangle_builtin_type): Ditto. (verify_type_context): Ditto. * config/riscv/riscv.cc: Adjust for RVV builtin types support. * config/riscv/riscv.h (REGISTER_TARGET_PRAGMAS): New macro. * config/riscv/t-riscv: Remove redundant file including. * config/riscv/riscv_vector.h: New file. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pragma-1.c: New test. * gcc.target/riscv/rvv/base/pragma-2.c: New test. * gcc.target/riscv/rvv/base/pragma-3.c: New test. * gcc.target/riscv/rvv/base/user-1.c: New test. * gcc.target/riscv/rvv/base/user-2.c: New test. * gcc.target/riscv/rvv/base/user-3.c: New test. * gcc.target/riscv/rvv/base/user-4.c: New test. * gcc.target/riscv/rvv/base/user-5.c: New test. * gcc.target/riscv/rvv/base/user-6.c: New test. * gcc.target/riscv/rvv/base/vread_csr.c: New test. * gcc.target/riscv/rvv/base/vwrite_csr.c: New test.
2022-10-02Define GCC_DRIVER_HOST_INITIALIZATION for VxWorks targetsMarc Poulhiès1-0/+2
We need to perform static links by default on VxWorks, where the use of shared libraries involves unusual steps compared to standard native systems. This has to be conveyed before the lang_specific_driver code gets invoked (in particular for g++), so specs aren't available. This change defines the GCC_DRIVER_HOST_INITIALIZATION macro for VxWorks, to insert a -static option in case the user hasn't provided any explicit indication on the command line of the kind of link desired. While a HOST macro doesn't seem appropriate to control a target OS driven behavior, this matches other uses and won't conflict as VxWorks is not supported on any of the other configurations using this macro. gcc/ * config/vxworks-driver.cc: New. * config.gcc (*vxworks*): Add vxworks-driver.o in extra_gcc_objs. * config/t-vxworks: Add vxworks-driver.o. * config/vxworks.h (GCC_DRIVER_HOST_INITIALIZATION): New.
2022-09-29aarch64: Small config.gcc cleanupsRichard Sandiford1-8/+0
The aarch64-option-extensions.def parsing in config.gcc had some code left over from when it tried to parse the whole macro definition. Also, config.gcc now only looks at the first fields of the aarch64-arches.def entries. gcc/ * config.gcc: Remove dead aarch64-option-extensions.def code. * config/aarch64/aarch64-arches.def: Update comment.
2022-09-29RISC-V: Add ABI-defined RVV types.Ju-Zhe Zhong1-0/+1
gcc/ChangeLog: * config.gcc: Add riscv-vector-builtins.o. * config/riscv/riscv-builtins.cc (riscv_init_builtins): Add RVV builtin function. * config/riscv/riscv-protos.h (riscv_v_ext_enabled_vector_mode_p): New function. * config/riscv/riscv.cc (ENTRY): New macro. (riscv_v_ext_enabled_vector_mode_p): New function. (riscv_mangle_type): Add RVV mangle. (riscv_vector_mode_supported_p): Adjust RVV machine mode. (riscv_verify_type_context): Add context check for RVV. (riscv_vector_alignment): Add RVV alignment target hook support. (TARGET_VECTOR_MODE_SUPPORTED_P): New target hook support. (TARGET_VERIFY_TYPE_CONTEXT): Ditto. (TARGET_VECTOR_ALIGNMENT): Ditto. * config/riscv/t-riscv: Add riscv-vector-builtins.o * config/riscv/riscv-vector-builtins.cc: New file. * config/riscv/riscv-vector-builtins.def: New file. * config/riscv/riscv-vector-builtins.h: New file. * config/riscv/riscv-vector-switch.def: New file. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/abi-1.c: New test. * gcc.target/riscv/rvv/base/abi-2.c: New test. * gcc.target/riscv/rvv/base/abi-3.c: New test. * gcc.target/riscv/rvv/base/abi-4.c: New test. * gcc.target/riscv/rvv/base/abi-5.c: New test. * gcc.target/riscv/rvv/base/abi-6.c: New test. * gcc.target/riscv/rvv/base/abi-7.c: New test. * gcc.target/riscv/rvv/rvv.exp: New test.
2022-09-26nvptx: Allow '--with-arch' to override the default '-misa'Thomas Schwinge1-0/+5
gcc/ * config.gcc (with_arch) [nvptx]: Allow '--with-arch' to override the default. * config/nvptx/gen-multilib-matches.sh: New. * config/nvptx/t-nvptx (MULTILIB_OPTIONS, MULTILIB_MATCHES) (MULTILIB_EXCEPTIONS): Handle this. * doc/install.texi (Specific) <nvptx-*-none>: Document this. * doc/invoke.texi (Nvidia PTX Options): Likewise.
2022-09-26nvptx: Introduce dummy multilib option for default '-misa=sm_30'Thomas Schwinge1-0/+1
... primarily in preparation for later changes. gcc/ * config.gcc (TM_MULTILIB_CONFIG) [nvptx]: Set to '$with_arch'. * config/nvptx/t-nvptx (MULTILIB_OPTIONS, MULTILIB_MATCHES) (MULTILIB_EXCEPTIONS): Handle it.
2022-09-26nvptx: Make default '-misa=sm_30' explicitThomas Schwinge1-0/+16
... primarily in preparation for later changes. gcc/ * config.gcc (with_arch) [nvptx]: Set to 'sm_30'. * config/nvptx/nvptx.cc (nvptx_option_override): Assert that '-misa' appeared. * config/nvptx/nvptx.h (OPTION_DEFAULT_SPECS): Define. * config/nvptx/nvptx.opt (misa=): Remove 'Init'.
2022-09-23RISC-V: Support poly move manipulation and selftests.zhongjuzhe1-1/+1
gcc/ChangeLog: * common/config/riscv/riscv-common.cc: Change "static void" to "void". * config.gcc: Add riscv-selftests.o * config/riscv/predicates.md: Allow const_poly_int. * config/riscv/riscv-protos.h (riscv_reinit): New function. (riscv_parse_arch_string): change as exten function. (riscv_run_selftests): New function. * config/riscv/riscv.cc (riscv_cannot_force_const_mem): Don't allow poly into const pool. (riscv_report_v_required): New function. (riscv_expand_op): New function. (riscv_expand_mult_with_const_int): New function. (riscv_legitimize_poly_move): Ditto. (riscv_legitimize_move): New function. (riscv_hard_regno_mode_ok): Add VL/VTYPE register allocation and fix vector RA. (riscv_convert_vector_bits): Fix riscv_vector_chunks configuration for -marh no 'v'. (riscv_reinit): New function. (TARGET_RUN_TARGET_SELFTESTS): New target hook support. * config/riscv/t-riscv: Add riscv-selftests.o. * config/riscv/riscv-selftests.cc: New file. gcc/testsuite/ChangeLog: * selftests/riscv/empty-func.rtl: New test.
2022-09-02d: Fix #error You must define PREFERRED_DEBUGGING_TYPE if DWARF is not supportedIain Buclaw1-4/+6
This moves all D front-end specific target definitions out of the main target headers, and into its own header that is included by tm_d.h instead of pulling in the same headers as tm_p.h. This fixes the build on target configurations that pull in the default D language target hooks, and subsequently trigger an error because the definition of PREFERRED_DEBUGGING_TYPE is behind tm.h, the one header that is avoided from being included in default-d.cc. PR d/105659 gcc/ChangeLog: * config.gcc: Set tm_d_file to ${cpu_type}/${cpu_type}-d.h. * config/aarch64/aarch64-d.cc: Include tm_d.h. * config/aarch64/aarch64-protos.h (aarch64_d_target_versions): Move to config/aarch64/aarch64-d.h. (aarch64_d_register_target_info): Likewise. * config/aarch64/aarch64.h (TARGET_D_CPU_VERSIONS): Likewise. (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. * config/arm/arm-d.cc: Include tm_d.h and arm-protos.h instead of tm_p.h. * config/arm/arm-protos.h (arm_d_target_versions): Move to config/arm/arm-d.h. (arm_d_register_target_info): Likewise. * config/arm/arm.h (TARGET_D_CPU_VERSIONS): Likewise. (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. * config/default-d.cc: Remove memmodel.h include. * config/freebsd-d.cc: Include tm_d.h instead of tm_p.h. * config/glibc-d.cc: Likewise. * config/i386/i386-d.cc: Include tm_d.h. * config/i386/i386-protos.h (ix86_d_target_versions): Move to config/i386/i386-d.h. (ix86_d_register_target_info): Likewise. (ix86_d_has_stdcall_convention): Likewise. * config/i386/i386.h (TARGET_D_CPU_VERSIONS): Likewise. (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. (TARGET_D_HAS_STDCALL_CONVENTION): Likewise. * config/i386/winnt-d.cc: Include tm_d.h instead of tm_p.h. * config/mips/mips-d.cc: Include tm_d.h. * config/mips/mips-protos.h (mips_d_target_versions): Move to config/mips/mips-d.h. (mips_d_register_target_info): Likewise. * config/mips/mips.h (TARGET_D_CPU_VERSIONS): Likewise. (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. * config/netbsd-d.cc: Include tm_d.h instead of tm.h and memmodel.h. * config/openbsd-d.cc: Likewise. * config/pa/pa-d.cc: Include tm_d.h. * config/pa/pa-protos.h (pa_d_target_versions): Move to config/pa/pa-d.h. (pa_d_register_target_info): Likewise. * config/pa/pa.h (TARGET_D_CPU_VERSIONS): Likewise. (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. * config/riscv/riscv-d.cc: Include tm_d.h. * config/riscv/riscv-protos.h (riscv_d_target_versions): Move to config/riscv/riscv-d.h. (riscv_d_register_target_info): Likewise. * config/riscv/riscv.h (TARGET_D_CPU_VERSIONS): Likewise. (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. * config/rs6000/rs6000-d.cc: Include tm_d.h. * config/rs6000/rs6000-protos.h (rs6000_d_target_versions): Move to config/rs6000/rs6000-d.h. (rs6000_d_register_target_info): Likewise. * config/rs6000/rs6000.h (TARGET_D_CPU_VERSIONS) Likewise.: (TARGET_D_REGISTER_CPU_TARGET_INFO) Likewise.: * config/s390/s390-d.cc: Include tm_d.h. * config/s390/s390-protos.h (s390_d_target_versions): Move to config/s390/s390-d.h. (s390_d_register_target_info): Likewise. * config/s390/s390.h (TARGET_D_CPU_VERSIONS): Likewise. (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. * config/sol2-d.cc: Include tm_d.h instead of tm.h and memmodel.h. * config/sparc/sparc-d.cc: Include tm_d.h. * config/sparc/sparc-protos.h (sparc_d_target_versions): Move to config/sparc/sparc-d.h. (sparc_d_register_target_info): Likewise. * config/sparc/sparc.h (TARGET_D_CPU_VERSIONS): Likewise. (TARGET_D_REGISTER_CPU_TARGET_INFO): Likewise. * configure: Regenerate. * configure.ac (tm_d_file): Remove defaults.h. (tm_d_include_list): Remove options.h and insn-constants.h. * config/aarch64/aarch64-d.h: New file. * config/arm/arm-d.h: New file. * config/i386/i386-d.h: New file. * config/mips/mips-d.h: New file. * config/pa/pa-d.h: New file. * config/riscv/riscv-d.h: New file. * config/rs6000/rs6000-d.h: New file. * config/s390/s390-d.h: New file. * config/sparc/sparc-d.h: New file.
2022-09-02STABS: remove -gstabs and -gxcoff functionalityMartin Liska1-116/+116
gcc/ChangeLog: * Makefile.in: Remove -gstabs option support, DBX-related macros and DBX debugging info support. * collect2.cc (scan_prog_file): Likewise. * common.opt: Likewise. * config.gcc: Likewise. * config.in: Likewise. * config/aarch64/aarch64-elf.h (DBX_DEBUGGING_INFO): Likewise. * config/alpha/alpha.cc: Likewise. * config/alpha/elf.h (ASM_SPEC): Likewise. * config/arc/arc.h (DBX_DEBUGGING_INFO): Likewise. (DBX_CONTIN_LENGTH): Likewise. * config/arm/aout.h (DBX_DEBUGGING_INFO): Likewise. (DBX_CONTIN_LENGTH): Likewise. * config/arm/netbsd-elf.h (DBX_CONTIN_LENGTH): Likewise. * config/darwin.h (DSYMUTIL_SPEC): Likewise. (ASM_DEBUG_SPEC): Likewise. (DBX_DEBUGGING_INFO): Likewise. (DBX_USE_BINCL): Likewise. (DBX_CONTIN_LENGTH): Likewise. (DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END): Likewise. * config/epiphany/epiphany.h (DBX_DEBUGGING_INFO): Likewise. (DBX_CONTIN_LENGTH): Likewise. * config/i386/bsd.h (DBX_NO_XREFS): Likewise. (DBX_CONTIN_LENGTH): Likewise. * config/i386/gas.h (DBX_NO_XREFS): Likewise. (DBX_CONTIN_LENGTH): Likewise. * config/ia64/ia64.h: Likewise. * config/ia64/sysv4.h (DBX_DEBUGGING_INFO): Likewise. * config/m68k/linux.h (DBX_CONTIN_LENGTH): Likewise. * config/m68k/openbsd.h (DBX_DEBUGGING_INFO): Likewise. (DBX_CONTIN_LENGTH): Likewise. (DBX_CONTIN_CHAR): Likewise. * config/mips/mips.cc (mips_output_filename): Likewise. (mips_option_override): Likewise. * config/mips/mips.h (SUBTARGET_ASM_DEBUGGING_SPEC): Likewise. (DBX_DEBUGGING_INFO): Likewise. (DBX_CONTIN_LENGTH): Likewise. (DBX_REGISTER_NUMBER): Likewise. (GP_DBX_FIRST): Likewise. (FP_DBX_FIRST): Likewise. (MD_DBX_FIRST): Likewise. * config/nvptx/nvptx.cc: Likewise. * config/openbsd.h (DBX_NO_XREFS): Likewise. * config/pa/pa-64.h (DBX_DEBUGGING_INFO): Likewise. * config/pa/pa.h (ASSEMBLER_DIALECT): Likewise. (DBX_CONTIN_LENGTH): Likewise. * config/pa/som.h (PREFERRED_DEBUGGING_TYPE): Likewise. (DBX_USE_BINCL): Likewise. (DBX_LINES_FUNCTION_RELATIVE): Likewise. (DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END): Likewise. * config/pdp11/pdp11.cc: Likewise. * config/pdp11/pdp11.h (DBX_DEBUGGING_INFO): Likewise. (PREFERRED_DEBUGGING_TYPE): Likewise. (DBX_CONTIN_LENGTH): Likewise. * config/rs6000/rs6000-builtin.cc: Likewise. * config/rs6000/rs6000-call.cc: Likewise. * config/rs6000/rs6000-logue.cc (defined): Likewise. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Likewise. (HAVE_XCOFF_DWARF_EXTRAS): Likewise. (rs6000_xcoff_declare_function_name): Likewise. * config/rs6000/sysv4.h (DBX_DEBUGGING_INFO): Likewise. (DBX_FUNCTION_FIRST): Likewise. * config/rs6000/xcoff.h (XCOFF_DEBUGGING_INFO): Likewise. * config/rx/rx.h (DBX_DEBUGGING_INFO): Likewise. * config/sh/elf.h (DBX_LINES_FUNCTION_RELATIVE): Likewise. (DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END): Likewise. * config/sol2.h (NO_DBX_BNSYM_ENSYM): Likewise. * config/sparc/freebsd.h (DBX_CONTIN_CHAR): Likewise. * config/sparc/netbsd-elf.h (DBX_CONTIN_CHAR): Likewise. * config/sparc/sparc.h (DBX_CONTIN_LENGTH): Likewise. * config/vax/vax.cc (vax_file_start): Likewise. * config/vax/vax.h (DBX_DEBUGGING_INFO): Likewise. (DBX_CONTIN_LENGTH): Likewise. (DBX_CONTIN_CHAR): Likewise. (DBX_NO_XREFS): Likewise. (DBX_STATIC_STAB_DATA_SECTION): Likewise. * config/vx-common.h (DBX_DEBUGGING_INFO): Likewise. (XCOFF_DEBUGGING_INFO): Likewise. * configure: Regenerate. Likewise. * configure.ac: Likewise. * debug.h: Likewise. * doc/install.texi: Likewise. * doc/invoke.texi: Likewise. * doc/passes.texi: Likewise. * doc/tm.texi: Likewise. * doc/tm.texi.in: Likewise. * dwarf2asm.cc (XCOFF_DEBUGGING_INFO): Likewise. (dw2_asm_output_nstring): Likewise. (USE_LINKONCE_INDIRECT): Likewise. * dwarf2out.cc (XCOFF_DEBUGGING_INFO): Likewise. (HAVE_XCOFF_DWARF_EXTRAS): Likewise. (output_fde): Likewise. (output_call_frame_info): Likewise. (have_macinfo): Likewise. (add_AT_loc_list): Likewise. (add_AT_view_list): Likewise. (output_compilation_unit_header): Likewise. (output_pubnames): Likewise. (output_aranges): Likewise. (output_line_info): Likewise. (output_macinfo): Likewise. (dwarf2out_finish): Likewise. (dwarf2out_early_finish): Likewise. * final.cc (final_scan_insn_1): Likewise. (rest_of_handle_final): Likewise. * flag-types.h (enum debug_info_type): Likewise. (DBX_DEBUG): Likewise. (XCOFF_DEBUG): Likewise. * function.cc (defined): Likewise. * gcc.cc (defined): Likewise. (ASM_DEBUG_SPEC): Likewise. (ASM_DEBUG_OPTION_SPEC): Likewise. * opts.cc (common_handle_option): Likewise. (set_debug_level): Likewise. * system.h (fancy_abort): Likewise. * target-def.h (TARGET_ASM_CONSTRUCTOR): Likewise. (TARGET_ASM_DESTRUCTOR): Likewise. * toplev.cc (defined): Likewise. * varasm.cc: Likewise. * config/dbxcoff.h: Removed. * config/dbxelf.h: Removed. * dbxout.cc: Removed. * dbxout.h: Removed. * gstab.h: Removed. * stab.def: Removed. * xcoffout.cc: Removed. * xcoffout.h: Removed. gcc/go/ChangeLog: * go-lang.cc (go_langhook_pushdecl): Remove -gstabs option support, DBX-related macros and DBX debugging info support. * gospec.cc (lang_specific_driver): Likewise. gcc/testsuite/ChangeLog: * lib/gcc-dg.exp: Remove -gstabs option support, DBX-related macros and DBX debugging info support. * lib/gfortran-dg.exp: Likewise. * lib/target-supports.exp: Likewise. * g++.dg/cpp0x/alias-decl-debug-0.C: Removed. * g++.dg/other/PR23205.C: Removed. * g++.dg/other/pr23205-2.C: Removed. * gcc.dg/20040813-1.c: Removed. * gcc.dg/darwin-20040809-2.c: Removed. * gcc.dg/debug/pr35154.c: Removed. * gcc.dg/pr69471-2.c: Removed. * gcc.target/powerpc/stabs-attrib-vect-darwin.c: Removed. * gcc.target/s390/20041216-1.c: Removed. * gfortran.dg/debug/pr35154-stabs.f: Removed. * objc.dg/stabs-1.m: Removed.
2022-08-3132-bit PA-RISC with HP-UX: remove deprecated portsMartin Liska1-82/+3
ChangeLog: * configure: Regenerate. * configure.ac: Delete hpux9 and hpux10. config/ChangeLog: * mh-pa-hpux10: Removed. contrib/ChangeLog: * config-list.mk: Remove deprecated ports. contrib/header-tools/ChangeLog: * README: Remove deprecated ports. * reduce-headers: Likewise. gcc/ChangeLog: * config.build: Remove deprecated ports. * config.gcc: Likewise. * config.host: Likewise. * configure.ac: Likewise. * configure: Regenerate. * config/pa/pa-hpux10.h: Removed. * config/pa/pa-hpux10.opt: Removed. * config/pa/t-dce-thr: Removed. gnattools/ChangeLog: * configure.ac: Remove deprecated ports. * configure: Regenerate. libstdc++-v3/ChangeLog: * configure: Regenerate. * crossconfig.m4: Remove deprecated ports. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/lambda/lambda-conv.C: Remove useless test. * gcc.c-torture/execute/ieee/hugeval.x: Likewise. * gcc.dg/torture/pr47917.c: Likewise. * lib/target-supports.exp: Likewise. libgcc/ChangeLog: * config.host: Remove hppa. libitm/ChangeLog: * configure: Regenerate. fixincludes/ChangeLog: * configure: Regenerate.
2022-08-31cr16: remove leftover in config.gccMartin Liska1-7/+1
gcc/ChangeLog: * config.gcc: Remove cr16.
2022-08-30m32c-rtems: remove obsoleted portMartin Liska1-6/+0
contrib/ChangeLog: * config-list.mk: Remove the port. gcc/ChangeLog: * config.gcc: Remove the port. * config/m32c/rtems.h: Removed. libgcc/ChangeLog: * config.host: Remove the port.
2022-08-17arm: Define with_float to hard when target name ends with hfChristophe Lyon1-0/+7
On arm, the --with-float= configure option is used to define include files search path (among other things). However, when targeting arm-linux-gnueabihf, one would expect to automatically default to the hard-float ABI, but this is not the case. As a consequence, GCC bootstrap fails on an arm-linux-gnueabihf target if --with-float=hard is not used. This patch checks if the target name ends with 'hf' and defines with_float to hard if not already defined. This is achieved in gcc/config.gcc, just before selecting the default CPU depending on the $with_float value. 2022-08-17 Christophe Lyon <christophe.lyon@arm.com> gcc/ * config.gcc (arm): Define with_float to hard if target name ends with 'hf'.
2022-06-25Remove long deprecated tilegx and tilepro portsJeff Law1-29/+1
/ * MAINTAINERS: Remove tilegx and tilepro entries. * configure.ac: Remove tilegx and tilepro stanzas. * configure: Rebuilt. contrib/ * config-list.mk: Remove tilegx and tilepro entries. * gcc_update: Remove tilegx and tilepro entries. gcc/ * common/config/tilegx/tilegx-common.cc: Removed. * common/config/tilepro/tilepro-common.cc: Removed. * config.gcc: Remove tilegx and tilepro entries. * config/tilegx/constraints.md: Removed. * config/tilegx/feedback.h: Removed. * config/tilegx/linux.h: Removed. * config/tilegx/mul-tables.cc: Removed. * config/tilegx/predicates.md: Removed. * config/tilegx/sync.md: Removed. * config/tilegx/t-tilegx: Removed. * config/tilegx/tilegx-builtins.h: Removed. * config/tilegx/tilegx-c.cc: Removed. * config/tilegx/tilegx-generic.md: Removed. * config/tilegx/tilegx-modes.def: Removed. * config/tilegx/tilegx-multiply.h: Removed. * config/tilegx/tilegx-opts.h: Removed. * config/tilegx/tilegx-protos.h: Removed. * config/tilegx/tilegx.cc: Removed. * config/tilegx/tilegx.h: Removed. * config/tilegx/tilegx.md: Removed. * config/tilegx/tilegx.opt: Removed. * config/tilepro/constraints.md: Removed. * config/tilepro/feedback.h: Removed. * config/tilepro/gen-mul-tables.cc: Removed. * config/tilepro/linux.h: Removed. * config/tilepro/mul-tables.cc: Removed. * config/tilepro/predicates.md: Removed. * config/tilepro/t-tilepro: Removed. * config/tilepro/tilepro-builtins.h: Removed. * config/tilepro/tilepro-c.cc: Removed. * config/tilepro/tilepro-generic.md: Removed. * config/tilepro/tilepro-modes.def: Removed. * config/tilepro/tilepro-multiply.h: Removed. * config/tilepro/tilepro-protos.h: Removed. * config/tilepro/tilepro.cc: Removed. * config/tilepro/tilepro.h: Removed. * config/tilepro/tilepro.md: Removed. * config/tilepro/tilepro.opt: Removed. * configure.ac: Remove tilegx and tilepro entries. * configure: Rebuilt. * doc/extend.texi: Remove tilegx and tilepro entries. * doc/install.texi: Remove tilegx and tilepro entries. * doc/invoke.texi: Remove tilegx and tilepro entries. * doc/md.texi: Remove tilegx and tilepro entries. gcc/testsuite/ * gcc.dg/lower-subreg-1.c: Remove tilegx and tilepro entries. * gcc.misc-tests/linkage.exp: Remove tilegx and tilepro entries. libgcc/ * config.host: Removed tilegx and tilepro entries. * config/tilegx/sfp-machine.h: Removed. * config/tilegx/sfp-machine32.h: Removed. * config/tilegx/sfp-machine64.h: Removed. * config/tilegx/t-crtstuff: Removed. * config/tilegx/t-softfp: Removed. * config/tilegx/t-tilegx: Removed. * config/tilepro/atomic.c: Removed. * config/tilepro/atomic.h: Removed. * config/tilepro/linux-unwind.h: Removed. * config/tilepro/sfp-machine.h: Removed. * config/tilepro/softdivide.c: Removed. * config/tilepro/softmpy.S: Removed. * config/tilepro/t-crtstuff: Removed. * config/tilepro/t-tilepro: Removed.
2022-05-24amdgcn: Add gfx90a supportAndrew Stubbs1-1/+1
This adds architecture options and multilibs for the AMD GFX90a GPUs. It also tidies up some of the ISA selection code, and corrects a few small mistake in the gfx908 naming. gcc/ChangeLog: * config.gcc (amdgcn): Accept --with-arch=gfx908 and gfx90a. * config/gcn/gcn-opts.h (enum gcn_isa): New. (TARGET_GCN3): Use enum gcn_isa. (TARGET_GCN3_PLUS): Likewise. (TARGET_GCN5): Likewise. (TARGET_GCN5_PLUS): Likewise. (TARGET_CDNA1): New. (TARGET_CDNA1_PLUS): New. (TARGET_CDNA2): New. (TARGET_CDNA2_PLUS): New. (TARGET_M0_LDS_LIMIT): New. (TARGET_PACKED_WORK_ITEMS): New. * config/gcn/gcn.cc (gcn_isa): Change to enum gcn_isa. (gcn_option_override): Recognise CDNA ISA variants. (gcn_omp_device_kind_arch_isa): Support gfx90a. (gcn_expand_prologue): Make m0 init optional. Add support for packed work items. (output_file_start): Support gfx90a. (gcn_hsa_declare_function_name): Support gfx90a metadata. * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS):Add __CDNA1__ and __CDNA2__. * config/gcn/gcn.md (<su>mulsi3_highpart): Use TARGET_GCN5_PLUS. (<su>mulsi3_highpart_imm): Likewise. (<su>mulsidi3): Likewise. (<su>mulsidi3_imm): Likewise. * config/gcn/gcn.opt (gpu_type): Add gfx90a. * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX90a): New. (main): Support gfx90a. * config/gcn/t-gcn-hsa: Add gfx90a multilib. * config/gcn/t-omp-device: Add gfx90a isa. libgomp/ChangeLog: * plugin/plugin-gcn.c (EF_AMDGPU_MACH): Add EF_AMDGPU_MACH_AMDGCN_GFX90a. (gcn_gfx90a_s): New. (isa_hsa_name): Support gfx90a. (isa_code): Likewise.
2022-05-23[x86_64]: Zhaoxin lujiazui enablementMayshao1-1/+9
This patch fix Zhaoxin CPU vendor ID detection problem and add zhaoxin "lujiazui" processor support. Currently gcc can't recognize Zhaoxin CPU (vendor ID "CentaurHauls" and "Shanghai") if user use -march=native option, which is confusing for users. This patch enables -march=native in zhaoxin family 7th processor and -march/-mtune=lujiazui, costs and tunning are set according to the characteristics of the processor. We add a new md file to describe lujiazui pipeline. Testing: Bootstrap is ok, and no regressions for i386/x86-64 testsuite. Background: Related Zhaoxin linux kernel patch can be found at: https://lore.kernel.org/lkml/01042674b2f741b2aed1f797359bdffb@zhaoxin.com/ Related Zhaoxin glibc patch can be found at: https://sourceware.org/git/?p=glibc.git;a=commit;h=32ac0b988466785d6e3cc1dffc364bb26fc63193 gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Detect the specific type of Zhaoxin CPU, and return Zhaoxin CPU name. (cpu_indicator_init): Handle Zhaoxin processors. * common/config/i386/i386-common.cc: Add lujiazui. * common/config/i386/i386-cpuinfo.h (enum processor_vendor): Add VENDOR_ZHAOXIN. (enum processor_types): Add ZHAOXIN_FAM7H. (enum processor_subtypes): Add ZHAOXIN_FAM7H_LUJIAZUI. * config.gcc: Add lujiazui. * config/i386/cpuid.h (signature_SHANGHAI_ebx): Add Signatures for zhaoxin (signature_SHANGHAI_ecx): Ditto. (signature_SHANGHAI_edx): Ditto. * config/i386/driver-i386.cc (host_detect_local_cpu): Let -march=native recognize lujiazui processors. * config/i386/i386-c.cc (ix86_target_macros_internal): Add lujiazui. * config/i386/i386-options.cc (m_LUJIAZUI): New_definition. * config/i386/i386.h (enum processor_type): Ditto. * config/i386/i386.md: Add lujiazui. * config/i386/x86-tune-costs.h (struct processor_costs): Add lujiazui costs. * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add lujiazui. (ix86_adjust_cost): Ditto. * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Add lujiazui Tunnings. (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto. (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto. (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto. (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto. (X86_TUNE_MOVX): Ditto. (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto. (X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto. (X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto. (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto. (X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto. (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto. (X86_TUNE_USE_LEAVE): Ditto. (X86_TUNE_PUSH_MEMORY): Ditto. (X86_TUNE_LCP_STALL): Ditto. (X86_TUNE_USE_INCDEC): Ditto. (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto. (X86_TUNE_OPT_AGU): Ditto. (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto. (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto. (X86_TUNE_USE_SAHF): Ditto. (X86_TUNE_USE_BT): Ditto. (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto. (X86_TUNE_ONE_IF_CONV_INSN): Ditto. (X86_TUNE_AVOID_MFENCE): Ditto. (X86_TUNE_EXPAND_ABS): Ditto. (X86_TUNE_USE_SIMODE_FIOP): Ditto. (X86_TUNE_USE_FFREEP): Ditto. (X86_TUNE_EXT_80387_CONSTANTS): Ditto. (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto. (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto. (X86_TUNE_SSE_TYPELESS_STORES): Ditto. (X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto. * doc/extend.texi: Add details about lujiazui. * doc/invoke.texi: Add details about lujiazui. * config/i386/lujiazui.md: Introduce lujiazui cpu and include new md file. gcc/testsuite/ChangeLog: * gcc.target/i386/funcspec-56.inc: Test -arch=lujiauzi and -tune=lujiazui. * g++.target/i386/mv32.C: Ditto. Signed-off-by: mayshao <mayshao-oc@zhaoxin.com>
2022-05-20AArch64: Cleanup CPU option processing codeWilco Dijkstra1-42/+1
The --with-cpu/--with-arch configure option processing not only checks valid arguments but also sets TARGET_CPU_DEFAULT with a CPU and extension bitmask. This isn't used however since a --with-cpu is translated into a -mcpu option which is processed as if written on the command-line (so TARGET_CPU_DEFAULT is never accessed). So remove all the complex processing and bitmask, and just validate the option. Fix a bug that always reports valid architecture extensions as invalid. As a result the CPU processing in aarch64.c can be simplified. gcc/ * config.gcc (aarch64*-*-*): Simplify --with-cpu and --with-arch processing. Add support for architectural extensions. * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Remove AARCH64_CPU_DEFAULT_FLAGS. (TARGET_CPU_NBITS): Remove. (TARGET_CPU_MASK): Remove. * config/aarch64/aarch64.cc (AARCH64_CPU_DEFAULT_FLAGS): Remove define. (get_tune_cpu): Assert CPU is always valid. (get_arch): Assert architecture is always valid. (aarch64_override_options): Cleanup CPU selection code and simplify logic. (aarch64_option_restore): Remove unnecessary checks on tune.
2022-04-12IBM zSystems: Add support for z16 as CPU name.Andreas Krebbel1-1/+1
So far z16 was identified as arch14. After the machine has been announced we can now add the real name. gcc/ChangeLog: * common/config/s390/s390-common.cc: Rename PF_ARCH14 to PF_Z16. * config.gcc: Add z16 as march/mtune switch. * config/s390/driver-native.cc (s390_host_detect_local_cpu): Recognize z16 with -march=native. * config/s390/s390-opts.h (enum processor_type): Rename PROCESSOR_ARCH14 to PROCESSOR_3931_Z16. * config/s390/s390.cc (PROCESSOR_ARCH14): Rename to ... (PROCESSOR_3931_Z16): ... throughout the file. (s390_processor processor_table): Add z16 as cpu string. * config/s390/s390.h (enum processor_flags): Rename PF_ARCH14 to PF_Z16. (TARGET_CPU_ARCH14): Rename to ... (TARGET_CPU_Z16): ... this. (TARGET_CPU_ARCH14_P): Rename to ... (TARGET_CPU_Z16_P): ... this. (TARGET_ARCH14): Rename to ... (TARGET_Z16): ... this. (TARGET_ARCH14_P): Rename to ... (TARGET_Z16_P): ... this. * config/s390/s390.md (cpu_facility): Rename arch14 to z16 and check TARGET_Z16 instead of TARGET_ARCH14. * config/s390/s390.opt: Add z16 to processor_type. * doc/invoke.texi: Document z16 and arch14.
2022-04-11RISC-V: Support -misa-spec for arch-canonicalize and multilib-generator. ↵Kito Cheng1-1/+2
[PR104853] We migrate the default ISA spec version from 2.2 to 20191213, but those scripts aren't updated at the same time, this patch is making both scripts support different ISA spec versions. gcc/ChangeLog: PR target/104853 * config.gcc: Pass -misa-spec to arch-canonicalize and multilib-generator. * config/riscv/arch-canonicalize: Adding -misa-spec option. (SUPPORTED_ISA_SPEC): New. (arch_canonicalize): New argument `isa_spec`. Handle multiple ISA spec versions. * config/riscv/multilib-generator: Adding -misa-spec option.
2022-04-08aarch64: PR target/105157 Increase number of cores TARGET_CPU_DEFAULT can encodeAndre Vieira1-1/+1
This addresses the compile-time increase seen in the PR target/105157. This was being caused by selecting the wrong core tuning, as when we added the latest AArch64 the TARGET_CPU_generic tuning was pushed beyond the 0x3f mask we used to encode both target cpu and attributes into TARGET_CPU_DEFAULT. gcc/ChangeLog: PR target/105157 * config.gcc: Shift ext_mask by TARGET_CPU_NBITS. * config/aarch64/aarch64.h (TARGET_CPU_NBITS): New macro. (TARGET_CPU_MASK): Likewise. (TARGET_CPU_DEFAULT): Use TARGET_CPU_NBITS. * config/aarch64/aarch64.cc (aarch64_get_tune_cpu): Use TARGET_CPU_MASK. (aarch64_get_arch): Likewise. (aarch64_override_options): Use TARGET_CPU_NBITS.
2022-03-29LoongArch Port: gcc buildchenglulu1-1/+434
2022-03-29 Chenghua Xu <xuchenghua@loongson.cn> Lulu Cheng <chenglulu@loongson.cn> gcc/ChangeLog: * common/config/loongarch/loongarch-common.cc: New file. * config/loongarch/genopts/genstr.sh: New file. * config/loongarch/genopts/loongarch-strings: New file. * config/loongarch/genopts/loongarch.opt.in: New file. * config/loongarch/loongarch-str.h: New file. * config/loongarch/gnu-user.h: New file. * config/loongarch/linux.h: New file. * config/loongarch/loongarch-cpu.cc: New file. * config/loongarch/loongarch-cpu.h: New file. * config/loongarch/loongarch-def.c: New file. * config/loongarch/loongarch-def.h: New file. * config/loongarch/loongarch-driver.cc: New file. * config/loongarch/loongarch-driver.h: New file. * config/loongarch/loongarch-opts.cc: New file. * config/loongarch/loongarch-opts.h: New file. * config/loongarch/loongarch.opt: New file. * config/loongarch/t-linux: New file. * config/loongarch/t-loongarch: New file. * config.gcc: Add LoongArch support. * configure.ac: Add LoongArch support. contrib/ChangeLog: * gcc_update (files_and_dependencies): Add config/loongarch/loongarch.opt and config/loongarch/loongarch-str.h.
2022-03-01[nvptx] Add nvptx-gen.h and nvptx-gen.optTom de Vries1-0/+1
Use nvptx-sm.def to generate new files nvptx-gen.h and nvptx-gen.opt, and: - include nvptx-gen.h in nvptx.h, and - add nvptx-gen.opt to extra_options (before nvptx.opt, in case that matters). Tested on nvptx. gcc/ChangeLog: 2022-02-25 Tom de Vries <tdevries@suse.de> * config.gcc (nvptx*-*-*): Add nvptx/nvptx-gen.opt to extra_options. * config/nvptx/gen-copyright.sh: New file. * config/nvptx/gen-h.sh: New file. * config/nvptx/gen-opt.sh: New file. * config/nvptx/nvptx.h (TARGET_SM35, TARGET_SM53, TARGET_SM70) (TARGET_SM75, TARGET_SM80): Move ... * config/nvptx/nvptx-gen.h: ... here. New file, generate. * config/nvptx/nvptx.opt (Enum ptx_isa): Move ... * config/nvptx/nvptx-gen.opt: ... here. New file, generate. * config/nvptx/t-nvptx ($(srcdir)/config/nvptx/nvptx-gen.h) ($(srcdir)/config/nvptx/nvptx-gen.opt): New make target.
2022-02-05RISC-V: Always pass -misa-spec to assembler [PR104219]Kito Cheng1-1/+3
Add -misa-spec to OPTION_DEFAULT_SPECS to make sure -misa-spec will always pass that into assembler, that prevent GCC and binutils using different way to interpret the ISA string. gcc/ChangeLog: PR target/104219 * config.gcc (riscv*-*-*): Normalize the with_isa_spec value. (all_defaults): Add isa_spec. * config/riscv/riscv.h (OPTION_DEFAULT_SPECS): Add isa_spec.
2022-02-03rs6000: Consolidate target built-ins codeBill Schmidt1-1/+1
Continuing with the refactoring effort, this patch moves as much of the target-specific built-in support code into a new file, rs6000-builtin.cc. However, we can't easily move the overloading support code out of rs6000-c.cc, because the build machinery understands that as a special file to be included with the C and C++ front ends. This patch is just a straightforward move, with one exception. I found that the builtin_mode_to_type[] array is no longer used, so I also removed all code having to do with it. The code in rs6000-builtin.cc is organized in related sections: - General support functions - Initialization support - GIMPLE folding support - Expansion support Overloading support remains in rs6000-c.cc. 2022-02-03 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ * config.gcc (powerpc*-*-*): Add rs6000-builtin.o to extra_objs. * config/rs6000/rs6000-builtin.cc: New file, containing code moved from other files. * config/rs6000/rs6000-call.cc (cpu_is_info): Move to rs6000-builtin.cc. (cpu_supports_info): Likewise. (rs6000_type_string): Likewise. (altivec_expand_predicate_builtin): Likewise. (rs6000_htm_spr_icode): Likewise. (altivec_expand_vec_init_builtin): Likewise. (get_element_number): Likewise. (altivec_expand_vec_set_builtin): Likewise. (altivec_expand_vec_ext_builtin): Likewise. (rs6000_invalid_builtin): Likewise. (rs6000_fold_builtin): Likewise. (fold_build_vec_cmp): Likewise. (fold_compare_helper): Likewise. (map_to_integral_tree_type): Likewise. (fold_mergehl_helper): Likewise. (fold_mergeeo_helper): Likewise. (rs6000_builtin_valid_without_lhs): Likewise. (rs6000_builtin_is_supported): Likewise. (rs6000_gimple_fold_mma_builtin): Likewise. (rs6000_gimple_fold_builtin): Likewise. (rs6000_expand_ldst_mask): Likewise. (cpu_expand_builtin): Likewise. (elemrev_icode): Likewise. (ldv_expand_builtin): Likewise. (lxvrse_expand_builtin): Likewise. (lxvrze_expand_builtin): Likewise. (stv_expand_builtin): Likewise. (mma_expand_builtin): Likewise. (htm_spr_num): Likewise. (htm_expand_builtin): Likewise. (rs6000_expand_builtin): Likewise. (rs6000_vector_type): Likewise. (rs6000_init_builtins): Likewise. Remove initialization of builtin_mode_to_type entries. (rs6000_builtin_decl): Move to rs6000-builtin.cc. * config/rs6000/rs6000.cc (rs6000_builtin_mask_for_load): New external declaration. (rs6000_builtin_md_vectorized_function): Likewise. (rs6000_builtin_reciprocal): Likewise. (altivec_builtin_mask_for_load): Move to rs6000-builtin.cc. (rs6000_builtin_types): Likewise. (builtin_mode_to_type): Remove. (rs6000_builtin_mask_for_load): Move to rs6000-builtin.cc. Remove static qualifier. (rs6000_builtin_md_vectorized_function): Likewise. (rs6000_builtin_reciprocal): Likewise. * config/rs6000/rs6000.h (builtin_mode_to_type): Remove. * config/rs6000/t-rs6000 (rs6000-builtin.o): New target.
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