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2014-11-18[Patch ARM Refactor Builtins 3/8] Pull builtins code to its own fileJames Greenhalgh1-1/+2
gcc/ * config.gcc (extra_objs): Add arm-builtins.o for arm*-*-*. (target_gtfiles): Add config/arm/arm-builtins.c for arm*-*-*. * config/arm/arm-builtins.c: New. * config/arm/t-arm (arm_builtins.o): New. * config/arm/arm-protos.h (arm_expand_builtin): New. (arm_builtin_decl): Likewise. (arm_init_builtins): Likewise. (arm_atomic_assign_expand_fenv): Likewise. * config/arm/arm.c (arm_atomic_assign_expand_fenv): Remove prototype. (arm_init_builtins): Likewise. (arm_init_iwmmxt_builtins): Likewise (safe_vector_operand): Likewise (arm_expand_binop_builtin): Likewise (arm_expand_unop_builtin): Likewise (arm_expand_builtin): Likewise (arm_builtin_decl): Likewise (insn_flags): Remove static. (tune_flags): Likewise. (enum arm_builtins): Move to config/arm/arm-builtins.c. (arm_init_neon_builtins): Likewise. (struct builtin_description): Likewise. (arm_init_iwmmxt_builtins): Likewise. (arm_init_fp16_builtins): Likewise. (arm_init_crc32_builtins): Likewise. (arm_init_builtins): Likewise. (arm_builtin_decl): Likewise. (safe_vector_operand): Likewise. (arm_expand_ternop_builtin): Likewise. (arm_expand_binop_builtin): Likewise. (arm_expand_unop_builtin): Likewise. (neon_dereference_pointer): Likewise. (arm_expand_neon_args): Likewise. (arm_expand_neon_builtin): Likewise. (neon_split_vcombine): Likewise. (arm_expand_builtin): Likewise. (arm_builtin_vectorized_function): Likewise. (arm_atomic_assign_expand_fenv): Likewise. From-SVN: r217695
2014-11-14Don't enable IFUNC by default for Android and uclibcH.J. Lu1-4/+16
* config.gcc (default_gnu_indirect_function): Set to yes for i[34567]86-*-linux* and x86_64-*-linux* if not targeting Android nor uclibc. From-SVN: r217575
2014-11-13[PATCH 1/4] OpenMP 4.0 offloading to Intel MIC: mkoffload.Ilya Verbin1-0/+15
gcc/ * config.gcc (*-intelmic-* | *-intelmicemul-*): Add i386/t-intelmic to tmake_file. (i[34567]86-*-* | x86_64-*-*): Build mkoffload$(exeext) with the accelerator compiler. * config/i386/intelmic-mkoffload.c: New file. * config/i386/t-intelmic: Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> From-SVN: r217495
2014-11-12Implement MIPS o32 FPXX, FP64, FP64A ABI extensions.Matthew Fortune1-2/+28
2014-11-12 Matthew Fortune <matthew.fortune@imgtec.com> gcc/ * common/config/mips/mips-common.c (mips_handle_option): Ensure that -mfp32, -mfp64 disable -mfpxx and -mfpxx disables -mfp64. * config.gcc (--with-fp-32): New option. (--with-odd-spreg-32): Likewise. * config.in (HAVE_AS_DOT_MODULE): New config define. * config/mips/mips-protos.h (mips_secondary_memory_needed): New prototype. (mips_hard_regno_caller_save_mode): Likewise. * config/mips/mips.c (mips_get_reg_raw_mode): New static prototype. (mips_get_arg_info): Assert that V2SFmode is only handled specially with TARGET_PAIRED_SINGLE_FLOAT. (mips_return_mode_in_fpr_p): Likewise. (mips16_call_stub_mode_suffix): Likewise. (mips_get_reg_raw_mode): New static function. (mips_return_fpr_pair): O32 return values span two registers. (mips16_build_call_stub): Likewise. (mips_function_value_regno_p): Support both FP return registers. (mips_output_64bit_xfer): Use mthc1 whenever TARGET_HAS_MXHC1. Add specific cases for TARGET_FPXX to move via memory. (mips_dwarf_register_span): For TARGET_FPXX pretend that modes larger than UNITS_PER_FPREG 'span' one register. (mips_dwarf_frame_reg_mode): New static function. (mips_file_start): Switch to using .module instead of .gnu_attribute. No longer support FP ABI 4 (-mips32r2 -mfp64), replace with FP ABI 6. Add FP ABI 5 (-mfpxx) and FP ABI 7 (-mfp64 -mno-odd-spreg). (mips_save_reg, mips_restore_reg): Always represent DFmode frame slots with two CFI directives even for O32 FP64. (mips_for_each_saved_gpr_and_fpr): Account for fixed_regs when saving/restoring callee-saved registers. (mips_hard_regno_mode_ok_p): Implement O32 FP64A extension. (mips_secondary_memory_needed): New function. (mips_option_override): ABI check for TARGET_FLOATXX. Disable odd-numbered single-precision registers when using TARGET_FLOATXX. Implement -modd-spreg and defaults. (mips_conditional_register_usage): Redefine O32 FP64 to match O32 FP32 callee-saved behaviour. (mips_hard_regno_caller_save_mode): Implement. (TARGET_GET_RAW_RESULT_MODE): Define target hook. (TARGET_GET_RAW_ARG_MODE): Define target hook. (TARGET_DWARF_FRAME_REG_MODE): Define target hook. * config/mips/mips.h (TARGET_FLOAT32): New macro. (TARGET_O32_FP64A_ABI): Likewise. (TARGET_CPU_CPP_BUILTINS): TARGET_FPXX is __mips_fpr==0. Add _MIPS_SPFPSET builtin define. (MIPS_FPXX_OPTION_SPEC): New macro. (OPTION_DEFAULT_SPECS): Pass through --with-fp-32=* to -mfp and --with-odd-spreg-32=* to -m[no-]odd-spreg. (ISA_HAS_ODD_SPREG): New macro. (ISA_HAS_MXHC1): True for anything other than -mfp32. (ASM_SPEC): Pass through mfpxx, mfp64, -mno-odd-spreg and -modd-spreg. (MIN_FPRS_PER_FMT): Redefine in terms of TARGET_ODD_SPREG. (HARD_REGNO_CALLER_SAVE_MODE): Define. Implement O32 FPXX extension (HARD_REGNO_CALL_PART_CLOBBERED): Likewise. (SECONDARY_MEMORY_NEEDED): Likewise. (FUNCTION_ARG_REGNO_P): Update for O32 FPXX and FP64 extensions. * config/mips/mips.md (define_attr enabled): Implement O32 FPXX and FP64A ABI extensions. (move_doubleword_fpr<mode>): Use ISA_HAS_MXHC1 instead of TARGET_FLOAT64. * config/mips/mips.opt (mfpxx): New target option. (modd-spreg): Likewise. * config/mips/mti-elf.h (DRIVER_SELF_SPECS): Infer FP ABI from arch. * config/mips/mti-linux.h (DRIVER_SELF_SPECS): Likewise and remove fp64 sysroot. * config/mips/t-mti-elf: Remove fp64 multilib. * config/mips/t-mti-linux: Likewise. * configure.ac: Detect .module support. * configure: Regenerate. * doc/invoke.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg option. * doc/install.texi (--with-fp-32, --with-odd-spreg-32): Document new options. gcc/testsuite/ * gcc.target/mips/args-1.c: Handle __mips_fpr == 0. * gcc.target/mips/call-clobbered-1.c: New. * gcc.target/mips/call-clobbered-2.c: New. * gcc.target/mips/call-clobbered-3.c: New. * gcc.target/mips/call-clobbered-4.c: New. * gcc.target/mips/call-clobbered-5.c: New. * gcc.target/mips/call-saved-4.c: New. * gcc.target/mips/call-saved-5.c: New. * gcc.target/mips/call-saved-6.c: New. * gcc.target/mips/mips.exp: Support -mfpxx, -ffixed-f*, and -m[no-]odd-spreg. Use _MIPS_SPFPSET to determine default odd-spreg option. Account for -modd-spreg in minimum arch code. * gcc.target/mips/movdf-1.c: New. * gcc.target/mips/movdf-2.c: New. * gcc.target/mips/movdf-3.c: New. * gcc.target/mips/oddspreg-1.c: New. * gcc.target/mips/oddspreg-2.c: New. * gcc.target/mips/oddspreg-3.c: New. * gcc.target/mips/oddspreg-4.c: New. * gcc.target/mips/oddspreg-5.c: New. * gcc.target/mips/oddspreg-6.c: New. libgcc/ * config/mips/mips16.S: Set .module when supported. Update O32 FP64 calling convention and use for FPXX when possible. Add FPXX calling convention fallback case. From-SVN: r217446
2014-11-11Bug target/61997Andrew Pinski1-0/+1
2014-11-11 Andrew Pinski <apinski@cavium.com> Bug target/61997 * config.gcc (aarch64*-*-*): Set target_gtfiles to include aarch64-builtins.c. * config/aarch64/aarch64-builtins.c: Include gt-aarch64-builtins.h at the end of the file. From-SVN: r217394
2014-11-10Add the nvptx port.Bernd Schmidt1-0/+7
* configure.ac: Handle nvptx-*-*. * configure: Regenerate. gcc/ * config/nvptx/nvptx.c: New file. * config/nvptx/nvptx.h: New file. * config/nvptx/nvptx-protos.h: New file. * config/nvptx/nvptx.md: New file. * config/nvptx/t-nvptx: New file. * config/nvptx/nvptx.opt: New file. * common/config/nvptx/nvptx-common.c: New file. * config.gcc: Handle nvptx-*-*. libgcc/ * config.host: Handle nvptx-*-*. * shared-object.mk (as-flags-$o): Define. ($(base)$(objext), $(base)_s$(objext)): Use it instead of -xassembler-with-cpp. * static-object.mk: Identical changes. * config/nvptx/t-nvptx: New file. * config/nvptx/crt0.s: New file. * config/nvptx/free.asm: New file. * config/nvptx/malloc.asm: New file. * config/nvptx/realloc.c: New file. From-SVN: r217295
2014-11-07config.gcc (sparc-*-rtems*): Clean away unused t-elf.Daniel Hellstrom1-1/+1
2014-11-07 Daniel Hellstrom <daniel@gaisler.com> * config.gcc (sparc-*-rtems*): Clean away unused t-elf. * config/sparc/t-rtems: Add leon3v7 and muser-mode multilibs. From-SVN: r217231
2014-11-06config.gcc (mips*-mti-linux*): Remove gnu_ld and gas assignments.Steve Ellcey1-7/+30
2014-11-06 Steve Ellcey <sellcey@imgtec.com> * config.gcc (mips*-mti-linux*): Remove gnu_ld and gas assignments. Set default_mips_arch and default_mips_abi instead of tm_defines. (mips*-*-linux*): Set default_mips_arch and default_mips_abi instead of tm_defines. (mips*-*-*): Check with_arch and with_abi. Set tm_defines. * config/mips/mips.h (STANDARD_STARTFILE_PREFIX_1): Set default based on MIPS_ABI_DEFAULT. (STANDARD_STARTFILE_PREFIX_2): Ditto. From-SVN: r217203
2014-10-30config.gcc (mips*-*-linux*): Combine 32 and 64 bit cases.Steve Ellcey1-17/+20
2014-10-30 Steve Ellcey <sellcey@imgtec.com> * config.gcc (mips*-*-linux*): Combine 32 and 64 bit cases. From-SVN: r216944
2014-10-28AVX-512. 85/n. Add intrinsics headers.Alexander Ivchenko1-2/+4
gcc/ * config/i386/avx512bwintrin.h: New. * config/i386/avx512dqintrin.h: Ditto. * config/i386/avx512vlbwintrin.h: Ditto. * config/i386/avx512vldqintrin.h: Ditto. * config/i386/avx512vlintrin.h: Ditto. * config/i386/immintrin.h: Include avx512vlintrin.h, avx512bwintrin.h, avx512dqintrin.h, avx512vlbwintrin.h, avx512vldqintrin.h. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216798
2014-10-24config.gcc (sparc*-*-*): Accept mcpu=leon3v7 processor.Daniel Hellstrom1-1/+4
2014-10-24 Daniel Hellstrom <daniel@gaisler.com> * config.gcc (sparc*-*-*): Accept mcpu=leon3v7 processor. * doc/invoke.texi (SPARC options): Add mcpu=leon3v7 comment. * config/sparc/leon.md (leon3_load, leon_store, leon_fp_*): Handle leon3v7 as leon3. * config/sparc/sparc-opts.h (enum processor_type): Add LEON3V7. * config/sparc/sparc.c (sparc_option_override): Add leon3v7 support. * config/sparc/sparc.h (TARGET_CPU_leon3v7): New define. * config/sparc/sparc.md (cpu): Add leon3v7. * config/sparc/sparc.opt (enum processor_type): Add leon3v7. From-SVN: r216666
2014-10-21config.gcc: Remove MASK_JUMP_IN_DELAY from target_cpu_default2.John David Anglin1-1/+1
* config.gcc: Remove MASK_JUMP_IN_DELAY from target_cpu_default2. * config/pa/pa.h (TARGET_DEFAULT): Remove MASK_JUMP_IN_DELAY. * config/pa/pa.opt (mjump-in-delay): Ignore option. Update comment. From-SVN: r216530
2014-10-08linux64.h: Remove.Steve Ellcey1-3/+2
2014-10-08 Steve Ellcey <sellcey@mips.com> * config/mips/linux64.h: Remove. * config/mips/gnu-user64.h: Remove. * gcc.config (mips*-*-*): Remove references to linux64.h and gnu-user64.h * config/mips/gnu-user.h (GNU_USER_TARGET_LINK_SPEC): Replace with modified version from gnu-user64.h. (LINUX_DRIVER_SELF_SPECS): Update parts from gnu-user64.h. (LOCAL_LABEL_PREFIX): Copy from gnu-user64.h. * config/mips/linux.h (GNU_USER_LINK_EMULATION32): Copy from linux64.h. (GNU_USER_LINK_EMULATION64): Ditto. (GNU_USER_LINK_EMULATIONN32): Ditto. (GLIBC_DYNAMIC_LINKER32): Ditto. (GLIBC_DYNAMIC_LINKER64): Ditto. (GLIBC_DYNAMIC_LINKERN32): Ditto. (UCLIBC_DYNAMIC_LINKER32): Ditto. (UCLIBC_DYNAMIC_LINKER64): Ditto. (UCLIBC_DYNAMIC_LINKERN32): Ditto. (BIONIC_DYNAMIC_LINKERN32): Ditto. (GNU_USER_DYNAMIC_LINKERN32): Ditto. (GLIBC_DYNAMIC_LINKER): Delete. (UCLIBC_DYNAMIC_LINKER): Delete. From-SVN: r216008
2014-10-04remove score-* supportTrevor Saunders1-10/+2
libgcc/ChangeLog: 2014-10-04 Trevor Saunders <tsaunders@mozilla.com> * config.host: Remove support for score-*. contrib/ChangeLog: 2014-10-04 Trevor Saunders <tsaunders@mozilla.com> * compare-all-tests: Don't test score-*. * config-list.mk: Likewise. gcc/ChangeLog: 2014-10-04 Trevor Saunders <tsaunders@mozilla.com> * common/config/score/score-common.c: Remove. * config.gcc: Remove support for score-*. * config/score/constraints.md: Remove. * config/score/elf.h: Remove. * config/score/predicates.md: Remove. * config/score/score-conv.h: Remove. * config/score/score-generic.md: Remove. * config/score/score-modes.def: Remove. * config/score/score-protos.h: Remove. * config/score/score.c: Remove. * config/score/score.h: Remove. * config/score/score.md: Remove. * config/score/score.opt: Remove. * doc/md.texi: Don't document score-*. From-SVN: r215889
2014-09-19vxworksae.h: Remove obsolete definitions.Olivier Hainque1-2/+2
2014-09-19 Olivier Hainque <hainque@adacore.com> * config/i386/vxworksae.h: Remove obsolete definitions. (STACK_CHECK_PROTECT): Define. * config/i386/vx-common.h: Remove. Merge contents within config/i386/vxworks.h. * config.gcc (i?86-vxworks*): Use i386/vxworks.h instead of i386/vx-common.h. From-SVN: r215378
2014-09-19config.gcc (powerpc-wrs-vxworksmils): New configuration.Olivier Hainque1-1/+5
2014-09-18 Olivier Hainque <hainque@adacore.com> gcc/ * config.gcc (powerpc-wrs-vxworksmils): New configuration. * config/rs6000/t-vxworksmils: New file. * config/rs6000/vxworksmils.h: New file. libgcc/ * config.host (powerpc-wrs-vxworksmils): New configuration, same as vxworksae. contrib/ * config-list.mk (LIST): Add powerpc-wrs-vxworksmils. From-SVN: r215377
2014-09-17config.gcc (*-*-rtems*): Default to 'rtems' thread model.Sebastian Huber1-1/+7
2014-09-17 Sebastian Huber <sebastian.huber@embedded-brains.de> * config.gcc (*-*-rtems*): Default to 'rtems' thread model. Enable selection of 'posix' or no thread model. From-SVN: r215324
2014-09-09remove picochipTrevor Saunders1-10/+1
contrib/ChangeLog: 2014-09-08 Trevor Saunders <tsaunders@mozilla.com> * compare-all-tests: Don't test picochip. * config-list.mk: Likewise. gcc/ChangeLog: 2014-09-08 Trevor Saunders <tsaunders@mozilla.com> * common/config/picochip/picochip-common.c: Remove. * config.gcc: Remove support for picochip. * config/picochip/constraints.md: Remove. * config/picochip/dfa_space.md: Remove. * config/picochip/dfa_speed.md: Remove. * config/picochip/picochip-protos.h: Remove. * config/picochip/picochip.c: Remove. * config/picochip/picochip.h: Remove. * config/picochip/picochip.md: Remove. * config/picochip/picochip.opt: Remove. * config/picochip/predicates.md: Remove. * config/picochip/t-picochip: Remove. * doc/md.texi: Don't document picochi. libgcc/ChangeLog: 2014-09-08 Trevor Saunders <tsaunders@mozilla.com> * config.host: Remove picochip support. * config/picochip/adddi3.S: Remove. * config/picochip/ashlsi3.S: Remove. * config/picochip/ashlsi3.c: Remove. * config/picochip/ashrsi3.S: Remove. * config/picochip/ashrsi3.c: Remove. * config/picochip/clzsi2.S: Remove. * config/picochip/cmpsi2.S: Remove. * config/picochip/divmod15.S: Remove. * config/picochip/divmodhi4.S: Remove. * config/picochip/divmodsi4.S: Remove. * config/picochip/lib1funcs.S: Remove. * config/picochip/longjmp.S: Remove. * config/picochip/lshrsi3.S: Remove. * config/picochip/lshrsi3.c: Remove. * config/picochip/parityhi2.S: Remove. * config/picochip/popcounthi2.S: Remove. * config/picochip/setjmp.S: Remove. * config/picochip/subdi3.S: Remove. * config/picochip/t-picochip: Remove. * config/picochip/ucmpsi2.S: Remove. * config/picochip/udivmodhi4.S: Remove. * config/picochip/udivmodsi4.S: Remove. From-SVN: r215039
2014-08-27re PR other/62248 (Configure error with --with-fpu=fp-armv8)Yvan Roux1-14/+11
2014-08-27 Yvan Roux <yvan.roux@linaro.org> PR other/62248 * config.gcc (arm*-*-*): Check --with-fpu against arm-fpus.def. From-SVN: r214573
2014-08-19config.gcc (*-*-cygwin*): Use __cxa_atexit by default.Yaakov Selkowitz1-2/+4
2014-08-19 Yaakov Selkowitz <yselkowi@redhat.com> * config.gcc (*-*-cygwin*): Use __cxa_atexit by default. (extra_options): Add i386/cygwin.opt. * config/i386/cygwin.h (STARTFILE_SPEC): Use crtbeginS.o if shared. (CPP_SPEC): Accept -pthread. (LINK_SPEC): Ditto. (GOMP_SELF_SPECS): Update comment. * config/i386/cygwin.opt: New file for -pthread flag. From-SVN: r214161
2014-07-28config.gcc (powerpc*-*-linux*): Include gnu-user.h in tm_file.Peter Bergner1-1/+1
* config.gcc (powerpc*-*-linux*): Include gnu-user.h in tm_file. * config/rs6000/sysv4.h (CC!_SPEC): Undefine it before defining it. * config/rs6000/linux.h (CPLUSPLUS_CPP_SPEC): Delete define. (LINK_GCC_C_SEQUENCE_SPEC): Likewise. (USE_LD_AS_NEEDED): Likewise. (ASM_APP_ON): Likewise. (ASM_APP_OFF): Likewise. (TARGET_POSIX_IO): Likewise. * config/rs6000/linux64.h (CPLUSPLUS_CPP_SPEC): Likewise. (LINK_GCC_C_SEQUENCE_SPEC): Likewise. (USE_LD_AS_NEEDED): Likewise. (ASM_APP_ON): Likewise. (ASM_APP_OFF): Likewise. (TARGET_POSIX_IO): Likewise. From-SVN: r213125
2014-07-27Add moxiebox target.Anthony Green1-0/+6
From-SVN: r213098
2014-07-23config.gcc: Add nios2-*-rtems*.Sebastian Huber1-1/+5
2014-07-23 Sebastian Huber <sebastian.huber@embedded-brains.de> Chris Johns <chrisj@rtems.org> Joel Sherrill <joel.sherrill@oarcorp.com> * config.gcc: Add nios2-*-rtems*. * config/nios2/rtems.h: New file. * gcc/config/nios2/t-rtems: New file. Co-Authored-By: Chris Johns <chrisj@rtems.org> Co-Authored-By: Joel Sherrill <joel.sherrill@oarcorp.com> From-SVN: r212935
2014-07-17config.gcc (crisv32-*-linux* | cris-*-linux*): Do not override an existing ↵Hans-Peter Nilsson1-2/+1
tmake_file. * config.gcc (crisv32-*-linux* | cris-*-linux*): Do not override an existing tmake_file. Don't add t-slibgcc and t-linux. From-SVN: r212707
2014-07-04Add several new files for preparation of providing modulesChung-Ju Wu1-2/+3
that are going to be separated from nds32.c source. gcc/ * config.gcc (nds32*): Add new modules to extra_objs. (nds32le-*-*): Use t-nds32 makefile fragment for new modules. (nds32be-*-*): Likewise. * config/nds32/nds32-cost.c: New file. * config/nds32/nds32-fp-as-gp.c: New file. * config/nds32/nds32-intrinsic.c: New file. * config/nds32/nds32-isr.c: New file. * config/nds32/nds32-md-auxiliary.c: New file. * config/nds32/nds32-memory-manipulation.c: New file. * config/nds32/nds32-pipelines-auxiliary.c: New file. * config/nds32/nds32-predicates.c: New file. * config/nds32/t-nds32: New file. Co-Authored-By: Kito Cheng <kito@0xlab.org> Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com> From-SVN: r212280
2014-06-26[ARM] Error if overriding --with-tune by --with-cpuJames Greenhalgh1-1/+7
gcc/ * config.gcc (supported_defaults): Error when passing either --with-tune or --with-arch in conjunction with --with-cpu for ARM. From-SVN: r212014
2014-06-16re PR plugins/45078 (config/vxworks-dummy.h not installed as a plugin header ↵Jakub Jelinek1-1/+1
on some archs) PR plugins/45078 * config.gcc (arm*-*-linux-*): Include vxworks-dummy.h in tm_file. From-SVN: r211696
2014-06-11[AArch64] Implement CRC32 ACLE intrinsics.Kyrylo Tkachov1-1/+1
* config.gcc (aarch64*-*-*): Add arm_acle.h to extra headers. * Makefile.in (TEXI_GCC_FILES): Add aarch64-acle-intrinsics.texi to dependencies. * config/aarch64/aarch64-builtins.c (AARCH64_CRC32_BUILTINS): Define. (aarch64_crc_builtin_datum): New struct. (aarch64_crc_builtin_data): New. (aarch64_init_crc32_builtins): New function. (aarch64_init_builtins): Initialise CRC32 builtins when appropriate. (aarch64_crc32_expand_builtin): New. (aarch64_expand_builtin): Add CRC32 builtin expansion case. * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FEATURE_CRC32 when appropriate. (TARGET_CRC32): Define. * config/aarch64/aarch64.md (UNSPEC_CRC32B, UNSPEC_CRC32H, UNSPEC_CRC32W, UNSPEC_CRC32X, UNSPEC_CRC32CB, UNSPEC_CRC32CH, UNSPEC_CRC32CW, UNSPEC_CRC32CX): New unspec values. (aarch64_<crc_variant>): New pattern. * config/aarch64/arm_acle.h: New file. * config/aarch64/iterators.md (CRC): New int iterator. (crc_variant, crc_mode): New int attributes. * doc/aarch64-acle-intrinsics.texi: New file. * doc/extend.texi (aarch64): Document aarch64 ACLE intrinsics. Include aarch64-acle-intrinsics.texi. From-SVN: r211440
2014-05-28vxworks.h (VXCPU_FOR_8548): New.Olivier Hainque1-1/+1
2014-05-28 Olivier Hainque <hainque@adacore.com> * config/rs6000/vxworks.h (VXCPU_FOR_8548): New. Default to PPC85XX. (CPP_SPEC): Add entry for -mcpu=8548. * config/rs6000/vxworksae.h: Reinstate. Override VXCPU_FOR_8548. * config.gcc (powerpc-wrs-vxworksae, tm_file): Add back vxworksae.h. From-SVN: r211011
2014-05-21config.gcc (*-*-dragonfly*): New target.John Marino1-0/+30
2014-05-21 John Marino <gnugcc@marino.st> gcc: * config.gcc (*-*-dragonfly*): New target. * configure.ac: Detect dl_iterate_phdr (*freebsd*, *dragonfly*). * configure: Regenerate. * config/dragonfly-stdint.h: New. * config/dragonfly.h: New. * config/dragonfly.opt: New. * config/i386/dragonfly.h: New. * ginclude/stddef.h: Detect _PTRDIFF_T_DECLARED for DragonFly. include: * liberty.h: Use basename function on DragonFly. libcilkrts: * runtime/os-unix.c (__DragonFly__): New target. libgcc: * config.host (*-*-dragonfly*): New target. * crtstuff.c: Make dl_iterate_support generic on *bsd. * enable-execute-stack-mprotect.c: Always mprotect on FreeBSD. * unwind-dw2-fde-dip.c: Add dl_iterate_phr support for DragonFly. * config/i386/dragonfly-unwind.h: New. libitm: * configure.tgt (*-*-dragonfly*): New target. libstdc++-v3: * acinclude.m4 (*-*-dragonfly*): New target. * configure: Regenerate. * configure.host (*-*-dragonfly*): New target. * config/locale/dragonfly/c_locale.cc: New. * config/locale/dragonfly/ctype_members.cc: New. * config/os/bsd/dragonfly/ctype_base.h: New. * config/os/bsd/dragonfly/ctype_configure_char.cc: New. * config/os/bsd/dragonfly/ctype_inline.h: New. * config/os/bsd/dragonfly/os_defines.h: New. From-SVN: r210694
2014-05-20config.gcc: Remove need_64bit_hwint.Richard Biener1-27/+0
2014-05-20 Richard Biener <rguenther@suse.de> gcc/ * config.gcc: Remove need_64bit_hwint. * configure.ac: Do not define NEED_64BIT_HOST_WIDE_INT. * hwint.h: Do not check NEED_64BIT_HOST_WIDE_INT but assume it to be true. * config.in: Regenerate. * configure: Likewise. libcpp/ * configure.ac: Copy gcc logic of detecting a 64bit type. Remove HOST_WIDE_INT define. * include/cpplib.h: typedef cpp_num_part to a 64bit type, similar to how hwint.h does it. * config.in: Regenerate. * configure: Likewise. From-SVN: r210632
2014-05-14gcc/Ilya Tocar1-2/+4
* common/config/i386/i386-common.c (OPTION_MASK_ISA_CLFLUSHOPT_SET): Define. (OPTION_MASK_ISA_XSAVES_SET): Ditto. (OPTION_MASK_ISA_XSAVEC_SET): Ditto. (OPTION_MASK_ISA_CLFLUSHOPT_UNSET): Ditto. (OPTION_MASK_ISA_XSAVES_UNSET): Ditto. (OPTION_MASK_ISA_XSAVEC_UNSET): Ditto. (ix86_handle_option): Handle OPT_mxsavec, OPT_mxsaves, OPT_mclflushopt. * config.gcc (i[34567]86-*-*): Add clflushoptintrin.h, xsavecintrin.h, xsavesintrin.h. (x86_64-*-*): Ditto. * config/i386/clflushoptintrin.h: New. * config/i386/xsavecintrin.h: Ditto. * config/i386/xsavesintrin.h: Ditto. * config/i386/cpuid.h (bit_CLFLUSHOPT): Define. (bit_XSAVES): Ditto. (bit_XSAVES): Ditto. * config/i386/driver-i386.c (host_detect_local_cpu): Handle -mclflushopt, -mxsavec, -mxsaves, -mno-xsaves, -mno-xsavec, -mno-clflushopt. * config/i386/i386-c.c (ix86_target_macros_internal): Handle OPTION_MASK_ISA_CLFLUSHOPT, OPTION_MASK_ISA_XSAVEC, OPTION_MASK_ISA_XSAVES. * config/i386/i386.c (ix86_target_string): Handle -mclflushopt, -mxsavec, -mxsaves. (PTA_CLFLUSHOPT) Define. (PTA_XSAVEC): Ditto. (PTA_XSAVES): Ditto. (ix86_option_override_internal): Handle new options. (ix86_valid_target_attribute_inner_p): Ditto. (ix86_builtins): Add IX86_BUILTIN_XSAVEC, IX86_BUILTIN_XSAVEC64, IX86_BUILTIN_XSAVES, IX86_BUILTIN_XRSTORS, IX86_BUILTIN_XSAVES64, IX86_BUILTIN_XRSTORS64, IX86_BUILTIN_CLFLUSHOPT. (bdesc_special_args): Add __builtin_ia32_xsaves, __builtin_ia32_xrstors, __builtin_ia32_xsavec, __builtin_ia32_xsaves64, __builtin_ia32_xrstors64, __builtin_ia32_xsavec64. (ix86_init_mmx_sse_builtins): Add __builtin_ia32_clflushopt. (ix86_expand_builtin): Handle new builtins. * config/i386/i386.h (TARGET_CLFLUSHOPT) Define. (TARGET_CLFLUSHOPT_P): Ditto. (TARGET_XSAVEC): Ditto. (TARGET_XSAVEC_P): Ditto. (TARGET_XSAVES): Ditto. (TARGET_XSAVES_P): Ditto. * config/i386/i386.md (ANY_XSAVE): Add UNSPECV_XSAVEC, UNSPECV_XSAVES. (ANY_XSAVE64)" Add UNSPECV_XSAVEC64, UNSPECV_XSAVES64. (attr xsave): Add xsavec, xsavec64, xsaves, xsaves64. (ANY_XRSTOR): New. (ANY_XRSTOR64): Ditto. (xrstor): Ditto. (xrstor): Change into <xrstor>. (xrstor_rex64): Change into <xrstor>_rex64. (xrstor64): Change into <xrstor>64 (clflushopt): New. * config/i386/i386.opt (mclflushopt): New. (mxsavec): Ditto. (mxsaves): Ditto. * config/i386/x86intrin.h: Add clflushoptintrin.h, xsavesintrin.h, xsavecintrin.h. * doc/invoke.texi: Document new options. gcc/testsuite/ * gcc.target/i386/clflushopt-1.c: New. * gcc.target/i386/xsavec-1.c: Ditto. * gcc.target/i386/xsavec64-1.c: Ditto. * gcc.target/i386/xsaves-1.c: Ditto. * gcc.target/i386/xsaves64-1.c: Ditto. * gcc.target/i386/sse-12.c: Test new options. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. From-SVN: r210421
2014-05-07configure.ac: Always set need_64bit_hwint to yes.Richard Biener1-1/+1
2014-05-07 Richard Biener <rguenther@suse.de> libcpp/ * configure.ac: Always set need_64bit_hwint to yes. * configure: Regenerated. * config.gcc: Always set need_64bit_hwint to yes. From-SVN: r210149
2014-04-30Simplify Solaris 2 configurationRainer Orth1-7/+7
* config/sol2-10.h (TARGET_LIBC_HAS_FUNCTION): Move ... * config/sol2.h: ... here. * config/sol2-10.h: Remove. * config/sol2-bi.h (WCHAR_TYPE, WCHAR_TYPE_SIZE, WINT_TYPE) (WINT_TYPE_SIZE, MULTILIB_DEFAULTS, DEF_ARCH32_SPEC) (DEF_ARCH64_SPEC, ASM_CPU_DEFAULT_SPEC, LINK_ARCH64_SPEC_BASE) (LINK_ARCH64_SPEC, ARCH_DEFAULT_EMULATION, TARGET_LD_EMULATION) (LINK_ARCH_SPEC, SUBTARGET_EXTRA_SPECS): Move ... * config/sol2.h: ... here. (SECTION_NAME_FORMAT): Don't redefine. (STARTFILE_ARCH32_SPEC): Rename to ... (STARTFILE_ARCH_SPEC): ... this. (ASM_OUTPUT_ALIGNED_COMMON): Move ... * config/sparc/sol2.h: ... here. (SECTION_NAME_FORMAT): Don't undef. * config/i386/sol2.h (ASM_CPU_DEFAULT_SPEC) (SUBTARGET_EXTRA_SPECS): Remove. * config/sparc/sol2.h (ASM_CPU_DEFAULT_SPEC): Remove. * config/i386/sol2-bi.h (TARGET_SUBTARGET_DEFAULT) (MD_STARTFILE_PREFIX): Remove. (SUBTARGET_OPTIMIZATION_OPTIONS, ASM_CPU32_DEFAULT_SPEC) (ASM_CPU64_DEFAULT_SPEC, ASM_CPU_SPEC, ASM_SPEC, DEFAULT_ARCH32_P) (ARCH64_SUBDIR, ARCH32_EMULATION, ARCH64_EMULATION) (ASM_COMMENT_START, JUMP_TABLES_IN_TEXT_SECTION) (ASM_OUTPUT_DWARF_PCREL, ASM_OUTPUT_ALIGNED_COMMON) (USE_IX86_FRAME_POINTER, USE_X86_64_FRAME_POINTER): Move ... * config/i386/sol2.h: ... here. (TARGET_SUBTARGET_DEFAULT, SIZE_TYPE, PTRDIFF_TYPE): Remove. * config/i386/sol2-bi.h: Remove. * config/sol2.h (MD_STARTFILE_PREFIX): Remove. (LINK_ARCH32_SPEC_BASE): Remove /usr/ccs/lib/libp, /usr/ccs/lib. * config/i386/t-sol2-64: Rename to ... * config/i386/t-sol2: ... this. * config/sparc/t-sol2-64: Rename to ... * config/sparc/t-sol2: ... this. * config.gcc (*-*-solaris2*): Split sol2_tm_file into sol2_tm_file_head, sol2_tm_file_tail. Include ${cpu_type}/sol2.h before sol2.h. Remove sol2-10.h. (i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*): Include i386/x86-64.h between sol2_tm_file_head and sol2_tm_file_tail. Remove i386/sol2-bi.h, sol2-bi.h from tm_file. Reflect i386/t-sol2-64 renaming. (sparc*-*-solaris2*): Remove sol2-bi.h from tm_file. Reflect sparc/t-sol2-64 renaming. From-SVN: r209931
2014-04-23msp430.c (msp430_handle_option): Move function to msp430-common.cNick Clifton1-1/+0
* config/msp430/msp430.c (msp430_handle_option): Move function to msp430-common.c (msp430_option_override): Simplify mcu and mcpu option handling. (msp430_is_f5_mcu): Rename to msp430_use_f5_series_hwmult. Add support for -mhwmult command line option. (has_32bit_hwmult): Rename to use_32bit_hwmult. Add support for -mhwmult command line option. (msp430_hwmult_enabled): Delete. (msp43o_output_labelref): Add support for -mhwmult command line option. * config/msp430/msp430.md (mulhisi3, umulhisi3, mulsidi3) (umulsidi3): Likewise. * config/msp430/msp430.opt (mmcu): Add Report attribute. (mcpu, mlarge, msmall): Likewise. (mhwmult): New option. * config/msp430/msp430-protos.h (msp430_hwmult_enabled): Remove prototype. (msp430_is_f5_mcu): Remove prototype. (msp430_use_f5_series_hwmult): Add prototype. * config/msp430/msp430-opts.h: New file. * common/config/msp430: New directory. * common/config/msp430/msp430-common.c: New file. * config.gcc (msp430): Remove target_has_targetm_common. * doc/invoke.texi: Document -mhwmult command line option. From-SVN: r209685
2014-04-22Remove obsolete Solaris 9 supportRainer Orth1-46/+23
libstdc++-v3: * configure.host: Remove solaris2.9 handling. Change os_include_dir to os/solaris/solaris2.10. * acinclude.m4 (ac_has_gthreads): Remove solaris2.9* handling. * crossconfig.m4: Remove *-solaris2.9 handling, simplify. * configure: Regenerate. * config/abi/post/solaris2.9: Remove. * config/os/solaris/solaris2.9: Rename to ... * config/os/solaris/solaris2.10: ... this. * config/os/solaris/solaris2.10/os_defines.h (CLOCK_MONOTONIC): Remove. * doc/xml/manual/configure.xml (--enable-libstdcxx-threads): Remove Solaris 9 reference. * doc/html/manual/configure.html: Regenerate. * testsuite/27_io/basic_istream/extractors_arithmetic/char/12.cc: Remove *-*-solaris2.9 xfail. * testsuite/27_io/basic_istream/extractors_arithmetic/wchar_t/12.cc: Likewise. * testsuite/ext/enc_filebuf/char/13598.cc: Remove *-*-solaris2.9 xfail. libjava: * configure.ac (THREADLIBS, THREADSPEC): Remove *-*-solaris2.9 handling. * configure: Regenerate. libgfortran: * config/fpu-387.h [__sun__ && __svr4__]: Remove SSE execution check. libgcc: * config/i386/crtfastmath.c (set_fast_math): Remove SSE execution check. * config/i386/sol2-unwind.h (x86_fallback_frame_state): Remove Solaris 9 single-threaded support. * config/sparc/sol2-unwind.h (sparc64_is_sighandler): Remove Solaris 9 single-threaded support. Add call_user_handler code sequences. (sparc_is_sighandler): Likewise. libcpp: * lex.c: Remove Solaris 9 reference. gcc/testsuite: * gcc.c-torture/compile/pr28865.c: Remove dg-xfail-if. * gcc.dg/c99-stdint-6.c: Remove dg-options for *-*-solaris2.9. * gcc.dg/lto/20090210_0.c: Remove dg-extra-ld-options for *-*-solaris2.9. * gcc.dg/torture/pr47917.c: Remove dg-options for *-*-solaris2.9. * gcc.target/i386/pr22076.c: Remove i?86-*-solaris2.9 handling from dg-options. * gcc.target/i386/pr22152.c: Remove i?86-*-solaris2.9 handling from dg-additional-options. * gcc.target/i386/vect8-ret.c: Remove i?86-*-solaris2.9 handling from dg-options. * gcc.dg/vect/tree-vect.h (check_vect): Remove Solaris 9 SSE2 execution check. * gcc.target/i386/sse-os-support.h [__sun__ && __svr4__] (sigill_hdlr): Remove. (sse_os_support) [__sun__ && __svr4__]: Remove SSE execution check. * gfortran.dg/erf_3.F90: Remove sparc*-*-solaris2.9* handling. * gfortran.dg/fmt_en.f90: Remove i?86-*-solaris2.9* handling. * gfortran.dg/round_4.f90: Remove *-*-solaris2.9* handling. * lib/target-supports.exp (add_options_for_tls): Remove *-*-solaris2.9* handling. gcc: * config.gcc (enable_obsolete): Remove *-*-solaris2.9*. (*-*-solaris2.[0-9] | *-*-solaris2.[0-9].*): Mark unsupported. (*-*-solaris2*): Simplify. (i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*): Likewise. (i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*): Remove *-*-solaris2.9* handling. * configure.ac (gcc_cv_as_hidden): Remove test for Solaris 9/x86 as bug. (gcc_cv_ld_hidden): Remove *-*-solaris2.9* handling. (ld_tls_support): Remove i?86-*-solaris2.9, sparc*-*-solaris2.9 handling, simplify. (gcc_cv_as_gstabs_flag): Remove workaround for Solaris 9/x86 as bug. * configure: Regenerate. * config/i386/sol2-9.h: Remove. * doc/install.texi (Specific, i?86-*-solaris2.9): Remove. (Specific, *-*-solaris2*): Mention Solaris 9 support removal. Remove Solaris 9 references. fixincludes: * inclhack.def (math_exception): Bypass on *-*-solaris2.1[0-9]*. (solaris_int_types): Remove. (solaris_longjmp_noreturn): Remove. (solaris_mutex_init_2): Remove. (solaris_once_init_2): Remove. (solaris_sys_va_list): Remove. * fixincl.x: Regenerate. * tests/base/iso/setjmp_iso.h: Remove. * tests/base/pthread.h [SOLARIS_MUTEX_INIT_2_CHECK]: Remove. [SOLARIS_ONCE_INIT_1_CHECK]: Remove wrapping done by solaris_once_init_2. [SOLARIS_ONCE_INIT_2_CHECK]: Remove. * tests/base/sys/int_types.h: Remove. * tests/base/sys/va_list.h: Remove. contrib: * config-list.mk (LIST): Remove sparc-sun-solaris2.9, i686-solaris2.9. From-SVN: r209621
2014-03-12[AArch64] Fix selection of default CPU options at configure-timeKyrylo Tkachov1-3/+6
* config.gcc (aarch64*-*-*): Use ISA flags from aarch64-arches.def. Do not define target_cpu_default2 to generic. * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Use generic cpu. * config/aarch64/aarch64.c (aarch64_override_options): Update comment. * config/aarch64/aarch64-arches.def (armv8-a): Use generic cpu. From-SVN: r208508
2014-02-24TILE-Gx big endian support.Walter Lee1-3/+8
/: * configure.ac (tilepro-*-*) Change to tilepro*-*-*. (tilegx-*-*): Change to tilegx*-*-*. * configure: Regenerate. contrib/: * config-list.mk (LIST): Add tilegxbe-linux-gnu. libcpp/: * configure.ac: Change "tilepro" triplet to "tilepro*". * configure: Regenerate. libgcc/: * config.host: Support "tilegx*" and "tilepro*" triplets. * config/tilegx/sfp-machine32.h (__BYTE_ORDER): Handle big endian. * config/tilegx/sfp-machine64.h (__BYTE_ORDER): Handle big endian. gcc/: * config.gcc (tilepro-*-*): Change to tilepro*-*-*. (tilegx-*-linux*): Change to tilegx*-*-linux*; Support tilegxbe triplet. * common/config/tilegx/tilegx-common.c (TARGET_DEFAULT_TARGET_FLAGS): Define. * config/tilegx/linux.h (ASM_SPEC): Add endian_spec. (LINK_SPEC): Ditto. * config/tilegx/sync.md (atomic_test_and_set): Handle big endian. * config/tilegx/tilegx.c (tilegx_return_in_msb): New. (tilegx_gimplify_va_arg_expr): Handle big endian. (tilegx_expand_unaligned_load): Ditto. (tilegx_expand_unaligned_store): Ditto. (TARGET_RETURN_IN_MSB): New. * config/tilegx/tilegx.h (TARGET_DEFAULT): New. (TARGET_ENDIAN_DEFAULT): New. (TARGET_BIG_ENDIAN): Handle big endian. (BYTES_BIG_ENDIAN): Ditto. (WORDS_BIG_ENDIAN): Ditto. (FLOAT_WORDS_BIG_ENDIAN): Ditto. (ENDIAN_SPEC): New. (EXTRA_SPECS): New. * config/tilegx/tilegx.md (extv): Handle big endian. (extzv): Ditto. (insn_st<n>): Ditto. (insn_st<n>_add<bitsuffix>): Ditto. (insn_stnt<n>): Ditto. (insn_stnt<n>_add<bitsuffix>):Ditto. (vec_interleave_highv8qi): Handle big endian. (vec_interleave_highv8qi_be): New. (vec_interleave_highv8qi_le): New. (insn_v1int_h): Handle big endian. (vec_interleave_lowv8qi): Handle big endian. (vec_interleave_lowv8qi_be): New. (vec_interleave_lowv8qi_le): New. (insn_v1int_l): Handle big endian. (vec_interleave_highv4hi): Handle big endian. (vec_interleave_highv4hi_be): New. (vec_interleave_highv4hi_le): New. (insn_v2int_h): Handle big endian. (vec_interleave_lowv4hi): Handle big endian. (vec_interleave_lowv4hi_be): New. (vec_interleave_lowv4hi_le): New. (insn_v2int_l): Handle big endian. (vec_interleave_highv2si): Handle big endian. (vec_interleave_highv2si_be): New. (vec_interleave_highv2si_le): New. (insn_v4int_h): Handle big endian. (vec_interleave_lowv2si): Handle big endian. (vec_interleave_lowv2si_be): New. (vec_interleave_lowv2si_le): New. (insn_v4int_l): Handle big endian. * config/tilegx/tilegx.opt (mbig-endian): New option. (mlittle-endian): New option. * doc/install.texi: Document tilegxbe-linux. * doc/invoke.texi: Document -mbig-endian and -mlittle-endian. From-SVN: r208069
2014-02-11Only assume 4-byte stack alignment on Solaris 9/x86 (PR libgomp/60107)Rainer Orth1-0/+3
PR libgomp/60107 * config/i386/sol2-9.h: New file. * config.gcc (i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*, *-*-solaris2.9*): Use it. From-SVN: r207688
2014-01-18Update x86 --with-arch/--with-cpu= configure handlingH.J. Lu1-50/+83
PR bootstrap/59580 PR bootstrap/59583 * config.gcc (x86_archs): New variable. (x86_64_archs): Likewise. (x86_cpus): Likewise. Use $x86_archs, $x86_64_archs and $x86_cpus to check valid --with-arch/--with-cpu= options. Support --with-arch=/--with-cpu={nehalem,westmere, sandybridge,ivybridge,haswell,broadwell,bonnell,silvermont}. From-SVN: r206756
2014-01-15config.gcc (*-*-rtems*): Add t-rtems to tmake_file.Sebastian Huber1-19/+18
2014-01-15 Sebastian Huber <sebastian.huber@embedded-brains.de> * config.gcc (*-*-rtems*): Add t-rtems to tmake_file. (arm*-*-uclinux*eabi*): Do not override an existing tmake_file. (arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*): Likwise. (arm*-*-rtems*): Use t-rtems from existing tmake_file. (avr-*-rtems*): Likewise. (bfin*-rtems*): Likewise. (moxie-*-rtems*): Likewise. (h8300-*-rtems*): Likewise. (i[34567]86-*-rtems*): Likewise. (lm32-*-rtems*): Likewise. (m32r-*-rtems*): Likewise. (m68k-*-rtems*): Likewise. (microblaze*-*-rtems*): Likewise. (mips*-*-rtems*): Likewise. (powerpc-*-rtems*): Likewise. (sh-*-rtems*): Likewise. (sparc-*-rtems*): Likewise. (sparc64-*-rtems*): Likewise. (v850-*-rtems*): Likewise. (m32c-*-rtems*): Likewise. From-SVN: r206637
2014-01-06config.gcc (arm*-*-*): Check --with-arch against arm-arches.def.Terry Guo1-13/+11
2014-01-06 Terry Guo <terry.guo@arm.com> * config.gcc (arm*-*-*): Check --with-arch against arm-arches.def. From-SVN: r206354
2014-01-02Update copyright years in gcc/Richard Sandiford1-1/+1
From-SVN: r206289
2013-12-31i386-common.c (OPTION_MASK_ISA_SHA_SET): New.Alexander Ivchenko1-2/+4
gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_SHA_SET): New. (OPTION_MASK_ISA_SHA_UNSET): Ditto. (ix86_handle_option): Handle OPT_msha. * config.gcc (extra_headers): Add shaintrin.h. * config/i386/cpuid.h (bit_SHA): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect SHA instructions. * config/i386/i386-c.c (ix86_target_macros_internal): Handle OPTION_MASK_ISA_SHA. * config/i386/i386.c (ix86_target_string): Add -msha. (ix86_option_override_internal): Add PTA_SHA. (ix86_valid_target_attribute_inner_p): Handle OPT_msha. (enum ix86_builtins): Add IX86_BUILTIN_SHA1MSG1, IX86_BUILTIN_SHA1MSG2, IX86_BUILTIN_SHA1NEXTE, IX86_BUILTIN_SHA1RNDS4, IX86_BUILTIN_SHA256MSG1, IX86_BUILTIN_SHA256MSG2, IX86_BUILTIN_SHA256RNDS2. (bdesc_args): Add BUILTINS defined above. (ix86_init_mmx_sse_builtins): Add __builtin_ia32_sha1msg1, __builtin_ia32_sha1msg2, __builtin_ia32_sha1nexte, __builtin_ia32_sha1rnds4, __builtin_ia32_sha256msg1, __builtin_ia32_sha256msg2, __builtin_ia32_sha256rnds2. (ix86_expand_args_builtin): Handle V4SI_FTYPE_V4SI_V4SI_V4SI, add warning for CODE_FOR_sha1rnds4. * config/i386/i386.h (TARGET_SHA): New. (TARGET_SHA_P): Ditto. * config/i386/i386.opt (-msha): Document it. * config/i386/immintrin.h: Add shaintrin.h. * config/i386/shaintrin.h: New. * config/i386/sse.md (unspec): Add UNSPEC_SHA1MSG1, UNSPEC_SHA1MSG2, UNSPEC_SHA1NEXTE, UNSPEC_SHA1RNDS4, UNSPEC_SHA256MSG1, UNSPEC_SHA256MSG2, UNSPEC_SHA256RNDS2. (sha1msg1): New. (sha1msg2): Ditto. (sha1nexte): Ditto. (sha1rnds4): Ditto. (sha256msg1): Ditto. (sha256msg2): Ditto. (sha256rnds2): Ditto. * doc/invoke.texi: Add -msha. testsuite/ * gcc.target/i386/avx-1.c: Add define for __builtin_ia32_sha1rnds4. * gcc.target/i386/i386.exp (check_effective_target_sha): New. * gcc.target/i386/sha-check.h: New file. * gcc.target/i386/sha1msg1-1.c: Ditto. * gcc.target/i386/sha1msg1-2.c: Ditto. * gcc.target/i386/sha1msg2-1.c: Ditto. * gcc.target/i386/sha1msg2-2.c: Ditto. * gcc.target/i386/sha1nexte-1: Ditto. * gcc.target/i386/sha1nexte-2: Ditto. * gcc.target/i386/sha1rnds4-1.c: Ditto. * gcc.target/i386/sha1rnds4-2.c: Ditto. * gcc.target/i386/sha256msg1-1.c: Ditto. * gcc.target/i386/sha256msg1-2.c: Ditto. * gcc.target/i386/sha256msg2-1.c: Ditto. * gcc.target/i386/sha256msg2-2.c: Ditto. * gcc.target/i386/sha256rnds2-1.c: Ditto. * gcc.target/i386/sha256rnds2-2.c: Ditto. * gcc.target/i386/sse-13.c: Add __builtin_ia32_sha1rnds4. * gcc.target/i386/sse-14.c: Add _mm_sha1rnds4_epu32. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Add __builtin_ia32_sha1rnds4. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com> From-SVN: r206263
2013-12-31config.gcc (extra_headers): Add avx512fintrin.h, avx512cdintrin.h, ↵Alexander Ivchenko1-6/+8
avx512erintrin.h, avx512pfintrin.h. gcc/ * config.gcc (extra_headers): Add avx512fintrin.h, avx512cdintrin.h, avx512erintrin.h, avx512pfintrin.h. * config/i386/avx512cdintrin.h: New file. * config/i386/avx512erintrin.h: New file. * config/i386/avx512fintrin.h: New file. * config/i386/avx512pfintrin.h: New file. * config/i386/i386-builtin-types.def: Add V16UHI, V32SF, V16SF, V8DF, V8DI, V16SI, V64QI, PV8DF, PV8DI, PV16SI, PV16SF, PCV8DF, PCV16SF, PCV8DI, PCV16SI, V16QI_FTYPE_V16SI, V8DF_FTYPE_V8SI, V8DF_FTYPE_V8DF, V8HI_FTYPE_V8DI, V16SF_FTYPE_V16SF, V8SI_FTYPE_V8DI, V8SF_FTYPE_V8DF, V8SF_FTYPE_V8DF_V8SF_QI, V16HI_FTYPE_V16SI, V16SF_FTYPE_FLOAT, V16SI_FTYPE_INT, V8DF_FTYPE_DOUBLE, V8DI_FTYPE_INT64, V16SF_FTYPE_V4SF, V8DF_FTYPE_V4DF, V8DI_FTYPE_V4DI, V16QI_FTYPE_V8DI, UINT_FTYPE_V4SF, UINT64_FTYPE_V4SF, UINT_FTYPE_V2DF, UINT64_FTYPE_V2DF, V16SI_FTYPE_V16SI, V16SI_FTYPE_V16SI_V16SI_HI, V8DI_FTYPE_V8DI, V8DI_FTYPE_V8DI_V8DI_QI, V16SI_FTYPE_PV4SI, V16SF_FTYPE_PV4SF, V8DI_FTYPE_PV4DI, V8DF_FTYPE_PV4DF, V8UHI_FTYPE_V8UHI, V8USI_FTYPE_V8USI, V2DF_FTYPE_V2DF_UINT, V2DF_FTYPE_V2DF_UINT64, V4DF_FTYPE_V8DF_INT, V4DF_FTYPE_V8DF_INT_V4DF_QI, V8DF_FTYPE_V8DF_V8DI, V4SF_FTYPE_V4SF_UINT, V4SF_FTYPE_V4SF_UINT64, INT_FTYPE_V4SF_V4SF_INT_INT, INT_FTYPE_V2DF_V2DF_INT_INT, V16SF_FTYPE_V16SF_INT, V4SF_FTYPE_V16SF_INT, V4SF_FTYPE_V16SF_INT_V4SF_QI, V16SF_FTYPE_V16SF_V16SF, V16SF_FTYPE_V16SF_V16SI, V8DF_FTYPE_V8DF_V4DF_INT_V8DF_QI, V8DF_FTYPE_V8DF_V8DF_INT_V8DF_QI, V8DF_FTYPE_V8DF_INT_V8DF_QI, V8DF_FTYPE_V8DF_V8DF_V8DI_INT_QI_INT, V8DF_FTYPE_V8DF_V8DF, V16SF_FTYPE_V16SF_V16SF_INT, V16SF_FTYPE_V16SF_V16SF_INT_V16SF_HI, V16SF_FTYPE_V16SF_INT_V16SF_HI, V16SI_FTYPE_V16SI_V4SI_INT_V16SI_HI, V16SF_FTYPE_V16SF_V16SF_V16SI_INT, V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI, V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI_INT, V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI, V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI, V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI_INT, V16SF_FTYPE_V16SF_V4SF_INT, V16SF_FTYPE_V16SF_V4SF_INT_V16SF_HI, V16HI_FTYPE_V16SF_INT, V16HI_FTYPE_V16SF_INT_V16HI_HI, V16HI_FTYPE_V16HI_V16HI_INT_V16HI_HI, V16SI_FTYPE_V16SI_V4SI, V16SI_FTYPE_V16SI_V4SI_INT, V4SI_FTYPE_V16SI_INT, V4SI_FTYPE_V16SI_INT_V4SI_QI, V16SI_FTYPE_V16SI_V16SI, V16SI_FTYPE_V16SI_V16SI_INT_V16SI_HI, V16SI_FTYPE_V16SI_SI, V16SI_FTYPE_V16SI_INT, V16SI_FTYPE_V16SI_V4SI_V16SI_HI, V16SI_FTYPE_V16SI_INT_V16SI_HI, V8DI_FTYPE_V8DI_V8DI, V16SI_FTYPE_V8DF_V8DF, V8DI_FTYPE_V8DI_V8DI_INT_V8DI_QI, V8DI_FTYPE_V8DI_V4DI_INT_V8DI_QI, V8DI_FTYPE_V8DI_V2DI, V4DI_FTYPE_V8DI_INT, V4DI_FTYPE_V8DI_INT_V4DI_QI, V8DI_FTYPE_V8DI_V2DI_V8DI_QI, V8DI_FTYPE_V8DI_INT_V8DI_QI, VOID_FTYPE_PDOUBLE_V8DF, VOID_FTYPE_PFLOAT_V16SF, VOID_FTYPE_PV8DI_V8DI, HI_FTYPE_HI, HI_FTYPE_HI_HI, HI_FTYPE_HI_INT, QI_FTYPE_V8DI_V8DI, QI_FTYPE_V8DI_V8DI_QI, HI_FTYPE_V16SI_V16SI, HI_FTYPE_V16SI_V16SI_HI, QI_FTYPE_V8DI_V8DI_INT, QI_FTYPE_V8DI_V8DI_INT_QI, HI_FTYPE_V16SI_V16SI_INT, HI_FTYPE_V16SI_V16SI_INT ,HI, QI_FTYPE_V8DF_V8DF_INT, QI_FTYPE_V8DF_V8DF_INT_QI, QI_FTYPE_V8DF_V8DF_INT_QI_INT, HI_FTYPE_V16SF_V16SF_INT, HI_FTYPE_V16SF_V16SF_INT_HI, HI_FTYPE_V16SF_V16SF_INT_HI_INT, QI_FTYPE_V2DF_V2DF_INT, QI_FTYPE_V2DF_V2DF_INT_QI, QI_FTYPE_V2DF_V2DF_INT_QI_INT, QI_FTYPE_V4SF_V4SF_INT, QI_FTYPE_V4SF_V4SF_INT_QI, QI_FTYPE_V4SF_V4SF_INT_QI_INT, V16SI_FTYPE_HI, V8DI_FTYPE_QI, V8DF_FTYPE_V8DF_V8DF_V8DF, V16SF_FTYPE_V16SF_V16SF_V16SF, V8DF_FTYPE_V8DF_V8DF_QI, V8DF_FTYPE_V8SF_V8DF_QI, V8DF_FTYPE_V8SI_V8DF_QI, V8DI_FTYPE_V8SI_V8DI_QI, V8DI_FTYPE_V8HI_V8DI_QI, V8DI_FTYPE_V16QI_V8DI_QI, V8DI_FTYPE_V8DI_V8DI_V8DI_QI, V8DF_FTYPE_V8DI_V8DF_V8DF, V8DF_FTYPE_V8DI_V8DF_V8DF_QI, V8DF_FTYPE_V8DF_V8DI_V8DF_QI, V8DF_FTYPE_V8DF_V8DF_V8DF_QI, V16SI_FTYPE_V16SI_V16SI_V16SI_HI, V2DF_FTYPE_V2DF_V2DF_V2DF_QI, V2DF_FTYPE_V2DF_V4SF_V2DF_QI, V16SF_FTYPE_V16SF_V16SF_HI, V16SF_FTYPE_V16SI_V16SF_HI, V16SF_FTYPE_V16SF_V16SF_V16SF_HI, V16SF_FTYPE_V16SI_V16SF_V16SF, V16SF_FTYPE_V16SI_V16SF_V16SF_HI, V16SF_FTYPE_V16SF_V16SI_V16SF_HI, V4SF_FTYPE_V4SF_V2DF_V4SF_QI, V4SF_FTYPE_V4SF_V4SF_V4SF_QI, V16SF_FTYPE_V4SF_V16SF_HI, V8DF_FTYPE_V4DF_V8DF_QI, V8DF_FTYPE_V2DF_V8DF_QI, V16SI_FTYPE_V4SI_V16SI_HI, V16SI_FTYPE_SI_V16SI_HI, V16SI_FTYPE_V16HI_V16SI_HI, V16SI_FTYPE_V16QI_V16SI_HI, V8SI_FTYPE_V8DF_V8SI_QI, V8DI_FTYPE_V4DI_V8DI_QI, V8DI_FTYPE_V2DI_V8DI_QI, V8DI_FTYPE_DI_V8DI_QI, V16SF_FTYPE_PCV16SF_V16SF_HI, V8DF_FTYPE_PCV8DF_V8DF_QI, V16SI_FTYPE_PCV16SI_V16SI_HI, V8DI_FTYPE_PCV8DI_V8DI_QI, V2DF_FTYPE_PCDOUBLE_V2DF_QI, V4SF_FTYPE_PCFLOAT_V4SF_QI, V16QI_FTYPE_V16SI_V16QI_HI, V16HI_FTYPE_V16SI_V16HI_HI, V8SI_FTYPE_V8DI_V8SI_QI, V8HI_FTYPE_V8DI_V8HI_QI, V16QI_FTYPE_V8DI_V16QI_QI, VOID_FTYPE_PV8DF_V8DF_QI, VOID_FTYPE_PV16SF_V16SF_HI, VOID_FTYPE_PV8DI_V8DI_QI, VOID_FTYPE_PV16SI_V16SI_HI, VOID_FTYPE_PDOUBLE_V2DF_QI, VOID_FTYPE_PFLOAT_V4SF_QI, V16SI_FTYPE_V16SF_V16SI_HI, V8DI_FTYPE_V8DI_V8DI_V8DI_INT_QI, V16SI_FTYPE_V16SI_V16SI_V16SI_INT_HI, V8DI_FTYPE_V8DI_V8DI_V8DI, V16SI_FTYPE_V16SI_V16SI_V16SI, V8DF_FTYPE_V8DF_V8DI_V8DF, V16SF_FTYPE_V16SF_V16SI_V16SF, V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI, V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI, V8DI_FTYPE_V16SI_V16SI_V8DI_QI, UINT64_FTYPE_V2DF_INT, UINT64_FTYPE_V4SF_INT, UINT_FTYPE_V2DF_INT, UINT_FTYPE_V4SF_INT, INT64_FTYPE_V2DF_INT, INT64_FTYPE_V4SF_INT, INT_FTYPE_V2DF_INT, INT_FTYPE_V4SF_INT, V2DF_FTYPE_V2DF_UINT64_INT, V4SF_FTYPE_V4SF_UINT64_INT, V4SF_FTYPE_V4SF_UINT_INT, V2DF_FTYPE_V2DF_INT64_INT, V4SF_FTYPE_V4SF_INT64_INT, V4SF_FTYPE_V4SF_INT_INT, V16SI_FTYPE_V16SF_V16SI_HI_INT, V16SF_FTYPE_V16SI_V16SF_HI_INT, V16SF_FTYPE_V16SF_V16SF_HI_INT, V16SF_FTYPE_V16HI_V16SF_HI_INT, V8SI_FTYPE_V8DF_V8SI_QI_INT, V8SF_FTYPE_V8DF_V8SF_QI_INT, V8DF_FTYPE_V8DF_V8DF_QI_INT, V8DF_FTYPE_V8SF_V8DF_QI_INT, V16SF_FTYPE_V16SF_V16SF_V16SF_HI_INT, V8DF_FTYPE_V8DF_V8DF_V8DF_QI_INT, V4SF_FTYPE_V4SF_V4SF_V4SF_QI_INT, V4SF_FTYPE_V4SF_V2DF_V4SF_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DF_QI_INT, V2DF_FTYPE_V2DF_V4SF_V2DF_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DF_INT, V16SF_FTYPE_V16SF_INT_V16SF_HI_INT, V8DF_FTYPE_V8DF_INT_V8DF_QI_INT, V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI_INT, V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI_INT, V8DI_FTYPE_V8DI_SI_V8DI_V8DI, V16SF_FTYPE_V16SF_PCFLOAT_V16SI_HI_INT, V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT, V8DF_FTYPE_V8DF_PCDOUBLE_V8SI_QI_INT, V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT, V8SF_FTYPE_V8SF_PCFLOAT_V8DI_QI_INT, V8DF_FTYPE_V8DF_PCDOUBLE_V8DI_QI_INT, V16SI_FTYPE_V16SI_PCINT_V16SI_HI_INT, V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT, V8DI_FTYPE_V8DI_PCINT64_V8SI_QI_INT, V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT, V8SI_FTYPE_V8SI_PCINT_V8DI_QI_INT, V8DI_FTYPE_V8DI_PCINT64_V8DI_QI_INT, VOID_FTYPE_PFLOAT_HI_V16SI_V16SF_INT, VOID_FTYPE_PDOUBLE_QI_V8SI_V8DF_INT, VOID_FTYPE_PFLOAT_QI_V8DI_V8SF_INT, VOID_FTYPE_PDOUBLE_QI_V8DI_V8DF_INT, VOID_FTYPE_PINT_HI_V16SI_V16SI_INT, VOID_FTYPE_PLONGLONG_QI_V8SI_V8DI_INT, VOID_FTYPE_PINT_QI_V8DI_V8SI_INT, VOID_FTYPE_PLONGLONG_QI_V8DI_V8DI_INT, VOID_FTYPE_HI_V16SI_PCINT_INT_INT, VOID_FTYPE_QI_V8DI_PCINT_INT_INT. (ALIAS): Add DEF_FUNCTION_TYPE_ALIAS (V16SI_FTYPE_V8DF_V8DF, ROUND). * config/i386/i386.c (enum ix86_builtins): Add IX86_BUILTIN_ADDPD512, IX86_BUILTIN_ADDPS512, IX86_BUILTIN_ADDSD_MASK, IX86_BUILTIN_ADDSS_MASK, IX86_BUILTIN_ALIGND512, IX86_BUILTIN_ALIGNQ512, IX86_BUILTIN_BLENDMD512, IX86_BUILTIN_BLENDMPD512, IX86_BUILTIN_BLENDMPS512, IX86_BUILTIN_BLENDMQ512, IX86_BUILTIN_BROADCASTF32X4_512, IX86_BUILTIN_BROADCASTF64X4_512, IX86_BUILTIN_BROADCASTI32X4_512, IX86_BUILTIN_BROADCASTI64X4_512, IX86_BUILTIN_BROADCASTSD512, IX86_BUILTIN_BROADCASTSS512, IX86_BUILTIN_CMPD512, IX86_BUILTIN_CMPPD512, IX86_BUILTIN_CMPPS512, IX86_BUILTIN_CMPQ512, IX86_BUILTIN_CMPSD_MASK, IX86_BUILTIN_CMPSS_MASK, IX86_BUILTIN_COMIDF, IX86_BUILTIN_COMISF, IX86_BUILTIN_COMPRESSPD512, IX86_BUILTIN_COMPRESSPDSTORE512, IX86_BUILTIN_COMPRESSPS512, IX86_BUILTIN_COMPRESSPSSTORE512, IX86_BUILTIN_CVTDQ2PD512, IX86_BUILTIN_CVTDQ2PS512, IX86_BUILTIN_CVTPD2DQ512, IX86_BUILTIN_CVTPD2PS512, IX86_BUILTIN_CVTPD2UDQ512, IX86_BUILTIN_CVTPH2PS512, IX86_BUILTIN_CVTPS2DQ512, IX86_BUILTIN_CVTPS2PD512, IX86_BUILTIN_CVTPS2PH512, IX86_BUILTIN_CVTPS2UDQ512, IX86_BUILTIN_CVTSD2SS_MASK, IX86_BUILTIN_CVTSI2SD64, IX86_BUILTIN_CVTSI2SS32, IX86_BUILTIN_CVTSI2SS64, IX86_BUILTIN_CVTSS2SD_MASK, IX86_BUILTIN_CVTTPD2DQ512, IX86_BUILTIN_CVTTPD2UDQ512, IX86_BUILTIN_CVTTPS2DQ512, IX86_BUILTIN_CVTTPS2UDQ512, IX86_BUILTIN_CVTUDQ2PD512, IX86_BUILTIN_CVTUDQ2PS512, IX86_BUILTIN_CVTUSI2SD32, IX86_BUILTIN_CVTUSI2SD64, IX86_BUILTIN_CVTUSI2SS32, IX86_BUILTIN_CVTUSI2SS64, IX86_BUILTIN_DIVPD512, IX86_BUILTIN_DIVPS512, IX86_BUILTIN_DIVSD_MASK, IX86_BUILTIN_DIVSS_MASK, IX86_BUILTIN_EXPANDPD512, IX86_BUILTIN_EXPANDPD512Z, IX86_BUILTIN_EXPANDPDLOAD512, IX86_BUILTIN_EXPANDPDLOAD512Z, IX86_BUILTIN_EXPANDPS512, IX86_BUILTIN_EXPANDPS512Z, IX86_BUILTIN_EXPANDPSLOAD512, IX86_BUILTIN_EXPANDPSLOAD512Z, IX86_BUILTIN_EXTRACTF32X4, IX86_BUILTIN_EXTRACTF64X4, IX86_BUILTIN_EXTRACTI32X4, IX86_BUILTIN_EXTRACTI64X4, IX86_BUILTIN_FIXUPIMMPD512_MASK, IX86_BUILTIN_FIXUPIMMPD512_MASKZ, IX86_BUILTIN_FIXUPIMMPS512_MASK, IX86_BUILTIN_FIXUPIMMPS512_MASKZ, IX86_BUILTIN_FIXUPIMMSD128_MASK, IX86_BUILTIN_FIXUPIMMSD128_MASKZ, IX86_BUILTIN_FIXUPIMMSS128_MASK, IX86_BUILTIN_FIXUPIMMSS128_MASKZ, IX86_BUILTIN_GETEXPPD512, IX86_BUILTIN_GETEXPPS512, IX86_BUILTIN_GETEXPSD128, IX86_BUILTIN_GETEXPSS128, IX86_BUILTIN_GETMANTPD512, IX86_BUILTIN_GETMANTPS512, IX86_BUILTIN_GETMANTSD128, IX86_BUILTIN_GETMANTSS128, IX86_BUILTIN_INSERTF32X4, IX86_BUILTIN_INSERTF64X4, IX86_BUILTIN_INSERTI32X4, IX86_BUILTIN_INSERTI64X4, IX86_BUILTIN_LOADAPD512, IX86_BUILTIN_LOADAPS512, IX86_BUILTIN_LOADDQUDI512, IX86_BUILTIN_LOADDQUSI512, IX86_BUILTIN_LOADSD, IX86_BUILTIN_LOADSS, IX86_BUILTIN_LOADUPD512, IX86_BUILTIN_LOADUPS512, IX86_BUILTIN_MAXPD512, IX86_BUILTIN_MAXPS512, IX86_BUILTIN_MAXSD_MASK, IX86_BUILTIN_MAXSS_MASK, IX86_BUILTIN_MINPD512, IX86_BUILTIN_MINPS512, IX86_BUILTIN_MINSD_MASK, IX86_BUILTIN_MINSS_MASK, IX86_BUILTIN_MOVAPD512, IX86_BUILTIN_MOVAPS512, IX86_BUILTIN_MOVDDUP512, IX86_BUILTIN_MOVDQA32LOAD512, IX86_BUILTIN_MOVDQA32STORE512, IX86_BUILTIN_MOVDQA32_512, IX86_BUILTIN_MOVDQA64LOAD512, IX86_BUILTIN_MOVDQA64STORE512, IX86_BUILTIN_MOVDQA64_512, IX86_BUILTIN_MOVESD, IX86_BUILTIN_MOVESS, IX86_BUILTIN_MOVNTDQ512, IX86_BUILTIN_MOVNTPD512, IX86_BUILTIN_MOVNTPS512, IX86_BUILTIN_MOVSHDUP512, IX86_BUILTIN_MOVSLDUP512, IX86_BUILTIN_MULPD512, IX86_BUILTIN_MULPS512, IX86_BUILTIN_MULSD_MASK, IX86_BUILTIN_MULSS_MASK, IX86_BUILTIN_PABSD512, IX86_BUILTIN_PABSQ512, IX86_BUILTIN_PADDD512, IX86_BUILTIN_PADDQ512, IX86_BUILTIN_PANDD512, IX86_BUILTIN_PANDND512, IX86_BUILTIN_PANDNQ512, IX86_BUILTIN_PANDQ512, IX86_BUILTIN_PBROADCASTD512, IX86_BUILTIN_PBROADCASTD512_GPR, IX86_BUILTIN_PBROADCASTMB512, IX86_BUILTIN_PBROADCASTMW512, IX86_BUILTIN_PBROADCASTQ512, IX86_BUILTIN_PBROADCASTQ512_GPR, IX86_BUILTIN_PBROADCASTQ512_MEM, IX86_BUILTIN_PCMPEQD512_MASK, IX86_BUILTIN_PCMPEQQ512_MASK, IX86_BUILTIN_PCMPGTD512_MASK, IX86_BUILTIN_PCMPGTQ512_MASK, IX86_BUILTIN_PCOMPRESSD512, IX86_BUILTIN_PCOMPRESSDSTORE512, IX86_BUILTIN_PCOMPRESSQ512, IX86_BUILTIN_PCOMPRESSQSTORE512, IX86_BUILTIN_PEXPANDD512, IX86_BUILTIN_PEXPANDD512Z, IX86_BUILTIN_PEXPANDDLOAD512, IX86_BUILTIN_PEXPANDDLOAD512Z, IX86_BUILTIN_PEXPANDQ512, IX86_BUILTIN_PEXPANDQ512Z, IX86_BUILTIN_PEXPANDQLOAD512, IX86_BUILTIN_PEXPANDQLOAD512Z, IX86_BUILTIN_PMAXSD512, IX86_BUILTIN_PMAXSQ512, IX86_BUILTIN_PMAXUD512, IX86_BUILTIN_PMAXUQ512, IX86_BUILTIN_PMINSD512, IX86_BUILTIN_PMINSQ512, IX86_BUILTIN_PMINUD512, IX86_BUILTIN_PMINUQ512, IX86_BUILTIN_PMOVDB512, IX86_BUILTIN_PMOVDW512, IX86_BUILTIN_PMOVQB512, IX86_BUILTIN_PMOVQD512, IX86_BUILTIN_PMOVQW512, IX86_BUILTIN_PMOVSDB512, IX86_BUILTIN_PMOVSDW512, IX86_BUILTIN_PMOVSQB512, IX86_BUILTIN_PMOVSQD512, IX86_BUILTIN_PMOVSQW512, IX86_BUILTIN_PMOVSXBD512, IX86_BUILTIN_PMOVSXBQ512, IX86_BUILTIN_PMOVSXDQ512, IX86_BUILTIN_PMOVSXWD512, IX86_BUILTIN_PMOVSXWQ512, IX86_BUILTIN_PMOVUSDB512, IX86_BUILTIN_PMOVUSDW512, IX86_BUILTIN_PMOVUSQB512, IX86_BUILTIN_PMOVUSQD512, IX86_BUILTIN_PMOVUSQW512, IX86_BUILTIN_PMOVZXBD512, IX86_BUILTIN_PMOVZXBQ512, IX86_BUILTIN_PMOVZXDQ512, IX86_BUILTIN_PMOVZXWD512, IX86_BUILTIN_PMOVZXWQ512, IX86_BUILTIN_PMULDQ512, IX86_BUILTIN_PMULLD512, IX86_BUILTIN_PMULUDQ512, IX86_BUILTIN_PORD512, IX86_BUILTIN_PORQ512, IX86_BUILTIN_PROLD512, IX86_BUILTIN_PROLQ512, IX86_BUILTIN_PROLVD512, IX86_BUILTIN_PROLVQ512, IX86_BUILTIN_PRORD512, IX86_BUILTIN_PRORQ512, IX86_BUILTIN_PRORVD512, IX86_BUILTIN_PRORVQ512, IX86_BUILTIN_PSHUFD512, IX86_BUILTIN_PSLLD512, IX86_BUILTIN_PSLLDI512, IX86_BUILTIN_PSLLQ512, IX86_BUILTIN_PSLLQI512, IX86_BUILTIN_PSLLVV16SI, IX86_BUILTIN_PSLLVV8DI, IX86_BUILTIN_PSRAD512, IX86_BUILTIN_PSRADI512, IX86_BUILTIN_PSRAQ512, IX86_BUILTIN_PSRAQI512, IX86_BUILTIN_PSRAVV16SI, IX86_BUILTIN_PSRAVV8DI, IX86_BUILTIN_PSRLD512, IX86_BUILTIN_PSRLDI512, IX86_BUILTIN_PSRLQ512, IX86_BUILTIN_PSRLQI512, IX86_BUILTIN_PSRLVV16SI, IX86_BUILTIN_PSRLVV8DI, IX86_BUILTIN_PSUBD512, IX86_BUILTIN_PSUBQ512, IX86_BUILTIN_PTESTMD512, IX86_BUILTIN_PTESTMQ512, IX86_BUILTIN_PTESTNMD512, IX86_BUILTIN_PTESTNMQ512, IX86_BUILTIN_PUNPCKHDQ512, IX86_BUILTIN_PUNPCKHQDQ512, IX86_BUILTIN_PUNPCKLDQ512, IX86_BUILTIN_PUNPCKLQDQ512, IX86_BUILTIN_PXORD512, IX86_BUILTIN_PXORQ512, IX86_BUILTIN_RCP14PD512, IX86_BUILTIN_RCP14PS512, IX86_BUILTIN_RCP14SD, IX86_BUILTIN_RCP14SS, IX86_BUILTIN_RNDSCALEPD, IX86_BUILTIN_RNDSCALEPS, IX86_BUILTIN_RNDSCALESD, IX86_BUILTIN_RNDSCALESS, IX86_BUILTIN_RSQRT14PD512, IX86_BUILTIN_RSQRT14PS512, IX86_BUILTIN_RSQRT14SD, IX86_BUILTIN_RSQRT14SS, IX86_BUILTIN_SCALEFPD512, IX86_BUILTIN_SCALEFPS512, IX86_BUILTIN_SCALEFSD, IX86_BUILTIN_SCALEFSS, IX86_BUILTIN_SHUFPD512, IX86_BUILTIN_SHUFPS512, IX86_BUILTIN_SHUF_F32x4, IX86_BUILTIN_SHUF_F64x2, IX86_BUILTIN_SHUF_I32x4, IX86_BUILTIN_SHUF_I64x2, IX86_BUILTIN_SQRTPD512_MASK, IX86_BUILTIN_SQRTPS512_MASK, IX86_BUILTIN_SQRTSD_MASK, IX86_BUILTIN_SQRTSS_MASK, IX86_BUILTIN_STOREAPD512, IX86_BUILTIN_STOREAPS512, IX86_BUILTIN_STOREDQUDI512, IX86_BUILTIN_STOREDQUSI512, IX86_BUILTIN_STORESD, IX86_BUILTIN_STORESS, IX86_BUILTIN_STOREUPD512, IX86_BUILTIN_STOREUPS512, IX86_BUILTIN_SUBPD512, IX86_BUILTIN_SUBPS512, IX86_BUILTIN_SUBSD_MASK, IX86_BUILTIN_SUBSS_MASK, IX86_BUILTIN_UCMPD512, IX86_BUILTIN_UCMPQ512, IX86_BUILTIN_UNPCKHPD512, IX86_BUILTIN_UNPCKHPS512, IX86_BUILTIN_UNPCKLPD512, IX86_BUILTIN_UNPCKLPS512, IX86_BUILTIN_VCVTSD2SI32, IX86_BUILTIN_VCVTSD2SI64, IX86_BUILTIN_VCVTSD2USI32, IX86_BUILTIN_VCVTSD2USI64, IX86_BUILTIN_VCVTSS2SI32, IX86_BUILTIN_VCVTSS2SI64, IX86_BUILTIN_VCVTSS2USI32, IX86_BUILTIN_VCVTSS2USI64, IX86_BUILTIN_VCVTTSD2SI32, IX86_BUILTIN_VCVTTSD2SI64, IX86_BUILTIN_VCVTTSD2USI32, IX86_BUILTIN_VCVTTSD2USI64, IX86_BUILTIN_VCVTTSS2SI32, IX86_BUILTIN_VCVTTSS2SI64, IX86_BUILTIN_VCVTTSS2USI32, IX86_BUILTIN_VCVTTSS2USI64, IX86_BUILTIN_VFMADDPD512_MASK, IX86_BUILTIN_VFMADDPD512_MASK3, IX86_BUILTIN_VFMADDPD512_MASKZ, IX86_BUILTIN_VFMADDPS512_MASK, IX86_BUILTIN_VFMADDPS512_MASK3, IX86_BUILTIN_VFMADDPS512_MASKZ, IX86_BUILTIN_VFMADDSD3_MASK, IX86_BUILTIN_VFMADDSD3_MASK3, IX86_BUILTIN_VFMADDSD3_MASKZ, IX86_BUILTIN_VFMADDSS3_MASK, IX86_BUILTIN_VFMADDSS3_MASK3, IX86_BUILTIN_VFMADDSS3_MASKZ, IX86_BUILTIN_VFMADDSUBPD512_MASK, IX86_BUILTIN_VFMADDSUBPD512_MASK3, IX86_BUILTIN_VFMADDSUBPD512_MASKZ, IX86_BUILTIN_VFMADDSUBPS512_MASK, IX86_BUILTIN_VFMADDSUBPS512_MASK3, IX86_BUILTIN_VFMADDSUBPS512_MASKZ, IX86_BUILTIN_VFMSUBADDPD512_MASK3, IX86_BUILTIN_VFMSUBADDPS512_MASK3, IX86_BUILTIN_VFMSUBPD512_MASK3, IX86_BUILTIN_VFMSUBPS512_MASK3, IX86_BUILTIN_VFMSUBSD3_MASK3, IX86_BUILTIN_VFMSUBSS3_MASK3, IX86_BUILTIN_VFNMADDPD512_MASK, IX86_BUILTIN_VFNMADDPS512_MASK, IX86_BUILTIN_VFNMSUBPD512_MASK, IX86_BUILTIN_VFNMSUBPD512_MASK3, IX86_BUILTIN_VFNMSUBPS512_MASK, IX86_BUILTIN_VFNMSUBPS512_MASK3, IX86_BUILTIN_VPCLZCNTD512, IX86_BUILTIN_VPCLZCNTQ512, IX86_BUILTIN_VPCONFLICTD512, IX86_BUILTIN_VPCONFLICTQ512, IX86_BUILTIN_VPERMDF512, IX86_BUILTIN_VPERMDI512, IX86_BUILTIN_VPERMI2VARD512, IX86_BUILTIN_VPERMI2VARPD512, IX86_BUILTIN_VPERMI2VARPS512, IX86_BUILTIN_VPERMI2VARQ512, IX86_BUILTIN_VPERMILPD512, IX86_BUILTIN_VPERMILPS512, IX86_BUILTIN_VPERMILVARPD512, IX86_BUILTIN_VPERMILVARPS512, IX86_BUILTIN_VPERMT2VARD512, IX86_BUILTIN_VPERMT2VARD512_MASKZ, IX86_BUILTIN_VPERMT2VARPD512, IX86_BUILTIN_VPERMT2VARPD512_MASKZ, IX86_BUILTIN_VPERMT2VARPS512, IX86_BUILTIN_VPERMT2VARPS512_MASKZ, IX86_BUILTIN_VPERMT2VARQ512, IX86_BUILTIN_VPERMT2VARQ512_MASKZ, IX86_BUILTIN_VPERMVARDF512, IX86_BUILTIN_VPERMVARDI512, IX86_BUILTIN_VPERMVARSF512, IX86_BUILTIN_VPERMVARSI512, IX86_BUILTIN_VTERNLOGD512_MASK, IX86_BUILTIN_VTERNLOGD512_MASKZ, IX86_BUILTIN_VTERNLOGQ512_MASK, IX86_BUILTIN_VTERNLOGQ512_MASKZ, IX86_BUILTIN_KAND16, IX86_BUILTIN_KANDN16, IX86_BUILTIN_KNOT16, IX86_BUILTIN_KOR16, IX86_BUILTIN_KORTESTC16, IX86_BUILTIN_KORTESTZ16, IX86_BUILTIN_KUNPCKBW, IX86_BUILTIN_KXNOR16, IX86_BUILTIN_KXOR16, IX86_BUILTIN_GATHER3SIV8DI, IX86_BUILTIN_SCATTERDIV16SF, IX86_BUILTIN_SCATTERDIV16SI, IX86_BUILTIN_SCATTERDIV8DF, IX86_BUILTIN_SCATTERDIV8DI, IX86_BUILTIN_SCATTERSIV16SF, IX86_BUILTIN_SCATTERSIV16SI, IX86_BUILTIN_SCATTERSIV8DF, IX86_BUILTIN_SCATTERSIV8DI, IX86_BUILTIN_GATHERPFDPS, IX86_BUILTIN_GATHERPFQPS, IX86_BUILTIN_SCATTERPFDPS, IX86_BUILTIN_SCATTERPFQPS, IX86_BUILTIN_EXP2PD_MASK, IX86_BUILTIN_EXP2PS_MASK, IX86_BUILTIN_RCP28PD, IX86_BUILTIN_RCP28PS, IX86_BUILTIN_RSQRT28PD, IX86_BUILTIN_RSQRT28PS. (bdesc_special_args): Add __builtin_ia32_compressstoresf512_mask, __builtin_ia32_compressstoresi512_mask, __builtin_ia32_compressstoredf512_mask, __builtin_ia32_compressstoredi512_mask, __builtin_ia32_expandloadsf512_mask, __builtin_ia32_expandloadsf512_maskz, __builtin_ia32_expandloadsi512_mask, __builtin_ia32_expandloadsi512_maskz, __builtin_ia32_expandloaddf512_mask, __builtin_ia32_expandloaddf512_maskz, __builtin_ia32_expandloaddi512_mask, __builtin_ia32_expandloaddi512_maskz, __builtin_ia32_loaddqusi512_mask, __builtin_ia32_loaddqudi512_mask, __builtin_ia32_loadsd_mask, __builtin_ia32_loadss_mask, __builtin_ia32_loadupd512_mask, __builtin_ia32_loadups512_mask, __builtin_ia32_loadaps512_mask, __builtin_ia32_movdqa32load512_mask, __builtin_ia32_loadapd512_mask, __builtin_ia32_movdqa64load512_mask, __builtin_ia32_movntps512, __builtin_ia32_movntpd512, __builtin_ia32_movntdq512, __builtin_ia32_storedqusi512_mask, __builtin_ia32_storedqudi512_mask, __builtin_ia32_storesd_mask, __builtin_ia32_storess_mask, __builtin_ia32_storeupd512_mask, __builtin_ia32_storeups512_mask, __builtin_ia32_storeaps512_mask, __builtin_ia32_movdqa32store512_mask, __builtin_ia32_storeapd512_mask, __builtin_ia32_movdqa64store512_mask, __builtin_ia32_alignd512_mask, __builtin_ia32_alignq512_mask, __builtin_ia32_blendmd_512_mask, __builtin_ia32_blendmpd_512_mask, __builtin_ia32_blendmps_512_mask, __builtin_ia32_blendmq_512_mask, __builtin_ia32_broadcastf32x4_512, __builtin_ia32_broadcastf64x4_512, __builtin_ia32_broadcasti32x4_512, __builtin_ia32_broadcasti64x4_512, __builtin_ia32_broadcastsd512, __builtin_ia32_broadcastss512, __builtin_ia32_cmpd512_mask, __builtin_ia32_cmpq512_mask, __builtin_ia32_compressdf512_mask, __builtin_ia32_compresssf512_mask, __builtin_ia32_cvtdq2pd512_mask, __builtin_ia32_vcvtps2ph512_mask, __builtin_ia32_cvtudq2pd512_mask, __builtin_ia32_cvtusi2sd32, __builtin_ia32_expanddf512_mask, __builtin_ia32_expanddf512_maskz, __builtin_ia32_expandsf512_mask, __builtin_ia32_expandsf512_maskz, __builtin_ia32_extractf32x4_mask, __builtin_ia32_extractf64x4_mask, __builtin_ia32_extracti32x4_mask, __builtin_ia32_extracti64x4_mask, __builtin_ia32_insertf32x4_mask, __builtin_ia32_insertf64x4_mask, __builtin_ia32_inserti32x4_mask, __builtin_ia32_inserti64x4_mask, __builtin_ia32_movapd512_mask, __builtin_ia32_movaps512_mask, __builtin_ia32_movddup512_mask, __builtin_ia32_movdqa32_512_mask, __builtin_ia32_movdqa64_512_mask, __builtin_ia32_movesd_mask, __builtin_ia32_movess_mask, __builtin_ia32_movshdup512_mask, __builtin_ia32_movsldup512_mask, __builtin_ia32_pabsd512_mask, __builtin_ia32_pabsq512_mask, __builtin_ia32_paddd512_mask, __builtin_ia32_paddq512_mask, __builtin_ia32_pandd512_mask, __builtin_ia32_pandnd512_mask, __builtin_ia32_pandnq512_mask, __builtin_ia32_pandq512_mask, __builtin_ia32_pbroadcastd512, __builtin_ia32_pbroadcastd512_gpr_mask, __builtin_ia32_broadcastmb512, __builtin_ia32_broadcastmw512, __builtin_ia32_pbroadcastq512, __builtin_ia32_pbroadcastq512_gpr_mask, __builtin_ia32_pbroadcastq512_mem_mask, __builtin_ia32_pcmpeqd512_mask, __builtin_ia32_pcmpeqq512_mask, __builtin_ia32_pcmpgtd512_mask, __builtin_ia32_pcmpgtq512_mask, __builtin_ia32_compresssi512_mask, __builtin_ia32_compressdi512_mask, __builtin_ia32_expandsi512_mask, __builtin_ia32_expandsi512_maskz, __builtin_ia32_expanddi512_mask, __builtin_ia32_expanddi512_maskz, __builtin_ia32_pmaxsd512_mask, __builtin_ia32_pmaxsq512_mask, __builtin_ia32_pmaxud512_mask, __builtin_ia32_pmaxuq512_mask, __builtin_ia32_pminsd512_mask, __builtin_ia32_pminsq512_mask, __builtin_ia32_pminud512_mask, __builtin_ia32_pminuq512_mask, __builtin_ia32_pmovdb512_mask, __builtin_ia32_pmovdw512_mask, __builtin_ia32_pmovqb512_mask, __builtin_ia32_pmovqd512_mask, __builtin_ia32_pmovqw512_mask, __builtin_ia32_pmovsdb512_mask, __builtin_ia32_pmovsdw512_mask, __builtin_ia32_pmovsqb512_mask, __builtin_ia32_pmovsqd512_mask, __builtin_ia32_pmovsqw512_mask, __builtin_ia32_pmovsxbd512_mask, __builtin_ia32_pmovsxbq512_mask, __builtin_ia32_pmovsxdq512_mask, __builtin_ia32_pmovsxwd512_mask, __builtin_ia32_pmovsxwq512_mask, __builtin_ia32_pmovusdb512_mask, __builtin_ia32_pmovusdw512_mask, __builtin_ia32_pmovusqb512_mask, __builtin_ia32_pmovusqd512_mask, __builtin_ia32_pmovusqw512_mask, __builtin_ia32_pmovzxbd512_mask, __builtin_ia32_pmovzxbq512_mask, __builtin_ia32_pmovzxdq512_mask, __builtin_ia32_pmovzxwd512_mask, __builtin_ia32_pmovzxwq512_mask, __builtin_ia32_pmuldq512_mask, __builtin_ia32_pmulld512_mask, __builtin_ia32_pmuludq512_mask, __builtin_ia32_pord512_mask, __builtin_ia32_porq512_mask, __builtin_ia32_prold512_mask, __builtin_ia32_prolq512_mask, __builtin_ia32_prolvd512_mask, __builtin_ia32_prolvq512_mask, __builtin_ia32_prord512_mask, __builtin_ia32_prorq512_mask, __builtin_ia32_prorvd512_mask, __builtin_ia32_prorvq512_mask, __builtin_ia32_pshufd512_mask, __builtin_ia32_pslld512_mask, __builtin_ia32_pslldi512_mask, __builtin_ia32_psllq512_mask, __builtin_ia32_psllqi512_mask, __builtin_ia32_psllv16si_mask, __builtin_ia32_psllv8di_mask, __builtin_ia32_psrad512_mask, __builtin_ia32_psradi512_mask, __builtin_ia32_psraq512_mask, __builtin_ia32_psraqi512_mask, __builtin_ia32_psrav16si_mask, __builtin_ia32_psrav8di_mask, __builtin_ia32_psrld512_mask, __builtin_ia32_psrldi512_mask, __builtin_ia32_psrlq512_mask, __builtin_ia32_psrlqi512_mask, __builtin_ia32_psrlv16si_mask, __builtin_ia32_psrlv8di_mask, __builtin_ia32_psubd512_mask, __builtin_ia32_psubq512_mask, __builtin_ia32_ptestmd512, __builtin_ia32_ptestmq512, __builtin_ia32_ptestnmd512, __builtin_ia32_ptestnmq512, __builtin_ia32_punpckhdq512_mask, __builtin_ia32_punpckhqdq512_mask, __builtin_ia32_punpckldq512_mask, __builtin_ia32_punpcklqdq512_mask, __builtin_ia32_pxord512_mask, __builtin_ia32_pxorq512_mask, __builtin_ia32_rcp14pd512_mask, __builtin_ia32_rcp14ps512_mask, __builtin_ia32_rcp14sd_mask, __builtin_ia32_rcp14ss_mask, __builtin_ia32_rsqrt14pd512_mask, __builtin_ia32_rsqrt14ps512_mask, __builtin_ia32_rsqrt14sd_mask, __builtin_ia32_rsqrt14ss_mask, __builtin_ia32_shufpd512_mask, __builtin_ia32_shufps512_mask, __builtin_ia32_shuf_f32x4_mask, __builtin_ia32_shuf_f64x2_mask, __builtin_ia32_shuf_i32x4_mask, __builtin_ia32_shuf_i64x2_mask, __builtin_ia32_ucmpd512_mask, __builtin_ia32_ucmpq512_mask, __builtin_ia32_unpckhpd512_mask, __builtin_ia32_unpckhps512_mask, __builtin_ia32_unpcklpd512_mask, __builtin_ia32_unpcklps512_mask, __builtin_ia32_vplzcntd_512_mask, __builtin_ia32_vplzcntq_512_mask, __builtin_ia32_vpconflictsi_512_mask, __builtin_ia32_vpconflictdi_512_mask, __builtin_ia32_permdf512_mask, __builtin_ia32_permdi512_mask, __builtin_ia32_vpermi2vard512_mask, __builtin_ia32_vpermi2varpd512_mask, __builtin_ia32_vpermi2varps512_mask, __builtin_ia32_vpermi2varq512_mask, __builtin_ia32_vpermilpd512_mask, __builtin_ia32_vpermilps512_mask, __builtin_ia32_vpermilvarpd512_mask, __builtin_ia32_vpermilvarps512_mask, __builtin_ia32_vpermt2vard512_mask, __builtin_ia32_vpermt2vard512_maskz, __builtin_ia32_vpermt2varpd512_mask, __builtin_ia32_vpermt2varpd512_maskz, __builtin_ia32_vpermt2varps512_mask, __builtin_ia32_vpermt2varps512_maskz, __builtin_ia32_vpermt2varq512_mask, __builtin_ia32_vpermt2varq512_maskz, __builtin_ia32_permvardf512_mask, __builtin_ia32_permvardi512_mask, __builtin_ia32_permvarsf512_mask, __builtin_ia32_permvarsi512_mask, __builtin_ia32_pternlogd512_mask, __builtin_ia32_pternlogd512_maskz, __builtin_ia32_pternlogq512_mask, __builtin_ia32_pternlogq512_maskz, __builtin_ia32_copysignps512, __builtin_ia32_copysignpd512, __builtin_ia32_sqrtpd512, __builtin_ia32_sqrtps512, __builtin_ia32_exp2ps, __builtin_ia32_roundpd_az_vec_pack_sfix512, __builtin_ia32_floorpd_vec_pack_sfix512, __builtin_ia32_ceilpd_vec_pack_sfix512, __builtin_ia32_kandhi, __builtin_ia32_kandnhi, __builtin_ia32_knothi, __builtin_ia32_korhi, __builtin_ia32_kortestchi, __builtin_ia32_kortestzhi, __builtin_ia32_kunpckhi, __builtin_ia32_kxnorhi, __builtin_ia32_kxorhi, __builtin_ia32_addpd512_mask, __builtin_ia32_addps512_mask, __builtin_ia32_addsd_mask, __builtin_ia32_addss_mask, __builtin_ia32_cmppd512_mask, __builtin_ia32_cmpps512_mask, __builtin_ia32_cmpsd_mask, __builtin_ia32_cmpss_mask, __builtin_ia32_vcomisd, __builtin_ia32_vcomiss, __builtin_ia32_cvtdq2ps512_mask, __builtin_ia32_cvtpd2dq512_mask, __builtin_ia32_cvtpd2ps512_mask, __builtin_ia32_cvtpd2udq512_mask, __builtin_ia32_vcvtph2ps512_mask, __builtin_ia32_cvtps2dq512_mask, __builtin_ia32_cvtps2pd512_mask, __builtin_ia32_cvtps2udq512_mask, __builtin_ia32_cvtsd2ss_mask, __builtin_ia32_cvtsi2sd64, __builtin_ia32_cvtsi2ss32, __builtin_ia32_cvtsi2ss64, __builtin_ia32_cvtss2sd_mask, __builtin_ia32_cvttpd2dq512_mask, __builtin_ia32_cvttpd2udq512_mask, __builtin_ia32_cvttps2dq512_mask, __builtin_ia32_cvttps2udq512_mask, __builtin_ia32_cvtudq2ps512_mask, __builtin_ia32_cvtusi2sd64, __builtin_ia32_cvtusi2ss32, __builtin_ia32_cvtusi2ss64, __builtin_ia32_divpd512_mask, __builtin_ia32_divps512_mask, __builtin_ia32_divsd_mask, __builtin_ia32_divss_mask, __builtin_ia32_fixupimmpd512_mask, __builtin_ia32_fixupimmpd512_maskz, __builtin_ia32_fixupimmps512_mask, __builtin_ia32_fixupimmps512_maskz, __builtin_ia32_fixupimmsd_mask, __builtin_ia32_fixupimmsd_maskz, __builtin_ia32_fixupimmss_mask, __builtin_ia32_fixupimmss_maskz, __builtin_ia32_getexppd512_mask, __builtin_ia32_getexpps512_mask, __builtin_ia32_getexpsd128_mask, __builtin_ia32_getexpss128_mask, __builtin_ia32_getmantpd512_mask, __builtin_ia32_getmantps512_mask, __builtin_ia32_getmantsd_mask, __builtin_ia32_getmantss_mask, __builtin_ia32_maxpd512_mask, __builtin_ia32_maxps512_mask, __builtin_ia32_maxsd_mask, __builtin_ia32_maxss_mask, __builtin_ia32_minpd512_mask, __builtin_ia32_minps512_mask, __builtin_ia32_minsd_mask, __builtin_ia32_minss_mask, __builtin_ia32_mulpd512_mask, __builtin_ia32_mulps512_mask, __builtin_ia32_mulsd_mask, __builtin_ia32_mulss_mask, __builtin_ia32_rndscalepd_mask, __builtin_ia32_rndscaleps_mask, __builtin_ia32_rndscalesd_mask, __builtin_ia32_rndscaless_mask, __builtin_ia32_scalefpd512_mask, __builtin_ia32_scalefps512_mask, __builtin_ia32_scalefsd_mask, __builtin_ia32_scalefss_mask, __builtin_ia32_sqrtpd512_mask, __builtin_ia32_sqrtps512_mask, __builtin_ia32_sqrtsd_mask, __builtin_ia32_sqrtss_mask, __builtin_ia32_subpd512_mask, __builtin_ia32_subps512_mask, __builtin_ia32_subsd_mask, __builtin_ia32_subss_mask, __builtin_ia32_vcvtsd2si32, __builtin_ia32_vcvtsd2si64, __builtin_ia32_vcvtsd2usi32, __builtin_ia32_vcvtsd2usi64, __builtin_ia32_vcvtss2si32, __builtin_ia32_vcvtss2si64, __builtin_ia32_vcvtss2usi32, __builtin_ia32_vcvtss2usi64, __builtin_ia32_vcvttsd2si32, __builtin_ia32_vcvttsd2si64, __builtin_ia32_vcvttsd2usi32, __builtin_ia32_vcvttsd2usi64, __builtin_ia32_vcvttss2si32, __builtin_ia32_vcvttss2si64, __builtin_ia32_vcvttss2usi32, __builtin_ia32_vcvttss2usi64, __builtin_ia32_vfmaddpd512_mask, __builtin_ia32_vfmaddpd512_mask3, __builtin_ia32_vfmaddpd512_maskz, __builtin_ia32_vfmaddps512_mask, __builtin_ia32_vfmaddps512_mask3, __builtin_ia32_vfmaddps512_maskz, __builtin_ia32_vfmaddsd3_mask, __builtin_ia32_vfmaddsd3_mask3, __builtin_ia32_vfmaddsd3_maskz, __builtin_ia32_vfmaddss3_mask, __builtin_ia32_vfmaddss3_mask3, __builtin_ia32_vfmaddss3_maskz, __builtin_ia32_vfmaddsubpd512_mask, __builtin_ia32_vfmaddsubpd512_mask3, __builtin_ia32_vfmaddsubpd512_maskz, __builtin_ia32_vfmaddsubps512_mask, __builtin_ia32_vfmaddsubps512_mask3, __builtin_ia32_vfmaddsubps512_maskz, __builtin_ia32_vfmsubaddpd512_mask3, __builtin_ia32_vfmsubaddps512_mask3, __builtin_ia32_vfmsubpd512_mask3, __builtin_ia32_vfmsubps512_mask3, __builtin_ia32_vfmsubsd3_mask3, __builtin_ia32_vfmsubss3_mask3, __builtin_ia32_vfnmaddpd512_mask, __builtin_ia32_vfnmaddps512_mask, __builtin_ia32_vfnmsubpd512_mask, __builtin_ia32_vfnmsubpd512_mask3, __builtin_ia32_vfnmsubps512_mask, __builtin_ia32_vfnmsubps512_mask3, __builtin_ia32_exp2pd_mask, __builtin_ia32_exp2ps_mask, __builtin_ia32_rcp28pd_mask, __builtin_ia32_rcp28ps_mask, __builtin_ia32_rsqrt28pd_mask, __builtin_ia32_rsqrt28ps_mask, __builtin_ia32_gathersiv16sf, __builtin_ia32_gathersiv8df, __builtin_ia32_gatherdiv16sf, __builtin_ia32_gatherdiv8df, __builtin_ia32_gathersiv16si, __builtin_ia32_gathersiv8di, __builtin_ia32_gatherdiv16si, __builtin_ia32_gatherdiv8di, __builtin_ia32_gatheraltsiv8df , __builtin_ia32_gatheraltdiv8sf , __builtin_ia32_gatheraltsiv8di , __builtin_ia32_gatheraltdiv8si , __builtin_ia32_scattersiv16sf, __builtin_ia32_scattersiv8df, __builtin_ia32_scatterdiv16sf, __builtin_ia32_scatterdiv8df, __builtin_ia32_scattersiv16si, __builtin_ia32_scattersiv8di, __builtin_ia32_scatterdiv16si, __builtin_ia32_scatterdiv8di, __builtin_ia32_gatherpfdps, __builtin_ia32_gatherpfqps, __builtin_ia32_scatterpfdps, __builtin_ia32_scatterpfqps. (ix86_init_mmx_sse_builtins): Handle builtins with AVX512 embeded rounding, builtins for AVX512 gathers/scatters. (ix86_expand_args_builtin): Handle new functions types, add warnings for masked builtins. (ix86_erase_embedded_rounding): Handle patterns with embedded rounding. (ix86_expand_sse_comi_round): Ditto. (ix86_expand_round_builtin): Ditto. (ix86_expand_builtin): Handle AVX512's gathers/scatters and kortest{z}. Call ix86_expand_round_builtin. * config/i386/immintrin.h: Add avx512fintrin.h, avx512erintrin.h, avx512pfintrin.h, avx512cdintrin.h. testsuite/ * gcc.target/i386/avx-1.c: Extend to AVX-512. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com> From-SVN: r206261
2013-12-31Commit of nios2 port to trunk:Chung-Lin Tang1-0/+17
contrib/ 2013-12-31 Chung-Lin Tang <cltang@codesourcery.com> * config-list.mk: Add nios2-elf, nios2-linux-gnu. Corrected ordering of some configs. gcc/ 2013-12-31 Chung-Lin Tang <cltang@codesourcery.com> Sandra Loosemore <sandra@codesourcery.com> Based on patches from Altera Corporation * config.gcc (nios2-*-*): Add nios2 config targets. * configure.ac (TLS_SECTION_ASM_FLAG): Add nios2 case. ("$cpu_type"): Add nios2 as new cpu type. * configure: Regenerate. * config/nios2/nios2.c: New file. * config/nios2/nios2.h: New file. * config/nios2/nios2-opts.h: New file. * config/nios2/nios2-protos.h: New file. * config/nios2/elf.h: New file. * config/nios2/elf.opt: New file. * config/nios2/linux.h: New file. * config/nios2/nios2.opt: New file. * config/nios2/nios2.md: New file. * config/nios2/predicates.md: New file. * config/nios2/constraints.md: New file. * config/nios2/t-nios2: New file. * common/config/nios2/nios2-common.c: New file. * doc/invoke.texi (Nios II options): Document Nios II specific options. * doc/md.texi (Nios II family): Document Nios II specific constraints. * doc/extend.texi (Function Specific Option Pragmas): Document Nios II supported target pragma functionality. gcc/testsuite/ 2013-12-31 Sandra Loosemore <sandra@codesourcery.com> Chung-Lin Tang <cltang@codesourcery.com> Based on patches from Altera Corporation * gcc.dg/stack-usage-1.c (SIZE): Define case for __nios2__. * gcc.dg/20040813-1.c: Skip for nios2-*-*. * gcc.dg/20020312-2.c: Add __nios2__ case. * g++.dg/other/PR23205.C: Skip for nios2-*-*. * g++.dg/other/pr23205-2.C: Skip for nios2-*-*. * g++.dg/cpp0x/constexpr-rom.C: Skip for nios2-*-*. * g++.dg/cpp0x/alias-decl-debug-0.C: Skip for nios2-*-*. * g++.old-deja/g++.jason/thunk3.C: Skip for nios2-*-*. * lib/target-supports.exp (check_profiling_available): Check for nios2-*-elf. * gcc.c-torture/execute/pr47237.x:: Skip for nios2-*-*. * gcc.c-torture/execute/20101011-1.c: Skip for nios2-*-*. * gcc.c-torture/execute/builtins/lib/chk.c (memset): Place char-based memset loop before inline check, to prevent problems when called to initialize .bss. Update comments. * gcc.target/nios2/nios2.exp: New DejaGNU file. * gcc.target/nios2/nios2-custom-1.c: New test. * gcc.target/nios2/nios2-trap-insn.c: New test. * gcc.target/nios2/nios2-builtin-custom.c: New test. * gcc.target/nios2/nios2-builtin-io.c: New test. * gcc.target/nios2/nios2-stack-check-1.c: New test. * gcc.target/nios2/nios2-stack-check-2.c: New test. * gcc.target/nios2/nios2-rdctl.c: New test. * gcc.target/nios2/nios2-wrctl.c: New test. * gcc.target/nios2/nios2-wrctl-zero.c: New test. * gcc.target/nios2/nios2-wrctl-not-zero.c: New test. * gcc.target/nios2/nios2-rdwrctl-1.c: New test. * gcc.target/nios2/nios2-reg-constraints.c: New test. * gcc.target/nios2/nios2-ashlsi3-one_shift.c: New test. * gcc.target/nios2/nios2-mul-options-1.c: New test. * gcc.target/nios2/nios2-mul-options-2.c: New test. * gcc.target/nios2/nios2-mul-options-3.c: New test. * gcc.target/nios2/nios2-mul-options-4.c: New test. * gcc.target/nios2/nios2-nor.c: New test. * gcc.target/nios2/nios2-stxio.c: New test. * gcc.target/nios2/custom-fp-1.c: New test. * gcc.target/nios2/custom-fp-2.c: New test. * gcc.target/nios2/custom-fp-3.c: New test. * gcc.target/nios2/custom-fp-4.c: New test. * gcc.target/nios2/custom-fp-5.c: New test. * gcc.target/nios2/custom-fp-6.c: New test. * gcc.target/nios2/custom-fp-7.c: New test. * gcc.target/nios2/custom-fp-8.c: New test. * gcc.target/nios2/custom-fp-cmp-1.c: New test. * gcc.target/nios2/custom-fp-conversion.c: New test. * gcc.target/nios2/custom-fp-double.c: New test. * gcc.target/nios2/custom-fp-float.c: New test. * gcc.target/nios2/nios2-int-types.c: New test. * gcc.target/nios2/nios2-cache-1.c: New test. * gcc.target/nios2/nios2-cache-2.c: New test. libgcc/ 2013-12-31 Sandra Loosemore <sandra@codesourcery.com> Chung-Lin Tang <cltang@codesourcery.com> Based on patches from Altera Corporation * config.host (nios2-*-*,nios2-*-linux*): Add nios2 host cases. * config/nios2/lib2-nios2.h: New file. * config/nios2/lib2-divmod-hi.c: New file. * config/nios2/linux-unwind.h: New file. * config/nios2/lib2-divmod.c: New file. * config/nios2/linux-atomic.c: New file. * config/nios2/t-nios2: New file. * config/nios2/crti.asm: New file. * config/nios2/t-linux: New file. * config/nios2/lib2-divtable.c: New file. * config/nios2/lib2-mul.c: New file. * config/nios2/tramp.c: New file. * config/nios2/crtn.asm: New file. From-SVN: r206256
2013-12-20config.gcc: Support march=broadwell.Tocar Ilya1-1/+1
* config.gcc: Support march=broadwell. * config/i386/driver-i386.c (host_detect_local_cpu): Detect Broadwell. * config/i386/i386.c (ix86_option_override_internal): Add broadwell. * doc/invoke.texi: Document march=broadwell. From-SVN: r206144
2013-12-19Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi.Kyrylo Tkachov1-1/+1
[gcc/] 2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi. * config.gcc (extra_headers): Add arm_acle.h. * config/arm/arm.c (FL_CRC32): Define. (arm_have_crc): Likewise. (arm_option_override): Set arm_have_crc. (arm_builtins): Add CRC32 builtins. (bdesc_2arg): Likewise. (arm_init_crc32_builtins): New function. (arm_init_builtins): Initialise CRC32 builtins. (arm_file_start): Handle architecture extensions. * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FEATURE_CRC32. Define __ARM_32BIT_STATE. (TARGET_CRC32): Define. * config/arm/arm-arches.def: Add armv8-a+crc. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm.md (type): Add crc. (<crc_variant>): New insn. * config/arm/arm_acle.h: New file. * config/arm/iterators.md (CRC): New int iterator. (crc_variant, crc_mode): New int attributes. * confg/arm/unspecs.md (UNSPEC_CRC32B, UNSPEC_CRC32H, UNSPEC_CRC32W, UNSPEC_CRC32CB, UNSPEC_CRC32CH, UNSPEC_CRC32CW): New unspecs. * doc/invoke.texi: Document -march=armv8-a+crc option. * doc/extend.texi: Document ACLE intrinsics. [gcc/testsuite/] 2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * lib/target-supports.exp (add_options_for_arm_crc): New procedure. (check_effective_target_arm_crc_ok_nocache): Likewise. (check_effective_target_arm_crc_ok): Likewise. * gcc.target/arm/acle/: New directory. * gcc.target/arm/acle/acle.exp: New. * gcc.target/arm/acle/crc32b.c: New test. * gcc.target/arm/acle/crc32h.c: Likewise. * gcc.target/arm/acle/crc32w.c: Likewise. * gcc.target/arm/acle/crc32d.c: Likewise. * gcc.target/arm/acle/crc32cb.c: Likewise. * gcc.target/arm/acle/crc32ch.c: Likewise. * gcc.target/arm/acle/crc32cw.c: Likewise. * gcc.target/arm/acle/crc32cd.c: Likewise. From-SVN: r206128
2013-12-10Fix mips64-linux and s390x-linux builds.Maxim Kuvyrkov1-3/+5
* config.gcc (mips*-mti-linux*, mips64*-*-linux*): Add android definitions. (s390x-*-linux*): Use linux-protos.h. From-SVN: r205849
2013-12-07Cleanup libc selection and Android support.Maxim Kuvyrkov1-16/+13
* config.gcc (*linux*): Split libc selection from Android support. Add libc selection to all *linux* targets. Add Android support to architectures that support it. (arm*-*-linux-*, i[34567]86-*-linux*, x86_64-*-linux*,) (mips*-*-linux*): Add Android support. From-SVN: r205781
generated by cgit v1.1 at 2025-09-03 20:12:41 +0000