riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-09-02	RISC-V: Implement TARGET_COMPUTE_MULTILIB	Kito Cheng	1	-0/+377
2022-09-02	Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result.	Kito Cheng	3	-0/+51
2022-08-29	s390: Add -munroll-only-small-loops.	Robin Dapp	1	-0/+5
2022-08-26	cr16: remove obsoleted port	Martin Liska	1	-27/+0
2022-08-16	RISC-V: Support zfh and zfhmin extension	Kito Cheng	1	-0/+8
2022-08-15	xtensa: Turn on -fsplit-wide-types-early by default	Takayuki 'January June' Suwa	1	-0/+2
2022-07-26	LoongArch: Support split symbol.	Lulu Cheng	1	-0/+1
2022-07-03	loongarch: use -mno-check-zero-division as the default for optimized code	Xi Ruoyao	1	-3/+0
2022-07-01	i386: Add AVX512BW to AVX512F in MASK_ISA2	Haochen Jiang	1	-3/+2
2022-06-25	Remove long deprecated tilegx and tilepro ports	Jeff Law	2	-112/+0
2022-06-13	x86: Require AVX for F16C and VAES	H.J. Lu	1	-4/+4
2022-05-24	RISC-V: Add mininal support for Zicbo[mzp]	ShiYulong	1	-0/+8
2022-05-23	[x86_64]: Zhaoxin lujiazui enablement	Mayshao	3	-1/+64
2022-05-23	RISC-V: Fix canonical extension order (K and J)	Tsukasa OI	1	-1/+1
2022-05-16	Use more ARRAY_SIZE.	Martin Liska	1	-2/+1
2022-05-11	i386: simplify cpu_feature handling	Martin Liska	1	-22/+28
2022-04-12	IBM zSystems: Add support for z16 as CPU name.	Andreas Krebbel	1	-2/+2
2022-03-29	LoongArch Port: gcc build	chenglulu	1	-0/+43
2022-03-21	x86: Disable SSE in ISA2 for -mgeneral-regs-only	H.J. Lu	1	-1/+1
2022-03-21	x86: Properly check FEATURE_AESKLE	H.J. Lu	1	-2/+2
2022-03-21	RISC-V: Implement misc macro for vector extensions.	Kito Cheng	1	-8/+8
2022-03-16	RISC-V: Add version info for zk, zkn and zks	Kito Cheng	1	-0/+4
2022-03-16	RISC-V: Handle combine extension in canonical ordering.	LiaoShihua	1	-0/+56
2022-03-04	rs6000: Allow -mlong-double-64 after -mabi={ibm,ieee}longdouble [PR104208, PR...	Peter Bergner	1	-0/+10
2022-02-09	i386: -mno-xsave should disable all relevant ISA flags [PR104462]	Uros Bizjak	1	-1/+2
2022-01-24	properly disable -fsplit-stack on non-glibc targets [PR104170]	Jakub Jelinek	2	-4/+6
2022-01-24	RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0	Kito Cheng	1	-2/+12
2022-01-21	x86: Properly disable -fsplit-stack support on non-glibc targets	H.J. Lu	1	-6/+11
2022-01-21	Disable -fsplit-stack support on non-glibc targets	Sören Tempel	1	-4/+10
2022-01-18	RISC-V: Fix use-after-free error in `parse_multiletter_ext'	Maciej W. Rozycki	1	-1/+1
2022-01-18	riscv: fix -Wformat-diag errors.	Martin Liska	1	-8/+8
2022-01-17	Change references of .c files to .cc files	Martin Liska	4	-5/+5
2022-01-17	Rename .c files to .cc files.	Martin Liska	50	-0/+0
2022-01-14	ARM: fix -Wformat= error	Martin Liska	1	-1/+1
2022-01-13	Fix -Wformat-diag for ARM target.	Martin Liska	1	-6/+6
2022-01-07	RISC-V: Minimal support of vector extensions	Kito Cheng	1	-0/+86
2022-01-07	RISC-V: Allow extension name contain digit	Kito Cheng	1	-4/+38
2022-01-04	x86: Update model value for Alderlake and Rocketlake	Cui,Lili	1	-0/+2
2022-01-03	Update copyright years.	Jakub Jelinek	57	-57/+57
2021-12-04	RISC-V: Add implied defines of Zk, Zkn and Zks	SiYu Wu	1	-1/+15
2021-12-04	RISC-V: Add option defines for Scalar Cryptography	SiYu Wu	1	-0/+22
2021-11-11	RISC-V: Fix wrong zifencei handling in riscv_subset_list::to_string	Kito Cheng	1	-1/+1
2021-11-10	[PR/target 102957] Allow Z*-ext extension with only 2 char.	Kito Cheng	1	-1/+0
2021-10-25	RISC-V: Minimal support of bitmanip extension	Kito Cheng	1	-0/+10
2021-10-05	Mark argument as unused	Jan-Benedict Glaw	1	-1/+2
2021-09-21	arm: pass architecture extensions to assembler if supported	Richard Earnshaw	1	-0/+10
2021-09-17	x86: Update -mtune=tremont	H.J. Lu	1	-1/+1
2021-09-13	i386: support micro-levels in target{,_clone} attrs [PR101696]	Martin Liska	3	-0/+61
2021-09-08	AVX512FP16: Initial support for AVX512FP16 feature and scalar _Float16 instru...	Guo, Xuepeng	4	-2/+28
2021-08-12	arc: Small data doesn't need fcommon option	Claudiu Zissulescu	1	-3/+1