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Age
Commit message (
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Author
Files
Lines
2023-01-05
Add AMD znver4 instruction reservations
Tejas Joshi
1
-1
/
+1
2023-01-04
Initial Emeraldrapids Support
Hu, Lin1
2
-0
/
+4
2023-01-04
i386: Remove Meteorlake's family_model
Hu, Lin1
1
-1
/
+0
2022-12-27
Fixed typo in RISCV
jinma
1
-1
/
+1
2022-12-27
rs6000: Rework option -mpowerpc64 handling [PR106680]
Kewen Lin
1
-11
/
+0
2022-11-24
i386: Only enable small loop unrolling in backend [PR 107692]
Hongyu Wang
1
-0
/
+8
2022-11-14
Revert "sphinx: port .def files to RST"
Martin Liska
1
-14
/
+14
2022-11-14
i386: Add AMX-TILE dependency for AMX related ISAs
Haochen Jiang
1
-4
/
+9
2022-11-14
Enable small loop unrolling for O2
Hongyu Wang
1
-0
/
+1
2022-11-09
sphinx: port .def files to RST
Martin Liska
1
-14
/
+14
2022-11-07
Initial Grand Ridge support
Hu, Lin1
3
-0
/
+10
2022-11-07
Support Intel RAO-INT
konglin1
4
-0
/
+19
2022-11-07
Initial Granite Rapids Support
Haochen Jiang
3
-0
/
+13
2022-11-07
Support Intel prefetchit0/t1
Haochen Jiang
4
-0
/
+19
2022-11-04
Support Intel AMX-FP16 ISA
Hongyu Wang
4
-0
/
+22
2022-11-04
Initial Sierra Forest Support
Haochen Jiang
3
-0
/
+10
2022-11-04
Support Intel CMPccXADD
Haochen Jiang
4
-0
/
+19
2022-11-02
RISC-V: Add Zawrs ISA extension support
Christoph Müllner
1
-0
/
+4
2022-10-31
Support Intel AVX-NE-CONVERT
konglin1
4
-1
/
+25
2022-10-27
RISC-V: Minimal support of z*inx extension.
Jiawei
1
-0
/
+18
2022-10-26
i386: add reset_cpu_feature
Martin Liska
1
-5
/
+33
2022-10-26
RISC-V: Recognized Svinval and Svnapot extensions
Monk Chiang
1
-0
/
+6
2022-10-26
RISC-V: Add h extension support
Kito Cheng
1
-15
/
+8
2022-10-25
Remove znver4 instruction reservations
Tejas Joshi
1
-1
/
+1
2022-10-25
riscv: fix cross compiler
Martin Liska
1
-4
/
+4
2022-10-25
i386: fix pedantic warning
Martin Liska
1
-1
/
+1
2022-10-24
x86: fix VENDOR_MAX enum value
Martin Liska
1
-1
/
+3
2022-10-24
RISC-V: Support --target-help for -mcpu/-mtune
Kito Cheng
1
-0
/
+46
2022-10-21
Enable AMD znver4 support and add instruction reservations
Tejas Joshi
3
-28
/
+24
2022-10-21
Support Intel AVX-VNNI-INT8
Kong Lingling
4
-1
/
+26
2022-10-21
Support Intel AVX-IFMA
Hongyu Wang
4
-1
/
+23
2022-10-17
Enable REE for H8
Jeff Law
1
-0
/
+2
2022-10-17
Initial Meteorlake Support
Hu, Lin1
2
-0
/
+6
2022-10-17
Initial Raptorlake Support
Haochen Jiang
2
-0
/
+4
2022-10-10
arc: Remove obsolete mRcq and mRcw options.
Claudiu Zissulescu
1
-2
/
+0
2022-09-29
aarch64: Tweak handling of -mgeneral-regs-only
Richard Sandiford
1
-0
/
+12
2022-09-29
aarch64: Tweak contents of flags_on/off fields
Richard Sandiford
1
-8
/
+6
2022-09-29
aarch64: Make more use of aarch64_feature_flags
Richard Sandiford
1
-9
/
+10
2022-09-29
aarch64: Tweak constness of option-related data
Richard Sandiford
1
-13
/
+13
2022-09-29
aarch64: Avoid std::string in static data
Richard Sandiford
1
-2
/
+2
2022-09-29
aarch64: Simplify generation of .arch strings
Richard Sandiford
1
-196
/
+47
2022-09-29
aarch64: Simplify feature definitions
Richard Sandiford
1
-11
/
+18
2022-09-29
aarch64: Avoid redundancy in aarch64-cores.def
Richard Sandiford
1
-1
/
+1
2022-09-29
aarch64: Add "V" to aarch64-arches.def names
Richard Sandiford
1
-1
/
+1
2022-09-29
aarch64: Rename AARCH64_FL_FOR_ARCH macros
Richard Sandiford
1
-1
/
+1
2022-09-29
aarch64: Rename AARCH64_ISA architecture-level macros
Richard Sandiford
1
-1
/
+1
2022-09-23
RISC-V: Support poly move manipulation and selftests.
zhongjuzhe
1
-1
/
+1
2022-09-09
RISC-V: Suppress build warnings
Kito Cheng
1
-18
/
+18
2022-09-05
RISC-V: Support Zmmul extension
LiaoShihua
1
-0
/
+4
2022-09-02
RISC-V: Implement TARGET_COMPUTE_MULTILIB
Kito Cheng
1
-0
/
+377
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