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AgeCommit message (Expand)AuthorFilesLines
2019-06-12Initial TI PRU GCC portDimitar Dimitrov1-0/+36
2019-05-28Add GCC support to ENQCMD.Xuepeng Guo1-0/+15
2019-05-24[aarch64] Change two function declaration typesMatthew Malcomson1-1/+1
2019-05-22[aarch64] Introduce flags for SVE2.Matthew Malcomson1-16/+19
2019-05-08Enable support for bfloat16 which will be in Future Cooper Lake.Hongtao Liu1-1/+24
2019-04-05Remove usage of apostrophes in error and warning messages (PR translation/899...Martin Liska1-6/+6
2019-04-02S/390: arch13: Add arch13 as architecture optionAndreas Krebbel1-9/+12
2019-03-29RISC-V: Fix __riscv_compressed regression.Jim Wilson1-0/+4
2019-03-11Wrap option names in gcc internal messages with %< and %>.Martin Liska13-38/+41
2019-03-01RISC-V: Generalize -march support, add ELF attribute support.Kito Cheng1-57/+506
2019-02-25AArch64: Fix command line options canonicalization version #2. (PR target/88530)Tamar Christina1-22/+178
2019-01-17GCN back-end codeAndrew Stubbs1-0/+38
2019-01-09PR other/16615 [1/5]Sandra Loosemore1-1/+1
2019-01-01Update copyright years.Jakub Jelinek53-53/+53
2018-12-13i386-common.c (processor_names): Add cascadelake.Wei Xiao1-0/+3
2018-12-03S/390: Add support for section anchorsIlya Leoshkevich1-0/+3
2018-11-22Fix option values for -march.Martin Liska1-4/+21
2018-11-13[ARC] Refurbish and improve prologue/epilogue functions.Claudiu Zissulescu1-0/+1
2018-11-09or1k: gcc: initial support for openriscStafford Horne1-0/+41
2018-11-09Add PTWRITE builtins for x86Andi Kleen1-0/+15
2018-11-08arm - Add support for aliases of CPU namesRichard Earnshaw1-1/+20
2018-11-04Enable support for next generation AMD Zen CPU, via -march=znver2.Venkataramanan Kumar1-0/+10
2018-10-31Provide extension hint for aarch64 target (PR driver/83193).Martin Liska1-3/+18
2018-10-15re PR target/87572 (ICE in emit_move_insn, at expr.c:3722)Jakub Jelinek1-2/+0
2018-10-14i386: Also disable AVX512IFMA/AVX5124FMAPS/AVX5124VNNIWH.J. Lu1-2/+6
2018-10-02S/390: Rename arch12 to z14Andreas Krebbel1-2/+2
2018-10-01Validate and set default parameters for stack-clash.Tamar Christina1-0/+48
2018-10-01Allow back-ends to be able to do custom validations on params. Tamar Christina3-0/+18
2018-09-17i386: move alignment defaults to processor_costs.Martin Liska1-43/+39
2018-09-04re PR target/87198 (ICE in extract_insn, at recog.c:2304)Jakub Jelinek1-4/+5
2018-09-03Come up with TARGET_GET_VALID_OPTION_VALUES option hook (PR driver/83193).Martin Liska4-0/+288
2018-08-17C-SKY port: Backend implementationJojo1-0/+42
2018-08-12[NDS32] Enable -malways-align by default at -O1 and above.Chung-Ju Wu1-0/+2
2018-08-12[NDS32] Implement more C ISR extension.Chung-Ju Wu1-0/+10
2018-08-08S/390: Remove support for g5 and g6 machinesIlya Leoshkevich1-2/+0
2018-08-03[c++] Don't emit exception tables for UI_NONETom de Vries1-1/+1
2018-08-02[nvptx] Ignore c++ exceptionsTom de Vries1-0/+9
2018-07-25[ARC] Update default optimizations for size.Claudiu Zissulescu1-4/+9
2018-07-17Define MAX_CODE_ALIGN globally.Martin Liska1-3/+0
2018-07-04[multiple changes]Martin Liska1-3/+13
2018-07-01Add -mgnu-asm; change -mdec-asm to generate DEC assemblerPaul Koning1-1/+10
2018-06-27Convert pdp11 back end to CCmode.Paul Koning1-1/+19
2018-06-26v850-common.c (TARGET_DEFAULT_TARGET_FLAGS): Turn on -mbig-switch by default.Jeff Law1-1/+2
2018-06-08Remove MPXMartin Liska1-2/+2
2018-06-03[NDS32] Disable -fdelete-null-pointer-checks by default for nds32*-*-elf.Chung-Ju Wu1-0/+5
2018-06-02[NDS32] Support Linux target for nds32.Chung-Ju Wu1-1/+14
2018-05-23[AArch64][PR target/84882] Add mno-strict-alignSudakshina Das1-1/+4
2018-05-19[NDS32] Add abssi2 pattern.Chung-Ju Wu1-0/+2
2018-05-18RISC-V: Add RV32E support.Kito Cheng1-1/+28
2018-05-14i386-common.c (OPTION_MASK_ISA_CLDEMOTE_SET, [...]): New defines.Sebastian Peryt1-0/+15
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