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2014-11-12Implement MIPS o32 FPXX, FP64, FP64A ABI extensions.Matthew Fortune1-0/+9
2014-11-12 Matthew Fortune <matthew.fortune@imgtec.com> gcc/ * common/config/mips/mips-common.c (mips_handle_option): Ensure that -mfp32, -mfp64 disable -mfpxx and -mfpxx disables -mfp64. * config.gcc (--with-fp-32): New option. (--with-odd-spreg-32): Likewise. * config.in (HAVE_AS_DOT_MODULE): New config define. * config/mips/mips-protos.h (mips_secondary_memory_needed): New prototype. (mips_hard_regno_caller_save_mode): Likewise. * config/mips/mips.c (mips_get_reg_raw_mode): New static prototype. (mips_get_arg_info): Assert that V2SFmode is only handled specially with TARGET_PAIRED_SINGLE_FLOAT. (mips_return_mode_in_fpr_p): Likewise. (mips16_call_stub_mode_suffix): Likewise. (mips_get_reg_raw_mode): New static function. (mips_return_fpr_pair): O32 return values span two registers. (mips16_build_call_stub): Likewise. (mips_function_value_regno_p): Support both FP return registers. (mips_output_64bit_xfer): Use mthc1 whenever TARGET_HAS_MXHC1. Add specific cases for TARGET_FPXX to move via memory. (mips_dwarf_register_span): For TARGET_FPXX pretend that modes larger than UNITS_PER_FPREG 'span' one register. (mips_dwarf_frame_reg_mode): New static function. (mips_file_start): Switch to using .module instead of .gnu_attribute. No longer support FP ABI 4 (-mips32r2 -mfp64), replace with FP ABI 6. Add FP ABI 5 (-mfpxx) and FP ABI 7 (-mfp64 -mno-odd-spreg). (mips_save_reg, mips_restore_reg): Always represent DFmode frame slots with two CFI directives even for O32 FP64. (mips_for_each_saved_gpr_and_fpr): Account for fixed_regs when saving/restoring callee-saved registers. (mips_hard_regno_mode_ok_p): Implement O32 FP64A extension. (mips_secondary_memory_needed): New function. (mips_option_override): ABI check for TARGET_FLOATXX. Disable odd-numbered single-precision registers when using TARGET_FLOATXX. Implement -modd-spreg and defaults. (mips_conditional_register_usage): Redefine O32 FP64 to match O32 FP32 callee-saved behaviour. (mips_hard_regno_caller_save_mode): Implement. (TARGET_GET_RAW_RESULT_MODE): Define target hook. (TARGET_GET_RAW_ARG_MODE): Define target hook. (TARGET_DWARF_FRAME_REG_MODE): Define target hook. * config/mips/mips.h (TARGET_FLOAT32): New macro. (TARGET_O32_FP64A_ABI): Likewise. (TARGET_CPU_CPP_BUILTINS): TARGET_FPXX is __mips_fpr==0. Add _MIPS_SPFPSET builtin define. (MIPS_FPXX_OPTION_SPEC): New macro. (OPTION_DEFAULT_SPECS): Pass through --with-fp-32=* to -mfp and --with-odd-spreg-32=* to -m[no-]odd-spreg. (ISA_HAS_ODD_SPREG): New macro. (ISA_HAS_MXHC1): True for anything other than -mfp32. (ASM_SPEC): Pass through mfpxx, mfp64, -mno-odd-spreg and -modd-spreg. (MIN_FPRS_PER_FMT): Redefine in terms of TARGET_ODD_SPREG. (HARD_REGNO_CALLER_SAVE_MODE): Define. Implement O32 FPXX extension (HARD_REGNO_CALL_PART_CLOBBERED): Likewise. (SECONDARY_MEMORY_NEEDED): Likewise. (FUNCTION_ARG_REGNO_P): Update for O32 FPXX and FP64 extensions. * config/mips/mips.md (define_attr enabled): Implement O32 FPXX and FP64A ABI extensions. (move_doubleword_fpr<mode>): Use ISA_HAS_MXHC1 instead of TARGET_FLOAT64. * config/mips/mips.opt (mfpxx): New target option. (modd-spreg): Likewise. * config/mips/mti-elf.h (DRIVER_SELF_SPECS): Infer FP ABI from arch. * config/mips/mti-linux.h (DRIVER_SELF_SPECS): Likewise and remove fp64 sysroot. * config/mips/t-mti-elf: Remove fp64 multilib. * config/mips/t-mti-linux: Likewise. * configure.ac: Detect .module support. * configure: Regenerate. * doc/invoke.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg option. * doc/install.texi (--with-fp-32, --with-odd-spreg-32): Document new options. gcc/testsuite/ * gcc.target/mips/args-1.c: Handle __mips_fpr == 0. * gcc.target/mips/call-clobbered-1.c: New. * gcc.target/mips/call-clobbered-2.c: New. * gcc.target/mips/call-clobbered-3.c: New. * gcc.target/mips/call-clobbered-4.c: New. * gcc.target/mips/call-clobbered-5.c: New. * gcc.target/mips/call-saved-4.c: New. * gcc.target/mips/call-saved-5.c: New. * gcc.target/mips/call-saved-6.c: New. * gcc.target/mips/mips.exp: Support -mfpxx, -ffixed-f*, and -m[no-]odd-spreg. Use _MIPS_SPFPSET to determine default odd-spreg option. Account for -modd-spreg in minimum arch code. * gcc.target/mips/movdf-1.c: New. * gcc.target/mips/movdf-2.c: New. * gcc.target/mips/movdf-3.c: New. * gcc.target/mips/oddspreg-1.c: New. * gcc.target/mips/oddspreg-2.c: New. * gcc.target/mips/oddspreg-3.c: New. * gcc.target/mips/oddspreg-4.c: New. * gcc.target/mips/oddspreg-5.c: New. * gcc.target/mips/oddspreg-6.c: New. libgcc/ * config/mips/mips16.S: Set .module when supported. Update O32 FP64 calling convention and use for FPXX when possible. Add FPXX calling convention fallback case. From-SVN: r217446
2014-11-10Add the nvptx port.Bernd Schmidt1-0/+38
* configure.ac: Handle nvptx-*-*. * configure: Regenerate. gcc/ * config/nvptx/nvptx.c: New file. * config/nvptx/nvptx.h: New file. * config/nvptx/nvptx-protos.h: New file. * config/nvptx/nvptx.md: New file. * config/nvptx/t-nvptx: New file. * config/nvptx/nvptx.opt: New file. * common/config/nvptx/nvptx-common.c: New file. * config.gcc: Handle nvptx-*-*. libgcc/ * config.host: Handle nvptx-*-*. * shared-object.mk (as-flags-$o): Define. ($(base)$(objext), $(base)_s$(objext)): Use it instead of -xassembler-with-cpp. * static-object.mk: Identical changes. * config/nvptx/t-nvptx: New file. * config/nvptx/crt0.s: New file. * config/nvptx/free.asm: New file. * config/nvptx/malloc.asm: New file. * config/nvptx/realloc.c: New file. From-SVN: r217295
2014-10-04remove score-* supportTrevor Saunders1-74/+0
libgcc/ChangeLog: 2014-10-04 Trevor Saunders <tsaunders@mozilla.com> * config.host: Remove support for score-*. contrib/ChangeLog: 2014-10-04 Trevor Saunders <tsaunders@mozilla.com> * compare-all-tests: Don't test score-*. * config-list.mk: Likewise. gcc/ChangeLog: 2014-10-04 Trevor Saunders <tsaunders@mozilla.com> * common/config/score/score-common.c: Remove. * config.gcc: Remove support for score-*. * config/score/constraints.md: Remove. * config/score/elf.h: Remove. * config/score/predicates.md: Remove. * config/score/score-conv.h: Remove. * config/score/score-generic.md: Remove. * config/score/score-modes.def: Remove. * config/score/score-protos.h: Remove. * config/score/score.c: Remove. * config/score/score.h: Remove. * config/score/score.md: Remove. * config/score/score.opt: Remove. * doc/md.texi: Don't document score-*. From-SVN: r215889
2014-09-23[AArch64] Default to -fsched-pressureWilco Dijkstra1-0/+2
From-SVN: r215503
2014-09-09remove picochipTrevor Saunders1-40/+0
contrib/ChangeLog: 2014-09-08 Trevor Saunders <tsaunders@mozilla.com> * compare-all-tests: Don't test picochip. * config-list.mk: Likewise. gcc/ChangeLog: 2014-09-08 Trevor Saunders <tsaunders@mozilla.com> * common/config/picochip/picochip-common.c: Remove. * config.gcc: Remove support for picochip. * config/picochip/constraints.md: Remove. * config/picochip/dfa_space.md: Remove. * config/picochip/dfa_speed.md: Remove. * config/picochip/picochip-protos.h: Remove. * config/picochip/picochip.c: Remove. * config/picochip/picochip.h: Remove. * config/picochip/picochip.md: Remove. * config/picochip/picochip.opt: Remove. * config/picochip/predicates.md: Remove. * config/picochip/t-picochip: Remove. * doc/md.texi: Don't document picochi. libgcc/ChangeLog: 2014-09-08 Trevor Saunders <tsaunders@mozilla.com> * config.host: Remove picochip support. * config/picochip/adddi3.S: Remove. * config/picochip/ashlsi3.S: Remove. * config/picochip/ashlsi3.c: Remove. * config/picochip/ashrsi3.S: Remove. * config/picochip/ashrsi3.c: Remove. * config/picochip/clzsi2.S: Remove. * config/picochip/cmpsi2.S: Remove. * config/picochip/divmod15.S: Remove. * config/picochip/divmodhi4.S: Remove. * config/picochip/divmodsi4.S: Remove. * config/picochip/lib1funcs.S: Remove. * config/picochip/longjmp.S: Remove. * config/picochip/lshrsi3.S: Remove. * config/picochip/lshrsi3.c: Remove. * config/picochip/parityhi2.S: Remove. * config/picochip/popcounthi2.S: Remove. * config/picochip/setjmp.S: Remove. * config/picochip/subdi3.S: Remove. * config/picochip/t-picochip: Remove. * config/picochip/ucmpsi2.S: Remove. * config/picochip/udivmodhi4.S: Remove. * config/picochip/udivmodsi4.S: Remove. From-SVN: r215039
2014-08-11gcc/Alexander Ivchenko1-1/+18
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VL_SET): Define. (OPTION_MASK_ISA_AVX512F_UNSET): Update. (ix86_handle_option): Handle OPT_mavx512vl. * config/i386/cpuid.h (bit_AVX512VL): Define. * config/i386/driver-i386.c (host_detect_local_cpu): Detect avx512vl, set -mavx512vl accordingly. * config/i386/i386-c.c (ix86_target_macros_internal): Handle OPTION_MASK_ISA_AVX512VL. * config/i386/i386.c (ix86_target_string): Handle -mavx512vl. (ix86_option_override_internal): Define PTA_AVX512VL, handle PTA_AVX512VL and OPTION_MASK_ISA_AVX512VL. (ix86_valid_target_attribute_inner_p): Handle OPT_mavx512vl. * config/i386/i386.h (TARGET_AVX512VL): Define. (TARGET_AVX512VL_P(x)): Ditto. * config/i386/i386.opt: Add mavx512vl. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r213813
2014-08-11i386-common.c (OPTION_MASK_ISA_AVX512BW_SET): Define.Alexander Ivchenko1-1/+18
gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512BW_SET) : Define. (OPTION_MASK_ISA_AVX512BW_UNSET): Ditto. (OPTION_MASK_ISA_AVX512VL_UNSET) : Ditto. (ix86_handle_option): Handle OPT_mavx512bw. * config/i386/cpuid.h (bit_AVX512BW): Define. * config/i386/driver-i386.c (host_detect_local_cpu): Detect avx512bw, set -mavx512bw accordingly. * config/i386/i386-c.c (ix86_target_macros_internal): Handle OPTION_MASK_ISA_AVX512BW. * config/i386/i386.c (ix86_target_string): Handle -mavx512bw. (ix86_option_override_internal): Define PTA_AVX512BW, handle PTA_AVX512BW and OPTION_MASK_ISA_AVX512BW. (ix86_valid_target_attribute_inner_p): Handle OPT_mavx512bw. * config/i386/i386.h (TARGET_AVX512BW): Define. (TARGET_AVX512BW_P(x)): Ditto. * config/i386/i386.opt: Add mavx512bw. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r213811
2014-08-08gcc/Alexander Ivchenko1-0/+16
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512DQ_SET): Define. (OPTION_MASK_ISA_AVX512DQ_UNSET): Ditto. (ix86_handle_option): Handle OPT_mavx512dq. * config/i386/cpuid.h (bit_AVX512DQ): Define. * config/i386/driver-i386.c (host_detect_local_cpu): Detect avx512dq, set -mavx512dq accordingly. * config/i386/i386-c.c (ix86_target_macros_internal): Handle OPTION_MASK_ISA_AVX512DQ. * config/i386/i386.c (ix86_target_string): Handle -mavx512dq. (ix86_option_override_internal): Define PTA_AVX512DQ, handle PTA_AVX512DQ and OPTION_MASK_ISA_AVX512DQ. (ix86_valid_target_attribute_inner_p): Handle OPT_mavx512dq. * config/i386/i386.h (TARGET_AVX512DQ): Define. (TARGET_AVX512DQ_P(x)): Ditto. * config/i386/i386.opt: Add mavx512dq. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r213757
2014-05-14gcc/Ilya Tocar1-0/+47
* common/config/i386/i386-common.c (OPTION_MASK_ISA_CLFLUSHOPT_SET): Define. (OPTION_MASK_ISA_XSAVES_SET): Ditto. (OPTION_MASK_ISA_XSAVEC_SET): Ditto. (OPTION_MASK_ISA_CLFLUSHOPT_UNSET): Ditto. (OPTION_MASK_ISA_XSAVES_UNSET): Ditto. (OPTION_MASK_ISA_XSAVEC_UNSET): Ditto. (ix86_handle_option): Handle OPT_mxsavec, OPT_mxsaves, OPT_mclflushopt. * config.gcc (i[34567]86-*-*): Add clflushoptintrin.h, xsavecintrin.h, xsavesintrin.h. (x86_64-*-*): Ditto. * config/i386/clflushoptintrin.h: New. * config/i386/xsavecintrin.h: Ditto. * config/i386/xsavesintrin.h: Ditto. * config/i386/cpuid.h (bit_CLFLUSHOPT): Define. (bit_XSAVES): Ditto. (bit_XSAVES): Ditto. * config/i386/driver-i386.c (host_detect_local_cpu): Handle -mclflushopt, -mxsavec, -mxsaves, -mno-xsaves, -mno-xsavec, -mno-clflushopt. * config/i386/i386-c.c (ix86_target_macros_internal): Handle OPTION_MASK_ISA_CLFLUSHOPT, OPTION_MASK_ISA_XSAVEC, OPTION_MASK_ISA_XSAVES. * config/i386/i386.c (ix86_target_string): Handle -mclflushopt, -mxsavec, -mxsaves. (PTA_CLFLUSHOPT) Define. (PTA_XSAVEC): Ditto. (PTA_XSAVES): Ditto. (ix86_option_override_internal): Handle new options. (ix86_valid_target_attribute_inner_p): Ditto. (ix86_builtins): Add IX86_BUILTIN_XSAVEC, IX86_BUILTIN_XSAVEC64, IX86_BUILTIN_XSAVES, IX86_BUILTIN_XRSTORS, IX86_BUILTIN_XSAVES64, IX86_BUILTIN_XRSTORS64, IX86_BUILTIN_CLFLUSHOPT. (bdesc_special_args): Add __builtin_ia32_xsaves, __builtin_ia32_xrstors, __builtin_ia32_xsavec, __builtin_ia32_xsaves64, __builtin_ia32_xrstors64, __builtin_ia32_xsavec64. (ix86_init_mmx_sse_builtins): Add __builtin_ia32_clflushopt. (ix86_expand_builtin): Handle new builtins. * config/i386/i386.h (TARGET_CLFLUSHOPT) Define. (TARGET_CLFLUSHOPT_P): Ditto. (TARGET_XSAVEC): Ditto. (TARGET_XSAVEC_P): Ditto. (TARGET_XSAVES): Ditto. (TARGET_XSAVES_P): Ditto. * config/i386/i386.md (ANY_XSAVE): Add UNSPECV_XSAVEC, UNSPECV_XSAVES. (ANY_XSAVE64)" Add UNSPECV_XSAVEC64, UNSPECV_XSAVES64. (attr xsave): Add xsavec, xsavec64, xsaves, xsaves64. (ANY_XRSTOR): New. (ANY_XRSTOR64): Ditto. (xrstor): Ditto. (xrstor): Change into <xrstor>. (xrstor_rex64): Change into <xrstor>_rex64. (xrstor64): Change into <xrstor>64 (clflushopt): New. * config/i386/i386.opt (mclflushopt): New. (mxsavec): Ditto. (mxsaves): Ditto. * config/i386/x86intrin.h: Add clflushoptintrin.h, xsavesintrin.h, xsavecintrin.h. * doc/invoke.texi: Document new options. gcc/testsuite/ * gcc.target/i386/clflushopt-1.c: New. * gcc.target/i386/xsavec-1.c: Ditto. * gcc.target/i386/xsavec64-1.c: Ditto. * gcc.target/i386/xsaves-1.c: Ditto. * gcc.target/i386/xsaves64-1.c: Ditto. * gcc.target/i386/sse-12.c: Test new options. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. From-SVN: r210421
2014-04-23msp430.c (msp430_handle_option): Move function to msp430-common.cNick Clifton1-0/+91
* config/msp430/msp430.c (msp430_handle_option): Move function to msp430-common.c (msp430_option_override): Simplify mcu and mcpu option handling. (msp430_is_f5_mcu): Rename to msp430_use_f5_series_hwmult. Add support for -mhwmult command line option. (has_32bit_hwmult): Rename to use_32bit_hwmult. Add support for -mhwmult command line option. (msp430_hwmult_enabled): Delete. (msp43o_output_labelref): Add support for -mhwmult command line option. * config/msp430/msp430.md (mulhisi3, umulhisi3, mulsidi3) (umulsidi3): Likewise. * config/msp430/msp430.opt (mmcu): Add Report attribute. (mcpu, mlarge, msmall): Likewise. (mhwmult): New option. * config/msp430/msp430-protos.h (msp430_hwmult_enabled): Remove prototype. (msp430_is_f5_mcu): Remove prototype. (msp430_use_f5_series_hwmult): Add prototype. * config/msp430/msp430-opts.h: New file. * common/config/msp430: New directory. * common/config/msp430/msp430-common.c: New file. * config.gcc (msp430): Remove target_has_targetm_common. * doc/invoke.texi: Document -mhwmult command line option. From-SVN: r209685
2014-04-11gcc:Joern Rennecke1-0/+2
* common/config/epiphany/epiphany-common.c (epiphany_option_optimization_table): Enable section anchors by default at -O1 or higher. * config/epiphany/epiphany.c (TARGET_MAX_ANCHOR_OFFSET): Define. (TARGET_MIN_ANCHOR_OFFSET): Likewise. (epiphany_rtx_costs) <SET>: For binary operators, the set as such carries no extra cost. (epiphany_legitimate_address_p): For BLKmode, apply SImode check. * config/epiphany/epiphany.h (ASM_OUTPUT_DEF): Define. * config/epiphany/predicates.md (memclob_operand): New predicate. * config/epiphany/epiphany.md (stack_adjust_add, stack_adjust_str): Use memclob_operand predicate and X constraint for operand 3. gcc/testsuite: * gcc.target/epiphany/t1068-2.c: New file. From-SVN: r209320
2014-02-25gcc/Ilya Tocar1-0/+15
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PREFETCHWT1_SET), (OPTION_MASK_ISA_PREFETCHWT1_UNSET): New. (ix86_handle_option): Handle OPT_mprefetchwt1. * config/i386/cpuid.h (bit_PREFETCHWT1): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect PREFETCHWT1 CPUID. * config/i386/i386-c.c (ix86_target_macros_internal): Handle OPTION_MASK_ISA_PREFETCHWT1. * config/i386/i386.c (ix86_target_string): Handle mprefetchwt1. (PTA_PREFETCHWT1): New. (ix86_option_override_internal): Handle PTA_PREFETCHWT1. (ix86_valid_target_attribute_inner_p): Handle OPT_mprefetchwt1. * config/i386/i386.h (TARGET_PREFETCHWT1), (TARGET_PREFETCHWT1_P): New. * config/i386/i386.md (prefetch): Check TARGET_PREFETCHWT1 (*prefetch_avx512pf_<mode>_: Change into ... (*prefetch_prefetchwt1_<mode>: This. * config/i386/i386.opt (mprefetchwt1): New. * config/i386/xmmintrin.h (_mm_hint): Add _MM_HINT_ET1. (_mm_prefetch): Handle intent to write. * doc/invoke.texi (mprefetchwt1), (mno-prefetchwt1): Doccument. gcc/testsuite/ * gcc.target/i386/avx-1.c: Update __builtin_prefetch. * gcc.target/i386/prefetchwt1-1.c: New. * g++.dg/other/i386-2.C: Add new option. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Update __builtin_prefetch, add new option. * gcc.target/i386/sse-22.c: Add new option. * gcc.target/i386/sse-23.c: Update __builtin_prefetch, add new option. From-SVN: r208115
2014-02-24TILE-Gx big endian support.Walter Lee1-0/+5
/: * configure.ac (tilepro-*-*) Change to tilepro*-*-*. (tilegx-*-*): Change to tilegx*-*-*. * configure: Regenerate. contrib/: * config-list.mk (LIST): Add tilegxbe-linux-gnu. libcpp/: * configure.ac: Change "tilepro" triplet to "tilepro*". * configure: Regenerate. libgcc/: * config.host: Support "tilegx*" and "tilepro*" triplets. * config/tilegx/sfp-machine32.h (__BYTE_ORDER): Handle big endian. * config/tilegx/sfp-machine64.h (__BYTE_ORDER): Handle big endian. gcc/: * config.gcc (tilepro-*-*): Change to tilepro*-*-*. (tilegx-*-linux*): Change to tilegx*-*-linux*; Support tilegxbe triplet. * common/config/tilegx/tilegx-common.c (TARGET_DEFAULT_TARGET_FLAGS): Define. * config/tilegx/linux.h (ASM_SPEC): Add endian_spec. (LINK_SPEC): Ditto. * config/tilegx/sync.md (atomic_test_and_set): Handle big endian. * config/tilegx/tilegx.c (tilegx_return_in_msb): New. (tilegx_gimplify_va_arg_expr): Handle big endian. (tilegx_expand_unaligned_load): Ditto. (tilegx_expand_unaligned_store): Ditto. (TARGET_RETURN_IN_MSB): New. * config/tilegx/tilegx.h (TARGET_DEFAULT): New. (TARGET_ENDIAN_DEFAULT): New. (TARGET_BIG_ENDIAN): Handle big endian. (BYTES_BIG_ENDIAN): Ditto. (WORDS_BIG_ENDIAN): Ditto. (FLOAT_WORDS_BIG_ENDIAN): Ditto. (ENDIAN_SPEC): New. (EXTRA_SPECS): New. * config/tilegx/tilegx.md (extv): Handle big endian. (extzv): Ditto. (insn_st<n>): Ditto. (insn_st<n>_add<bitsuffix>): Ditto. (insn_stnt<n>): Ditto. (insn_stnt<n>_add<bitsuffix>):Ditto. (vec_interleave_highv8qi): Handle big endian. (vec_interleave_highv8qi_be): New. (vec_interleave_highv8qi_le): New. (insn_v1int_h): Handle big endian. (vec_interleave_lowv8qi): Handle big endian. (vec_interleave_lowv8qi_be): New. (vec_interleave_lowv8qi_le): New. (insn_v1int_l): Handle big endian. (vec_interleave_highv4hi): Handle big endian. (vec_interleave_highv4hi_be): New. (vec_interleave_highv4hi_le): New. (insn_v2int_h): Handle big endian. (vec_interleave_lowv4hi): Handle big endian. (vec_interleave_lowv4hi_be): New. (vec_interleave_lowv4hi_le): New. (insn_v2int_l): Handle big endian. (vec_interleave_highv2si): Handle big endian. (vec_interleave_highv2si_be): New. (vec_interleave_highv2si_le): New. (insn_v4int_h): Handle big endian. (vec_interleave_lowv2si): Handle big endian. (vec_interleave_lowv2si_be): New. (vec_interleave_lowv2si_le): New. (insn_v4int_l): Handle big endian. * config/tilegx/tilegx.opt (mbig-endian): New option. (mlittle-endian): New option. * doc/install.texi: Document tilegxbe-linux. * doc/invoke.texi: Document -mbig-endian and -mlittle-endian. From-SVN: r208069
2014-01-27mips-common.c (TARGET_DEFAULT_TARGET_FLAGS): Remove ↵Steve Ellcey1-3/+1
TARGET_FP_EXCEPTIONS_DEFAULT and MASK_FUSED_MADD. 2014-01-27 Steve Ellcey <sellcey@mips.com> * common/config/mips/mips-common.c (TARGET_DEFAULT_TARGET_FLAGS): Remove TARGET_FP_EXCEPTIONS_DEFAULT and MASK_FUSED_MADD. * config/mips/mips.c (mips_option_override): Change setting of TARGET_DSP. * config/mips/mips.h (TARGET_FP_EXCEPTIONS_DEFAULT): Remove. * config/mips/mips.opt (DSP, DSPR2, FP_EXCEPTIONS, FUSED_MADD, MIPS3D) Change from Mask to Var. From-SVN: r207154
2014-01-27[ARM] fix big.LITTLE spec rewritingJames Greenhalgh1-3/+5
gcc/ * common/config/arm/arm-common.c (arm_rewrite_mcpu): Handle multiple names. * config/arm/arm.h (BIG_LITTLE_SPEC): Do not discard mcpu switches. From-SVN: r207133
2014-01-24[AArch64] fix big.LITTLE spec rewritingJames Greenhalgh1-3/+5
gcc/ * common/config/aarch64/aarch64-common.c (aarch64_rewrite_mcpu): Handle multiple names. * config/aarch64/aarch64.h (BIG_LITTLE_SPEC): Do not discard mcpu switches. From-SVN: r207053
2014-01-20[AArch64] Fix behaviour of -mcpu option to match ARM.James Greenhalgh1-6/+4
gcc/ * common/config/aarch64/aarch64-common.c (aarch64_handle_option): Don't handle any option order logic here. * config/aarch64/aarch64.c (aarch64_parse_arch): Do not override selected_cpu, warn on architecture version mismatch. (aarch64_override_options): Fix parsing order for option strings. From-SVN: r206803
2014-01-02Update copyright years in gcc/Richard Sandiford49-49/+49
From-SVN: r206289
2014-01-02arc-common.c, [...]: Use the standard form for the copyright notice.Richard Sandiford1-2/+1
gcc/ * common/config/arc/arc-common.c, config/arc/arc-modes.def, config/arc/arc-protos.h, config/arc/arc.c, config/arc/arc.h, config/arc/arc.md, config/arc/arc.opt, config/arm/arm_neon_builtins.def, config/arm/crypto.def, config/i386/avx512cdintrin.h, config/i386/avx512erintrin.h, config/i386/avx512fintrin.h, config/i386/avx512pfintrin.h, config/i386/btver2.md, config/i386/shaintrin.h, config/i386/slm.md, config/linux-protos.h, config/linux.c, config/winnt-c.c, diagnostic-color.c, diagnostic-color.h, gimple-ssa-isolate-paths.c, vtable-verify.c, vtable-verify.h: Use the standard form for the copyright notice. gcc/c-family/ * array-notation-common.c, c-cilkplus.c: Use the standard form for the copyright notice. gcc/c/ * c-array-notation.c: Use the standard form for the copyright notice. gcc/cp/ * cp-array-notation.c, cp-cilkplus.c, vtable-class-hierarchy.c: Use the standard form for the copyright notice. gcc/testsuite/ * gcc.target/arc/arc.exp: Use the standard form for the copyright notice. libgcc/ * config/arc/asm.h, config/arc/crtg.S, config/arc/crtgend.S, config/arc/crti.S, config/arc/crtn.S, config/arc/divtab-arc700.c, config/arc/dp-hack.h, config/arc/fp-hack.h, config/arc/ieee-754/adddf3.S, config/arc/ieee-754/addsf3.S, config/arc/ieee-754/arc600-dsp/divdf3.S, config/arc/ieee-754/arc600-dsp/divsf3.S, config/arc/ieee-754/arc600-dsp/muldf3.S, config/arc/ieee-754/arc600-dsp/mulsf3.S, config/arc/ieee-754/arc600-mul64/divdf3.S, config/arc/ieee-754/arc600-mul64/divsf3.S, config/arc/ieee-754/arc600-mul64/muldf3.S, config/arc/ieee-754/arc600-mul64/mulsf3.S, config/arc/ieee-754/arc600/divsf3.S, config/arc/ieee-754/arc600/mulsf3.S, config/arc/ieee-754/divdf3.S, config/arc/ieee-754/divsf3-stdmul.S, config/arc/ieee-754/divsf3.S, config/arc/ieee-754/divtab-arc-df.c, config/arc/ieee-754/divtab-arc-sf.c, config/arc/ieee-754/eqdf2.S, config/arc/ieee-754/eqsf2.S, config/arc/ieee-754/extendsfdf2.S, config/arc/ieee-754/fixdfsi.S, config/arc/ieee-754/fixsfsi.S, config/arc/ieee-754/fixunsdfsi.S, config/arc/ieee-754/floatsidf.S, config/arc/ieee-754/floatsisf.S, config/arc/ieee-754/floatunsidf.S, config/arc/ieee-754/gedf2.S, config/arc/ieee-754/gesf2.S, config/arc/ieee-754/gtdf2.S, config/arc/ieee-754/gtsf2.S, config/arc/ieee-754/muldf3.S, config/arc/ieee-754/mulsf3.S, config/arc/ieee-754/orddf2.S, config/arc/ieee-754/ordsf2.S, config/arc/ieee-754/truncdfsf2.S, config/arc/ieee-754/uneqdf2.S, config/arc/ieee-754/uneqsf2.S, config/arc/initfini.c, config/arc/lib1funcs.S, config/arc/t-arc, config/arc/t-arc-newlib, config/cris/umulsidi3.S, config/msp430/cmpsi2.S, config/msp430/epilogue.S, config/msp430/lib2bitcountHI.c, config/msp430/lib2divHI.c, config/msp430/lib2divQI.c, config/msp430/lib2divSI.c, config/msp430/lib2mul.c, config/msp430/msp430-divmod.h, config/msp430/msp430-mul.h, config/msp430/slli.S, config/msp430/srai.S, config/msp430/srli.S, config/rl78/divmodhi.S, config/rl78/divmodqi.S, config/rl78/divmodsi.S, config/rl78/signbit.S, vtv_end.c, vtv_end_preinit.c, vtv_start.c, vtv_start_preinit.c: Use the standard form for the copyright notice. libgomp/ * hashtab.h: Use the standard form for the copyright notice. libstdc++-v3/ * testsuite/18_support/new_handler.cc, testsuite/18_support/terminate_handler.cc, testsuite/18_support/unexpected_handler.cc: Use the standard form for the copyright notice. From-SVN: r206288
2013-12-31i386-common.c (OPTION_MASK_ISA_SHA_SET): New.Alexander Ivchenko1-1/+17
gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_SHA_SET): New. (OPTION_MASK_ISA_SHA_UNSET): Ditto. (ix86_handle_option): Handle OPT_msha. * config.gcc (extra_headers): Add shaintrin.h. * config/i386/cpuid.h (bit_SHA): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect SHA instructions. * config/i386/i386-c.c (ix86_target_macros_internal): Handle OPTION_MASK_ISA_SHA. * config/i386/i386.c (ix86_target_string): Add -msha. (ix86_option_override_internal): Add PTA_SHA. (ix86_valid_target_attribute_inner_p): Handle OPT_msha. (enum ix86_builtins): Add IX86_BUILTIN_SHA1MSG1, IX86_BUILTIN_SHA1MSG2, IX86_BUILTIN_SHA1NEXTE, IX86_BUILTIN_SHA1RNDS4, IX86_BUILTIN_SHA256MSG1, IX86_BUILTIN_SHA256MSG2, IX86_BUILTIN_SHA256RNDS2. (bdesc_args): Add BUILTINS defined above. (ix86_init_mmx_sse_builtins): Add __builtin_ia32_sha1msg1, __builtin_ia32_sha1msg2, __builtin_ia32_sha1nexte, __builtin_ia32_sha1rnds4, __builtin_ia32_sha256msg1, __builtin_ia32_sha256msg2, __builtin_ia32_sha256rnds2. (ix86_expand_args_builtin): Handle V4SI_FTYPE_V4SI_V4SI_V4SI, add warning for CODE_FOR_sha1rnds4. * config/i386/i386.h (TARGET_SHA): New. (TARGET_SHA_P): Ditto. * config/i386/i386.opt (-msha): Document it. * config/i386/immintrin.h: Add shaintrin.h. * config/i386/shaintrin.h: New. * config/i386/sse.md (unspec): Add UNSPEC_SHA1MSG1, UNSPEC_SHA1MSG2, UNSPEC_SHA1NEXTE, UNSPEC_SHA1RNDS4, UNSPEC_SHA256MSG1, UNSPEC_SHA256MSG2, UNSPEC_SHA256RNDS2. (sha1msg1): New. (sha1msg2): Ditto. (sha1nexte): Ditto. (sha1rnds4): Ditto. (sha256msg1): Ditto. (sha256msg2): Ditto. (sha256rnds2): Ditto. * doc/invoke.texi: Add -msha. testsuite/ * gcc.target/i386/avx-1.c: Add define for __builtin_ia32_sha1rnds4. * gcc.target/i386/i386.exp (check_effective_target_sha): New. * gcc.target/i386/sha-check.h: New file. * gcc.target/i386/sha1msg1-1.c: Ditto. * gcc.target/i386/sha1msg1-2.c: Ditto. * gcc.target/i386/sha1msg2-1.c: Ditto. * gcc.target/i386/sha1msg2-2.c: Ditto. * gcc.target/i386/sha1nexte-1: Ditto. * gcc.target/i386/sha1nexte-2: Ditto. * gcc.target/i386/sha1rnds4-1.c: Ditto. * gcc.target/i386/sha1rnds4-2.c: Ditto. * gcc.target/i386/sha256msg1-1.c: Ditto. * gcc.target/i386/sha256msg1-2.c: Ditto. * gcc.target/i386/sha256msg2-1.c: Ditto. * gcc.target/i386/sha256msg2-2.c: Ditto. * gcc.target/i386/sha256rnds2-1.c: Ditto. * gcc.target/i386/sha256rnds2-2.c: Ditto. * gcc.target/i386/sse-13.c: Add __builtin_ia32_sha1rnds4. * gcc.target/i386/sse-14.c: Add _mm_sha1rnds4_epu32. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Add __builtin_ia32_sha1rnds4. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com> From-SVN: r206263
2013-12-31Commit of nios2 port to trunk:Chung-Lin Tang1-0/+44
contrib/ 2013-12-31 Chung-Lin Tang <cltang@codesourcery.com> * config-list.mk: Add nios2-elf, nios2-linux-gnu. Corrected ordering of some configs. gcc/ 2013-12-31 Chung-Lin Tang <cltang@codesourcery.com> Sandra Loosemore <sandra@codesourcery.com> Based on patches from Altera Corporation * config.gcc (nios2-*-*): Add nios2 config targets. * configure.ac (TLS_SECTION_ASM_FLAG): Add nios2 case. ("$cpu_type"): Add nios2 as new cpu type. * configure: Regenerate. * config/nios2/nios2.c: New file. * config/nios2/nios2.h: New file. * config/nios2/nios2-opts.h: New file. * config/nios2/nios2-protos.h: New file. * config/nios2/elf.h: New file. * config/nios2/elf.opt: New file. * config/nios2/linux.h: New file. * config/nios2/nios2.opt: New file. * config/nios2/nios2.md: New file. * config/nios2/predicates.md: New file. * config/nios2/constraints.md: New file. * config/nios2/t-nios2: New file. * common/config/nios2/nios2-common.c: New file. * doc/invoke.texi (Nios II options): Document Nios II specific options. * doc/md.texi (Nios II family): Document Nios II specific constraints. * doc/extend.texi (Function Specific Option Pragmas): Document Nios II supported target pragma functionality. gcc/testsuite/ 2013-12-31 Sandra Loosemore <sandra@codesourcery.com> Chung-Lin Tang <cltang@codesourcery.com> Based on patches from Altera Corporation * gcc.dg/stack-usage-1.c (SIZE): Define case for __nios2__. * gcc.dg/20040813-1.c: Skip for nios2-*-*. * gcc.dg/20020312-2.c: Add __nios2__ case. * g++.dg/other/PR23205.C: Skip for nios2-*-*. * g++.dg/other/pr23205-2.C: Skip for nios2-*-*. * g++.dg/cpp0x/constexpr-rom.C: Skip for nios2-*-*. * g++.dg/cpp0x/alias-decl-debug-0.C: Skip for nios2-*-*. * g++.old-deja/g++.jason/thunk3.C: Skip for nios2-*-*. * lib/target-supports.exp (check_profiling_available): Check for nios2-*-elf. * gcc.c-torture/execute/pr47237.x:: Skip for nios2-*-*. * gcc.c-torture/execute/20101011-1.c: Skip for nios2-*-*. * gcc.c-torture/execute/builtins/lib/chk.c (memset): Place char-based memset loop before inline check, to prevent problems when called to initialize .bss. Update comments. * gcc.target/nios2/nios2.exp: New DejaGNU file. * gcc.target/nios2/nios2-custom-1.c: New test. * gcc.target/nios2/nios2-trap-insn.c: New test. * gcc.target/nios2/nios2-builtin-custom.c: New test. * gcc.target/nios2/nios2-builtin-io.c: New test. * gcc.target/nios2/nios2-stack-check-1.c: New test. * gcc.target/nios2/nios2-stack-check-2.c: New test. * gcc.target/nios2/nios2-rdctl.c: New test. * gcc.target/nios2/nios2-wrctl.c: New test. * gcc.target/nios2/nios2-wrctl-zero.c: New test. * gcc.target/nios2/nios2-wrctl-not-zero.c: New test. * gcc.target/nios2/nios2-rdwrctl-1.c: New test. * gcc.target/nios2/nios2-reg-constraints.c: New test. * gcc.target/nios2/nios2-ashlsi3-one_shift.c: New test. * gcc.target/nios2/nios2-mul-options-1.c: New test. * gcc.target/nios2/nios2-mul-options-2.c: New test. * gcc.target/nios2/nios2-mul-options-3.c: New test. * gcc.target/nios2/nios2-mul-options-4.c: New test. * gcc.target/nios2/nios2-nor.c: New test. * gcc.target/nios2/nios2-stxio.c: New test. * gcc.target/nios2/custom-fp-1.c: New test. * gcc.target/nios2/custom-fp-2.c: New test. * gcc.target/nios2/custom-fp-3.c: New test. * gcc.target/nios2/custom-fp-4.c: New test. * gcc.target/nios2/custom-fp-5.c: New test. * gcc.target/nios2/custom-fp-6.c: New test. * gcc.target/nios2/custom-fp-7.c: New test. * gcc.target/nios2/custom-fp-8.c: New test. * gcc.target/nios2/custom-fp-cmp-1.c: New test. * gcc.target/nios2/custom-fp-conversion.c: New test. * gcc.target/nios2/custom-fp-double.c: New test. * gcc.target/nios2/custom-fp-float.c: New test. * gcc.target/nios2/nios2-int-types.c: New test. * gcc.target/nios2/nios2-cache-1.c: New test. * gcc.target/nios2/nios2-cache-2.c: New test. libgcc/ 2013-12-31 Sandra Loosemore <sandra@codesourcery.com> Chung-Lin Tang <cltang@codesourcery.com> Based on patches from Altera Corporation * config.host (nios2-*-*,nios2-*-linux*): Add nios2 host cases. * config/nios2/lib2-nios2.h: New file. * config/nios2/lib2-divmod-hi.c: New file. * config/nios2/linux-unwind.h: New file. * config/nios2/lib2-divmod.c: New file. * config/nios2/linux-atomic.c: New file. * config/nios2/t-nios2: New file. * config/nios2/crti.asm: New file. * config/nios2/t-linux: New file. * config/nios2/lib2-divtable.c: New file. * config/nios2/lib2-mul.c: New file. * config/nios2/tramp.c: New file. * config/nios2/crtn.asm: New file. From-SVN: r206256
2013-12-19nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Consider TARGET_CPU_DEFAULT ↵Monk Chiang1-2/+11
settings. 2013-12-19 Monk Chiang <sh.chiang04@gmail.com> gcc/ * common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Consider TARGET_CPU_DEFAULT settings. From-SVN: r206106
2013-12-18[AArch64 1/3 big.LITTLE] Driver rewriting of big.LITTLE names.James Greenhalgh1-0/+35
gcc/ * common/config/aarch64/aarch64-common.c (aarch64_rewrite_selected_cpu): New. (aarch64_rewrite_mcpu): New. * config/aarch64/aarch64-protos.h (aarch64_rewrite_selected_cpu): New. * config/aarch64/aarch64.h (BIG_LITTLE_SPEC): New. (BIG_LITTLE_SPEC_FUNCTIONS): Likewise. (ASM_CPU_SPEC): Likewise. (EXTRA_SPEC_FUNCTIONS): Likewise. (EXTRA_SPECS): Likewise. (ASM_SPEC): Likewise. * config/aarch64/aarch64.c (aarch64_start_file): Rewrite target CPU name. From-SVN: r206098
2013-12-17[ARM 1/5 big.LITTLE] Add driver support for rewriting -mcpu namesJames Greenhalgh1-0/+35
gcc/ * common/config/arm/arm-common.c (arm_rewrite_selected_cpu): New. (arm_rewrite_mcpu): Likewise. * config/arm/arm-protos.h (arm_rewrite_selected_cpu): New. * config/arm/arm.h (BIG_LITTLE_SPEC): New. (BIG_LITTLE_SPEC_FUNCTIONS): Likewise. (EXTRA_SPEC_FUNCTIONS): Include BIG_LITTLE_SPEC_FUNCTIONS. (ASM_CPU_SPEC): Include BIG_LITTLE_SPEC. * config/arm/arm.c (arm_file_start): Rewrite arm_selecetd_cpu values. From-SVN: r206045
2013-12-08re PR target/52898 (SH Target: Inefficient DImode comparisons)Oleg Endo1-1/+0
PR target/52898 PR target/51697 * common/config/sh/sh-common.c (sh_option_optimization_table): Remove OPT_mcbranchdi entry. * config/sh/sh.opt (mcbranchdi, mcmpeqdi): Mark as undocumented and emit a warning. * config/sh/sh.c (sh_option_override): Initialize TARGET_CBRANCHDI4 and TARGET_CMPEQDI_T variables. * doc/invoke.texi (SH options): Undocument -mcbranchdi and -mcmpeqdi. PR target/52898 PR target/51697 * gcc.target/sh/pr51697.c: New. From-SVN: r205794
2013-11-19i386-common.c: Enable -freorder-blocks-and-partition at -O2 and up for x86.Teresa Johnson1-0/+2
2013-11-19 Teresa Johnson <tejohnson@google.com> * common/config/i386/i386-common.c: Enable -freorder-blocks-and-partition at -O2 and up for x86. * doc/invoke.texi: Update -freorder-blocks-and-partition default. * opts.c (finish_options): Only warn if -freorder-blocks-and- partition was set on command line. From-SVN: r205058
2013-11-02gcse.c (pre_delete): Remove references to regmove from comments.Steven Bosscher2-2/+0
* gcse.c (pre_delete): Remove references to regmove from comments. * recog.c: (validate_replace_rtx_1): Likewise. * config/rl78/rl78.c: Likewise. * config/v850/v850.h: Likewise, and remove unused ENABLE_REGMOVE_PASS. * common/config/m32r/m32r-common.c: Don't manipulate OPT_fregmove. * common/config/mmix/mmix-common.c: Likewise. From-SVN: r204309
2013-10-31Add new nds32 port, including machine description, libgcc, and documentation.Chung-Ju Wu1-0/+117
[gcc/ChangeLog] * config.gcc (nds32*-*-*): Add nds32 target. * config/nds32/nds32.c: New file. * config/nds32/nds32.h: New file. * config/nds32/nds32.md: New file. * config/nds32/constants.md: New file. * config/nds32/constraints.md: New file. * config/nds32/iterators.md: New file. * config/nds32/nds32-doubleword.md: New file. * config/nds32/nds32-intrinsic.md: New file. * config/nds32/nds32_intrinsic.h: New file. * config/nds32/nds32-modes.def: New file. * config/nds32/nds32-multiple.md: New file. * config/nds32/nds32.opt: New file. * config/nds32/nds32-opts.h: New file. * config/nds32/nds32-protos.h: New file. * config/nds32/nds32-peephole2.md: New file. * config/nds32/pipelines.md: New file. * config/nds32/predicates.md: New file. * config/nds32/t-mlibs: New file. * common/config/nds32: New directory and files. * doc/invoke.texi (NDS32 options): Document nds32 specific options. * doc/md.texi (NDS32 family): Document nds32 specific constraints. * doc/install.texi (Cross-Compiler-Specific Options): Document --with-nds32-lib for nds32 target. * doc/extend.texi (Function Attributes, Target Builtins): Document nds32 specific attributes. [libgcc/ChangeLog] * config.host (nds32*-elf*): Add nds32 target. * config/nds32 : New directory and files. [contrib/ChangeLog] * config-list.mk (nds32le-elf, nds32be-elf): Add nds32 target. Co-Authored-By: Shiva Chen <shiva0217@gmail.com> From-SVN: r204269
2013-10-01arc, arc: New directories.Saurabh Verma1-0/+117
2013-10-01 Saurabh Verma <saurabh.verma@codito.com> Ramana Radhakrishnan <ramana.radhakrishnan@codito.com> Joern Rennecke <joern.rennecke@embecosm.com> Muhammad Khurram Riaz <khurram.riaz@arc.com> Brendan Kehoe <brendan@zen.org> Michael Eager <eager@eagercon.com> Simon Cook <simon.cook@embecosm.com> Jeremy Bennett <jeremy.bennett@embecosm.com> * config/arc, common/config/arc: New directories. Co-Authored-By: Brendan Kehoe <brendan@zen.org> Co-Authored-By: Jeremy Bennett <jeremy.bennett@embecosm.com> Co-Authored-By: Joern Rennecke <joern.rennecke@embecosm.com> Co-Authored-By: Michael Eager <eager@eagercon.com> Co-Authored-By: Muhammad Khurram Riaz <khurram.riaz@arc.com> Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@codito.com> Co-Authored-By: Simon Cook <simon.cook@embecosm.com> From-SVN: r203072
2013-09-27vectorizer cost model enhancementXinliang David Li1-1/+0
From-SVN: r202980
2013-08-22i386-common.c (OPTION_MASK_ISA_AVX512F_SET): New.Alexander Ivchenko1-1/+68
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512F_SET): New. (OPTION_MASK_ISA_AVX512CD_SET): Ditto. (OPTION_MASK_ISA_AVX512PF_SET): Ditto. (OPTION_MASK_ISA_AVX512ER_SET): Ditto. (OPTION_MASK_ISA_AVX2_UNSET): Update. (OPTION_MASK_ISA_AVX512F_UNSET): New. (OPTION_MASK_ISA_AVX512CD_UNSET): Ditto. (OPTION_MASK_ISA_AVX512PF_UNSET): Ditto. (OPTION_MASK_ISA_AVX512ER_UNSET): Ditto. (ix86_handle_option): Handle OPT_mavx512f, OPT_mavx512cd, OPT_mavx512pf, OPT_mavx512er cases. * config/i386/constraints.md (v): New constraint. (Yi, Yj): Replace SSE_REGS with ALL_SSE_REGS. * config/i386/cpuid.h (bit_AVX512F, bit_AVX512PF, bit_AVX512ER) (bit_AVX512CD): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect AVX512F, AVX512ER, AVX512PF, AVX512CD features. * config/i386/i386-c.c (ix86_target_macros_internal): Conditionally define __AVX512F__, __AVX512ER__, __AVX512CD__, __AVX512PF__. * config/i386/i386-modes.def (VECTOR_MODES (INT, 128)) (VECTOR_MODES (FLOAT, 128), INT_MODE (XI, 64)): New modes. * config/i386/i386.c (regclass_map, dbx_register_map) (dbx64_register_map, svr4_dbx_register_map): Add new SSE registers. (gate_insert_vzeroupper): Disable vzeroupper for TARGET_AVX512F. (ix86_target_string): Define -mavx512f, -mavx512er, -mavx512cd, -mavx512pf options. (ix86_option_override_internal): Define PTA_AVX512F, PTA_AVX512ER, PTA_AVX512PF, PTA_AVX512CD. Handle -mavx512f, -mavx512er, -mavx512cd, -mavx512pf options. Fix formatting. (ix86_conditional_register_usage): Squash EXT_REX_SSE_REGs for 32-bit targets. Squash EVEX_SSE_REGS if AVX512F is disabled. (ix86_valid_target_attribute_inner_p): Handle -mavx512f, -mavx512er, -mavx512cd, -mavx512pf options. (standard_sse_constant_opcode): Add vpternlogd for 512-bit modes. (print_reg, ix86_print_operand): Handle 'g' to output 512-bit operands. (ix86_preferred_output_reload_class): Replace SSE_REGS with ALL_SSE_REGS. (ix86_hard_regno_mode_ok): Support 512-bit registers. (ix86_set_reg_reg_cost): Ditto. (x86_order_regs_for_local_alloc): Ditto. (MAX_VECT_LEN): Extend to 64-byte. (ix86_spill_class): Replace SSE_REGS with ALL_SSE_REGS. * config/i386/i386.h (TARGET_AVX512F, TARGET_AVX512PF) (TARGET_AVX512ER, TARGET_AVX512CD): New. (BIGGEST_ALIGNMENT): Extend to 512-bits. (FIRST_PSEUDO_REGISTER, FIXED_REGISTERS): Add new registers. (CALL_USED_REGISTERS, REG_ALLOC_ORDER): Likewise. (VALID_AVX512F_SCALAR_MODE, VALID_AVX512F_REG_MODE): New. (SSE_REG_MODE_P): Support new modes. (FIRST_MMX_REG, FIRST_REX_INT_REG, FIRST_REX_SSE_REG): Add comments. (FIRST_EXT_REX_SSE_REG, LAST_EXT_REX_SSE_REG): New. (reg_class, REG_CLASS_NAMES): Add EVEX_SSE_REGS, ALL_SSE_REGS. (SSE_CLASS_P, MAYBE_SSE_CLASS_P): Replace SSE_REGS with ALL_SSE_REGS. (REG_CLASS_CONTENTS): Add new registers. (SSE_REGNO_P, SSE_REGNO, HARD_REGNO_RENAME_OK): Support new registers. (EXT_REX_SSE_REGNO_P): New. (HI_REGISTER_NAMES): Add new registers. * config/i386/i386.md: Define constants for new registers. (mode): Add new 512-bit modes. (prefix): Support evex prefix. (isa): Support avx512f, noavx512f, fma_avx512f. (ssemodesuffix): Add new 512-bit modes. (movxi): New. (*movxi_internal_avx512f): Ditto. (*movdi_internal): Replace constraint "x" with the new constraint "v". Support MODE_XI. (*movsi_internal): Likewise. (*movdf_internal): Likewise. (*movsf_internal): Likewise. (*fop_<mode>_comm_sse): Replace constraint "x" with new constraint "v". (<code><mode>3): Likewise. * config/i386/i386.opt (mavx512f, mavx512pf, mavx512er, mavx512cd): New. * config/i386/mmx.md (*mov<mode>_internal): Replace constraint "x" with the new constraint "v". * config/i386/sse.md (*mov<mode>_internal): Support new registers and modes. (<sse>_loadu<ssemodesuffix><avxsizesuffix>): Replace constraint "x" with the new constraint "v". (<sse2>_loaddqu<avxsizesuffix>): Likewise. (<sse2>_storedqu<avxsizesuffix>): Likewise. (*<plusminus_insn><mode>3): Likewise. (<sse>_vm<plusminus_insn><mode>3): Likewise. (*mul<mode>3): Likewise. (<sse>_vmmul<mode>3): Likewise. (<sse>_div<mode>3): Likewise. (<sse>_vmdiv<mode>3): Likewise. (<sse>_sqrt<mode>2): Likewise. (<sse>_vmsqrt<mode>2): Likewise. (*<code><mode>3_finite): Likewise. (*<code><mode>3) <smaxmin>: Likewise. (<sse>_vm<code><mode>3): Likewise. (*<code><mode>3) <any_logic>: Likewise. (*fma_fmadd_<mode>): Likewise. (*fma_fmsub_<mode>): Likewise. (*fma_fnmadd_<mode>): Likewise. (*fma_fnmsub_<mode>): Likewise. (*fma_fmaddsub_<mode>): Likewise. (*fma_fmsubadd_<mode>): Likewise. (*fmai_fmadd_<mode>): Likewise. (*fmai_fmsub_<mode>): Likewise. (*fmai_fnmadd_<mode>): Likewise. (*fmai_fnmsub_<mode>): Likewise. (sse_cvtsi2ss): Likewise. (sse_cvtsi2ssq): Likewise. (sse_cvtss2si): Likewise. (sse_cvtss2si_2): Likewise. (sse_cvtss2siq): Likewise. (sse_cvtss2siq_2): Likewise. (sse_cvttss2si): Likewise. (sse_cvtss2siq_2): Likewise. (float<sseintvecmodelower><mode>2): Likewise. (sse2_cvtsd2si_2): Likewise. (sse2_cvtsd2siq_2): Likewise. (*<plusminus_insn><mode>3): Likewise. (*<sse2_avx2>_<plusminus_insn><mode>3): Likewise. (*<sse4_1_avx2>_mul<mode>3): Likewise. (ashr<mode>3): Likewise. (<shift_insn><mode>3): Likewise. (avx2_<code><mode>3): Likewise. (*avx2_<code><mode>3): Likewise. (*andnot<mode>3): Likewise. (*<code><mode>3) <any_logic>: Likewise. (abs<mode>2): Likewise. (avx2_permvar<mode>): Likewise. (avx2_perm<mode>_1): Likewise. (*avx_vpermilp<mode>): Likewise. (avx_vpermilvar<mode>3): Likewise. (avx2_ashrv<mode>): Likewise. (avx2_<shift_insn>v<mode>): Likewise. * doc/invoke.texi: Document -mavx512f, -mavx512pf, -mavx512er, -mavx512cd. * doc/rtl.texi: Document XImode. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com> From-SVN: r201915
2013-06-27s390.c: Rename UNSPEC_CCU_TO_INT to UNSPEC_STRCMPCC_TO_INT and ↵Andreas Krebbel1-1/+1
UNSPEC_CCZ_TO_INT to... 2013-06-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config/s390/s390.c: Rename UNSPEC_CCU_TO_INT to UNSPEC_STRCMPCC_TO_INT and UNSPEC_CCZ_TO_INT to UNSPEC_CC_TO_INT. (struct machine_function): Add tbegin_p. (s390_canonicalize_comparison): Fold CC mode compares to conditional jump if possible. (s390_emit_jump): Return the emitted jump. (s390_branch_condition_mask, s390_branch_condition_mnemonic): Handle CCRAWmode compares. (s390_option_override): Default to -mhtm if available. (s390_reg_clobbered_rtx): Handle floating point regs as well. (s390_regs_ever_clobbered): Use s390_regs_ever_clobbered also for FPRs instead of df_regs_ever_live_p. (s390_optimize_nonescaping_tx): New function. (s390_init_frame_layout): Extend clobbered_regs array to cover FPRs as well. (s390_emit_prologue): Call s390_optimize_nonescaping_tx. (s390_expand_tbegin): New function. (enum s390_builtin): New enum definition. (code_for_builtin): New array definition. (s390_init_builtins): New function. (s390_expand_builtin): New function. (TARGET_INIT_BUILTINS): Define. (TARGET_EXPAND_BUILTIN): Define. * common/config/s390/s390-common.c (processor_flags_table): Add PF_TX. * config/s390/predicates.md (s390_comparison): Handle CCRAWmode. (s390_alc_comparison): Likewise. * config/s390/s390-modes.def: Add CCRAWmode. * config/s390/s390.h (processor_flags): Add PF_TX. (TARGET_CPU_HTM): Define macro. (TARGET_HTM): Define macro. (TARGET_CPU_CPP_BUILTINS): Define __HTM__ for htm. * config/s390/s390.md: Rename UNSPEC_CCU_TO_INT to UNSPEC_STRCMPCC_TO_INT and UNSPEC_CCZ_TO_INT to UNSPEC_CC_TO_INT. (UNSPECV_TBEGIN, UNSPECV_TBEGINC, UNSPECV_TEND, UNSPECV_TABORT) (UNSPECV_ETND, UNSPECV_NTSTG, UNSPECV_PPA): New unspecv enum values. (TBEGIN_MASK, TBEGINC_MASK): New constants. ("*cc_to_int"): Move up. ("*mov<mode>cc", "*cjump_64", "*cjump_31"): Accept integer constants other than 0. ("*ccraw_to_int"): New insn and splitter definition. ("tbegin", "tbegin_nofloat", "tbegin_retry") ("tbegin_retry_nofloat", "tbeginc", "tend", "tabort") ("tx_assist"): New expander. ("tbegin_1", "tbegin_nofloat_1", "*tbeginc_1", "*tend_1") ("*tabort_1", "etnd", "ntstg", "*ppa"): New insn definition. * config/s390/s390.opt: Add -mhtm option. * config/s390/s390-protos.h (s390_emit_jump): Add return type. * config/s390/htmxlintrin.h: New file. * config/s390/htmintrin.h: New file. * config/s390/s390intrin.h: New file. * doc/extend.texi: Document htm builtins. * config.gcc: Add the new header files to extra_headers. 2013-06-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gcc.target/s390/htm-1.c: New file. * gcc.target/s390/htm-nofloat-1.c: New file. * gcc.target/s390/htm-xl-intrin-1.c: New file. 2013-06-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config/s390/target.h: Include htmintrin.h. (_HTM_ITM_RETRIES): New macro definition. (htm_available, htm_init, htm_begin, htm_begin_success) (htm_commit, htm_abort, htm_abort_should_retry): New functions. From-SVN: r200454
2013-06-23re PR target/57688 (-O3 -march=native generates illegal opcode on AMD Phenom)Jakub Jelinek1-0/+1
PR target/57688 * common/config/i386/i386-common.c (ix86_handle_option): For OPT_mlzcnt add missing return true. From-SVN: r200352
2013-06-23i386-common.c: Handle LZCNT.Sriraman Tallam1-0/+14
2013-06-22 Sriraman Tallam <tmsriram@google.com> * common/config/i386/i386-common.c: Handle LZCNT. From-SVN: r200347
2013-06-05Part of the patch to add support for the R100. Accidentally omitted from ↵Nick Clifton1-1/+4
the checkin. From-SVN: r199681
2013-04-29Enable REE pass by default for AArch64 at O2 or higherIan Bolton1-0/+2
From-SVN: r198424
2013-01-10Update copyright years in gcc/Richard Sandiford46-99/+46
From-SVN: r195098
2012-10-26Update copyrightAndreas Schwab1-1/+1
From-SVN: r192859
2012-10-26Author: Gunther Nikl <gnikl@users.sourceforge.net>Gunther Nikl1-1/+5
* common/config/m68k/m68k-common.c (m68k_handle_option): Set gcc_options fields of opts_set for -m68020-40 and -m68020-60. From-SVN: r192851
2012-10-26ChangeLog/Alexander Ivchenko1-2/+50
* gcc/common/config/i386/i386-common.c (OPTION_MASK_ISA_FXSR_SET): New. (OPTION_MASK_ISA_XSAVE_SET): Likewise. (OPTION_MASK_ISA_XSAVEOPT_SET): Likewise. (ix86_handle_option): Handle mfxsr, mxsave, mxsaveopt options. * gcc/config.gcc (i[34567]86-*-*): Add fxsrintrin.h, xsaveintrin.h, xsaveoptintrin.h. (x86_64-*-*): Likewise. * config/i386/fxsrintrin.h: New header. * config/i386/xsaveintrin.h: Likewise. * config/i386/xsaveoptintrin.h: Likewise. * gcc/config/i386/driver-i386.c (host_detect_local_cpu): Detect FXSR/XSAVE/XSAVEOPT support. * gcc/config/i386/i386-builtin-types.def (VOID_FTYPE_PVOID_INT64): New function type. * gcc/config/i386/i386-c.c: Define __FXSR__, __XSAVE__ and __XSAVEOPT__ if needed. * gcc/config/i386/i386.c (ix86_target_string): Define -mfxsr, -mxsave and -mxsaveopt options. (PTA_FXSR): New. (PTA_XSAVE): Likewise. (PTA_XSAVEOPT): Likewise. (ix86_option_override_internal): Handle new option. (processor_alias_table): Added PTA_FXSR, PTA_XSAVE, PTA_XSAVEOPT. (ix86_valid_target_attribute_inner_p): Add OPT_mfxsr, OPT_mxsave, OPT_mxsaveopt. (ix86_builtins): Add IX86_BUILTIN_FXSAVE, IX86_BUILTIN_FXRSTOR, IX86_BUILTIN_FXSAVE64, IX86_BUILTIN_XSAVE, IX86_BUILTIN_XSAVE64, IX86_BUILTIN_XRSTOR, IX86_BUILTIN_XRSTOR64, IX86_BUILTIN_XSAVEOPT, IX86_BUILTIN_XSAVEOPT64. (ix86_expand_builtin): Handle these built-ins. * gcc/config/i386/i386.h (TARGET_FXSR): New. (TARGET_XSAVE): Likewise. (TARGET_XSAVEOPT): Likewise. * gcc/config/i386/i386.md (ANY_XSAVE): New int iterator. (ANY_XSAVE64): Likewise. (xsave): New int attribute. (fxsave): New instruction. (fxsave64): Likewise. (fxrstor): Likewise. (fxrstor64): Likewise. (<xsave>): Likewise. (<xsave>_rex64): Likewise. (xrstor): Likewise. (xrstor_rex64): Likewise. (xrstor64): Likewise. * gcc/config/i386/i386.opt (mfxsr): New. (mxsave): Likewise. (mxsaveopt): Likewise. * gcc/config/i386/x86intrin.h: Include xsaveintrin.h, fxsrintrin.h, xsaveoptintrin.h. testsuite/ChangeLog * gcc.target/i386/fxsave-1.c: New. * gcc.target/i386/fxsave64-1.c: Ditto. * gcc.target/i386/fxrstor-1.c: Ditto. * gcc.target/i386/fxrstor64-1.c: Ditto. * gcc.target/i386/xsave-1.c: Ditto. * gcc.target/i386/xsave64-1.c: Ditto. * gcc.target/i386/xrstor-1.c: Ditto. * gcc.target/i386/xrstor64-1.c: Ditto. * gcc.target/i386/xsaveopt-1.c: Ditto. * gcc.target/i386/xsaveopt64-1.c: Ditto. * gcc.target/i386/sse-12.c: Add -mfxsr, -mxsaveopt. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. Co-Authored-By: Uros Bizjak <ubizjak@gmail.com> From-SVN: r192840
2012-10-23AArch64 [3/10]Ian Bolton1-0/+88
2012-10-23 Ian Bolton <ian.bolton@arm.com> James Greenhalgh <james.greenhalgh@arm.com> Jim MacArthur <jim.macarthur@arm.com> Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> Marcus Shawcroft <marcus.shawcroft@arm.com> Nigel Stephens <nigel.stephens@arm.com> Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> Richard Earnshaw <rearnsha@arm.com> Sofiane Naci <sofiane.naci@arm.com> Stephen Thomas <stephen.thomas@arm.com> Tejas Belagod <tejas.belagod@arm.com> Yufeng Zhang <yufeng.zhang@arm.com> * common/config/aarch64/aarch64-common.c: New file. * config/aarch64/aarch64-arches.def: New file. * config/aarch64/aarch64-builtins.c: New file. * config/aarch64/aarch64-cores.def: New file. * config/aarch64/aarch64-elf-raw.h: New file. * config/aarch64/aarch64-elf.h: New file. * config/aarch64/aarch64-generic.md: New file. * config/aarch64/aarch64-linux.h: New file. * config/aarch64/aarch64-modes.def: New file. * config/aarch64/aarch64-option-extensions.def: New file. * config/aarch64/aarch64-opts.h: New file. * config/aarch64/aarch64-protos.h: New file. * config/aarch64/aarch64-simd.md: New file. * config/aarch64/aarch64-tune.md: New file. * config/aarch64/aarch64.c: New file. * config/aarch64/aarch64.h: New file. * config/aarch64/aarch64.md: New file. * config/aarch64/aarch64.opt: New file. * config/aarch64/arm_neon.h: New file. * config/aarch64/constraints.md: New file. * config/aarch64/gentune.sh: New file. * config/aarch64/iterators.md: New file. * config/aarch64/large.md: New file. * config/aarch64/predicates.md: New file. * config/aarch64/small.md: New file. * config/aarch64/sync.md: New file. * config/aarch64/t-aarch64-linux: New file. * config/aarch64/t-aarch64: New file. Co-Authored-By: Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> Co-Authored-By: James Greenhalgh <james.greenhalgh@arm.com> Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com> Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com> Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com> Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> Co-Authored-By: Richard Earnshaw <rearnsha@arm.com> Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com> Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com> Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com> Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com> From-SVN: r192723
2012-10-17rs6000.opt (rs6000_isa_flags): New flag word to replace target_flags that ↵Michael Meissner1-29/+28
gives us 63 possible switches. 2012-10-17 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/rs6000.opt (rs6000_isa_flags): New flag word to replace target_flags that gives us 63 possible switches. (x_rs6000_isa_flags): Save area for rs6000_isa_flags. (x_rs6000_isa_flags_explicit): Save area for rs6000_isa_flags_explicit. (rs6000_target_flags_explicit): Delete in favor of x_rs6000_isa_flags_explicit. (-mpowerpc64): Change all switches that used to be in target_flags to now be in rs6000_isa_flags. In using rs6000_isa_flags, the options machinary will generate names of the form OPITON_<xxx> instead of TARGET_<xxx> and OPTION_MASK_<xxx> instead of MASK_<xxx>. (-mpowerpc-gpopt): Likewise. (-mpowerpc-gfxopt): Likewise. (-mmfcrf): Likewise. (-mpopcntb): Likewise. (-mfprnd): Likewise. (-mcmpb): Likewise. (-mmfpgpr): Likewise. (-maltivec): Likewise. (-mhard-dfp): Likewise. (-mmulhw): Likewise. (-mdlmzb): Likewise. (-mmultiple): Likewise. (-mstring): Likewise. (-msoft-float): Likewise. (-mhard-float): Likewise. (-mpopcntd): Likewise. (-mvsx): Likewise. (-mno-update): Likewise. (-mupdate): Likewise. (-mrecip-precision): Likewise. (-mminimal-toc): Likewise. (-misel): Likewise. * config/rs6000/aix64.opt (-maix64): Likewise. (-maix32): Likewise. * config/rs6000/sysv4.opt (-mstrict-align): Likewise. (-mrelocatable): Likewise. (-mlittle-endian): Likewise. (-mlittle): Likewise. (-mbig-endian): LIkewise. (-mbig): Likewise. (-meabi): Likewise. (-m64): Likewise. (-m32): Likewise. * config/rs6000/darwin.opt (-m64): Likewise. (-m32): Likewise. * config/rs6000/rs6000-cpus.def (ISA_2_1_MASKS): Move the various masks used in rs6000.c here, since they are more logically in this file. Convert from being enums to just #defines, since the types of these masks is now HOST_WIDE_INT instead of int. For POWERPC_MASKS, add MASK_SOFT_FLOAT, since the only use case or'ed in the mask. Change the use in rs6000.c not to do the OR of MASK_SOFT_FLOAT. (ISA_2_1_MASKS): Likewise. (ISA_2_2_MASKS): Likewise. (ISA_2_4_MASKS): Likewise. (ISA_2_5_MASKS_EMBEDDED): Likewise. (ISA_2_5_MASKS_SERVER): Likewise. (POWERPC_7400_MASK): Likewise. (POWERPC_MASKS): Likewise. * config/rs6000/rs6000.c (ISA_2_1_MASKS): Likewise. (ISA_2_1_MASKS): Likewise. (ISA_2_2_MASKS): Likewise. (ISA_2_4_MASKS): Likewise. (ISA_2_5_MASKS_EMBEDDED): Likewise. (ISA_2_5_MASKS_SERVER): Likewise. (POWERPC_7400_MASK): Likewise. (POWERPC_MASKS): Likewise. (rs6000_option_override_internal): Likewise. * config/rs6000/rs6000.c (darwin_rs6000_override_options): Change all uses of target_flags to rs6000_isa_flags. Change all uses of target_flags_explicit to rs6000_isa_flags_explicit. Change the use of MASK_<xxx> to OPTION_MASK_<xxx> that options.h defines when we use a secondary flags word. Save/restore/print the new flags word when switching contexts with different target attributes. (rs6000_option_override_internal): Likewise. (rs6000_darwin_file_start): Likewise. (rs6000_opt_masks): Likewise. (rs6000_inner_target_options): Likewise. (rs6000_pragma_target_parse): Likewise. (rs6000_set_current_function): Likewise. (rs6000_function_specific_save): Likewise. (rs6000_function_specific_restore): Likewise. (rs6000_function_specific_print): Likewise. (rs6000_can_inline_p): Likewise. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise. (rs6000_cpu_cpp_builtins): Likewise. * common/config/rs6000/rs6000-driver.c (rs6000_handle_option): Likewise. * config/rs6000/rs6000.h (MASK_ALTIVEC): In moving to using Var(...) for all of the isa switches, the options machinery now uses OPTION_MASK_<xxx> instead of MASK_<xxx> for the mask name. Use #define to map the old name into the new name. For switches that are defined in aix64.opt, sysv4.opt, and darwin.opt, only do the definition if those switches were defined. (MASK_ALTIVEC): Likewise. (MASK_CMPB): Likewise. (MASK_DFP): Likewise. (MASK_DLMZB): Likewise. (MASK_EABI): Likewise. (MASK_FPRND): Likewise. (MASK_HARD_FLOAT): Likewise. (MASK_ISEL): Likewise. (MASK_MFCRF): Likewise. (MASK_MFPGPR): Likewise. (MASK_MULHW): Likewise. (MASK_MULTIPLE): Likewise. (MASK_NO_UPDATE): Likewise. (MASK_POPCNTB): Likewise. (MASK_POPCNTD): Likewise. (MASK_PPC_GFXOPT): Likewise. (MASK_PPC_GPOPT): Likewise. (MASK_RECIP_PRECISION): Likewise. (MASK_SOFT_FLOAT): Likewise. (MASK_STRICT_ALIGN): Likewise. (MASK_STRING): Likewise. (MASK_UPDATE): Likewise. (MASK_VSX): Likewise. (MASK_POWERPC64): Likewise. (MASK_64BIT): Likewise. (MASK_RELOCATABLE): Likewise. (MASK_LITTLE_ENDIAN): Likewise. (MASK_MINIMAL_TOC): Likewise. (MASK_REGNAMES): Likewise. (MASK_PROTOTYPE): Likewise. (rs6000_isa_flags_explicit): Define in terms of the global_options_set structure. * gcc/config/rs6000/aix43.h (SUBTARGET_OVERRIDE_OPTIONS): Change use of target_flags to rs6000_isa_flags, target_flags_explicit to rs6000_isa_flags_explicit, and MASK_<xxx> to OPTION_MASK_<xxx>. * gcc/config/rs6000/aix51.h (SUBTARGET_OVERRIDE_OPTIONS): Likewise. * gcc/config/rs6000/aix52.h (SUBTARGET_OVERRIDE_OPTIONS): Likewise. * gcc/config/rs6000/aix53.h (SUBTARGET_OVERRIDE_OPTIONS): Likewise. * gcc/config/rs6000/aix61.h (SUBTARGET_OVERRIDE_OPTIONS): Likewise. * gcc/config/rs6000/freebsd64.h (RELOCATABLE_NEEDS_FIXUP): Likewise. (SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise. * gcc/config/rs6000/freebsd.h (RELOCATABLE_NEEDS_FIXUP): Likewise. * gcc/config/rs6000/linux64.h (RELOCATABLE_NEEDS_FIXUP): Likewise. (SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise. (OPTION_LITTLE_ENDIAN): Likewise. (OPTION_RELOCATABLE): Likewise. (OPTION_EABI): Likewise. (OPTION_PROTOTYPE): Likewise. * gcc/config/rs6000/linux.h (RELOCATABLE_NEEDS_FIXUP): Likewise. * gcc/config/rs6000/option-defaults.h (OPTION_MASK_64BIT): Likewise. (OPT_ARCH32): Likewise. (OPT_ARCH64): Likewise. * gcc/config/rs6000/sysv4.h (TARGET_TOC): Likewise. (SUBTARGET_OVERRIDE_OPTIONS): Likewise. (SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise. (TARGET_OS_SYSV_CPP_BUILTINS): Likewise. * config/rs6000/t-rs6000 (rs6000.o): Add rs6000-cpus.def as a dependency. From-SVN: r192545
2012-10-10config.gcc: Enable zEC12 for with-arch and with-tune configure switches.Andreas Krebbel1-1/+3
2012-10-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config.gcc: Enable zEC12 for with-arch and with-tune configure switches. * common/config/s390/s390-common.c (processor_flags_table): Add zEC12 entry. * config/s390/2827.md: New file. * config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_2827_ZEC12. * config/s390/s390.h (enum processor_flags): Add PF_ZEC12. (TARGET_CPU_ZEC12, TARGET_ZEC12): New macro definitions. * config/s390/s390.c (zEC12_cost): New definition. (s390_option_override): Set costs for zEC12. Set parameter defaults for zEC12. (legitimate_reload_fp_constant_p): Adjust comment. (preferred_la_operand_p): Adjust comment. (s390_expand_insv): Generate insv pattern without CC clobber for zEC12. (s390_adjust_priority): Add zEC12 check. (s390_issue_rate): Return 2 for zEC12. (s390_reorg): Enable code optimizations for zEC12. (s390_sched_reorder): Reorder insns according to OOO attributes. (s390_get_sched_attrmask): New function. (s390_sched_score): New function. (s390_sched_variable_issue): Update s390_sched_state. (s390_sched_init): Reset s390_sched_state. (s390_loop_unroll_adjust): Enable for zEC12. * config/s390/s390.opt: Add zEC12 processor type value. * config/s390/s390.md: Enable mnemonic attribute. (attr cpu, cpu_facility): Add zEC12. Include 2827.md. ("*insv<mode>_zEC12", "*insv<mode>_zEC12_noshift") ("*load_and_trap<mode>"): New insn definition. ("*cmp_and_trap_unsigned_int<mode>"): Add clt and clgt. From-SVN: r192289
2012-09-19re PR other/53316 (Introduce -Og)Richard Guenther1-3/+4
2012-09-19 Richard Guenther <rguenther@suse.de> PR other/53316 * common/common-target.h (OPT_LEVELS_1_PLUS_NOT_DEBUG): Add. From-SVN: r191465
2012-09-02re PR target/33135 ([SH] -ffinite-math-only should not be on by default)Oleg Endo1-14/+1
PR target/33135 * common/config/sh/sh-common.c: Update copyright years. (sh_option_init_struct): Delete. (TARGET_OPTION_INIT_STRUCT): Likewise. From-SVN: r190865
2012-08-16rs6000-common.c (rs6000_handle_option): Delete handling for -mno-powerpc and ↵Segher Boessenkool1-13/+2
-mpowerpc. 2012-08-15 Segher Boessenkool <segher@kernel.crashing.org> gcc/ * common/config/rs6000/rs6000-common.c (rs6000_handle_option): Delete handling for -mno-powerpc and -mpowerpc. * config/rs6000/aix43.h (ASM_CPU_SPEC): Similar. (ASM_DEFAULT_SPEC): Use -mppc instead of -mcom. * config/rs6000/aix51.h (ASM_CPU_SPEC, ASM_DEFAULT_SPEC): Ditto. * config/rs6000/aix52.h (TARGET_DEFAULT): Delete MASK_POWERPC. * config/rs6000/aix53.h (TARGET_DEFAULT): Ditto. * config/rs6000/aix61.h (TARGET_DEFAULT): Ditto. * config/rs6000/darwin.h (TARGET_DEFAULT): Ditto. * config/rs6000/darwin64.h (TARGET_DEFAULT): Ditto. * config/rs6000/default64.h (TARGET_DEFAULT): Ditto. * config/rs6000/driver-rs6000.c (asm_names): Delete handling for -mcpu=common and -mpowerpc. * config/rs6000/eabi.h (TARGET_DEFAULT): Delete MASK_POWERPC. * config/rs6000/eabialtivec.h (TARGET_DEFAULT): Ditto. * config/rs6000/eabispe.h (TARGET_DEFAULT): Ditto. * config/rs6000/linuxaltivec.h (TARGET_DEFAULT): Ditto. * config/rs6000/linuxspe.h (TARGET_DEFAULT): Ditto. * config/rs6000/rs6000-builtin.def (RS6000_BUILTIN_CFSTRING): Use RS6000_BTM_ALWAYS instead of RS6000_BTM_POWERPC. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Adjust. (rs6000_cpu_cpp_builtins): Adjust. * config/rs6000/rs6000.c (POWERPC_BASE_MASK): Delete MASK_POWERPC. (rs6000_builtin_mask_calculate): Adjust. (rs6000_emit_move): Delete code for ! TARGET_POWERPC. (rs6000_init_libfuncs): Ditto. (rs6000_output_function_prologue): Ditto. (rs6000_opt_masks): Delete MASK_POWERPC. (rs6000_builtin_mask_names): Delete RS6000_BTM_POWERPC. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Delete handling for -mpowerpc. (RS6000_BTM_POWERPC): Delete. (RS6000_BTM_COMMON): Delete RS6000_BTM_POWERPC. * config/rs6000/rs6000.md (extendqisi2 patterns): Adjust for TARGET_POWERPC always on. (extendqihi2 patterns): Similar. (various unnamed subtract patterns): Similar. (bswaphi2 patterns): Similar. (divmodsi4): Similar. (udiv<GPR:mode>3): Similar. (div<GPR:mode>3 patterns): Similar. (udivmodsi4): Similar. (mulhcall): Delete. (mullcall): Delete. (divss_call): Delete. (divus_call): Delete. (quoss_call): Delete. (quous_call): Delete. (insvsi patterns): Adjust. (addsf3 patterns): Adjust. (subsf3 patterns): Adjust. (mulsf3 patterns): Adjust. (divsf3 patterns): Adjust. (*fmasf4_fpr): Adjust. (*fmssf4_fpr): Adjust. (*nfmasf4_fpr): Adjust. (*nfmssf4_fpr): Adjust. (*floatunssidf2_internal): Adjust. (fix_trunc<SFDF:mode>si2_internal): Adjust. (fctiwz_<SFDF:mode>): Adjust. (mulsidi3 patterns): Adjust. (smulsi3_highpart patterns): Adjust. (umulsi3_highpart patterns): Adjust. (fix_trunctfsi2 patterns): Adjust. (prefetch): Adjust. * config/rs6000/rs6000.opt (mpowerpc): Replace by stub option. (mno-powerpc): Delete. * config/rs6000/sync.md (load_locked<ATOMIC:mode>): Adjust. (store_conditional<ATOMIC:mode>): Adjust. (atomic_compare_and_swap<ATOMIC:mode>): Adjust. (atomic_exchange<ATOMIC:mode>): Adjust. (atomic_<fetchop_name><ATOMIC:mode>): Adjust. (atomic_nand<ATOMIC:mode>): Adjust. (atomic_fetch_<fetchop_name><ATOMIC:mode>): Adjust. (atomic_fetch_nand<ATOMIC:mode>): Adjust. (atomic_<fetchop_name>_fetch<ATOMIC:mode>): Adjust. (atomic_nand_fetch<ATOMIC:mode>): Adjust. * config/rs6000/sysv4.h (TARGET_DEFAULT): Delete MASK_POWERPC. * config/rs6000/sysv4le.h (TARGET_DEFAULT): Ditto. * config/rs6000/vxworks.h (TARGET_DEFAULT): Ditto. * doc/invoke.texi: Adjust documentation. From-SVN: r190430
2012-08-08i386-common.c (OPTION_MASK_ISA_ADX_SET): New.Michael Zolotukhin1-0/+15
ChangeLog: 2012-08-08 Michael Zolotukhin <michael.v.zolotukhin@intel.com> * common/config/i386/i386-common.c (OPTION_MASK_ISA_ADX_SET): New. (OPTION_MASK_ISA_ADX_UNSET): Likewise. (ix86_handle_option): Handle madx option. * config.gcc (i[34567]86-*-*): Add adxintrin.h. (x86_64-*-*): Likewise. * config/i386/adxintrin.h: New header. * config/i386/driver-i386.c (host_detect_local_cpu): Detect ADCX/ADOX support. * config/i386/i386-builtin-types.def (UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED): New function type. (UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG): Likewise. * config/i386/i386-c.c: Define __ADX__ if needed. * config/i386/i386.c (ix86_target_string): Define -madx option. (PTA_ADX): New. (ix86_option_override_internal): Handle new option. (ix86_valid_target_attribute_inner_p): Add OPT_madx. (ix86_builtins): Add IX86_BUILTIN_ADDCARRYX32, IX86_BUILTIN_ADDCARRYX64. (ix86_init_mmx_sse_builtins): Define corresponding built-ins. (ix86_expand_builtin): Handle these built-ins. (ix86_expand_args_builtin): Handle new function types. * config/i386/i386.h (TARGET_ADX): New. * config/i386/i386.md (adcx<mode>3): New define_insn. * config/i386/i386.opt (madx): New. * config/i386/x86intrin.h: Include adxintrin.h. testsuite/ChangeLog: * gcc.target/i386/adx-addcarryx32-1.c: New. * gcc.target/i386/adx-addcarryx32-2.c: New. * gcc.target/i386/adx-addcarryx64-1.c: New. * gcc.target/i386/adx-addcarryx64-2.c: New. * gcc.target/i386/adx-check.h: New. * gcc.target/i386/i386.exp (check_effective_target_adx): New. * gcc.target/i386/sse-12.c: Add -madx. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. From-SVN: r190227
2012-07-30i386-common.c (OPTION_MASK_ISA_RDSEED_SET): New.Kirill Yukhin1-0/+15
/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_RDSEED_SET): New. (OPTION_MASK_ISA_RDSEED_UNSET): Likewise. (ix86_handle_option): Handle mrdseed option. * config.gcc (i[34567]86-*-*): Add rdseedintrin.h. (x86_64-*-*): Likewise. * config/i386/prfchwintrin.h: New header. * config/i386/cpuid.h (bit_RDSEED): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect RDSEED support. * config/i386/i386-c.c: Define __RDSEED__ if needed. * config/i386/i386.c (ix86_target_string): Define -mrdseed option. (PTA_RDSEED): New. (ix86_option_override_internal): Handle new option. (ix86_valid_target_attribute_inner_p): Add OPT_mrdseed. (ix86_builtins): Add enum entries for RDSEED* builtins. (ix86_init_mmx_sse_builtins): Define new builtins. (ix86_expand_builtin): Expand RDSEED* builtins. * config/i386/i386.h (TARGET_RDSEED): New. * config/i386/i386.md (rdseed<mode>_1): New. * config/i386/i386.opt (mrdseed): New. * config/i386/x86intrin.h: Include rdseedintrin.h. testsuite/ * gcc.target/i386/rdseed16-1.c: New. * gcc.target/i386/rdseed32-1.c: Ditto * gcc.target/i386/rdseed64-1.c: Ditto * gcc.target/i386/sse-12.c: Add -mrdseed. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r189973
2012-07-27rs6000-common.c (rs6000_handle_option): Delete code for -mno-power, -mpower, ↵Segher Boessenkool1-27/+1
and -mpower2. 2012-07-26 Segher Boessenkool <segher@kernel.crashing.org> gcc/ * common/config/rs6000/rs6000-common.c (rs6000_handle_option): Delete code for -mno-power, -mpower, and -mpower2. * config/rs6000/aix43.h (NON_POWERPC_MASKS): Delete. (SUBTARGET_OVERRIDE_OPTIONS): Delete check for POWER together with -maix64. (ASM_CPU_SPEC): Delete support for POWER and POWER2. * config/rs6000/aix51.h (NON_POWERPC_MASKS): Delete. (SUBTARGET_OVERRIDE_OPTIONS): Delete check for POWER together with -maix64. (ASM_CPU_SPEC): Delete support for POWER and POWER2. * config/rs6000/aix52.h (NON_POWERPC_MASKS): Delete. (SUBTARGET_OVERRIDE_OPTIONS): Delete check for POWER together with -maix64. (TARGET_POWER): Delete. * config/rs6000/aix53.h (NON_POWERPC_MASKS): Delete. (SUBTARGET_OVERRIDE_OPTIONS): Delete check for POWER together with -maix64. (TARGET_POWER): Delete. * config/rs6000/aix61.h (NON_POWERPC_MASKS): Delete. (SUBTARGET_OVERRIDE_OPTIONS): Delete check for POWER together with -maix64. (TARGET_POWER): Delete. * config/rs6000/darwin.h (TARGET_POWER): Delete. * config/rs6000/driver-rs6000.c (struct asm_names): Delete support for -mpower, -mpower2, and -mno-power. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise. (rs6000_cpu_cpp_builtins): Likewise. * config/rs6000/rs6000-cpus.def: Likewise. * config/rs6000/rs6000-tables.opt: Regenerate. * config/rs6000/rs6000.c (POWER_MASKS): Delete. (rs6000_option_override_internal): Adjust. (rs6000_conditional_register_usage): Adjust. (rs6000_emit_move): Adjust. (rs6000_common_init_builtins): Adjust. (rs6000_init_libfuncs): Adjust. (rs6000_output_function_prologue): Adjust. (rs6000_adjust_cost): Adjust. (struct rs6000_opt_masks): Delete MASK_POWER and MASK_POWER2. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Delete support for POWER and POWER2. (TARGET_DEFAULT): Adjust. (PROCESSOR_POWER): Delete. (SHIFT_COUNT_TRUNCATED): Adjust. * config/rs6000/rs6000.md (extendqisi2): Delete POWER support. (extendqisi2_power): Delete. (extendqisi2_no_power): Adjust. (extendqihi2, extendqihi2_power, extendqihi2_no_power): Likewise. (sminsi3, smaxsi3, uminsi3, umaxsi3): Adjust. (anonymous doz insn patterns): Delete. (abssi2): Adjust. (abssi2_power): Delete. (abssi2_nopower): Adjust. (nabs_power, nabs_nopower): Likewise. (mulsi3, mulsi3_mq, mulsi3_no_mq, mulsi3_mq_internal1): Likewise. Delete anonymous post-reload splitter. (mulsi3_no_mq_internal1): rename to... (mulsi3_internal1): New define_insn. (mulsi3_mq_internal2, mulsi3_no_mq_internal2, mulsi3_internal2): Likewise. (divmodsi4, divmodsi4_internal, udiv<mode>3, udivsi3_mq, udivsi3_no_mq, udivsi3, div<mode>3, divsi3_mq, div<mode>3_no_mq, udivmodsi4_normal, udivmodsi4_tests, udivmodsi4): Likewise. (mulh_call, mull_call, divss_call, divus_call, quoss_call, quous_call): Likewise. (maskir_internal1, maskir_internal2, maskir_internal3, maskir_internal4, maskir_internal5, maskir_internal6, maskir_internal7, maskir_internal8): Delete. (ashlsi3, ashlsi3_power, ashlsi3_no_power): Adjust. (anonymous sl insn patterns): Delete. (lshrsi3, lshrsi3_power, lshrsi3_no_power): Adjust. (lshrsi3_64): Adjust. (anonymous sr insn patterns): Delete. (anonymous rrib insn patterns): Delete. (ashrsi3, ashrsi3_power, ashrsi3_no_power): Adjust. (anonymous sra insn patterns): Delete. (sqrtsf2, sqrtdf2, sqrtdf2_fpr): Adjust. (fix_trunc<mode>si2, fix_trunc<mode>si2_internal, fctiwz_<mode>): Adjust. (mulsidi3, mulsidi3_mq, mulsidi3_no_mq, umulsidi3, umulsidi3_mq, umulsidi3_no_mq, smulsi3_highpart, smulsi3_highpart_mq, smulsi3_highpart_no_mq, umulsi3_highpart, umulsi3_highpart_mq, umulsi3_highpart_no_mq): Adjust. (ashldi3_power, lshrdi3_power, ashrdi3_power): Delete. (ashrdi3_no_power, ashldi3, ashldi3_internal1, lshrdi3_internal1): Adjust. (fix_trunctfsi2, fix_trunctfsi2_fprs): Adjust. (movti_power): Delete. (movti_string): Adjust. (stmsi8, stmsi7, stmsi6, stmsi5, stmsi4, stmsi3): Adjust. (stmsi8_power, stmsi7_power, stmsi6_power, stmsi5_power, stmsi4_power, stmsi3_power): Delete. (anonymous movmemsi insn patterns): Adjust. (lfq_power2, stfq_power2): Delete. (eq<mode>, eq<mode>_compare): Adjust. (eqsi_power): Delete. (ne0si): Adjust. (anonymous le, lt, ge, gt insn patterns): Delete. * config/rs6000/rs6000.opt (mpower, mno-power, mpower2): Delete. * config/rs6000/sysv4.h (TARGET_POWER): Delete. * config/rs6000/t-aix43 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES, MULTILIB_MATCHES): Adjust. * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mpower, -mno-power, -mpower2, -mno-power2 documentation. Delete -mcpu=power and -mcpu=power2 documentation. gcc/testsuite/ * gcc.target/powerpc/rs6000-power2-1.c: Delete. * gcc.target/powerpc/rs6000-power2-2.c: Delete. From-SVN: r189908
2012-07-25Changelog entry:Kirill Yukhin1-0/+15
2012-07-25 Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> * common/config/i386/i386-common.c (OPTION_MASK_ISA_PRFCHW_SET): New. (OPTION_MASK_ISA_PRFCHW_UNSET): Likewise. (ix86_handle_option): Handle mprfchw option. * config.gcc (i[34567]86-*-*): Add prfchwintrin.h. (x86_64-*-*): Likewise. * config/i386/prfchwintrin.h: New header. * config/i386/cpuid.h (bit_PRFCHW): New. (bit_BMI): Formatting fix. (bit_HLE): Likewise. (bit_RTM): Likewise. * config/i386/driver-i386.c (host_detect_local_cpu): Detect PREFETCHW support. * config/i386/i386-c.c: Define __PRFCHW__ if needed. * config/i386/i386.c (ix86_target_string): Define -mprfchw option. Formatting fixes. (PTA_HLE): Formatting fix. (PTA_PRFCHW): New. (ix86_option_override_internal): Handle new option. (ix86_valid_target_attribute_inner_p): Add OPT_mprfchw. * config/i386/i386.h (TARGET_PRFCHW): New. * config/i386/i386.md (prefetch): Enable for TARGET_PRFCHW. * config/i386/i386.opt (mprfchw): New. * config/i386/mm3dnow.h: Move _m_prefetchw from here to prfchwintrin.h. * config/i386/x86intrin.h: Include prfchwintrin.h. testsuite/Changelog entry: 2012-07-24 Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> * gcc.target/i386/prefetchw-1.c: New. * gcc.target/i386/sse-12.c: Add -mprfchw. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r189844
generated by cgit v1.1 at 2025-09-23 19:59:58 +0000