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When we have a REG_DEAD note for a reg that is set in the new I2, we
drop the note on the floor (we cannot find whether to place it on I2
or on I3). But the code I added to do this has a bug and does not
always actually drop it. This patch fixes it.
But that on its own is too pessimistic, it turns out, and we generate
worse code. One case where we do know where to place the note is if
it came from I3 (it should go to I3 again). Doing this fixes all of
the regressions.
PR rtl-optimization/64682
PR rtl-optimization/69567
PR rtl-optimization/69737
PR rtl-optimization/82683
* combine.c (distribute_notes) <REG_DEAD>: If the new I2 sets the same
register mentioned in the note, drop the note, unless it came from I3,
in which case it should go to I3 again.
From-SVN: r254315
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This patch stops combine from changing the mode of an existing register
in-place if doing so would change the size of the underlying register
allocation size, as given by REGMODE_NATURAL_SIZE. Without this,
many tests fail in adjust_reg_mode after SVE is added. One example
is gcc.c-torture/compile/20090401-1.c.
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (can_change_dest_mode): Reject changes in
REGMODE_NATURAL_SIZE.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254291
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This patch uses df_read_modify_subreg_p to check whether writing
to a subreg would preserve some of the existing contents.
This has the effect of putting more emphasis on the
REGMODE_NATURAL_SIZE-based definition of whether something can be
partially modified, instead of using UNITS_PER_WORD unconditionally.
This becomes important for SVE, where UNITS_PER_WORD has no
significance for subregs of multi-register LD2/ST2, LD3/ST3 and
LD4/ST4 tuples.
2017-10-26 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* caller-save.c (mark_referenced_regs): Use read_modify_subreg_p.
* combine.c (find_single_use_1): Likewise.
(expand_field_assignment): Likewise.
(move_deaths): Likewise.
* lra-constraints.c (simplify_operand_subreg): Likewise.
(curr_insn_transform): Likewise.
* lra.c (collect_non_operand_hard_regs): Likewise.
(add_regs_to_insn_regno_info): Likewise.
* rtlanal.c (reg_referenced_p): Likewise.
(covers_regno_no_parallel_p): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254110
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rtx_equal_for_field_assignment_p had:
x = adjust_address_nv (x, GET_MODE (y),
-subreg_lowpart_offset (GET_MODE (x),
GET_MODE (y)));
But subreg_lowpart_offset returns an unsigned int and
adjust_address_nv takes a HWI, so a subreg offset of 4 would
give a memory offset of 0x00000000fffffffffc.
2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* combine.c (rtx_equal_for_field_assignment_p): Use
byte_lowpart_offset.
From-SVN: r253997
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This patch is like the earlier GET_MODE_UNIT_SIZE one,
but for precisions rather than sizes. There is one behavioural
change in expand_debug_expr: we shouldn't use lowpart subregs
for non-scalar truncations, since that would just reinterpret
some of the scalars and drop the rest. (This probably doesn't
trigger in practice.) Using TRUNCATE is fine for scalars,
since simplify_gen_unary knows when a subreg can be used.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* cfgexpand.c (expand_debug_expr): Use GET_MODE_UNIT_PRECISION.
(expand_debug_source_expr): Likewise.
* combine.c (combine_simplify_rtx): Likewise.
* cse.c (fold_rtx): Likewise.
* optabs.c (expand_float): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253991
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This patch uses HWI_COMPUTABLE_MODE_P (X) instead of
GET_MODE_PRECISION (X) <= HOST_BITS_PER_WIDE_INT in cases
where X also needs to be a scalar integer.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_comparison): Use HWI_COMPUTABLE_MODE_P.
(record_promoted_value): Likewise.
* expr.c (expand_expr_real_2): Likewise.
* ree.c (update_reg_equal_equiv_notes): Likewise.
(combine_set_extension): Likewise.
* rtlanal.c (low_bitmask_len): Likewise.
* simplify-rtx.c (neg_const_int): Likewise.
(simplify_binary_operation_1): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253990
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https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
A proposal is to introduce a target independent flag
-fcf-protection=[none|branch|return|full] with a semantic to
instrument a code to control validness or integrity of control-flow
transfers using jump and call instructions. The main goal is to detect
and block a possible malware execution through transfer the execution
to unknown target address. Implementation could be either software or
target based. Any target platforms can provide their implementation
for instrumentation under this option.
The compiler should instrument any control-flow transfer points in a
program (ex. call/jmp/ret) as well as any landing pads, which are
targets of control-flow transfers.
A new 'nocf_check' attribute is introduced to provide hand tuning
support. The attribute directs the compiler to skip a call to a
function and a function's landing pad from instrumentation. The
attribute can be used for function and pointer to function types,
otherwise it will be ignored.
Currently all platforms except i386 will report the error and do no
instrumentation. i386 will provide the implementation based on a
specification published by Intel for a new technology called
Control-flow Enforcement Technology (CET).
gcc/c-family/
* c-attribs.c (handle_nocf_check_attribute): New function.
(c_common_attribute_table): Add 'nocf_check' handling.
gcc/c/
* gimple-parser.c: Add second argument NULL to
gimple_build_call_from_tree.
gcc/
* attrib.c (comp_type_attributes): Check nocf_check attribute.
* cfgexpand.c (expand_call_stmt): Set REG_CALL_NOCF_CHECK for
call insn.
* combine.c (distribute_notes): Add REG_CALL_NOCF_CHECK handling.
* common.opt: Add fcf-protection flag.
* emit-rtl.c (try_split): Add REG_CALL_NOCF_CHECK handling.
* flag-types.h: Add enum cf_protection_level.
* gimple.c (gimple_build_call_from_tree): Add second parameter.
Add 'nocf_check' attribute propagation to gimple call.
* gimple.h (gf_mask): Add GF_CALL_NOCF_CHECK.
(gimple_build_call_from_tree): Update prototype.
(gimple_call_nocf_check_p): New function.
(gimple_call_set_nocf_check): Likewise.
* gimplify.c: Add second argument to gimple_build_call_from_tree.
* ipa-icf.c: Add nocf_check attribute in statement hash.
* recog.c (peep2_attempt): Add REG_CALL_NOCF_CHECK handling.
* reg-notes.def: Add REG_NOTE (CALL_NOCF_CHECK).
* toplev.c (process_options): Add flag_cf_protection handling.
From-SVN: r253936
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2017-10-18 Martin Liska <mliska@suse.cz>
* combine.c (simplify_compare_const): Add gcc_fallthrough.
From-SVN: r253853
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This patch stops combine from changing the mode of an existing register
in-place if doing so would change the size of the underlying register
allocation size, as given by REGMODE_NATURAL_SIZE. Without this,
many tests fail in adjust_reg_mode after SVE is added. One example
is gcc.c-torture/compile/20090401-1.c.
2017-10-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (can_change_dest_mode): Reject changes in
REGMODE_NATURAL_SIZE.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253717
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This patch is like the previous GET_MODE_UNIT_SIZE one,
but for bit rather than byte sizes.
2017-10-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* cfgexpand.c (expand_debug_expr): Use GET_MODE_UNIT_BITSIZE.
(expand_debug_source_expr): Likewise.
* combine.c (combine_simplify_rtx): Likewise.
* cse.c (fold_rtx): Likewise.
* fwprop.c (canonicalize_address): Likewise.
* targhooks.c (default_shift_truncation_mask): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253716
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This patch uses byte_lowpart_offset in places that open-coded the
calculation.
2017-10-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* caller-save.c (replace_reg_with_saved_mem): Use byte_lowpart_offset.
* combine.c (gen_lowpart_for_combine): Likewise.
* dwarf2out.c (rtl_for_decl_location): Likewise.
* final.c (alter_subreg): Likewise.
* rtlhooks.c (gen_lowpart_general): Likewise.
(gen_lowpart_if_possible): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r253714
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* combine.c (combine_validate_cost): Compute the new insn_cost,
not just pattern_cost.
(try_combine): Adjust comment.
From-SVN: r253561
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This replaces insn_rtx_cost with insn_cost if an insn is readily
available, and with pattern_cost otherwise.
* cfgrtl.c (rtl_account_profile_record): Replace insn_rtx_cost with
insn_cost.
* combine.c (uid_insn_cost): Adjust comment.
(combine_validate_cost): Adjust comment. Use pattern_cost instead
of insn_rtx_cost
(combine_instructions): Use insn_cost instead of insn_rtx_cost.
* dse.c (find_shift_sequence): Ditto.
* ifcvt.c (cheap_bb_rtx_cost_p): Ditto.
(bb_valid_for_noce_process_p): Use pattern_cost.
* rtl.h (insn_rtx_cost): Delete.
(pattern_cost): New prototype.
(insn_cost): New prototype.
* rtlanal.c (insn_rtx_cost): Rename to...
(pattern_cost): ... this.
(insn_cost): New.
From-SVN: r253560
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powerpc BE targets)
PR target/82386
* combine.c (combine_instructions): Don't combine in unreachable
basic blocks.
* gcc.dg/pr82386.c: New test.
From-SVN: r253378
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bit-field)
PR rtl-optimization/82192
* combine.c (make_extraction): Don't look through non-paradoxical
SUBREGs or TRUNCATE if pos + len is or might be bigger than
inner's mode.
* gcc.c-torture/execute/pr82192.c: New test.
From-SVN: r252824
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I'm not sure the documentation is correct that outprec is always less
than inprec, and each non-default implementation tested for the case
in which it wasn't, but the patch leaves it as-is.
The SH port had a couple of TRULY_NOOP_TRUNCATION tests that were left
over from the old shmedia port.
2017-09-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayard <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (truly_noop_truncation): New hook.
(mode_rep_extended): Refer to TARGET_TRULY_NOOP_TRUNCATION rather
than TRULY_NOOP_TRUNCATION.
* hooks.h (hook_bool_uint_uint_true): Declare.
* hooks.c (hook_bool_uint_uint_true): New function.
* doc/tm.texi.in (TRULY_NOOP_TRUNCATION): Replace with...
(TARGET_TRULY_NOOP_TRUNCATION): ...this.
* doc/tm.texi: Regenerate.
* combine.c (make_extraction): Refer to TARGET_TRULY_NOOP_TRUNCATION
rather than TRULY_NOOP_TRUNCATION in comments.
(simplify_comparison): Likewise.
(record_truncated_value): Likewise.
* expmed.c (extract_bit_field_1): Likewise.
(extract_split_bit_field): Likewise.
* convert.c (convert_to_integer_1): Use targetm.truly_noop_truncation
instead of TRULY_NOOP_TRUNCATION.
* function.c (assign_parm_setup_block): Likewise.
* machmode.h (TRULY_NOOP_TRUNCATION_MODES_P): Likewise.
* rtlhooks.c: Include target.h.
* config/aarch64/aarch64.h (TRULY_NOOP_TRUNCATION): Delete.
* config/alpha/alpha.h (TRULY_NOOP_TRUNCATION): Delete.
* config/arc/arc.h (TRULY_NOOP_TRUNCATION): Delete.
* config/arm/arm.h (TRULY_NOOP_TRUNCATION): Delete.
* config/avr/avr.h (TRULY_NOOP_TRUNCATION): Delete.
* config/bfin/bfin.h (TRULY_NOOP_TRUNCATION): Delete.
* config/c6x/c6x.h (TRULY_NOOP_TRUNCATION): Delete.
* config/cr16/cr16.h (TRULY_NOOP_TRUNCATION): Delete.
* config/cris/cris.h (TRULY_NOOP_TRUNCATION): Delete.
* config/epiphany/epiphany.h (TRULY_NOOP_TRUNCATION): Delete.
* config/fr30/fr30.h (TRULY_NOOP_TRUNCATION): Delete.
* config/frv/frv.h (TRULY_NOOP_TRUNCATION): Delete.
* config/ft32/ft32.h (TRULY_NOOP_TRUNCATION): Delete.
* config/h8300/h8300.h (TRULY_NOOP_TRUNCATION): Delete.
* config/i386/i386.h (TRULY_NOOP_TRUNCATION): Delete.
* config/ia64/ia64.h (TRULY_NOOP_TRUNCATION): Delete.
* config/iq2000/iq2000.h (TRULY_NOOP_TRUNCATION): Delete.
* config/lm32/lm32.h (TRULY_NOOP_TRUNCATION): Delete.
* config/m32c/m32c.h (TRULY_NOOP_TRUNCATION): Delete.
* config/m32r/m32r.h (TRULY_NOOP_TRUNCATION): Delete.
* config/m68k/m68k.h (TRULY_NOOP_TRUNCATION): Delete.
* config/mcore/mcore.h (TRULY_NOOP_TRUNCATION): Delete.
* config/microblaze/microblaze.h (TRULY_NOOP_TRUNCATION): Delete.
* config/mips/mips.h (TRULY_NOOP_TRUNCATION): Delete.
* config/mips/mips.c (mips_truly_noop_truncation): New function.
(TARGET_TRULY_NOOP_TRUNCATION): Redefine.
* config/mips/mips.md: Refer to TARGET_TRULY_NOOP_TRUNCATION
rather than TRULY_NOOP_TRUNCATION in comments.
* config/mmix/mmix.h (TRULY_NOOP_TRUNCATION): Delete.
* config/mn10300/mn10300.h (TRULY_NOOP_TRUNCATION): Delete.
* config/moxie/moxie.h (TRULY_NOOP_TRUNCATION): Delete.
* config/msp430/msp430.h (TRULY_NOOP_TRUNCATION): Delete.
* config/nds32/nds32.h (TRULY_NOOP_TRUNCATION): Delete.
* config/nios2/nios2.h (TRULY_NOOP_TRUNCATION): Delete.
* config/nvptx/nvptx.h (TRULY_NOOP_TRUNCATION): Delete.
* config/pa/pa.h (TRULY_NOOP_TRUNCATION): Delete.
* config/pdp11/pdp11.h (TRULY_NOOP_TRUNCATION): Delete.
* config/powerpcspe/powerpcspe.h (TRULY_NOOP_TRUNCATION): Delete.
* config/riscv/riscv.h (TRULY_NOOP_TRUNCATION): Delete.
* config/riscv/riscv.md: Refer to TARGET_TRULY_NOOP_TRUNCATION
rather than TRULY_NOOP_TRUNCATION in comments.
* config/rl78/rl78.h (TRULY_NOOP_TRUNCATION): Delete.
* config/rs6000/rs6000.h (TRULY_NOOP_TRUNCATION): Delete.
* config/rx/rx.h (TRULY_NOOP_TRUNCATION): Delete.
* config/s390/s390.h (TRULY_NOOP_TRUNCATION): Delete.
* config/sh/sh.h (MAYBE_BASE_REGISTER_RTX_P): Remove
TRULY_NOOP_TRUNCATION condition.
(MAYBE_INDEX_REGISTER_RTX_P): Likewise.
(TRULY_NOOP_TRUNCATION): Delete.
* config/sparc/sparc.h (TRULY_NOOP_TRUNCATION): Delete.
* config/spu/spu.h (TRULY_NOOP_TRUNCATION): Delete.
* config/spu/spu.c (spu_truly_noop_truncation): New function.
(TARGET_TRULY_NOOP_TRUNCATION): Redefine.
* config/stormy16/stormy16.h (TRULY_NOOP_TRUNCATION): Delete.
* config/tilegx/tilegx.h (TRULY_NOOP_TRUNCATION): Delete.
* config/tilegx/tilegx.c (tilegx_truly_noop_truncation): New fuction.
(TARGET_TRULY_NOOP_TRUNCATION): Redefine.
* config/tilegx/tilegx.md: Refer to TARGET_TRULY_NOOP_TRUNCATION
rather than TRULY_NOOP_TRUNCATION in comments.
* config/tilepro/tilepro.h (TRULY_NOOP_TRUNCATION): Delete.
* config/v850/v850.h (TRULY_NOOP_TRUNCATION): Delete.
* config/vax/vax.h (TRULY_NOOP_TRUNCATION): Delete.
* config/visium/visium.h (TRULY_NOOP_TRUNCATION): Delete.
* config/xtensa/xtensa.h (TRULY_NOOP_TRUNCATION): Delete.
* system.h (TRULY_NOOP_TRUNCATION): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252818
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This also seemed like a good opportunity to reverse the sense of the
hook to "can", to avoid the awkward double negative in !CANNOT.
2017-09-15 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayard <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (can_change_mode_class): New hook.
(mode_rep_extended): Refer to it instead of CANNOT_CHANGE_MODE_CLASS.
(hard_regno_nregs): Likewise.
* hooks.h (hook_bool_mode_mode_reg_class_t_true): Declare.
* hooks.c (hook_bool_mode_mode_reg_class_t_true): New function.
* doc/tm.texi.in (CANNOT_CHANGE_MODE_CLASS): Replace with...
(TARGET_CAN_CHANGE_MODE_CLASS): ...this.
(LOAD_EXTEND_OP): Update accordingly.
* doc/tm.texi: Regenerate.
* doc/rtl.texi: Refer to TARGET_CAN_CHANGE_MODE_CLASS instead of
CANNOT_CHANGE_MODE_CLASS.
* hard-reg-set.h (REG_CANNOT_CHANGE_MODE_P): Replace with...
(REG_CAN_CHANGE_MODE_P): ...this new macro.
* combine.c (simplify_set): Update accordingly.
* emit-rtl.c (validate_subreg): Likewise.
* recog.c (general_operand): Likewise.
* regcprop.c (mode_change_ok): Likewise.
* reload1.c (choose_reload_regs): Likewise.
(inherit_piecemeal_p): Likewise.
* rtlanal.c (simplify_subreg_regno): Likewise.
* postreload.c (reload_cse_simplify_set): Use REG_CAN_CHANGE_MODE_P
instead of CANNOT_CHANGE_MODE_CLASS.
(reload_cse_simplify_operands): Likewise.
* reload.c (push_reload): Use targetm.can_change_mode_class
instead of CANNOT_CHANGE_MODE_CLASS.
(push_reload): Likewise. Also use REG_CAN_CHANGE_MODE_P instead of
REG_CANNOT_CHANGE_MODE_P.
* config/alpha/alpha.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/alpha/alpha.c (alpha_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/arm/arm.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(arm_can_change_mode_class): New function.
* config/arm/neon.md: Refer to TARGET_CAN_CHANGE_MODE_CLASS rather
than CANNOT_CHANGE_MODE_CLASS in comments.
* config/i386/i386.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/i386/i386-protos.h (ix86_cannot_change_mode_class): Delete.
* config/i386/i386.c (ix86_cannot_change_mode_class): Replace with...
(ix86_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/ia64/ia64.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/ia64/ia64.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(ia64_can_change_mode_class): New function.
* config/m32c/m32c.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/m32c/m32c-protos.h (m32c_cannot_change_mode_class): Delete.
* config/m32c/m32c.c (m32c_cannot_change_mode_class): Replace with...
(m32c_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/mips/mips.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/mips/mips-protos.h (mips_cannot_change_mode_class): Delete.
* config/mips/mips.c (mips_cannot_change_mode_class): Replace with...
(mips_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/msp430/msp430.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/msp430/msp430.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(msp430_can_change_mode_class): New function.
* config/nvptx/nvptx.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/nvptx/nvptx.c (nvptx_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/pa/pa32-regs.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/pa/pa64-regs.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/pa/pa-protos.h (pa_cannot_change_mode_class): Delete.
* config/pa/pa.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(pa_cannot_change_mode_class): Replace with...
(pa_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(pa_modes_tieable_p): Refer to TARGET_CAN_CHANGE_MODE_CLASS rather
than CANNOT_CHANGE_MODE_CLASS in comments.
* config/pdp11/pdp11.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/pdp11/pdp11-protos.h (pdp11_cannot_change_mode_class): Delete.
* config/pdp11/pdp11.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(pdp11_cannot_change_mode_class): Replace with...
(pdp11_can_change_mode_class): ...this new function, inverting the
sense of the return value.
* config/powerpcspe/powerpcspe.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/powerpcspe/powerpcspe-protos.h
(rs6000_cannot_change_mode_class_ptr): Delete.
* config/powerpcspe/powerpcspe.c
(rs6000_cannot_change_mode_class_ptr): Delete.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(rs6000_option_override_internal): Assign to
targetm.can_change_mode_class instead of
rs6000_cannot_change_mode_class_ptr.
(rs6000_cannot_change_mode_class): Replace with...
(rs6000_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(rs6000_debug_cannot_change_mode_class): Replace with...
(rs6000_debug_can_change_mode_class): ...this new function.
* config/riscv/riscv.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/riscv/riscv.c (riscv_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/rs6000/rs6000.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/rs6000/rs6000-protos.h (rs6000_cannot_change_mode_class_ptr):
Delete.
* config/rs6000/rs6000.c (rs6000_cannot_change_mode_class_ptr): Delete.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(rs6000_option_override_internal): Assign to
targetm.can_change_mode_class instead of
rs6000_cannot_change_mode_class_ptr.
(rs6000_cannot_change_mode_class): Replace with...
(rs6000_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(rs6000_debug_cannot_change_mode_class): Replace with...
(rs6000_debug_can_change_mode_class): ...this new function.
* config/s390/s390.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/s390/s390-protos.h (s390_cannot_change_mode_class): Delete.
* config/s390/s390.c (s390_cannot_change_mode_class): Replace with...
(s390_can_change_mode_class): ...this new function, inverting the
sense of the return value.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/sh/sh.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/sh/sh-protos.h (sh_cannot_change_mode_class): Delete.
* config/sh/sh.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(sh_cannot_change_mode_class): Replace with...
(sh_can_change_mode_class): ...this new function, inverting the
sense of the return value.
* config/sparc/sparc.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/sparc/sparc.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(sparc_can_change_mode_class): New function.
* config/spu/spu.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/spu/spu.c (spu_can_change_mode_class): New function.
(TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
* config/visium/visium.h (CANNOT_CHANGE_MODE_CLASS): Delete.
* config/visium/visium.c (TARGET_CAN_CHANGE_MODE_CLASS): Redefine.
(visium_can_change_mode_class): New function.
* system.h (CANNOT_CHANGE_MODE_CLASS): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252816
|
|
From-SVN: r252751
|
|
This patch converts hard_regno_nregs into an inline function, which
in turn allows hard_regno_nregs to be used as the name of a targetm
field. This is just a mechanical change.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* regs.h (hard_regno_nregs): Turn into a function.
(end_hard_regno): Update accordingly.
* caller-save.c (setup_save_areas): Likewise.
(save_call_clobbered_regs): Likewise.
(replace_reg_with_saved_mem): Likewise.
(insert_restore): Likewise.
(insert_save): Likewise.
* combine.c (can_change_dest_mode): Likewise.
(move_deaths): Likewise.
(distribute_notes): Likewise.
* config/mips/mips.c (mips_hard_regno_call_part_clobbered): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_cannot_change_mode_class)
(rs6000_split_multireg_move): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_memory_move_cost): Likewise.
* config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Likewise.
(rs6000_split_multireg_move): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_memory_move_cost): Likewise.
* cselib.c (cselib_reset_table): Likewise.
(cselib_lookup_1): Likewise.
* emit-rtl.c (set_mode_and_regno): Likewise.
* function.c (aggregate_value_p): Likewise.
* ira-color.c (setup_profitable_hard_regs): Likewise.
(check_hard_reg_p): Likewise.
(calculate_saved_nregs): Likewise.
(assign_hard_reg): Likewise.
(improve_allocation): Likewise.
(calculate_spill_cost): Likewise.
* ira-emit.c (modify_move_list): Likewise.
* ira-int.h (ira_hard_reg_set_intersection_p): Likewise.
(ira_hard_reg_in_set_p): Likewise.
* ira.c (setup_reg_mode_hard_regset): Likewise.
(clarify_prohibited_class_mode_regs): Likewise.
(check_allocation): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
(lra_setup_reg_renumber): Likewise.
(setup_try_hard_regno_pseudos): Likewise.
(spill_for): Likewise.
(assign_hard_regno): Likewise.
(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
* lra-constraints.c (in_class_p): Likewise.
(lra_constraint_offset): Likewise.
(simplify_operand_subreg): Likewise.
(lra_constraints): Likewise.
(split_reg): Likewise.
(split_if_necessary): Likewise.
(invariant_p): Likewise.
(inherit_in_ebb): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* lra-remat.c (reg_overlap_for_remat_p): Likewise.
(get_hard_regs): Likewise.
(do_remat): Likewise.
* lra-spills.c (assign_spill_hard_regs): Likewise.
* mode-switching.c (create_pre_exit): Likewise.
* postreload.c (reload_combine_recognize_pattern): Likewise.
* recog.c (peep2_find_free_register): Likewise.
* regcprop.c (kill_value_regno): Likewise.
(set_value_regno): Likewise.
(copy_value): Likewise.
(maybe_mode_change): Likewise.
(find_oldest_value_reg): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* regrename.c (check_new_reg_p): Likewise.
(regrename_do_replace): Likewise.
* reload.c (push_reload): Likewise.
(combine_reloads): Likewise.
(find_dummy_reload): Likewise.
(operands_match_p): Likewise.
(find_reloads): Likewise.
(find_equiv_reg): Likewise.
(reload_adjust_reg_for_mode): Likewise.
* reload1.c (count_pseudo): Likewise.
(count_spilled_pseudo): Likewise.
(find_reg): Likewise.
(clear_reload_reg_in_use): Likewise.
(free_for_value_p): Likewise.
(allocate_reload_reg): Likewise.
(choose_reload_regs): Likewise.
(reload_adjust_reg_for_temp): Likewise.
(emit_reload_insns): Likewise.
(delete_output_reload): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* sched-deps.c (sched_analyze_reg): Likewise.
* sel-sched.c (init_regs_for_mode): Likewise.
(mark_unavailable_hard_regs): Likewise.
(choose_best_reg_1): Likewise.
(verify_target_availability): Likewise.
* valtrack.c (dead_debug_insert_temp): Likewise.
* var-tracking.c (track_loc_p): Likewise.
(emit_note_insn_var_location): Likewise.
* varasm.c (make_decl_rtl): Likewise.
* reginfo.c (choose_hard_reg_mode): Likewise.
(init_reg_modes_target): Refer directly to
this_target_regs->x_hard_regno_nregs.
From-SVN: r252014
|
|
This patch converts more places that could use int_mode_for_size instead
of mode_for_size. This is in preparation for an upcoming patch that
makes mode_for_size itself return an opt_mode.
require () seems like the right choice in expand_builtin_powi
because we have got past the point of backing out. We go on to do:
op1 = expand_expr (arg1, NULL_RTX, mode2, EXPAND_NORMAL);
if (GET_MODE (op1) != mode2)
op1 = convert_to_mode (mode2, op1, 0);
which would be invalid for (and have failed for) BLKmode.
In get_builtin_sync_mode and expand_ifn_atomic_compare_exchange,
the possible bitsizes are {8, 16, 32, 64, 128}, all of which give
target-independent integer modes (up to TImode). The comment above
the call in get_builtin_sync_mode makes clear that an integer mode
must be found.
We can use require () in expand_builtin_atomic_clear and
expand_builtin_atomic_test_and_set because there's always an integer
mode for the boolean type. The same goes for the POINTER_SIZE request
in layout_type. Similarly we can use require () in combine_instructions
and gen_lowpart_common because there's always an integer mode for
HOST_BITS_PER_WIDE_INT (DImode when BITS_PER_UNIT == 8), and
HOST_BITS_PER_DOUBLE_INT (TImode).
The calls in aarch64_function_value, arm_function_value,
aapcs_allocate_return_reg and mips_function_value_1 are handling
cases in which a big-endian target passes or returns values at
the most significant end of a register. In each case the ABI
constrains the size to a small amount and does not handle
non-power-of-2 sizes wider than a word.
The calls in c6x_expand_movmem, i386.c:emit_memset,
lm32_block_move_inline, microblaze_block_move_straight and
mips_block_move_straight are dealing with expansions of
block memory operations using register-wise operations,
and those registers must have non-BLK mode.
The reason for using require () in ix86_expand_sse_cmp,
mips_expand_ins_as_unaligned_store, spu.c:adjust_operand and
spu_emit_branch_and_set is that we go on to emit non-call
instructions that use registers of that mode, which wouldn't
be valid for BLKmode.
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* builtins.c (expand_builtin_powi): Use int_mode_for_size.
(get_builtin_sync_mode): Likewise.
(expand_ifn_atomic_compare_exchange): Likewise.
(expand_builtin_atomic_clear): Likewise.
(expand_builtin_atomic_test_and_set): Likewise.
(fold_builtin_atomic_always_lock_free): Likewise.
* calls.c (compute_argument_addresses): Likewise.
(emit_library_call_value_1): Likewise.
(store_one_arg): Likewise.
* combine.c (combine_instructions): Likewise.
* config/aarch64/aarch64.c (aarch64_function_value): Likewise.
* config/arm/arm.c (arm_function_value): Likewise.
(aapcs_allocate_return_reg): Likewise.
* config/c6x/c6x.c (c6x_expand_movmem): Likewise.
* config/i386/i386.c (construct_container): Likewise.
(ix86_gimplify_va_arg): Likewise.
(ix86_expand_sse_cmp): Likewise.
(emit_memmov): Likewise.
(emit_memset): Likewise.
(expand_small_movmem_or_setmem): Likewise.
(ix86_expand_pextr): Likewise.
(ix86_expand_pinsr): Likewise.
* config/lm32/lm32.c (lm32_block_move_inline): Likewise.
* config/microblaze/microblaze.c (microblaze_block_move_straight):
Likewise.
* config/mips/mips.c (mips_function_value_1) Likewise.
(mips_block_move_straight): Likewise.
(mips_expand_ins_as_unaligned_store): Likewise.
* config/powerpcspe/powerpcspe.c
(rs6000_darwin64_record_arg_advance_flush): Likewise.
(rs6000_darwin64_record_arg_flush): Likewise.
* config/rs6000/rs6000.c
(rs6000_darwin64_record_arg_advance_flush): Likewise.
(rs6000_darwin64_record_arg_flush): Likewise.
* config/sparc/sparc.c (sparc_function_arg_1): Likewise.
(sparc_function_value_1): Likewise.
* config/spu/spu.c (adjust_operand): Likewise.
(spu_emit_branch_or_set): Likewise.
(arith_immediate_p): Likewise.
* emit-rtl.c (gen_lowpart_common): Likewise.
* expr.c (expand_expr_real_1): Likewise.
* function.c (assign_parm_setup_block): Likewise.
* gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise.
* reload1.c (alter_reg): Likewise.
* stor-layout.c (mode_for_vector): Likewise.
(layout_type): Likewise.
gcc/ada/
* gcc-interface/utils2.c (build_load_modify_store):
Use int_mode_for_size.
From-SVN: r251726
|
|
2017-09-04 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (modes_tieable_p): New hook.
* doc/tm.texi (MODES_TIEABLE_P): Replace with...
(TARGET_MODES_TIEABLE_P): ...this.
* doc/tm.texi.in: Regenerate.
* hooks.h (hook_bool_mode_mode_true): Declare.
* hooks.c (hook_bool_mode_mode_true): New function.
* combine.c (subst): Use targetm.modes_tieable_p instead of
MODES_TIEABLE_P.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (extract_low_bits): Likewise.
* lower-subreg.c: Include target.h.
(find_decomposable_subregs): Use targetm.modes_tieable_p instead of
MODES_TIEABLE_P.
* rtlanal.c (rtx_cost): Likewise.
* config/aarch64/aarch64.h (MODES_TIEABLE_P): Delete.
* config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): Delete.
* config/aarch64/aarch64.c (aarch64_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/alpha/alpha.h (MODES_TIEABLE_P): Delete.
* config/alpha/alpha.c (alpha_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/arc/arc.h (MODES_TIEABLE_P): Delete.
* config/arc/arc.c (TARGET_MODES_TIEABLE_P): Redefine.
(arc_modes_tieable_p): New function.
* config/arm/arm.h (MODES_TIEABLE_P): Delete.
* config/arm/arm-protos.h (arm_modes_tieable_p): Delete.
* config/arm/arm.c (TARGET_MODES_TIEABLE_P): Redefine.
(arm_modes_tieable_p): Make static.
* config/avr/avr.h (MODES_TIEABLE_P): Delete.
* config/bfin/bfin.h (MODES_TIEABLE_P): Delete.
* config/bfin/bfin.c (bfin_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/c6x/c6x.h (MODES_TIEABLE_P): Delete.
* config/c6x/c6x.c (c6x_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/cr16/cr16.h (MODES_TIEABLE_P): Delete.
* config/cr16/cr16.c (TARGET_MODES_TIEABLE_P): Redefine.
(cr16_modes_tieable_p): New function.
* config/cris/cris.h (MODES_TIEABLE_P): Delete.
* config/epiphany/epiphany.h (MODES_TIEABLE_P): Delete.
* config/fr30/fr30.h (MODES_TIEABLE_P): Delete.
(TRULY_NOOP_TRUNCATION): Update comment.
* config/frv/frv.h (MODES_TIEABLE_P): Delete.
(TRULY_NOOP_TRUNCATION): Update comment.
* config/frv/frv.c (TARGET_MODES_TIEABLE_P): Redefine.
(frv_modes_tieable_p): New function.
* config/ft32/ft32.h (MODES_TIEABLE_P): Delete.
* config/h8300/h8300.h (MODES_TIEABLE_P): Delete.
* config/h8300/h8300.c (h8300_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/i386/i386.h (MODES_TIEABLE_P): Delete.
* config/i386/i386-protos.h (ix86_modes_tieable_p): Delete.
* config/i386/i386.c (ix86_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/ia64/ia64.h (MODES_TIEABLE_P): Delete.
* config/ia64/ia64.c (TARGET_MODES_TIEABLE_P): Redefine.
(ia64_modes_tieable_p): New function.
* config/iq2000/iq2000.h (MODES_TIEABLE_P): Delete.
* config/iq2000/iq2000.c (TARGET_MODES_TIEABLE_P): Redefine.
(iq2000_modes_tieable_p): New function.
* config/lm32/lm32.h (MODES_TIEABLE_P): Delete.
* config/lm32/lm32.c (TARGET_MODES_TIEABLE_P): Redefine.
(lm32_modes_tieable_p): New function.
* config/m32c/m32c.h (MODES_TIEABLE_P): Delete.
* config/m32c/m32c-protos.h (m32c_modes_tieable_p): Delete.
* config/m32c/m32c.c (m32c_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/m32r/m32r.h (MODES_TIEABLE_P): Delete.
* config/m32r/m32r.c (TARGET_MODES_TIEABLE_P): Redefine.
(m32r_modes_tieable_p): New function.
* config/m68k/m68k.h (MODES_TIEABLE_P): Delete.
* config/m68k/m68k.c (TARGET_MODES_TIEABLE_P): Redefine.
(m68k_modes_tieable_p): New function.
* config/mcore/mcore.h (MODES_TIEABLE_P): Delete.
* config/mcore/mcore.c (TARGET_MODES_TIEABLE_P): Redefine.
(mcore_modes_tieable_p): New function.
* config/microblaze/microblaze.h (MODES_TIEABLE_P): Delete.
* config/microblaze/microblaze.c (microblaze_modes_tieable_p): New
function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/mips/mips.h (MODES_TIEABLE_P): Delete.
* config/mips/mips-protos.h (mips_modes_tieable_p): Delete.
* config/mips/mips.c (mips_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/mmix/mmix.h (MODES_TIEABLE_P): Delete.
* config/mn10300/mn10300.h (MODES_TIEABLE_P): Delete.
* config/mn10300/mn10300-protos.h (mn10300_modes_tieable): Delete.
* config/mn10300/mn10300.c (mn10300_modes_tieable): Rename to...
(mn10300_modes_tieable_p): ...this and make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/moxie/moxie.h (MODES_TIEABLE_P): Delete.
* config/msp430/msp430.h (MODES_TIEABLE_P): Delete.
* config/msp430/msp430-protos.h (msp430_modes_tieable_p): Delete.
* config/msp430/msp430.c (TARGET_MODES_TIEABLE_P): Redefine.
(msp430_modes_tieable_p): Make static.
* config/nds32/nds32.h (MODES_TIEABLE_P): Delete.
* config/nds32/nds32.c (nds32_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/nios2/nios2.h (MODES_TIEABLE_P): Delete.
* config/nvptx/nvptx.h (MODES_TIEABLE_P): Delete.
* config/nvptx/nvptx.c (nvptx_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/pa/pa.h (MODES_TIEABLE_P): Delete.
* config/pa/pa-protos.h (pa_modes_tieable_p): Delete.
* config/pa/pa.c (pa_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/pdp11/pdp11.h (MODES_TIEABLE_P): Delete.
* config/pdp11/pdp11.c (TARGET_MODES_TIEABLE_P): Redefine.
(pdp11_modes_tieable_p): New function.
* config/powerpcspe/powerpcspe.h (MODES_TIEABLE_P): Delete.
* config/powerpcspe/powerpcspe.c (TARGET_MODES_TIEABLE_P): Redefine.
(rs6000_modes_tieable_p): New function.
(rs6000_debug_reg_global): Use it instead of MODES_TIEABLE_P.
* config/powerpcspe/powerpcspe.md: Update comment.
* config/riscv/riscv.h (MODES_TIEABLE_P): Delete.
* config/riscv/riscv.c (riscv_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/rl78/rl78.h (MODES_TIEABLE_P): Delete.
* config/rl78/rl78.c (TARGET_MODES_TIEABLE_P): Redefine.
(rl78_modes_tieable_p): New function.
* config/rs6000/rs6000.h (MODES_TIEABLE_P): Delete.
* config/rs6000/rs6000.c (TARGET_MODES_TIEABLE_P): Redefine.
(rs6000_modes_tieable_p): New function.
(rs6000_debug_reg_global): Use it instead of MODES_TIEABLE_P.
* config/rs6000/rs6000.md: Update comment.
* config/rx/rx.h (MODES_TIEABLE_P): Delete.
* config/rx/rx.c (rx_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/s390/s390.h (MODES_TIEABLE_P): Delete.
* config/s390/s390.c (s390_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/sh/sh.h (MODES_TIEABLE_P): Delete.
* config/sh/sh.c (TARGET_MODES_TIEABLE_P): Redefine.
(sh_modes_tieable_p): New function.
* config/sparc/sparc.h (MODES_TIEABLE_P): Delete.
* config/sparc/sparc-protos.h (sparc_modes_tieable_p): Delete.
* config/sparc/sparc.c (TARGET_MODES_TIEABLE_P): Redefine.
(sparc_modes_tieable_p): Make static.
* config/spu/spu.h (MODES_TIEABLE_P): Delete.
* config/spu/spu.c (spu_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/stormy16/stormy16.h (MODES_TIEABLE_P): Delete.
* config/stormy16/stormy16.c (xstormy16_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/tilegx/tilegx.h (MODES_TIEABLE_P): Delete.
* config/tilepro/tilepro.h (MODES_TIEABLE_P): Delete.
* config/v850/v850.h (MODES_TIEABLE_P): Delete.
* config/v850/v850.c (v850_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/vax/vax.h (MODES_TIEABLE_P): Delete.
* config/visium/visium.h (MODES_TIEABLE_P): Delete.
* config/visium/visium.c (TARGET_MODES_TIEABLE_P): Redefine.
(visium_modes_tieable_p): New function.
* config/xtensa/xtensa.h (MODES_TIEABLE_P): Delete.
* config/xtensa/xtensa.c (TARGET_MODES_TIEABLE_P): Redefine.
(xtensa_modes_tieable_p): New function.
* system.h (MODES_TIEABLE_P): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251647
|
|
2017-09-04 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (hard_regno_mode_ok): New hook.
* doc/tm.texi (HARD_REGNO_MODE_OK): Replace with...
(TARGET_HARD_REGNO_MODE_OK): ...this.
* doc/tm.texi.in: Regenerate.
* hooks.h (hook_bool_uint_mode_true): Declare.
* hooks.c (hook_bool_uint_mode_true): New function.
* doc/md.texi: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* genpreds.c (write_insn_preds_c): Add an include of target.h.
* alias.c (init_alias_target): Use targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* caller-save.c: Include target.h.
(reg_save_code): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* combine.c (can_combine_p): Likewise.
(combinable_i3pat): Likewise.
(can_change_dest_mode): Likewise.
* expr.c (init_expr_target): Likewise.
(convert_move): Likewise.
(convert_modes): Likewise.
* ira.c (setup_prohibited_class_mode_regs): Likewise.
(setup_prohibited_mode_move_regs): Likewise.
* ira.h (target_ira): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (process_alt_operands): Likewise.
(split_reg): Likewise.
* recog.c (peep2_find_free_register): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* regcprop.c (maybe_mode_change): Likewise.
* reginfo.c (init_reg_sets_1): Likewise.
(choose_hard_reg_mode): Likewise.
(simplifiable_subregs): Likewise.
* regrename.c (check_new_reg_p): Likewise.
* reload.c (find_valid_class): Likewise.
(find_valid_class_1): Likewise.
(reload_inner_reg_of_subreg): Likewise.
(push_reload): Likewise.
(combine_reloads): Likewise.
(find_dummy_reload): Likewise.
(find_reloads): Likewise.
* reload1.c (find_reg): Likewise.
(set_reload_reg): Likewise.
(allocate_reload_reg): Likewise.
(choose_reload_regs): Likewise.
(reload_adjust_reg_for_temp): Likewise.
* rtlanal.c (subreg_size_offset_from_lsb): Likewise.
(simplify_subreg_regno): Likewise.
* sel-sched.c (init_regs_for_mode): Likewise.
* varasm.c (make_decl_rtl): Likewise.
* config/aarch64/aarch64.h (HARD_REGNO_MODE_OK): Delete.
(MODES_TIEABLE_P): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/aarch64/aarch64-protos.h (aarch64_hard_regno_mode_ok): Delete.
* config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/alpha/alpha.h (HARD_REGNO_MODE_OK): Delete.
* config/alpha/alpha.c (alpha_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/arc/arc.h (arc_hard_regno_mode_ok): Delete.
(arc_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/arc/arc.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(arc_hard_regno_mode_ok): Rename old array to...
(arc_hard_regno_mode_ok_modes): ...this.
(arc_conditional_register_usage): Update accordingly.
(arc_mode_class): Make static.
(arc_hard_regno_mode_ok): New function.
* config/arm/arm.h (HARD_REGNO_MODE_OK): Delete.
* config/arm/arm-protos.h (arm_hard_regno_mode_ok): Delete.
* config/arm/arm.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(arm_hard_regno_mode_ok): Make static.
* config/arm/arm.md (movdi): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/avr/avr-protos.h (avr_hard_regno_mode_ok): Delete.
* config/avr/avr.h (HARD_REGNO_MODE_OK): Delete.
* config/avr/avr.c (avr_hard_regno_mode_ok): Make static and
return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/bfin/bfin-protos.h (hard_regno_mode_ok): Delete.
* config/bfin/bfin.h (HARD_REGNO_MODE_OK): Delete.
* config/bfin/bfin.c (hard_regno_mode_ok): Rename to...
(bfin_hard_regno_mode_ok): ...this. Make static and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/bfin/predicates.md (valid_reg_operand): Use
targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK.
* config/c6x/c6x.h (HARD_REGNO_MODE_OK): Delete.
* config/c6x/c6x.c (c6x_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/cr16/cr16.h (HARD_REGNO_MODE_OK): Delete.
* config/cr16/cr16-protos.h (cr16_hard_regno_mode_ok): Delete.
* config/cr16/cr16.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(cr16_hard_regno_mode_ok): Make static and return a bool.
* config/cris/cris.h (HARD_REGNO_MODE_OK): Delete.
* config/cris/cris.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(cris_hard_regno_mode_ok): New function.
* config/epiphany/epiphany.h (epiphany_hard_regno_mode_ok): Delete.
(epiphany_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/epiphany/epiphany-protos.h (hard_regno_mode_ok): Delete.
* config/epiphany/epiphany.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(hard_regno_mode_ok): Rename to...
(epiphany_hard_regno_mode_ok): ...this. Make static and return a bool.
* config/fr30/fr30.h (HARD_REGNO_MODE_OK): Delete.
* config/fr30/fr30.md: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/frv/frv.h (HARD_REGNO_MODE_OK): Delete.
* config/frv/frv-protos.h (frv_hard_regno_mode_ok): Delete.
* config/frv/frv.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(frv_hard_regno_mode_ok): Make static and return a bool.
* config/frv/frv.md: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/ft32/ft32.h (HARD_REGNO_MODE_OK): Delete.
* config/h8300/h8300.h (HARD_REGNO_MODE_OK): Delete.
* config/h8300/h8300-protos.h (h8300_hard_regno_mode_ok): Delete.
* config/h8300/h8300.c (h8300_hard_regno_mode_ok): Make static
and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/i386/i386.h (HARD_REGNO_MODE_OK): Delete.
* config/i386/i386-protos.h (ix86_hard_regno_mode_ok): Delete.
* config/i386/i386.c (ix86_hard_regno_mode_ok): Make static and
return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/ia64/ia64.h (HARD_REGNO_MODE_OK): Delete.
* config/ia64/ia64.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(ia64_hard_regno_mode_ok): New function.
* config/iq2000/iq2000.h (HARD_REGNO_MODE_OK): Delete.
* config/iq2000/iq2000.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(iq2000_hard_regno_mode_ok): New function.
* config/lm32/lm32.h (HARD_REGNO_MODE_OK): Delete.
* config/lm32/lm32.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(lm32_hard_regno_mode_ok): New function.
* config/m32c/m32c.h (HARD_REGNO_MODE_OK): Delete.
* config/m32c/m32c-protos.h (m32c_hard_regno_ok): Delete.
* config/m32c/m32c.c (class_can_hold_mode): Use m32c_hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
(m32c_hard_regno_ok): Rename to...
(m32c_hard_regno_mode_ok): ...this. Make static and return a bool.
(m32c_cannot_change_mode_class): Update accordingly.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/m32r/m32r.h (m32r_hard_regno_mode_ok): Delete.
(m32r_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/m32r/m32r.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(m32r_hard_regno_mode_ok): Rename to...
(m32r_hard_regno_modes): ...this.
(m32r_mode_class): Make static.
(m32r_hard_regno_mode_ok): New function.
* config/m68k/m68k.h (HARD_REGNO_MODE_OK): Delete.
* config/m68k/m68k-protos.h (m68k_regno_mode_ok): Delete.
* config/m68k/m68k.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(m68k_hard_regno_mode_ok): Make static.
* config/mcore/mcore.h (HARD_REGNO_MODE_OK): Delete.
* config/mcore/mcore.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(mcore_hard_regno_mode_ok): New function.
* config/microblaze/microblaze.h (microblaze_hard_regno_mode_ok)
(HARD_REGNO_MODE_OK): Delete.
* config/microblaze/microblaze.c (microblaze_hard_regno_mode_ok):
Rename to...
(microblaze_hard_regno_mode_ok_p): ...this and make static.
(microblaze_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/mips/mips.h (HARD_REGNO_MODE_OK): Delete.
(mips_hard_regno_mode_ok): Delete.
* config/mips/mips.c (mips_hard_regno_mode_ok): Rename to...
(mips_hard_regno_mode_ok_p): ...this and make static.
(mips_hard_regno_mode_ok_p): Rename to...
(mips_hard_regno_mode_ok_uncached): ...this.
(mips_hard_regno_mode_ok): New function.
(mips_class_max_nregs): Use mips_hard_regno_mode_ok instead
of HARD_REGNO_MODE_OK.
(mips_option_override): Update after above name changes.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/mmix/mmix.h (HARD_REGNO_MODE_OK): Delete.
* config/mn10300/mn10300.h (HARD_REGNO_MODE_OK): Delete.
* config/mn10300/mn10300-protos.h (mn10300_hard_regno_mode_ok): Delete.
* config/mn10300/mn10300.c (mn10300_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/moxie/moxie.h (HARD_REGNO_MODE_OK): Delete.
* config/msp430/msp430.h (HARD_REGNO_MODE_OK): Delete.
* config/msp430/msp430-protos.h (msp430_hard_regno_mode_ok): Delete.
* config/msp430/msp430.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(msp430_hard_regno_mode_ok): Make static and return a bool.
* config/nds32/nds32.h (HARD_REGNO_MODE_OK): Delete.
* config/nds32/nds32-protos.h (nds32_hard_regno_mode_ok): Delete.
* config/nds32/nds32.c (nds32_hard_regno_mode_ok): Make static
and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/nios2/nios2.h (HARD_REGNO_MODE_OK): Delete.
* config/nvptx/nvptx.h (HARD_REGNO_MODE_OK): Delete.
* config/pa/pa.h (MODES_TIEABLE_P): Update commentary.
* config/pa/pa32-regs.h (HARD_REGNO_MODE_OK): Rename to...
(PA_HARD_REGNO_MODE_OK): ...this
* config/pa/pa64-regs.h (HARD_REGNO_MODE_OK): Rename to...
(PA_HARD_REGNO_MODE_OK): ...this.
* config/pa/pa.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(pa_hard_regno_mode_ok): New function.
* config/pdp11/pdp11.h (HARD_REGNO_MODE_OK): Delete.
* config/pdp11/pdp11.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(pdp11_hard_regno_mode_ok): New function.
* config/powerpcspe/powerpcspe.h (HARD_REGNO_MODE_OK): Delete.
* config/powerpcspe/powerpcspe-protos.h (rs6000_hard_regno_mode_ok_p):
Delete.
* config/powerpcspe/powerpcspe.c (rs6000_hard_regno_mode_ok_p):
Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(rs6000_hard_regno_mode_ok): Rename to...
(rs6000_hard_regno_mode_ok_uncached): ...this.
(rs6000_init_hard_regno_mode_ok): Update accordingly.
(rs6000_hard_regno_mode_ok): New function.
* config/riscv/riscv.h (HARD_REGNO_MODE_OK): Delete.
* config/riscv/riscv-protos.h (riscv_hard_regno_mode_ok_p): Delete.
* config/riscv/riscv.c (riscv_hard_regno_mode_ok_p): Rename to...
(riscv_hard_regno_mode_ok): ...this and make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/rl78/rl78.h (HARD_REGNO_MODE_OK): Delete.
* config/rl78/rl78-protos.h (rl78_hard_regno_mode_ok): Delete.
* config/rl78/rl78.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(rl78_hard_regno_mode_ok): Make static and return bool.
* config/rs6000/rs6000.h (HARD_REGNO_MODE_OK): Delete.
* config/rs6000/rs6000-protos.h (rs6000_hard_regno_mode_ok_p):
Delete.
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok_p): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(rs6000_hard_regno_mode_ok): Rename to...
(rs6000_hard_regno_mode_ok_uncached): ...this.
(rs6000_init_hard_regno_mode_ok): Update accordingly.
(rs6000_hard_regno_mode_ok): New function.
* config/rx/rx.h (HARD_REGNO_MODE_OK): Delete.
* config/rx/rx.c (rx_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/s390/s390.h (HARD_REGNO_MODE_OK): Delete.
* config/s390/s390-protos.h (s390_hard_regno_mode_ok): Delete.
* config/s390/s390.c (s390_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/sh/sh.h (HARD_REGNO_MODE_OK): Delete.
* config/sh/sh-protos.h (sh_hard_regno_mode_ok): Delete.
* config/sh/sh.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(sh_hard_regno_mode_ok): Make static.
* config/sparc/constraints.md: Refer to targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* config/sparc/sparc.h (hard_regno_mode_classes): Delete.
(sparc_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/sparc/sparc.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(hard_regno_mode_classes): Make static.
(sparc_mode_class): Likewise.
(sparc_hard_regno_mode_ok): New function.
* config/spu/spu.h (HARD_REGNO_MODE_OK): Delete.
* config/stormy16/stormy16.h (HARD_REGNO_MODE_OK): Delete.
* config/stormy16/stormy16.c (xstormy16_hard_regno_mode_ok): New
function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/tilegx/tilegx.h (HARD_REGNO_MODE_OK): Delete.
* config/tilepro/tilepro.h (HARD_REGNO_MODE_OK): Delete.
* config/v850/v850.h (HARD_REGNO_MODE_OK): Delete.
* config/v850/v850.c (v850_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/vax/vax.h (HARD_REGNO_MODE_OK): Delete.
* config/visium/visium.h (HARD_REGNO_MODE_OK): Delete.
* config/visium/visium.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(visium_hard_regno_mode_ok): New function.
* config/visium/visium.md: Refer to targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* config/xtensa/xtensa.h (xtensa_hard_regno_mode_ok): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/xtensa/xtensa.c (xtensa_hard_regno_mode_ok): Rename to...
(xtensa_hard_regno_mode_ok_p): ...this and make static.
(xtensa_option_override): Update accordingly.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(xtensa_hard_regno_mode_ok): New function.
* system.h (HARD_REGNO_MODE_OK): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251646
|
|
With the testcase in the PR, with all the command line options mentioned
there, a (comparison) instruction becomes dead in fwprop1 but is not
deleted until all the way in rtl_dce.
Before combine this insn look like:
20: flags:CC=cmp(r106:DI,0xffffffffffffffff)
REG_DEAD r106:DI
REG_UNUSED flags:CC
REG_EQUAL cmp(0,0xffffffffffffffff)
(note the only output is unused).
Combining some earlier insns gives
13: r106:DI=0
14: r105:DI=r101:DI+r103:DI
14+13+20 then gives
(parallel [
(set (reg:CC 17 flags)
(compare:CC (const_int 0 [0])
(const_int -1 [0xffffffffffffffff])))
(set (reg:DI 105)
(plus:DI (reg/v:DI 101 [ e ])
(reg:DI 103)))
])
which doesn't match; but the set of flags is dead, so combine makes the
set of r105 the whole new instruction, which it then places at i3. But
that is wrong, because r105 is used after i2 but before i3! We forget
to check for that in this case.
This patch fixes it.
PR rtl-optimization/82024
* combine.c (try_combine): If the combination result is a PARALLEL,
and we only need to retain the SET in there that would be placed
at I2, check that we can place that at I3 instead, before doing so.
From-SVN: r251607
|
|
This patch adds a partial_subreg_p predicate to go alongside
paradoxical_subreg_p.
Like the paradoxical_subreg_p patch, this one replaces some tests that
were based on GET_MODE_SIZE rather than GET_MODE_PRECISION. In each
case the change should be a no-op or an improvement.
The regcprop.c patch prevents some replacements of the 82-bit RFmode
with the 80-bit XFmode on ia64. I don't understand the target details
here particularly well, but from the way the modes are described in
ia64-modes.def, it isn't valid to assume that an XFmode can carry an
RFmode payload. A comparison of the testsuite assembly output for one
target per CPU showed no other differences.
Some of the places changed here are tracking the widest access mode
found for a register. The series tries to standardise on:
if (partial_subreg_p (widest_seen, new_mode))
widest_seen = new_mode;
rather than:
if (paradoxical_subreg_p (new_mode, widest_seen))
widest_seen = new_mode;
Either would have been OK.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (partial_subreg_p): New function.
* caller-save.c (save_call_clobbered_regs): Use it.
* calls.c (expand_call): Likewise.
* combine.c (combinable_i3pat): Likewise.
(simplify_set): Likewise.
(make_extraction): Likewise.
(make_compound_operation_int): Likewise.
(gen_lowpart_or_truncate): Likewise.
(force_to_mode): Likewise.
(make_field_assignment): Likewise.
(reg_truncated_to_mode): Likewise.
(record_truncated_value): Likewise.
(move_deaths): Likewise.
* cse.c (record_jump_cond): Likewise.
(cse_insn): Likewise.
* cselib.c (cselib_lookup_1): Likewise.
* expmed.c (extract_bit_field_using_extv): Likewise.
* function.c (assign_parm_setup_reg): Likewise.
* ifcvt.c (noce_convert_multiple_sets): Likewise.
* ira-build.c (create_insn_allocnos): Likewise.
* lra-coalesce.c (merge_pseudos): Likewise.
* lra-constraints.c (match_reload): Likewise.
(simplify_operand_subreg): Likewise.
(curr_insn_transform): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* lra.c (new_insn_reg): Likewise.
(lra_substitute_pseudo): Likewise.
* regcprop.c (mode_change_ok): Likewise.
(maybe_mode_change): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* reload.c (push_reload): Likewise.
(find_reloads): Likewise.
(find_reloads_subreg_address): Likewise.
* reload1.c (alter_reg): Likewise.
(eliminate_regs_1): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251536
|
|
This patch changes the types of various things from machine_mode
to scalar_int_mode, in cases where (after previous patches)
simply changing the type is enough on its own. The patch does
nothing other than that.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* builtins.h (builtin_strncpy_read_str): Take a scalar_int_mode
instead of a machine_mode.
(builtin_memset_read_str): Likewise.
* builtins.c (c_readstr): Likewise.
(builtin_memcpy_read_str): Likewise.
(builtin_strncpy_read_str): Likewise.
(builtin_memset_read_str): Likewise.
(builtin_memset_gen_str): Likewise.
(expand_builtin_signbit): Use scalar_int_mode for local variables.
* cfgexpand.c (convert_debug_memory_address): Take a scalar_int_mode
instead of a machine_mode.
* combine.c (simplify_if_then_else): Use scalar_int_mode for local
variables.
(make_extraction): Likewise.
(try_widen_shift_mode): Take and return scalar_int_modes instead
of machine_modes.
* config/aarch64/aarch64.c (aarch64_libgcc_cmp_return_mode): Return
a scalar_int_mode instead of a machine_mode.
* config/avr/avr.c (avr_addr_space_address_mode): Likewise.
(avr_addr_space_pointer_mode): Likewise.
* config/cr16/cr16.c (cr16_unwind_word_mode): Likewise.
* config/msp430/msp430.c (msp430_addr_space_pointer_mode): Likewise.
(msp430_unwind_word_mode): Likewise.
* config/spu/spu.c (spu_unwind_word_mode): Likewise.
(spu_addr_space_pointer_mode): Likewise.
(spu_addr_space_address_mode): Likewise.
(spu_libgcc_cmp_return_mode): Likewise.
(spu_libgcc_shift_count_mode): Likewise.
* config/rl78/rl78.c (rl78_addr_space_address_mode): Likewise.
(rl78_addr_space_pointer_mode): Likewise.
(fl78_unwind_word_mode): Likewise.
(rl78_valid_pointer_mode): Take a scalar_int_mode instead of a
machine_mode.
* config/alpha/alpha.c (vms_valid_pointer_mode): Likewise.
* config/ia64/ia64.c (ia64_vms_valid_pointer_mode): Likewise.
* config/mips/mips.c (mips_mode_rep_extended): Likewise.
(mips_valid_pointer_mode): Likewise.
* config/tilegx/tilegx.c (tilegx_mode_rep_extended): Likewise.
* config/ft32/ft32.c (ft32_valid_pointer_mode): Likewise.
(ft32_addr_space_pointer_mode): Return a scalar_int_mode instead
of a machine_mode.
(ft32_addr_space_address_mode): Likewise.
* config/m32c/m32c.c (m32c_valid_pointer_mode): Take a
scalar_int_mode instead of a machine_mode.
(m32c_addr_space_pointer_mode): Return a scalar_int_mode instead
of a machine_mode.
(m32c_addr_space_address_mode): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_abi_word_mode): Likewise.
(rs6000_eh_return_filter_mode): Likewise.
* config/rs6000/rs6000.c (rs6000_abi_word_mode): Likewise.
(rs6000_eh_return_filter_mode): Likewise.
* config/s390/s390.c (s390_libgcc_cmp_return_mode): Likewise.
(s390_libgcc_shift_count_mode): Likewise.
(s390_unwind_word_mode): Likewise.
(s390_valid_pointer_mode): Take a scalar_int_mode rather than a
machine_mode.
* target.def (mode_rep_extended): Likewise.
(valid_pointer_mode): Likewise.
(addr_space.valid_pointer_mode): Likewise.
(eh_return_filter_mode): Return a scalar_int_mode rather than
a machine_mode.
(libgcc_cmp_return_mode): Likewise.
(libgcc_shift_count_mode): Likewise.
(unwind_word_mode): Likewise.
(addr_space.pointer_mode): Likewise.
(addr_space.address_mode): Likewise.
* doc/tm.texi: Regenerate.
* dojump.c (prefer_and_bit_test): Take a scalar_int_mode rather than
a machine_mode.
(do_jump): Use scalar_int_mode for local variables.
* dwarf2cfi.c (init_return_column_size): Take a scalar_int_mode
rather than a machine_mode.
* dwarf2out.c (convert_descriptor_to_mode): Likewise.
(scompare_loc_descriptor_wide): Likewise.
(scompare_loc_descriptor_narrow): Likewise.
* emit-rtl.c (adjust_address_1): Use scalar_int_mode for local
variables.
* except.c (sjlj_emit_dispatch_table): Likewise.
(expand_builtin_eh_copy_values): Likewise.
* explow.c (convert_memory_address_addr_space_1): Likewise.
Take a scalar_int_mode rather than a machine_mode.
(convert_memory_address_addr_space): Take a scalar_int_mode rather
than a machine_mode.
(memory_address_addr_space): Use scalar_int_mode for local variables.
* expmed.h (expand_mult_highpart_adjust): Take a scalar_int_mode
rather than a machine_mode.
* expmed.c (mask_rtx): Likewise.
(init_expmed_one_conv): Likewise.
(expand_mult_highpart_adjust): Likewise.
(extract_high_half): Likewise.
(expmed_mult_highpart_optab): Likewise.
(expmed_mult_highpart): Likewise.
(expand_smod_pow2): Likewise.
(expand_sdiv_pow2): Likewise.
(emit_store_flag_int): Likewise.
(adjust_bit_field_mem_for_reg): Use scalar_int_mode for local
variables.
(extract_low_bits): Likewise.
* expr.h (by_pieces_constfn): Take a scalar_int_mode rather than
a machine_mode.
* expr.c (pieces_addr::adjust): Likewise.
(can_store_by_pieces): Likewise.
(store_by_pieces): Likewise.
(clear_by_pieces_1): Likewise.
(expand_expr_addr_expr_1): Likewise.
(expand_expr_addr_expr): Use scalar_int_mode for local variables.
(expand_expr_real_1): Likewise.
(try_casesi): Likewise.
* final.c (shorten_branches): Likewise.
* fold-const.c (fold_convert_const_int_from_fixed): Change the
type of "mode" to machine_mode.
* internal-fn.c (expand_arith_overflow_result_store): Take a
scalar_int_mode rather than a machine_mode.
(expand_mul_overflow): Use scalar_int_mode for local variables.
* loop-doloop.c (doloop_modify): Likewise.
(doloop_optimize): Likewise.
* optabs.c (expand_subword_shift): Take a scalar_int_mode rather
than a machine_mode.
(expand_doubleword_shift_condmove): Likewise.
(expand_doubleword_shift): Likewise.
(expand_doubleword_clz): Likewise.
(expand_doubleword_popcount): Likewise.
(expand_doubleword_parity): Likewise.
(expand_absneg_bit): Use scalar_int_mode for local variables.
(prepare_float_lib_cmp): Likewise.
* rtl.h (convert_memory_address_addr_space_1): Take a scalar_int_mode
rather than a machine_mode.
(convert_memory_address_addr_space): Likewise.
(get_mode_bounds): Likewise.
(get_address_mode): Return a scalar_int_mode rather than a
machine_mode.
* rtlanal.c (get_address_mode): Likewise.
* stor-layout.c (get_mode_bounds): Take a scalar_int_mode rather
than a machine_mode.
* targhooks.c (default_mode_rep_extended): Likewise.
(default_valid_pointer_mode): Likewise.
(default_addr_space_valid_pointer_mode): Likewise.
(default_eh_return_filter_mode): Return a scalar_int_mode rather
than a machine_mode.
(default_libgcc_cmp_return_mode): Likewise.
(default_libgcc_shift_count_mode): Likewise.
(default_unwind_word_mode): Likewise.
(default_addr_space_pointer_mode): Likewise.
(default_addr_space_address_mode): Likewise.
* targhooks.h (default_eh_return_filter_mode): Likewise.
(default_libgcc_cmp_return_mode): Likewise.
(default_libgcc_shift_count_mode): Likewise.
(default_unwind_word_mode): Likewise.
(default_addr_space_pointer_mode): Likewise.
(default_addr_space_address_mode): Likewise.
(default_mode_rep_extended): Take a scalar_int_mode rather than
a machine_mode.
(default_valid_pointer_mode): Likewise.
(default_addr_space_valid_pointer_mode): Likewise.
* tree-ssa-address.c (addr_for_mem_ref): Use scalar_int_mode for
local variables.
* tree-ssa-loop-ivopts.c (get_shiftadd_cost): Take a scalar_int_mode
rather than a machine_mode.
* tree-switch-conversion.c (array_value_type): Use scalar_int_mode
for local variables.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
* var-tracking.c (use_narrower_mode): Take a scalar_int_mode rather
than a machine_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251513
|
|
This patch uses scalar_int_modes for:
/* If I2 is setting a pseudo to a constant and I3 is setting some
sub-part of it to another constant, merge them by making a new
constant. */
This was already implicit, but the danger with checking only
CONST_SCALAR_INT_P is that it can include CC values too.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (try_combine): Use is_a <scalar_int_mode> when
trying to combine a full-register integer set with a subreg
integer set.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251510
|
|
The two implementations of the reg_nonzero_bits and reg_num_sign_bits
hooks ignored the "known_x", "known_mode" and "known_ret" arguments,
so this patch removes them. It adds a new scalar_int_mode parameter
that specifies the mode of "x". (This mode might be different from
"mode", which is the mode in which "x" is used.)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (rtl_hooks::reg_nonzero_bits): Add a scalar_int_mode
parameter for the mode of "x". Remove the "known_x", "known_mode"
and "known_ret" arguments. Change the type of the mode argument
to scalar_int_mode.
(rtl_hooks:reg_num_sign_bit_copies): Likewise.
* combine.c (reg_nonzero_bits_for_combine): Update accordingly.
(reg_num_sign_bit_copies_for_combine): Likewise.
* rtlanal.c (nonzero_bits1): Likewise.
(num_sign_bit_copies1): Likewise.
* rtlhooks-def.h (reg_nonzero_bits_general): Likewise.
(reg_num_sign_bit_copies_general): Likewise.
* rtlhooks.c (reg_num_sign_bit_copies_general): Likewise.
(reg_nonzero_bits_general): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251501
|
|
This patch passes the mode of the shifted value to extract_left_shift
and updates the only caller so that the mode is a scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (extract_left_shift): Add a mode argument and update
recursive calls.
(make_compound_operation_int): Change the type of the mode parameter
to scalar_int_mode and update the call to extract_left_shift.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251497
|
|
After previous patches, top-level calls to simplify_and_const_int
always pass a scalar_int_mode. The only call site that needs to
be updated is the recursive one in simplify_and_const_int_1,
at which point we know "varop" has a scalar integer mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_and_const_int): Change the type of the mode
parameter to scalar_int_mode.
(simplify_and_const_int_1): Likewise. Update recursive call.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251496
|
|
The main loop of simplify_comparison starts with:
if (GET_MODE_CLASS (mode) != MODE_INT
&& ! (mode == VOIDmode
&& (GET_CODE (op0) == COMPARE || COMPARISON_P (op0))))
break;
So VOIDmode is only acceptable when comparing a COMPARE,
EQ, NE, etc. operand against a constant. After this, the loop
calls simplify_compare_const to:
(a) bring the constant op1 closer to 0 where possible and
(b) use nonzero_bits and num_sign_bit_copies to get a simpler
constant.
(a) works for both integer and VOID modes, (b) is specific
to integer modes.
The loop then has a big switch statement that handles further
simplifications. This switch statement checks for COMPARISON_P
codes but not for COMPARE.
This patch uses scalar_int_mode to make the split between
(a) and (b) more explicit. It also takes the COMPARISON_P
handling out of the switch statement and does it first,
so that the rest of the loop can treat the mode as a
scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_compare_const): Check that the mode is a
scalar_int_mode (rather than VOIDmode) before testing its
precision.
(simplify_comparison): Move COMPARISON_P handling out of the
loop and restrict the latter part of the loop to scalar_int_modes.
Check is_a <scalar_int_mode> before calling HWI_COMPUTABLE_MODE_P
and when considering SUBREG_REGs. Use is_int_mode instead of
checking GET_MODE_CLASS against MODE_INT.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251495
|
|
This patch makes simplify_shift_const_1 use scalar_int_modes
for all code that is specific to scalars rather than vectors.
This includes situations in which the new shift mode is different
from the original one, since the function never changes the mode
of vector shifts. That in turn makes it more natural to test for
equal modes in simplify_shift_const_1 rather than try_widen_shift_mode
(which only applies to scalars).
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (try_widen_shift_mode): Move check for equal modes to...
(simplify_shift_const_1): ...here. Use scalar_int_mode for
shift_unit_mode and for modes involved in scalar shifts.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251494
|
|
force_to_mode exits partway through for modes that aren't scalar
integers. This patch splits the remainder of the function out
into a subroutine, force_int_to_mode, so that the modes from that
point on can have type scalar_int_mode.
The patch also makes sure that xmode is kept up-to-date with x
and uses xmode instead of GET_MODE (x) throughout.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (force_int_to_mode): New function, split out from...
(force_to_mode): ...here. Keep xmode up-to-date and use it
instead of GET_MODE (x).
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251493
|
|
insv, extv and eztzv modify or read a field in a register or
memory. The field always has a scalar integer mode, while the
register or memory either has a scalar integer mode or BLKmode.
The mode of the bit position is also a scalar integer.
This patch uses the type system to make that explicit.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* optabs-query.h (extraction_insn::struct_mode): Change type to
opt_scalar_int_mode and update comment.
(extraction_insn::field_mode): Change type to scalar_int_mode.
(extraction_insn::pos_mode): Likewise.
* combine.c (make_extraction): Update accordingly.
* optabs-query.c (get_traditional_extraction_insn): Likewise.
(get_optab_extraction_insn): Likewise.
* recog.c (simplify_while_replacing): Likewise.
* expmed.c (narrow_bit_field_mem): Change the type of the mode
parameter to opt_scalar_int_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251492
|
|
This patch adds asserting as_a <scalar_int_mode> conversions
to contexts in which the input is known to be a scalar integer mode.
In expand_divmod, op1 is always a scalar_int_mode if
op1_is_constant (but might not be otherwise).
In expand_binop, the patch reverses a < comparison in order to
avoid splitting a long line.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* cfgexpand.c (convert_debug_memory_address): Use
as_a <scalar_int_mode>.
* combine.c (expand_compound_operation): Likewise.
(make_extraction): Likewise.
(change_zero_ext): Likewise.
(simplify_comparison): Likewise.
* cse.c (cse_insn): Likewise.
* dwarf2out.c (minmax_loc_descriptor): Likewise.
(mem_loc_descriptor): Likewise.
(loc_descriptor): Likewise.
* expmed.c (init_expmed_one_mode): Likewise.
(synth_mult): Likewise.
(emit_store_flag_1): Likewise.
(expand_divmod): Likewise. Use HWI_COMPUTABLE_MODE_P instead
of a comparison with size.
* expr.c (expand_assignment): Use as_a <scalar_int_mode>.
(reduce_to_bit_field_precision): Likewise.
* function.c (expand_function_end): Likewise.
* internal-fn.c (expand_arith_overflow_result_store): Likewise.
* loop-doloop.c (doloop_modify): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_unop): Likewise.
(expand_copysign_absneg): Likewise.
(prepare_cmp_insn): Likewise.
(maybe_legitimize_operand): Likewise.
* recog.c (const_scalar_int_operand): Likewise.
* rtlanal.c (get_address_mode): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_cond_clz_ctz): Likewise.
* tree-nested.c (get_nl_goto_field): Likewise.
* tree.c (build_vector_type_for_mode): Likewise.
* var-tracking.c (use_narrower_mode): Likewise.
gcc/c-family/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* c-common.c (c_common_type_for_mode): Use as_a <scalar_int_mode>.
gcc/lto/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* lto-lang.c (lto_type_for_mode): Use as_a <scalar_int_mode>.
From-SVN: r251487
|
|
This patch adds is_a <scalar_int_mode> checks to various places
that were explicitly or implicitly restricted to integers already,
in cases where adding an explicit is_a <scalar_int_mode> is useful
for later patches.
In simplify_if_then_else, the:
GET_MODE (XEXP (XEXP (t, 0), N))
expressions were equivalent to:
GET_MODE (XEXP (t, 0))
due to the type of operation.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (sign_extend_short_imm): Add is_a <scalar_int_mode>
checks.
(try_combine): Likewise.
(simplify_if_then_else): Likewise.
* cse.c (cse_insn): Likewise.
* dwarf2out.c (mem_loc_descriptor): Likewise.
* emit-rtl.c (gen_lowpart_common): Likewise.
* simplify-rtx.c (simplify_truncation): Likewise.
(simplify_binary_operation_1): Likewise.
(simplify_const_relational_operation): Likewise.
(simplify_ternary_operation): Likewise.
* tree-ssa-loop-ivopts.c (force_expr_to_var_cost): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251480
|
|
This patch adds is_a <scalar_int_mode> checks to various places that
were optimising subregs or extractions in ways that only made sense
for scalar integers. Often the subreg transformations were looking
for extends, truncates or shifts and trying to remove the subreg, which
wouldn't be correct if the SUBREG_REG was a vector rather than a scalar.
The simplify_binary_operation_1 part also removes a redundant:
GET_MODE (opleft) == GET_MODE (XEXP (opright, 0))
since this must be true for:
(ior A (lshifrt B ...)) A == opleft, B == XEXP (opright, 0)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (find_split_point): Add is_a <scalar_int_mode> checks.
(make_compound_operation_int): Likewise.
(change_zero_ext): Likewise.
* expr.c (convert_move): Likewise.
(convert_modes): Likewise.
* fwprop.c (forward_propagate_subreg): Likewise.
* loop-iv.c (get_biv_step_1): Likewise.
* optabs.c (widen_operand): Likewise.
* postreload.c (move2add_valid_value_p): Likewise.
* recog.c (simplify_while_replacing): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise. Remove redundant
mode equality check.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251478
|
|
Explicitly check for scalar_int_mode in code that maps arithmetic
to full-mode bit operations. These operations wouldn't work correctly
for vector modes, for example. In many cases this is enforced also by
checking whether an operand is CONST_INT_P, but there were other cases
where the condition is more indirect.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (combine_simplify_rtx): Add checks for
is_a <scalar_int_mode>.
(simplify_if_then_else): Likewise.
(make_field_assignment): Likewise.
(simplify_comparison): Likewise.
* ifcvt.c (noce_try_bitop): Likewise.
* loop-invariant.c (canonicalize_address_mult): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251477
|
|
This patch replaces some checks against VOIDmode with checks
of is_a <scalar_int_mode>, in cases where scalar integer modes
were the only useful alternatives left.
gcc/
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* cfgexpand.c (expand_debug_expr): Use is_a <scalar_int_mode>
instead of != VOIDmode.
* combine.c (if_then_else_cond): Likewise.
(change_zero_ext): Likewise.
* dwarf2out.c (mem_loc_descriptor): Likewise.
(loc_descriptor): Likewise.
* rtlanal.c (canonicalize_condition): Likewise.
* simplify-rtx.c (simplify_relational_operation_1): Likewise.
From-SVN: r251475
|
|
This patch replaces checks of "SCALAR_INT_MODE_P (...)" with
"is_a <scalar_int_mode> (..., &var)" in cases where it becomes
useful to refer to the mode as a scalar_int_mode. It also
replaces some checks for the two constituent classes (MODE_INT
and MODE_PARTIAL_INT).
The patch also introduces is_a <scalar_int_mode> checks for some
uses of HWI_COMPUTABLE_MODE_P, which is a subcondition of
SCALAR_INT_MODE_P.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* wide-int.h (int_traits<unsigned char>) New class.
(int_traits<unsigned short>) Likewise.
* cfgexpand.c (expand_debug_expr): Use is_a <scalar_int_mode>.
Use GET_MODE_UNIT_PRECISION and remove redundant test for
SCALAR_INT_MODE_P.
* combine.c (set_nonzero_bits_and_sign_copies): Use
is_a <scalar_int_mode>.
(find_split_point): Likewise.
(combine_simplify_rtx): Likewise.
(simplify_logical): Likewise.
(expand_compound_operation): Likewise.
(expand_field_assignment): Likewise.
(make_compound_operation): Likewise.
(extended_count): Likewise.
(change_zero_ext): Likewise.
(simplify_comparison): Likewise.
* dwarf2out.c (scompare_loc_descriptor): Likewise.
(ucompare_loc_descriptor): Likewise.
(minmax_loc_descriptor): Likewise.
(mem_loc_descriptor): Likewise.
(loc_descriptor): Likewise.
* expmed.c (init_expmed_one_mode): Likewise.
* lra-constraints.c (lra_constraint_offset): Likewise.
* optabs.c (prepare_libcall_arg): Likewise.
* postreload.c (move2add_note_store): Likewise.
* reload.c (operands_match_p): Likewise.
* rtl.h (load_extend_op): Likewise.
* rtlhooks.c (gen_lowpart_general): Likewise.
* simplify-rtx.c (simplify_truncation): Likewise.
(simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise.
(simplify_const_binary_operation): Likewise.
(simplify_const_relational_operation): Likewise.
(simplify_subreg): Likewise.
* stor-layout.c (bitwise_mode_for_mode): Likewise.
* var-tracking.c (adjust_mems): Likewise.
(prepare_call_arguments): Likewise.
gcc/ada/
* gcc-interface/decl.c (check_ok_for_atomic_type): Use
is_a <scalar_int_mode>.
* gcc-interface/trans.c (Pragma_to_gnu): Likewise.
* gcc-interface/utils.c (gnat_type_for_mode): Likewise.
gcc/fortran/
* trans-types.c (gfc_type_for_mode): Use is_a <scalar_int_mode>.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251473
|
|
Replace checks of "GET_MODE_CLASS (...) == MODE_INT" with
"is_int_mode (..., &var)", in cases where it becomes useful
to refer to the mode as a scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (is_int_mode): New fuction.
* combine.c (find_split_point): Use it.
(combine_simplify_rtx): Likewise.
(simplify_if_then_else): Likewise.
(simplify_set): Likewise.
(simplify_shift_const_1): Likewise.
(simplify_comparison): Likewise.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Likewise.
* cse.c (notreg_cost): Likewise.
(cse_insn): Likewise.
* cselib.c (cselib_lookup_1): Likewise.
* dojump.c (do_jump_1): Likewise.
(do_compare_rtx_and_jump): Likewise.
* dse.c (get_call_args): Likewise.
* dwarf2out.c (rtl_for_decl_init): Likewise.
(native_encode_initializer): Likewise.
* expmed.c (emit_store_flag_1): Likewise.
(emit_store_flag): Likewise.
* expr.c (convert_modes): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* fold-const.c (fold_read_from_constant_string): Likewise.
* gimple-ssa-sprintf.c (get_format_string): Likewise.
* optabs-libfuncs.c (gen_int_libfunc): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_unop): Likewise.
(expand_abs_nojump): Likewise.
(expand_one_cmpl_abs_nojump): Likewise.
* simplify-rtx.c (mode_signbit_p): Likewise.
(val_signbit_p): Likewise.
(val_signbit_known_set_p): Likewise.
(val_signbit_known_clear_p): Likewise.
(simplify_relational_operation_1): Likewise.
* tree.c (vector_type_mode): Likewise.
gcc/go/
* go-lang.c (go_langhook_type_for_mode): Use is_int_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251472
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This patch adds a wrapper around smallest_mode_for_size
for cases in which the mode class is MODE_INT. Unlike
(int_)mode_for_size, smallest_mode_for_size always returns
a mode of the specified class, asserting if no such mode exists.
smallest_int_mode_for_size therefore returns a scalar_int_mode
rather than an opt_scalar_int_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (smallest_mode_for_size): Fix formatting.
(smallest_int_mode_for_size): New function.
* cfgexpand.c (expand_debug_expr): Use smallest_int_mode_for_size
instead of smallest_mode_for_size.
* combine.c (make_extraction): Likewise.
* config/arc/arc.c (arc_expand_movmem): Likewise.
* config/arm/arm.c (arm_expand_divmod_libfunc): Likewise.
* config/i386/i386.c (ix86_get_mask_mode): Likewise.
* config/s390/s390.c (s390_expand_insv): Likewise.
* config/sparc/sparc.c (assign_int_registers): Likewise.
* config/spu/spu.c (spu_function_value): Likewise.
(spu_function_arg): Likewise.
* coverage.c (get_gcov_type): Likewise.
(get_gcov_unsigned_t): Likewise.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (store_bit_field_1): Likewise.
* expr.c (convert_move): Likewise.
(store_field): Likewise.
* internal-fn.c (expand_arith_overflow): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs.c (expand_twoval_binop_libfunc): Likewise.
* stor-layout.c (layout_type): Likewise.
(initialize_sizetypes): Likewise.
* targhooks.c (default_get_mask_mode): Likewise.
* tree-ssa-loop-manip.c (canonicalize_loop_ivs): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251471
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Also use int_mode_for_mode instead of (int_)mode_for_size
in cases where the requested size was the bitsize of an
existing mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (opt_mode::else_blk): New function.
(int_mode_for_mode): Declare.
* stor-layout.c (int_mode_for_mode): Return an opt_scalar_int_mode.
* builtins.c (expand_builtin_signbit): Adjust for new int_mode_for_mode
return type.
* cfgexpand.c (expand_debug_expr): Likewise.
* combine.c (gen_lowpart_or_truncate): Likewise.
(gen_lowpart_for_combine): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Likewise.
* config/avr/avr.c (avr_to_int_mode): Likewise.
(avr_out_plus_1): Likewise.
(avr_out_plus): Likewise.
(avr_out_round): Likewise.
* config/i386/i386.c (ix86_split_to_parts): Likewise.
* config/s390/s390.c (s390_expand_vec_compare_cc): Likewise.
(s390_expand_vcond): Likewise.
* config/spu/spu.c (spu_split_immediate): Likewise.
(spu_expand_mov): Likewise.
* dse.c (get_stored_val): Likewise.
* expmed.c (store_bit_field_1): Likewise.
(convert_extracted_bit_field): Use int_mode_for_mode instead of
int_mode_for_size.
(extract_bit_field_1): Adjust for new int_mode_for_mode return type.
(extract_low_bits): Likewise.
* expr.c (emit_group_load_1): Likewise. Separate out the BLKmode
handling rather than repeating the check.
(emit_group_store): Likewise.
(emit_move_via_integer): Adjust for new int_mode_for_mode return type.
* optabs.c (expand_absneg_bit): Likewise.
(expand_copysign_absneg): Likewise.
(expand_copysign_bit): Likewise.
* tree-if-conv.c (ifcvt_can_use_mask_load_store): Likewise.
* tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
* tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
* var-tracking.c (prepare_call_arguments): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_do_expand_vec_perm): Use
int_mode_for_mode instead of mode_for_size.
* config/rs6000/rs6000.c (rs6000_do_expand_vec_perm): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251470
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This patch adds a wrapper around mode_for_size for cases in which
the mode class is MODE_INT (the commonest case). The return type
can then be an opt_scalar_int_mode instead of a machine_mode.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (int_mode_for_size): New function.
* builtins.c (set_builtin_user_assembler_name): Use int_mode_for_size
instead of mode_for_size.
* calls.c (save_fixed_argument_area): Likewise. Make use of BLKmode
explicit.
* combine.c (expand_field_assignment): Use int_mode_for_size
instead of mode_for_size.
(make_extraction): Likewise.
(simplify_shift_const_1): Likewise.
(simplify_comparison): Likewise.
* dojump.c (do_jump): Likewise.
* dwarf2out.c (mem_loc_descriptor): Likewise.
* emit-rtl.c (init_derived_machine_modes): Likewise.
* expmed.c (flip_storage_order): Likewise.
(convert_extracted_bit_field): Likewise.
* expr.c (copy_blkmode_from_reg): Likewise.
* graphite-isl-ast-to-gimple.c (max_mode_int_precision): Likewise.
* internal-fn.c (expand_mul_overflow): Likewise.
* lower-subreg.c (simple_move): Likewise.
* optabs-libfuncs.c (init_optabs): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
* tree.c (vector_type_mode): Likewise.
* tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
* tree-vect-data-refs.c (vect_lanes_optab_supported_p): Likewise.
* tree-vect-generic.c (expand_vector_parallel): Likewise.
* tree-vect-stmts.c (vectorizable_load): Likewise.
(vectorizable_store): Likewise.
gcc/ada/
* gcc-interface/decl.c (gnat_to_gnu_entity): Use int_mode_for_size
instead of mode_for_size.
(gnat_to_gnu_subprog_type): Likewise.
* gcc-interface/utils.c (make_type_from_size): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251469
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GET_MODE_WIDER previously returned VOIDmode if no wider mode existed.
That would cause problems with stricter mode classes, since VOIDmode
isn't for example a valid scalar integer or floating-point mode.
This patch instead makes it return a new opt_mode<T> class, which
holds either a T or nothing.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (opt_mode): New class.
* machmode.h (opt_mode): Likewise.
(opt_mode::else_void): New function.
(opt_mode::require): Likewise.
(opt_mode::exists): Likewise.
(GET_MODE_WIDER_MODE): Turn into a function and return an opt_mode.
(GET_MODE_2XWIDER_MODE): Likewise.
(mode_iterator::get_wider): Update accordingly.
(mode_iterator::get_2xwider): Likewise.
(mode_iterator::get_known_wider): Likewise, turning into a template.
* combine.c (make_extraction): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
* config/cr16/cr16.h (LONG_REG_P): Likewise.
* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
* config/c6x/c6x.c (c6x_rtx_costs): Update use of
GET_MODE_2XWIDER_MODE, forcing a wider mode to exist.
* lower-subreg.c (init_lower_subreg): Likewise.
* optabs-libfuncs.c (init_sync_libfuncs_1): Likewise, but not
on the final iteration.
* config/i386/i386.c (ix86_expand_set_or_movmem): Check whether
a wider mode exists before asking for a move pattern.
(get_mode_wider_vector): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
(expand_vselect_vconcat): Update use of GET_MODE_2XWIDER_MODE,
returning false if no such mode exists.
* config/ia64/ia64.c (expand_vselect_vconcat): Likewise.
* config/mips/mips.c (mips_expand_vselect_vconcat): Likewise.
* expmed.c (init_expmed_one_mode): Update use of GET_MODE_WIDER_MODE.
Avoid checking for a MODE_INT if we already know the mode is not a
SCALAR_INT_MODE_P.
(extract_high_half): Update use of GET_MODE_WIDER_MODE,
forcing a wider mode to exist.
(expmed_mult_highpart_optab): Likewise.
(expmed_mult_highpart): Likewise.
* expr.c (expand_expr_real_2): Update use of GET_MODE_WIDER_MODE,
using else_void.
* lto-streamer-in.c (lto_input_mode_table): Likewise.
* optabs-query.c (find_widening_optab_handler_and_mode): Likewise.
* stor-layout.c (bit_field_mode_iterator::next_mode): Likewise.
* internal-fn.c (expand_mul_overflow): Update use of
GET_MODE_2XWIDER_MODE.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* tree-ssa-math-opts.c (convert_mult_to_widen): Update use of
GET_MODE_WIDER_MODE.
(convert_plusminus_to_widen): Likewise.
* tree-switch-conversion.c (array_value_type): Likewise.
* var-tracking.c (emit_note_insn_var_location): Likewise.
* tree-vrp.c (simplify_float_conversion_using_ranges): Likewise.
Return false inside rather than outside the loop if no wider mode
exists
* optabs.c (expand_binop): Update use of GET_MODE_WIDER_MODE
and GET_MODE_2XWIDER_MODE
(can_compare_p): Use else_void.
* gdbhooks.py (OptMachineModePrinter): New class.
(build_pretty_printer): Use it for opt_mode.
gcc/ada/
* gcc-interface/decl.c (validate_size): Update use of
GET_MODE_WIDER_MODE, forcing a wider mode to exist.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251457
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The new iterators are:
- FOR_EACH_MODE_IN_CLASS: iterate over all the modes in a mode class.
- FOR_EACH_MODE_FROM: iterate over all the modes in a class,
starting at a given mode.
- FOR_EACH_WIDER_MODE: iterate over all the modes in a class,
starting at the next widest mode after a given mode.
- FOR_EACH_2XWIDER_MODE: same, but considering only modes that
are two times wider than the previous mode.
- FOR_EACH_MODE_UNTIL: iterate over all the modes in a class until
a given mode is reached.
- FOR_EACH_MODE: iterate over all the modes in a class between
two given modes, inclusive of the first but not the second.
These help with the stronger type checking added by later patches,
since every new mode will be in the same class as the previous one.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_traits): New structure.
(get_narrowest_mode): New function.
(mode_iterator::start): Likewise.
(mode_iterator::iterate_p): Likewise.
(mode_iterator::get_wider): Likewise.
(mode_iterator::get_known_wider): Likewise.
(mode_iterator::get_2xwider): Likewise.
(FOR_EACH_MODE_IN_CLASS): New mode iterator.
(FOR_EACH_MODE): Likewise.
(FOR_EACH_MODE_FROM): Likewise.
(FOR_EACH_MODE_UNTIL): Likewise.
(FOR_EACH_WIDER_MODE): Likewise.
(FOR_EACH_2XWIDER_MODE): Likewise.
* builtins.c (expand_builtin_strlen): Use new mode iterators.
* combine.c (simplify_comparison): Likewise
* config/i386/i386.c (type_natural_mode): Likewise.
* cse.c (cse_insn): Likewise.
* dse.c (find_shift_sequence): Likewise.
* emit-rtl.c (init_derived_machine_modes): Likewise.
(init_emit_once): Likewise.
* explow.c (hard_function_value): Likewise.
* expmed.c (extract_fixed_bit_field_1): Likewise.
(extract_bit_field_1): Likewise.
(expand_divmod): Likewise.
(emit_store_flag_1): Likewise.
* expr.c (init_expr_target): Likewise.
(convert_move): Likewise.
(alignment_for_piecewise_move): Likewise.
(widest_int_mode_for_size): Likewise.
(emit_block_move_via_movmem): Likewise.
(copy_blkmode_to_reg): Likewise.
(set_storage_via_setmem): Likewise.
(compress_float_constant): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_twoval_unop): Likewise.
(expand_twoval_binop): Likewise.
(widen_leading): Likewise.
(widen_bswap): Likewise.
(expand_parity): Likewise.
(expand_unop): Likewise.
(prepare_cmp_insn): Likewise.
(prepare_float_lib_cmp): Likewise.
(expand_float): Likewise.
(expand_fix): Likewise.
(expand_sfix_optab): Likewise.
* postreload.c (move2add_use_add2_insn): Likewise.
* reg-stack.c (reg_to_stack): Likewise.
* reginfo.c (choose_hard_reg_mode): Likewise.
* rtlanal.c (init_num_sign_bit_copies_in_rep): Likewise.
* stor-layout.c (mode_for_size): Likewise.
(smallest_mode_for_size): Likewise.
(mode_for_vector): Likewise.
(finish_bitfield_representative): Likewise.
* tree-ssa-math-opts.c (target_supports_divmod_p): Likewise.
* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
* tree-vect-stmts.c (vectorizable_conversion): Likewise.
* var-tracking.c (prepare_call_arguments): Likewise.
gcc/ada/
* gcc-interface/misc.c (fp_prec_to_size): Use new mode iterators.
(fp_size_to_prec): Likewise.
gcc/c-family/
* c-common.c (c_common_fixed_point_type_for_size): Use new mode
iterators.
* c-cppbuiltin.c (c_cpp_builtins): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251455
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This patch makes use of the subreg_offset_from_lsb function
added by an earlier patch in the SVE series.
2017-08-24 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (make_extraction): Use subreg_offset_from_lsb.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251326
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This patch makes more use of the existing paradoxical_subreg_p
predicate and also adds a version that operates on outer and
inner modes.
Some of the affected tests were based on GET_MODE_SIZE rather than
GET_MODE_PRECISION and so the patch could change the result for modes
that have the same size but different precisions. I think in each
case the change should be a no-op or more correct, since a mode with
precision N bits can't be expected to hold all of a mode with precision
M>N bits.
The patch changes the branch taken in simplify_subreg for modes with
equal precision, but the new form matches the commentary more closely.
Both branches should be equally good in that situation.
2017-08-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* rtl.h (paradoxical_subreg_p): Define inline, and add a version
that takes the outer and inner modes.
* doc/rtl.texi: Use paradoxical_subreg_p instead of a GET_MODE_SIZE
comparison as the canonical test for a paradoxical subreg.
* combine.c (simplify_set): Use paradoxical_subreg_p.
(make_extraction): Likewise.
(force_to_mode): Likewise.
(rtx_equal_for_field_assignment_p): Likewise.
(gen_lowpart_for_combine): Likewise.
(simplify_comparison): Likewise.
* cse.c (equiv_constant): Likewise.
* expmed.c (store_bit_field_1): Likewise.
* final.c (alter_subreg): Likewise.
* fwprop.c (propagate_rtx): Likewise.
(forward_propagate_subreg): Likewise.
* ira-conflicts.c (ira_build_conflicts): Likewise.
* lower-subreg.c (simplify_gen_subreg_concatn): Likewise.
* lra-constraints.c (curr_insn_transform): Likewise.
(split_reg): Likewise.
* lra-eliminations.c (move_plus_up): Likewise.
(lra_eliminate_regs_1): Likewise.
* recog.c (general_operand): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* reload.c (push_reload): Likewise.
(find_reloads): Likewise.
* reload1.c (elimination_effects): Likewise.
(compute_reload_subreg_offset): Likewise.
(choose_reload_regs): Likewise.
* rtlanal.c (subreg_lsb_1): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_subreg): Likewise.
* var-tracking.c (track_loc_p): Likewise.
* emit-rtl.c (byte_lowpart_offset): Likewise.
(paradoxical_subreg_p): Delete out-of-line definition.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251282
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We here have an AND of a SUBREG of an LSHIFTRT. If that SUBREG is
paradoxical, the extraction we form is the length of the size of the
inner mode, which includes some bits that should not be in the result.
Just give up in that case.
PR rtl-optimization/81423
* combine.c (make_compound_operation_int): Don't try to optimize
the AND of a SUBREG of an LSHIFTRT if that SUBREG is paradoxical.
From-SVN: r250365
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r216834 did a mass removal of "enum" before "machine_mode". This patch
removes some new uses that have been added since then.
2017-07-05 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (simplify_if_then_else): Remove "enum" before
"machine_mode".
* compare-elim.c (can_eliminate_compare): Likewise.
* config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_std_type):
Likewise.
(aarch64_lookup_simd_builtin_type): Likewise.
(aarch64_simd_builtin_type): Likewise.
(aarch64_init_simd_builtin_types): Likewise.
(aarch64_simd_expand_args): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_rglist):
Likewise.
(aarch64_reverse_mask): Likewise.
(aarch64_simd_emit_reg_reg_move): Likewise.
(aarch64_gen_adjusted_ldpstp): Likewise.
(aarch64_ccmp_mode_to_code): Likewise.
(aarch64_operands_ok_for_ldpstp): Likewise.
(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
* config/aarch64/aarch64.c (aarch64_ira_change_pseudo_allocno_class):
Likewise.
(aarch64_min_divisions_for_recip_mul): Likewise.
(aarch64_reassociation_width): Likewise.
(aarch64_get_condition_code_1): Likewise.
(aarch64_simd_emit_reg_reg_move): Likewise.
(aarch64_simd_attr_length_rglist): Likewise.
(aarch64_reverse_mask): Likewise.
(aarch64_operands_ok_for_ldpstp): Likewise.
(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
(aarch64_gen_adjusted_ldpstp): Likewise.
* config/aarch64/cortex-a57-fma-steering.c (fma_node::rename):
Likewise.
* config/arc/arc.c (legitimate_offset_address_p): Likewise.
* config/arm/arm-builtins.c (arm_simd_builtin_std_type): Likewise.
(arm_lookup_simd_builtin_type): Likewise.
(arm_simd_builtin_type): Likewise.
(arm_init_simd_builtin_types): Likewise.
(arm_expand_builtin_args): Likewise.
* config/arm/arm-protos.h (arm_expand_builtin): Likewise.
* config/ft32/ft32.c (ft32_libcall_value): Likewise.
(ft32_setup_incoming_varargs): Likewise.
(ft32_function_arg): Likewise.
(ft32_function_arg_advance): Likewise.
(ft32_pass_by_reference): Likewise.
(ft32_arg_partial_bytes): Likewise.
(ft32_valid_pointer_mode): Likewise.
(ft32_addr_space_pointer_mode): Likewise.
(ft32_addr_space_legitimate_address_p): Likewise.
* config/i386/i386-protos.h (ix86_operands_ok_for_move_multiple):
Likewise.
* config/i386/i386.c (ix86_setup_incoming_vararg_bounds): Likewise.
(ix86_emit_outlined_ms2sysv_restore): Likewise.
(iamcu_alignment): Likewise.
(canonicalize_vector_int_perm): Likewise.
(ix86_noce_conversion_profitable_p): Likewise.
(ix86_mpx_bound_mode): Likewise.
(ix86_operands_ok_for_move_multiple): Likewise.
* config/microblaze/microblaze-protos.h
(microblaze_expand_conditional_branch_reg): Likewise.
* config/microblaze/microblaze.c
(microblaze_expand_conditional_branch_reg): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_init_hard_regno_mode_ok):
Likewise.
(rs6000_reassociation_width): Likewise.
(rs6000_invalid_binary_op): Likewise.
(fusion_p9_p): Likewise.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/riscv/riscv-protos.h (riscv_regno_mode_ok_for_base_p):
Likewise.
(riscv_hard_regno_mode_ok_p): Likewise.
(riscv_address_insns): Likewise.
(riscv_split_symbol): Likewise.
(riscv_legitimize_move): Likewise.
(riscv_function_value): Likewise.
(riscv_hard_regno_nregs): Likewise.
(riscv_expand_builtin): Likewise.
* config/riscv/riscv.c (riscv_build_integer_1): Likewise.
(riscv_build_integer): Likewise.
(riscv_split_integer): Likewise.
(riscv_legitimate_constant_p): Likewise.
(riscv_cannot_force_const_mem): Likewise.
(riscv_regno_mode_ok_for_base_p): Likewise.
(riscv_valid_base_register_p): Likewise.
(riscv_valid_offset_p): Likewise.
(riscv_valid_lo_sum_p): Likewise.
(riscv_classify_address): Likewise.
(riscv_legitimate_address_p): Likewise.
(riscv_address_insns): Likewise.
(riscv_load_store_insns): Likewise.
(riscv_force_binary): Likewise.
(riscv_split_symbol): Likewise.
(riscv_force_address): Likewise.
(riscv_legitimize_address): Likewise.
(riscv_move_integer): Likewise.
(riscv_legitimize_const_move): Likewise.
(riscv_legitimize_move): Likewise.
(riscv_address_cost): Likewise.
(riscv_subword): Likewise.
(riscv_output_move): Likewise.
(riscv_canonicalize_int_order_test): Likewise.
(riscv_emit_int_order_test): Likewise.
(riscv_function_arg_boundary): Likewise.
(riscv_pass_mode_in_fpr_p): Likewise.
(riscv_pass_fpr_single): Likewise.
(riscv_pass_fpr_pair): Likewise.
(riscv_get_arg_info): Likewise.
(riscv_function_arg): Likewise.
(riscv_function_arg_advance): Likewise.
(riscv_arg_partial_bytes): Likewise.
(riscv_function_value): Likewise.
(riscv_pass_by_reference): Likewise.
(riscv_setup_incoming_varargs): Likewise.
(riscv_print_operand): Likewise.
(riscv_elf_select_rtx_section): Likewise.
(riscv_save_restore_reg): Likewise.
(riscv_for_each_saved_reg): Likewise.
(riscv_register_move_cost): Likewise.
(riscv_hard_regno_mode_ok_p): Likewise.
(riscv_hard_regno_nregs): Likewise.
(riscv_class_max_nregs): Likewise.
(riscv_memory_move_cost): Likewise.
* config/rl78/rl78-protos.h (rl78_split_movsi): Likewise.
* config/rl78/rl78.c (rl78_split_movsi): Likewise.
(rl78_addr_space_address_mode): Likewise.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Likewise.
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Likewise.
(rs6000_reassociation_width): Likewise.
(rs6000_invalid_binary_op): Likewise.
(fusion_p9_p): Likewise.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/visium/visium-protos.h (prepare_move_operands): Likewise.
(ok_for_simple_move_operands): Likewise.
(ok_for_simple_move_strict_operands): Likewise.
(ok_for_simple_arith_logic_operands): Likewise.
(visium_legitimize_reload_address): Likewise.
(visium_select_cc_mode): Likewise.
(output_cbranch): Likewise.
(visium_split_double_move): Likewise.
(visium_expand_copysign): Likewise.
(visium_expand_int_cstore): Likewise.
(visium_expand_fp_cstore): Likewise.
* config/visium/visium.c (visium_pass_by_reference): Likewise.
(visium_function_arg): Likewise.
(visium_function_arg_advance): Likewise.
(visium_libcall_value): Likewise.
(visium_setup_incoming_varargs): Likewise.
(visium_legitimate_constant_p): Likewise.
(visium_legitimate_address_p): Likewise.
(visium_legitimize_address): Likewise.
(visium_secondary_reload): Likewise.
(visium_register_move_cost): Likewise.
(visium_memory_move_cost): Likewise.
(prepare_move_operands): Likewise.
(ok_for_simple_move_operands): Likewise.
(ok_for_simple_move_strict_operands): Likewise.
(ok_for_simple_arith_logic_operands): Likewise.
(visium_function_value_1): Likewise.
(rtx_ok_for_offset_p): Likewise.
(visium_legitimize_reload_address): Likewise.
(visium_split_double_move): Likewise.
(visium_expand_copysign): Likewise.
(visium_expand_int_cstore): Likewise.
(visium_expand_fp_cstore): Likewise.
(visium_split_cstore): Likewise.
(visium_select_cc_mode): Likewise.
(visium_split_cbranch): Likewise.
(output_cbranch): Likewise.
(visium_print_operand_address): Likewise.
* expmed.c (flip_storage_order): Likewise.
* expmed.h (emit_cstore): Likewise.
(flip_storage_order): Likewise.
* genrecog.c (validate_pattern): Likewise.
* hsa-gen.c (gen_hsa_addr): Likewise.
* internal-fn.c (expand_arith_overflow): Likewise.
* ira-color.c (allocno_copy_cost_saving): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
(process_invariant_for_inheritance): Likewise.
* lra-eliminations.c (move_plus_up): Likewise.
* omp-low.c (lower_oacc_reductions): Likewise.
* simplify-rtx.c (simplify_subreg): Likewise.
* target.def (TARGET_SETUP_INCOMING_VARARG_BOUNDS): Likewise.
(TARGET_CHKP_BOUND_MODE): Likewise..
* targhooks.c (default_chkp_bound_mode): Likewise.
(default_setup_incoming_vararg_bounds): Likewise.
* targhooks.h (default_chkp_bound_mode): Likewise.
(default_setup_incoming_vararg_bounds): Likewise.
* tree-ssa-math-opts.c (divmod_candidate_p): Likewise.
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
(have_whole_vector_shift): Likewise.
* tree-vect-stmts.c (vectorizable_load): Likewise.
* doc/tm.texi: Regenerate.
gcc/brig/
* brig-c.h (brig_type_for_mode): Remove "enum" before "machine_mode".
* brig-lang.c (brig_langhook_type_for_mode): Likewise.
gcc/jit/
* dummy-frontend.c (jit_langhook_type_for_mode): Remove "enum" before
"machine_mode".
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r250003
|
|
In the combine dump file, at the start there is a list of the RTL cost
of every insn. The only thing listed about the insns is the UID though.
To make it more useful, this patch prints the insn itself as well (in
slim format).
* combine.c (combine_instructions): Print insns to dump_file, together
with their costs.
From-SVN: r249802
|
