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alignment/step/initial-address computed for struct accesses)
2004-12-29 Ira Rosen <irar@il.ibm.com>
PR tree-optimization/18179
* tree-vectorizer.c (vect_get_base_and_offset): Call get_inner_reference
and vect_analyze_offset_expr.
(vect_create_addr_base_for_vector_ref): Build address_base by combining
base and initial_offset fields of vect_stmt_info.
(vect_update_inits_of_dr): Update offset of data-ref instead of its
access-fn. Remove argument.
(vect_update_inits_of_drs): Call vect_update_inits_of_dr with new
arguments.
(vect_compute_data_ref_alignment): Check misalignment info in
vect_stmt_info. Remove argument.
(vect_compute_data_refs_alignment): Call vect_compute_data_ref_alignment
with correct argument.
(vect_analyze_data_ref_access): Check access info in vect_stmt_info.
(vect_analyze_pointer_ref_access): Update step and initial_offset fields
of vect_stmt_info.
(vect_get_memtag_and_dr): Call vect_get_base_and_offset and set the
fields of stmt_vec_info.
(vect_analyze_data_refs): Find vectype and pass it to
vect_get_memtag_and_dr.
(vect_get_first_index): Remove.
(vect_compute_array_base_alignment): Remove.
(vect_compute_array_ref_alignment): Remove
(vect_create_data_ref_ptr): Use TYPE_SIZE_UNIT instead GET_MODE_SIZE.
(vect_gen_niters_for_prolog_loop): Use TREE_CONSTANT instead
host_integerp.
(vectorizable_load): Use size arithmetics.
From-SVN: r92704
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alignment/step/initial-address computed for struct accesses)
2004-12-29 Ira Rosen <irar@il.ibm.com>
PR tree-optimization/18179
* tree-vectorizer.c (vect_get_base_and_offset): Rename (previous name
vect_get_base_and_bit_offset).
(vect_get_memtag_and_dr): Rename (previous name vect_get_symbl_and_dr).
From-SVN: r92702
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alignment/step/initial-address computed for struct accesses)
2004-12-29 Ira Rosen <irar@il.ibm.com>
PR tree-optimization/18179
* tree-vectorizer.h (struct _stmt_vec_info): Add new fields:
initial_offset, step, misalignment and base_aligned_p and macros
to access them.
* tree-vectorizer.c (vect_analyze_offset_expr): New function.
(new_stmt_vec_info): Initialize the new fields of stmt_vec_info.
(vect_create_data_ref_ptr): Fix printings.
From-SVN: r92701
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alignment/step/initial-address computed for struct accesses)
2004-12-29 Ira Rosen <irar@il.ibm.com>
PR tree-optimization/18179
* tree-vectorizer.c (vect_get_symbl_and_dr): Reorganize. Add memtag
retrieval.
(vect_analyze_data_refs): Remove memtag retrieval.
From-SVN: r92700
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PR inline-asm/15740
* gimplify.c (gimplify_asm_expr): Move resolve asm names ...
* c-typeck.c (build_asm_expr): ... here. Validate input
constraints. Mark memory inputs addressable.
* semantics.c (finish_asm_stmt): Resolve asm names. Validate input
constraints. Mark memory inputs addressable.
From-SVN: r92693
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gcc.c-torture/compile/20031023-4.c -O0, -O1)
PR target/18321
* config/mmix/mmix.c (mmix_expand_epilogue): Change type of
variable offset to HOST_WIDE_INT. Remove obsolete comment. Fix
spacing.
From-SVN: r92685
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2004-12-28 Andrew Pinski <pinskia@physics.uc.edu>
* fold-const.c (fold_build_cleanup_point_expr): For a RETURN_EXPR,
we only need a cleanup point expression when the expression on the
left hand side of the MODIFIY_EXPR inside the return has side
effects.
From-SVN: r92672
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varray_type to varray_type*.
(vect_mark_stmts_to_be_vectorized): Pass &worklist instead of worklist
when calling vect_mark_relevant.
From-SVN: r92671
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DImode lo_sum addresses.
* config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Don't
generate non-offsettable DImode lo_sum addresses.
From-SVN: r92670
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profiledbootstrap)
PR rtl-optimization/19103
* loop-iv.c (iv_number_of_iterations): Fix typo.
From-SVN: r92669
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From-SVN: r92668
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* vax.c (vax_address_cost, vax_rtx_cost): Correct casts.
(vax_rtx_cost): Handle small offsets for both PLUS and MINUS.
From-SVN: r92667
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into a loop.
* tree-ssa-dom.c (thread_across_edge): Remove broken code to
avoid threading into a loop.
From-SVN: r92666
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PR target/17406
* config/i386/i386.c (ix86_expand_prologue): Add REG_FRAME_RELATED_EXPR
note for allocate_stack_worker insn.
From-SVN: r92662
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initialization.
libstdc++:
Add memory barriers to the double-checked locking used for static
initialization.
* libsupc++/guard.cc (__test_and_acquire): Define default.
(_GLIBCXX_GUARD_TEST_AND_ACQUIRE, __set_and_release)
(_GLIBCXX_GUARD_SET_AND_RELEASE): Likewise.
(recursion_push, recursion_pop): New abstraction functions.
(__cxa_guard_acquire): Use _GLIBCXX_GUARD_TEST_AND_ACQUIRE.
(__cxa_guard_release): Use _GLIBCXX_GUARD_SET_AND_RELEASE.
* config/cpu/generic/cxxabi_tweaks.h (_GLIBCXX_GUARD_TEST): Rename
from _GLIBCXX_GUARD_ACQUIRE and reverse sense.
(_GLIBCXX_GUARD_SET): Rename from _GLIBCXX_GUARD_RELEASE.
* config/cpu/arm/cxxabi_tweaks.h: Likewise.
* config/cpu/alpha/atomic_word.h (_GLIBCXX_READ_MEM_BARRIER)
(_GLIBCXX_WRITE_MEM_BARRIER): Define.
* config/cpu/powerpc/atomic_word.h: Likewise.
* config/cpu/sparc/atomic_word.h: Likewise.
* config/cpu/generic/atomic_word.h: Define them, commented out.
* include/bits/atomicity.h: Define defaults.
* config/cpu/ia64/atomic_word.h (__test_and_acquire)
(__set_and_release): New inlines.
(_GLIBCXX_GUARD_TEST_AND_ACQUIRE): Define.
(_GLIBCXX_GUARD_SET_AND_RELEASE): Define.
* libsupc++/guard.cc (acquire_1): Use __builtin_trap instead of
abort();
gcc:
* doc/tm.texi (TARGET_RELAXED_ORDERING): Document.
* target.h (struct gcc_target): Add relaxed_ordering field.
* target-def.h (TARGET_RELAXED_ORDERING): Define default.
(TARGET_INITIALIZER): Add it.
* config/alpha/alpha.c (TARGET_RELAXED_ORDERING): Define.
* config/ia64/ia64.c (TARGET_RELAXED_ORDERING): Define.
* config/rs6000/rs6000.c (TARGET_RELAXED_ORDERING): Define.
* config/sparc/sparc.c (TARGET_RELAXED_ORDERING): Define.
* cp/decl.c (expand_static_init): Don't use shortcut if
targetm.relaxed_ordering.
From-SVN: r92659
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PR driver/16118
* doc/invoke.texi: Document the interaction between -save-temps
and -x.
From-SVN: r92658
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pool addresses.
* config/rs6000/rs6000.c (rs6000_eliminate_indexed_memrefs):
Do not break apart constant pool addresses.
(rs6000_emit_move): Only force source into REG if target is MEM.
From-SVN: r92657
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PR c++/19148
* gimplify.c (gimplify_cond_expr): Add post_p parameter.
(gimplify_modify_expr_rhs): Adjust call to gimplify_cond_expr.
(gimplify_expr): Likewise.
From-SVN: r92640
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* config/i386/i386.h (UNITS_PER_SIMD_WORD): Don't use MMX/3DNOW.
* gcc.dg/vect/vect-27a.c, gcc.dg/vect/vect-29a.c,
gcc.dg/vect/vect-48a.c, gcc.dg/vect/vect-56a.c,
gcc.dg/vect/vect-72a.c, gcc.dg/vect/vect-77a.c: Remove.
From-SVN: r92637
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examine_argument.
* config/i386/i386.c (ix86_gimplify_va_arg): Also pass the result
of type_natural_mode to examine_argument.
From-SVN: r92633
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across EQ for floating-point.
* simplify-rtx.c (simplify_relational_operation_1): Don't simplify
plus/minus across EQ for floating-point.
From-SVN: r92631
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PR target/17643
* pa.c (pa_function_ok_for_sibcall): Sibcalls are not ok when
generating code for the portable runtime.
From-SVN: r92629
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* expr.c (clear_storage): Validate CONST0_RTX extant. Special case
complex modes.
From-SVN: r92615
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PR rtl-optimization/19078
* tree-ssa-loop-ivopts.c (determine_use_iv_cost_generic,
determine_use_iv_cost_outer): Fix computing of cost for the original
bivs.
(dump_use): Handle case related_cands == NULL.
From-SVN: r92608
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PR target/19059
* config/avr/avr.c (avr_mcu_types): Move attiny{13,2313} from avr4
to avr2.
* config/avr/avr.h (LINK_SPEC): Ditto.
* config/avr/t-avr (MULTILIB_MATCHES): Ditto.
From-SVN: r92607
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PR target/19137
* config/rs6000/rs6000.md (movti_power, movti_string): Relax
operand[1] predicate to input_operand, and add r<-n alternative.
Move TImode const_double_operand splitter to where it belongs.
From-SVN: r92603
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PR target/19147
* config/rs6000/rs6000.md (andsi3_internal7, andsi3_internal8): Delete.
From-SVN: r92594
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* config/i386/i386.md (*fix_trunc{d,s,h}i_1):
Rename to *fix_trunc{d,s,h}i_i387.
(fix_trunc{d,s}fdi2): Reorder tests.
From-SVN: r92586
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2004-12-24 Daniel Berlin <dberlin@dberlin.org>
Fix PR debug/14638
* tree.h (DECL_DEBUG_ALIAS_OF): New macro.
* var-tracking.c (track_expr_p): Don't disqualify tracking of variables
that are aliases of variables we want to track, unless the
original variable is also ignored for debugging purposes.
(VARIABLE_HASH_VAL): Use DECL_UID, so that this is deterministic.
* tree-outof-ssa.c (create_temp): Note who we are a debug alias of.
* dwarf2out.c (dwarf2out_var_location): Add us to the location of
the decl we are an alias of.
From-SVN: r92585
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PR target/19142
* config/rs6000/rs6000.c (legitimate_lo_sum_address_p): Allow
DFmode for 32-bit again.
From-SVN: r92583
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register.
* reload.c (regno_clobbered_p): Add a gcc_assert that regno
refers to a hard register.
From-SVN: r92574
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* gimplify.c (gimplify_modify_expr_rhs): Use types_compatible_p.
* g++.dg/opt/temp1.C: Make memcpy actually copy bytes.
From-SVN: r92571
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* genrecog.c (did_you_mean_codes): New.
(compute_predicate_codes): Fail unmatched codes.
From-SVN: r92565
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2004-12-23 Eric Christopher <echristo@redhat.com>
* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Add
assert for machine=mips for !TARGET_IRIX.
* config/mips/linux.h: Remove machine=mips assert.
* config/mips/netbsd.h: Ditto.
* config/mips/openbsd.h: Ditto.
From-SVN: r92561
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2004-12-23 Dale Johannesen <dalej@apple.com>
* tree.c (iterative_hash_expr): Canonicalize builtins.
From-SVN: r92553
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gcc/ChangeLog:
PR target/16819
* calls.c (load_register_parameters): Don't call use_regs when
nregs is zero.
gcc/testsuite/ChangeLog:
PR target/16891
* gcc.dg/empty2.c: New.
From-SVN: r92551
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PR middle-end/17746
* expr.c (get_inner_reference): Add 'keep_aligning' parameter.
Break on aligning VIEW_CONVERT_EXPR nodes on STRICT_ALIGNMENT
platforms only if keep_aligning is true.
(expand_assignment): Adjust call to get_inner_reference.
(expand_expr_addr_expr_1): Likewise.
(expand_expr_real_1): Likewise.
* dojump.c (do_jump): Likewise.
* dwarf2out.c (loc_descriptor_from_tree_1): Likewise.
* fold-const.c (optimize_bit_field_compare): Likewise.
(decode_field_reference): Likewise.
(split_address_to_core_and_offset): Likewise.
* tree-ssa-loop-ivopts.c (split_address_cost): Likewise.
* tree.h (get_inner_reference): Adjust prototype.
ada/
* trans.c (Attribute_to_gnu): Adjust call to get_inner_reference.
* utils2.c (build_unary_op): Likewise.
From-SVN: r92550
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PR middle-end/17746
* expr.c (get_inner_reference): Add 'keep_aligning' parameter.
Break on aligning VIEW_CONVERT_EXPR nodes on STRICT_ALIGNMENT
platforms only if keep_aligning is true.
(expand_assignment): Adjust call to get_inner_reference.
(expand_expr_addr_expr_1): Likewise.
(expand_expr_real_1): Likewise.
* dojump.c (do_jump): Likewise.
* dwarf2out.c (loc_descriptor_from_tree_1): Likewise.
* fold-const.c (optimize_bit_field_compare): Likewise.
(decode_field_reference): Likewise.
(split_address_to_core_and_offset): Likewise.
* tree-ssa-loop-ivopts.c (split_address_cost): Likewise.
* expr.h (get_inner_reference): Adjust prototype.
ada/
* trans.c (Attribute_to_gnu): Adjust call to get_inner_reference.
* utils2.c (build_unary_op): Likewise.
From-SVN: r92549
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* config/i386/i386.c (override_options): Revert last change
wrt fancy 387 math.
From-SVN: r92547
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* config/alpha/alpha.md (one_cmpl<mode>2, and<mode>3, andnot<mode>3,
ior<mode>3, iornot<mode>3, xor<mode>3, xornot<mode>3): New macroized
vector operate patterns.
From-SVN: r92545
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* config/i386/i386.c (ix86_expand_vector_move): Tidy.
(ix86_expand_vector_move_misalign): New.
(ix86_misaligned_mem_ok): Remove.
(TARGET_VECTORIZE_MISALIGNED_MEM_OK): Remove.
* config/i386/i386-protos.h: Update.
* config/i386/i386.md (SSEMODEI): Rename from SSEINT16.
(MMXMODEI): Rename from MMXINT8.
(SSEMODE, MMXMODE, movmisalign<mode>): New.
From-SVN: r92543
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PR c++/16405
* gimplify.c (gimplify_modify_expr_rhs): Handle
INDIRECT_REF/ADDR_EXPR combinations.
PR c++/16405
* g++.dg/opt/temp1.C: New test.
From-SVN: r92539
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* config/alpha/alpha.c (alpha_expand_mov): Split out ...
(alpha_expand_movmisalign): ... misaligned vector support.
(TARGET_VECTORIZE_MISALIGNED_MEM_OK): Remove.
* config/alpha/alpha-protos.h: Update.
* config/alpha/alpha.md (VEC): New macro.
(movv8qi, movv4hi, movv2si): Compress with VEC.
(movv8qi_fix, movv4hi_fix, movv2si_fix): Likewise.
(movv8qi_nofix, movv4hi_nofix, movv2si_nofix): Likewise.
(movmisalign<mode>): New.
From-SVN: r92538
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* optabs.h (OTI_movmisalign, movmisalign_optab): New.
* optabs.c (init_optabs): Create it.
* genopinit.c (optabs): Initialize it.
* expr.c (expand_expr_real_1) <MISALIGNED_INDIRECT_REF>: Use it.
* tree-vectorizer.c (vect_supportable_dr_alignment): Likewise.
* target-def.h (TARGET_VECTORIZE_MISALIGNED_MEM_OK): Remove.
* target.h (vectorize.misaligned_mem_ok): Remove.
* targhooks.c (default_vect_misaligned_mem_ok): Remove.
* doc/md.texi (movmisalign): New.
* doc/tm.texi (TARGET_VECTORIZE_MISALIGNED_MEM_OK): Remove.
From-SVN: r92537
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* config/i386/emmintrin.h (_mm_loadh_pd): Don't cast pointer arg
to __v2si.
(_mm_storeh_pd, _mm_loadl_pd, _mm_storel_pd): Likewise.
* config/i386/i386.c (ix86_init_mmx_sse_builtins): Use double* or
const double* for __builtin_ia32_loadhpd, __builtin_ia32_loadlpd,
__builtin_ia32_storehpd, __builtin_ia32_storelpd.
(ix86_expand_builtin): Update to match.
(ix86_expand_vector_init): Use sse2_loadlpd.
* config/i386/i386.md (vec_setv2df): Use sse2_loadlpd, sse2_loadhpd.
(vec_extractv2df): Use sse2_storelpd, sse2_storehpd.
(sse2_storehpd, sse2_loadhpd, sse2_storelpd, sse2_loadlpd): New.
(sse2_movhpd): Remove.
From-SVN: r92536
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PR target/18751
* config/rs6000/rs6000.c (legitimate_lo_sum_address_p): Return
false for anything larger than 32 bits in 32-bit code.
From-SVN: r92535
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* config/i386/i386.md (btsq, btrq, btcq): Fix modes.
(bt peepholes): Likewise.
From-SVN: r92534
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From-SVN: r92533
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* config/i386/predicates.md (sse_comparison_operator): Fix
typo in ieee test.
(arith_or_logical_operator): Downcase codes.
From-SVN: r92532
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libstdc++-v3/src/localename.cc)
PR target/18511
* reload1.c (emit_output_reload_insns): Check if OLD is a hard
register before calling regno_clobbered_p.
* reload.c: Update comment for regno_clobbered_p.
From-SVN: r92531
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