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AgeCommit message (Expand)AuthorFilesLines
2020-07-18Daily bump.GCC Administrator1-0/+6
2020-07-17Daily bump.GCC Administrator1-0/+30
2020-07-14Daily bump.GCC Administrator1-0/+11
2020-07-07Daily bump.GCC Administrator1-0/+12
2020-07-01Daily bump.GCC Administrator1-0/+8
2020-06-26Daily bump.GCC Administrator1-0/+9
2020-06-21Daily bump.GCC Administrator1-0/+9
2020-06-18Daily bump.GCC Administrator1-0/+8
2020-06-13Daily bump.GCC Administrator1-0/+14
2020-06-11Daily bump.GCC Administrator1-0/+6
2020-06-06Daily bump.GCC Administrator1-0/+5
2020-06-03Daily bump.GCC Administrator1-0/+6
2020-05-30Daily bump.GCC Administrator1-0/+13
2020-05-24x86: Handle -mavx512vpopcntdq for -march=nativeH.J. Lu1-0/+6
2020-05-21Fix backport due to usage for x_target_flags.Martin Liska1-0/+5
2020-05-21Add outline-atomics to target attribute.Martin Liska1-0/+8
2020-05-14aarch64: Fix .cfi_window_save with pac-ret [PR94515]Szabolcs Nagy1-0/+15
2020-05-12 rs6000: AIX long double builtins for 64 bit long double.David Edelsohn1-0/+9
2020-05-07alpha: Implement the PR94780 fix for alpha.Uros Bizjak1-0/+6
2020-05-04Add unsigned type iv_cand for iv_use with non mode-precision typeBin Cheng1-0/+11
2020-05-04S/390: Fix PR94666Andreas Krebbel1-0/+8
2020-05-04PR94613: Fix vec_sel builtin for IBM ZAndreas Krebbel1-0/+12
2020-04-29aarch64: Force TImode values into even registersAndre Vieira1-0/+8
2020-04-28aarch64: Fix for PR target/94814Andre Vieira1-0/+12
2020-04-22re PR target/90724 (ICE with __sync_bool_compare_and_swap with -march=armv8.2...Andre Vieira1-0/+9
2020-04-22aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435]Andre Vieira1-0/+9
2020-04-22aarch64: Fix up aarch64_compare_and_swaphi pattern [PR94368]Andre Vieira1-0/+11
2020-04-22aarch64: Implement -moutline-atomicsAndre Vieira1-0/+17
2020-04-22Add visibility to libfunc constructorsAndre Vieira1-0/+11
2020-04-22aarch64: Tidy aarch64_split_compare_and_swapAndre Vieira1-1/+10
2020-04-22Aarch64: Fix shrinkwrapping interactions with atomics (PR92692)Andre Vieira1-0/+9
2020-04-22aarch64: Implement TImode compare-and-swapAndre Vieira1-0/+18
2020-04-22aarch64: Extend %R for integer registersAndre Vieira1-0/+8
2020-04-22aarch64: Remove early clobber from ATOMIC_LDOP scratchAndre Vieira1-0/+9
2020-04-22aarch64: Improve atomic-op lse generationAndre Vieira1-0/+19
2020-04-22aarch64: Improve swp generationAndre Vieira1-0/+14
2020-04-22aarch64: Improve cas generationAndre Vieira1-0/+17
2020-04-22aarch64: Simplify LSE cas generationAndre Vieira1-0/+17
2020-04-22aarch64: Add early clobber for aarch64_store_exclusive.Andre Vieira1-0/+9
2020-04-21sra-8: Fix sra_modify_expr handling of partial writes (PR 94482)Martin Jambor1-0/+15
2020-04-20x86: Restore the frame pointer in word_modeH.J. Lu1-0/+9
2020-04-20AArch64: Fix options canonicanization for assemblerTamar Christina1-0/+9
2020-04-17x86: Insert ENDBR if function will be called indirectlyH.J. Lu1-0/+9
2020-04-15i386: Require OPTION_MASK_ISA_SSE2 for __builtin_ia32_movq128 [PR94603]Uros Bizjak1-0/+6
2020-04-15xtensa: backport fix for PR target/94584Max Filippov1-0/+9
2020-04-15xtensa: backport fix for PR target/91880Max Filippov1-0/+9
2020-04-07rs6000 pragma fix backport from mainline to gcc-8Will Schmidt1-0/+8
2020-04-07i386: Fix emit_reduc_half on V{64Q,32H}Imode [PR94500]Jakub Jelinek1-0/+6
2020-04-03gcc-8 sra: Cap number of sub-access propagations with a param (PR 93435)Martin Jambor1-0/+10
2020-04-03Backport 55a7380213a5c16120d5c674fb42b38a3d796b57Martin Liska1-0/+9
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