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-fstack-clash-protection uses the save of LR as a probe for the next
allocation. The next allocation could be:
* another part of the static frame, e.g. when allocating SVE save slots
or outgoing arguments
* an alloca in the same function
* an allocation made by a callee function
However, when -fomit-frame-pointer is used, the LR save slot is placed
above the other GPR save slots. It could therefore be up to 80 bytes
above the base of the GPR save area (which is also the hard fp address).
aarch64_allocate_and_probe_stack_space took this into account when
deciding how much subsequent space could be allocated without needing
a probe. However, it interacted badly with:
/* If doing a small final adjustment, we always probe at offset 0.
This is done to avoid issues when LR is not at position 0 or when
the final adjustment is smaller than the probing offset. */
else if (final_adjustment_p && rounded_size == 0)
residual_probe_offset = 0;
which forces any allocation that is smaller than the guard page size
to be probed at offset 0 rather than the usual offset 1024. It was
therefore possible to construct cases in which we had:
* a probe using LR at SP + 80 bytes (or some other value >= 16)
* an allocation of the guard page size - 16 bytes
* a probe at SP + 0
which allocates guard page size + 64 consecutive unprobed bytes.
This patch requires the LR probe to be in the first 16 bytes of the
save area when stack clash protection is active. Doing it
unconditionally would cause code-quality regressions.
Putting LR before other registers prevents push/pop allocation
when shadow call stacks are enabled, since LR is restored
separately from the other callee-saved registers.
The new comment doesn't say that the probe register is required
to be LR, since a later patch removes that restriction.
gcc/
* config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
the LR save slot is in the first 16 bytes of the register save area.
Only form STP/LDP push/pop candidates if both registers are valid.
(aarch64_allocate_and_probe_stack_space): Remove workaround for
when LR was not in the first 16 bytes.
gcc/testsuite/
* gcc.target/aarch64/stack-check-prologue-18.c: New test.
* gcc.target/aarch64/stack-check-prologue-19.c: Likewise.
* gcc.target/aarch64/stack-check-prologue-20.c: Likewise.
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The AArch64 ABI says that, when stack clash protection is used,
there can be a maximum of 1KiB of unprobed space at sp on entry
to a function. Therefore, we need to probe when allocating
>= guard_size - 1KiB of data (>= rather than >). This is what
GCC does.
If an allocation is exactly guard_size bytes, it is enough to allocate
those bytes and probe once at offset 1024. It isn't possible to use a
single probe at any other offset: higher would conmplicate later code,
by leaving more unprobed space than usual, while lower would risk
leaving an entire page unprobed. For simplicity, the code probes all
allocations at offset 1024.
Some register saves also act as probes. If we need to allocate
more space below the last such register save probe, we need to
probe the allocation if it is > 1KiB. Again, this allocation is
then sometimes (but not always) probed at offset 1024. This sort of
allocation is currently only used for outgoing arguments, which are
rarely this big.
However, the code also probed if this final outgoing-arguments
allocation was == 1KiB, rather than just > 1KiB. This isn't
necessary, since the register save then probes at offset 1024
as required. Continuing to probe allocations of exactly 1KiB
would complicate later patches.
gcc/
* config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
Don't probe final allocations that are exactly 1KiB in size (after
unprobed space above the final allocation has been deducted).
gcc/testsuite/
* gcc.target/aarch64/stack-check-prologue-17.c: New test.
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This patch just changes a calculation of initial_adjust
to one that makes it slightly more obvious that the total
adjustment is frame.frame_size.
gcc/
* config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
calculation of initial_adjust for frames in which all saves
are SVE saves.
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After previous patches, it no longer really makes sense to allocate
the top of the frame in terms of varargs_and_saved_regs_size and
saved_regs_and_above.
gcc/
* config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
the allocation of the top of the frame.
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reg_offset was measured from the bottom of the saved register area.
This made perfect sense with the original layout, since the bottom
of the saved register area was also the hard frame pointer address.
It became slightly less obvious with SVE, since we save SVE
registers below the hard frame pointer, but it still made sense.
However, if we want to allow different frame layouts, it's more
convenient and obvious to measure reg_offset from the bottom of
the frame. After previous patches, it's also a slight simplification
in its own right.
gcc/
* config/aarch64/aarch64.h (aarch64_frame): Add comment above
reg_offset.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
from the bottom of the frame, rather than the bottom of the saved
register area. Measure reg_offset from the bottom of the frame
rather than the bottom of the saved register area.
(aarch64_save_callee_saves): Update accordingly.
(aarch64_restore_callee_saves): Likewise.
(aarch64_get_separate_components): Likewise.
(aarch64_process_components): Likewise.
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This patch fixes another case in which a value was described with
an “upside-down” view.
gcc/
* config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
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Similarly to the previous locals_offset patch, hard_fp_offset
was described as:
/* Offset from the base of the frame (incomming SP) to the
hard_frame_pointer. This value is always a multiple of
STACK_BOUNDARY. */
poly_int64 hard_fp_offset;
which again took an “upside-down” view: higher offsets meant lower
addresses. This patch renames the field to bytes_above_hard_fp instead.
gcc/
* config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
to...
(aarch64_frame::bytes_above_hard_fp): ...this.
* config/aarch64/aarch64.cc (aarch64_layout_frame)
(aarch64_expand_prologue): Update accordingly.
(aarch64_initial_elimination_offset): Likewise.
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locals_offset was described as:
/* Offset from the base of the frame (incomming SP) to the
top of the locals area. This value is always a multiple of
STACK_BOUNDARY. */
This is implicitly an “upside down” view of the frame: the incoming
SP is at offset 0, and anything N bytes below the incoming SP is at
offset N (rather than -N).
However, reg_offset instead uses a “right way up” view; that is,
it views offsets in address terms. Something above X is at a
positive offset from X and something below X is at a negative
offset from X.
Also, even on FRAME_GROWS_DOWNWARD targets like AArch64,
target-independent code views offsets in address terms too:
locals are allocated at negative offsets to virtual_stack_vars.
It seems confusing to have *_offset fields of the same structure
using different polarities like this. This patch tries to avoid
that by renaming locals_offset to bytes_above_locals.
gcc/
* config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
(aarch64_frame::bytes_above_locals): ...this.
* config/aarch64/aarch64.cc (aarch64_layout_frame)
(aarch64_initial_elimination_offset): Update accordingly.
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After previous patches, it is no longer necessary to calculate
a chain_offset in cases where there is no chain record.
gcc/
* config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
calculation of chain_offset into the emit_frame_chain block.
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aarch64_save_callee_saves and aarch64_restore_callee_saves took
a parameter called start_offset that gives the offset of the
bottom of the saved register area from the current stack pointer.
However, it's more convenient for later patches if we use the
bottom of the entire frame as the reference point, rather than
the bottom of the saved registers.
Doing that removes the need for the callee_offset field.
Other than that, this is not a win on its own. It only really
makes sense in combination with the follow-on patches.
gcc/
* config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
callee_offset handling.
(aarch64_save_callee_saves): Replace the start_offset parameter
with a bytes_below_sp parameter.
(aarch64_restore_callee_saves): Likewise.
(aarch64_expand_prologue): Update accordingly.
(aarch64_expand_epilogue): Likewise.
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Following on from the previous bytes_below_saved_regs patch, this one
records the number of bytes that are below the hard frame pointer.
This eventually replaces below_hard_fp_saved_regs_size.
If a frame pointer is not needed, the epilogue adds final_adjust
to the stack pointer before restoring registers:
aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true);
Therefore, if the epilogue needs to restore the stack pointer from
the hard frame pointer, the directly corresponding offset is:
-bytes_below_hard_fp + final_adjust
i.e. go from the hard frame pointer to the bottom of the frame,
then add the same amount as if we were using the stack pointer
from the outset.
gcc/
* config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
field.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
(aarch64_expand_epilogue): Use it instead of
below_hard_fp_saved_regs_size.
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The frame layout code currently hard-codes the assumption that
the number of bytes below the saved registers is equal to the
size of the outgoing arguments. This patch abstracts that
value into a new field of aarch64_frame.
gcc/
* config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
field.
* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
and use it instead of crtl->outgoing_args_size.
(aarch64_get_separate_components): Use bytes_below_saved_regs instead
of outgoing_args_size.
(aarch64_process_components): Likewise.
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If a frame has no saved registers, it can be allocated in one go.
There is no need to treat the areas below and above the saved
registers as separate.
And if we allocate the frame in one go, it should be allocated
as the initial_adjust rather than the final_adjust. This allows the
frame size to grow to guard_size - guard_used_by_caller before a stack
probe is needed. (A frame with no register saves is necessarily a
leaf frame.)
This is a no-op as thing stand, since a leaf function will have
no outgoing arguments, and so all the frame will be above where
the saved registers normally go.
gcc/
* config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
allocate the frame in one go if there are no saved registers.
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When we emit the frame chain, i.e. when we reach Here in this statement
of aarch64_expand_prologue:
if (emit_frame_chain)
{
// Here
...
}
the stack is in one of two states:
- We've allocated up to the frame chain, but no more.
- We've allocated the whole frame, and the frame chain is within easy
reach of the new SP.
The offset of the frame chain from the current SP is available
in aarch64_frame as callee_offset. It is also available as the
chain_offset local variable, where the latter is calculated from other
data. (However, chain_offset is not always equal to callee_offset when
!emit_frame_chain, so chain_offset isn't redundant.)
In c600df9a4060da3c6121ff4d0b93f179eafd69d1 I switched to using
chain_offset for the initialisation of the hard frame pointer:
aarch64_add_offset (Pmode, hard_frame_pointer_rtx,
- stack_pointer_rtx, callee_offset,
+ stack_pointer_rtx, chain_offset,
tmp1_rtx, tmp0_rtx, frame_pointer_needed);
But the later REG_CFA_ADJUST_CFA handling still used callee_offset.
I think the difference is harmless, but it's more logical for the
CFA note to be in sync, and it's more convenient for later patches
if it uses chain_offset.
gcc/
* config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
chain_offset rather than callee_offset.
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aarch64_layout_frame uses a shorthand for referring to
cfun->machine->frame:
aarch64_frame &frame = cfun->machine->frame;
This patch does the same for some other heavy users of the structure.
No functional change intended.
gcc/
* config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
a local shorthand for cfun->machine->frame.
(aarch64_restore_callee_saves, aarch64_get_separate_components):
(aarch64_process_components): Likewise.
(aarch64_allocate_and_probe_stack_space): Likewise.
(aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
(aarch64_layout_frame): Use existing shorthand for one more case.
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This adds the missing optimizations here.
Note we don't need to match where CMP1 and CMP2 are complements of each
other as that is already handled elsewhere.
I added a new executable testcase to make sure we optimize it correctly
as I had originally messed up one of the entries for the resulting
comparison to make sure they were 100% correct.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR tree-optimization/107881
gcc/ChangeLog:
* match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
(`(a CMP1 b) == (a CMP2 b)`): New pattern.
gcc/testsuite/ChangeLog:
* gcc.c-torture/execute/pr107881-1.c: New test.
* gcc.dg/tree-ssa/cmpeq-4.c: New test.
* gcc.dg/tree-ssa/cmpxor-1.c: New test.
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The struct range is unused, remove it.
gcc/ChangeLog:
* config/riscv/riscv-vector-costs.h (struct range): Removed.
Signed-off-by: Pan Li <pan2.li@intel.com>
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Without the quotes some shells will always return true and some will
print an error. It should be quoted so that a null variable works as
intended.
contrib/ChangeLog:
PR other/111360
* gcc_update: Quote variable.
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These files were filtered through autopep8 to reformat them more
conventionally.
libstdc++-v3/ChangeLog:
* python/libstdcxx/v6/printers.py: Reformat.
* python/libstdcxx/v6/xmethods.py: Likewise.
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This patch support dynamic LMUL cost modeling with --param=riscv-autovec-lmul=dynamic.
Consider this following case:
void
foo (int32_t *__restrict a, int32_t *__restrict b, int32_t *__restrict c,
int32_t *__restrict a2, int32_t *__restrict b2, int32_t *__restrict c2,
int32_t *__restrict a3, int32_t *__restrict b3, int32_t *__restrict c3,
int32_t *__restrict a4, int32_t *__restrict b4, int32_t *__restrict c4,
int32_t *__restrict a5, int32_t *__restrict b5, int32_t *__restrict c5,
int32_t *__restrict d,
int32_t *__restrict d2,
int32_t *__restrict d3,
int32_t *__restrict d4,
int32_t *__restrict d5,
int n)
{
for (int i = 0; i < n; i++)
{
a[i] = b[i] + c[i];
b5[i] = b[i] + c[i];
a2[i] = b2[i] + c2[i];
a3[i] = b3[i] + c3[i];
a4[i] = b4[i] + c4[i];
a5[i] = a[i] + a4[i];
d2[i] = a2[i] + c2[i];
d3[i] = a3[i] + c3[i];
d4[i] = a4[i] + c4[i];
d5[i] = a[i] + a4[i];
a[i] = a5[i] + b5[i] + a[i];
c2[i] = a[i] + c[i];
c3[i] = b5[i] * a5[i];
c4[i] = a2[i] * a3[i];
c5[i] = b5[i] * a2[i];
c[i] = a[i] + c3[i];
c2[i] = a[i] + c4[i];
a5[i] = a[i] + a4[i];
a[i] = a[i] + b5[i] + a[i] * a2[i] * a3[i] * a4[i]
* a5[i] * c[i] * c2[i] * c3[i] * c4[i] * c5[i]
* d[i] * d2[i] * d3[i] * d4[i] * d5[i];
}
}
Demo: https://godbolt.org/z/x1acoMxGT
You can see it will produce register spilling if you specify LMUL >= 4
Now, with --param=riscv-autovec-lmul=dynamic.
GCC is able to pick LMUL = 2 to optimized this case.
This feature is supported by linear scan based local live ranges analysis and
compute maximum live V_REGS in specific program point of the function to determine the VF/LMUL.
Note that this patch can well handle both SLP and non-SLP loop.
Currenty approach didn't consider the later instruction scheduler which may improve the register pressure.
In this case, we are conservatively applying smaller VF/LMUL. (Not sure whether we should support live range shrink for such corner case since we don't known whether it can improve performance a lot.)
gcc/ChangeLog:
* config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
(compute_nregs_for_mode): Ditto.
(live_range_conflict_p): Ditto.
(max_number_of_live_regs): Ditto.
(compute_lmul): Ditto.
(costs::prefer_new_lmul_p): Ditto.
(costs::better_main_loop_than_p): Ditto.
* config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
(struct var_live_range): Ditto.
(struct autovec_info): Ditto.
* config/riscv/t-riscv: Update makefile for COST model.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-mixed-1.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-1.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-2.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-3.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-4.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-5.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-6.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-7.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-1.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-2.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-3.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-4.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-5.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-6.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-1.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-2.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-4.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-5.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-6.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-7.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-8.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-1.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-10.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-2.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-3.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-4.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-5.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-6.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-7.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-8.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/rvv-costmodel-vect.exp: New test.
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When discussing PR111369 with Andrew Pinski, I've realized that
I haven't added BITINT_TYPE handling to range_check_type. Right now
(unsigned) max + 1 == (unsigned) min for signed _BitInt,l so I think we
don't need to do the extra hops for BITINT_TYPE (though possibly we don't
need them for INTEGER_TYPE either in the two's complement word and we don't
support anything else, though I really don't know if Ada or some other
FEs don't create weird INTEGER_TYPEs).
2023-09-12 Jakub Jelinek <jakub@redhat.com>
* fold-const.cc (range_check_type): Handle BITINT_TYPE like
OFFSET_TYPE.
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The following testcase ICEs, because vn_walk_cb_data::push_partial_def
uses a fixed size buffer (64 target bytes) for its
construction/deconstruction of partial stores and fails if larger precision
than that is needed, and the PR93582 changes assert push_partial_def
succeeds (and check the various other conditions much earlier when seeing
the BIT_AND_EXPR statement, like CHAR_BIT == 8, BITS_PER_UNIT == 8,
BYTES_BIG_ENDIAN == WORDS_BIG_ENDIAN, etc.). So, just removing the assert
and allowing it fail there doesn't really work and ICEs later on.
The following patch moves the bufsize out of the method and tests it
together with the other checks.
BTW, perhaps we could increase the bufsize as well or in addition to
increasing it make the buffer allocated using XALLOCAVEC, but still I think
it is useful to have some upper bound and so I think this patch is useful
even in that case.
2023-09-12 Jakub Jelinek <jakub@redhat.com>
PR middle-end/111338
* tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
data member.
(vn_walk_cb_data::push_partial_def): Remove bufsize variable.
(visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
optimization if type's precision is too large for
vn_walk_cb_data::bufsize.
* gcc.dg/bitint-37.c: New test.
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This patch introduces -Wcase-enum which enumerates each missing
field in a case statement without an else clause providing the selector
expression type is an enum.
gcc/ChangeLog:
* doc/gm2.texi (Compiler options): Document new option
-Wcase-enum.
gcc/m2/ChangeLog:
* gm2-compiler/M2CaseList.def (PushCase): Rename parameters
r to rec and v to va. Add expr parameter.
(MissingCaseStatementBounds): New procedure function.
* gm2-compiler/M2CaseList.mod (RangePair): Add expression.
(PushCase): Rename parameters r to rec and v to va. Add
expr parameter.
(RemoveRange): New procedure function.
(SubBitRange): Detect the case when the range in the set matches
lo..hi.
(CheckLowHigh): New procedure.
(ExcludeCaseRanges): Rename parameter c to cd. Rename local
variables q to cl and r to rp.
(High): Remove.
(Low): Remove.
(DoEnumValues): Remove.
(IncludeElement): New procedure.
(IncludeElements): New procedure.
(ErrorRangeEnum): New procedure.
(ErrorRange): Remove.
(ErrorRanges): Remove.
(appendEnum): New procedure.
(appendStr): New procedure.
(EnumerateErrors): New procedure.
(MissingCaseBounds): Re-implement.
(InRangeList): Remove.
(MissingCaseStatementBounds): New procedure function.
(checkTypes): Re-format.
(inRange): Re-format.
(TypeCaseBounds): Re-format.
* gm2-compiler/M2Error.mod (GetAnnounceScope): Add noscope to
case label list.
* gm2-compiler/M2GCCDeclare.mod: Replace ForeachFieldEnumerationDo
with ForeachLocalSymDo.
* gm2-compiler/M2Options.def (SetCaseEnumChecking): New procedure.
(CaseEnumChecking): New variable.
* gm2-compiler/M2Options.mod (SetCaseEnumChecking): New procedure.
(Module initialization): set CaseEnumChecking to FALSE.
* gm2-compiler/M2Quads.def (QuadOperator): Alphabetically ordered.
* gm2-compiler/M2Quads.mod (IsBackReferenceConditional): Add else
clause.
(BuildCaseStart): Pass selector expression to InitCaseBounds.
(CheckUninitializedVariablesAreUsed): Remove.
(IsInlineWithinBlock): Remove.
(AsmStatementsInBlock): Remove.
(CheckVariablesInBlock): Remove commented code.
(BeginVarient): Pass NulSym to InitCaseBounds.
* gm2-compiler/M2Range.mod (FoldCaseBounds): New local variable
errorGenerated. Add call to MissingCaseStatementBounds.
* gm2-compiler/P3Build.bnf (CaseEndStatement): Call ElseCase.
* gm2-compiler/PCSymBuild.mod (InitDesExpr): Add else clause.
(InitFunction): Add else clause.
(InitConvert): Add else clause.
(InitLeaf): Add else clause.
(InitBinary): Add else clause.
(InitUnary): Add else clause.
* gm2-compiler/SymbolTable.def (GetNth): Re-write comment.
(ForeachFieldEnumerationDo): Re-write comment stating alphabetical
traversal.
* gm2-compiler/SymbolTable.mod (GetNth): Re-write comment.
Add case label for EnumerationSym and call GetItemFromList.
(ForeachFieldEnumerationDo): Re-write comment stating alphabetical
traversal.
(SymEnumeration): Add ListOfFields used for declaration order.
(MakeEnumeration): Initialize ListOfFields.
(PutFieldEnumeration): Include Field in ListOfFields.
* gm2-gcc/m2options.h (M2Options_SetCaseEnumChecking): New
function.
* gm2-lang.cc (gm2_langhook_handle_option): Add
OPT_Wcase_enum case and call M2Options_SetCaseEnumChecking.
* lang.opt (Wcase-enum): Add.
gcc/testsuite/ChangeLog:
* gm2/switches/case/fail/missingclause.mod: New test.
* gm2/switches/case/fail/switches-case-fail.exp: New test.
* gm2/switches/case/pass/enumcase.mod: New test.
* gm2/switches/case/pass/enumcase2.mod: New test.
* gm2/switches/case/pass/switches-case-pass.exp: New test.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
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For non-'dg-do run' test cases, that means: big 'dg-require-stack-size' need
not be UNSUPPORTED (and indeed now do all PASS), 'dg-add-options stack_size'
need not define (and thus limit) 'STACK_SIZE' (and still do all PASS).
Re "Find 'dg-do-what' in an outer frame", currently (sources not completely
clean, though), we've got:
$ git grep -F 'check_effective_target_stack_size: found dg-do-what at level ' -- build-gcc/\*.log | sort | uniq -c
6 build-gcc/gcc/testsuite/gcc/gcc.log:check_effective_target_stack_size: found dg-do-what at level 2
267 build-gcc/gcc/testsuite/gcc/gcc.log:check_effective_target_stack_size: found dg-do-what at level 3
239 build-gcc/gcc/testsuite/gcc/gcc.log:check_effective_target_stack_size: found dg-do-what at level 4
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_stack_size): For
nvptx target, stack size limits are relevant for execution only.
gcc/
* doc/sourcebuild.texi (stack_size): Update.
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This patch implements expansions for the cmpstrsi and cmpstrnsi
builtins for RV32/RV64 for xlen-aligned strings if Zbb or XTheadBb
instructions are available. The expansion basically emits a comparison
sequence which compares XLEN bits per step if possible.
This allows to inline calls to strcmp() and strncmp() if both strings
are xlen-aligned. For strncmp() the length parameter needs to be known.
The benefits over calls to libc are:
* no call/ret instructions
* no stack frame allocation
* no register saving/restoring
* no alignment tests
The inlining mechanism is gated by a new switches ('-minline-strcmp' and
'-minline-strncmp') and by the variable 'optimize_size'.
The amount of emitted unrolled loop iterations can be controlled by the
parameter '--param=riscv-strcmp-inline-limit=N', which defaults to 64.
The comparision sequence is inspired by the strcmp example
in the appendix of the Bitmanip specification (incl. the fast
result calculation in case the first word does not contain
a NULL byte). Additional inspiration comes from rs6000-string.c.
The emitted sequence is not triggering any readahead pagefault issues,
because only aligned strings are accessed by aligned xlen-loads.
This patch has been tested using the glibc string tests on QEMU:
* rv64gc_zbb/rv64gc_xtheadbb with riscv-strcmp-inline-limit=64
* rv64gc_zbb/rv64gc_xtheadbb with riscv-strcmp-inline-limit=8
* rv32gc_zbb/rv32gc_xtheadbb with riscv-strcmp-inline-limit=64
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
gcc/ChangeLog:
* config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
(<optab>_not<mode>3): Likewise.
* config/riscv/riscv-protos.h (riscv_expand_strcmp): New
prototype.
* config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
macros.
(GEN_EMIT_HELPER2): Likewise.
(emit_strcmp_scalar_compare_byte): New function.
(emit_strcmp_scalar_compare_subword): Likewise.
(emit_strcmp_scalar_compare_word): Likewise.
(emit_strcmp_scalar_load_and_compare): Likewise.
(emit_strcmp_scalar_call_to_libc): Likewise.
(emit_strcmp_scalar_result_calculation_nonul): Likewise.
(emit_strcmp_scalar_result_calculation): Likewise.
(riscv_expand_strcmp_scalar): Likewise.
(riscv_expand_strcmp): Likewise.
* config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
INSN name.
(@slt<u>_<X:mode><GPR:mode>3): Likewise.
(cmpstrnsi): Invoke expansion function for str(n)cmp.
(cmpstrsi): Likewise.
* config/riscv/riscv.opt: Add new parameter
'-mstring-compare-inline-limit'.
* doc/invoke.texi: Document new parameter
'-mstring-compare-inline-limit'.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/xtheadbb-strcmp.c: New test.
* gcc.target/riscv/zbb-strcmp-disabled-2.c: New test.
* gcc.target/riscv/zbb-strcmp-disabled.c: New test.
* gcc.target/riscv/zbb-strcmp-unaligned.c: New test.
* gcc.target/riscv/zbb-strcmp.c: New test.
Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
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This patch implements the expansion of the strlen builtin for RV32/RV64
for xlen-aligned aligned strings if Zbb or XTheadBb instructions are available.
The inserted sequences are:
rv32gc_zbb (RV64 is similar):
add a3,a0,4
li a4,-1
.L1: lw a5,0(a0)
add a0,a0,4
orc.b a5,a5
beq a5,a4,.L1
not a5,a5
ctz a5,a5
srl a5,a5,0x3
add a0,a0,a5
sub a0,a0,a3
rv64gc_xtheadbb (RV32 is similar):
add a4,a0,8
.L2: ld a5,0(a0)
add a0,a0,8
th.tstnbz a5,a5
beqz a5,.L2
th.rev a5,a5
th.ff1 a5,a5
srl a5,a5,0x3
add a0,a0,a5
sub a0,a0,a4
This allows to inline calls to strlen(), with optimized code for
xlen-aligned strings, resulting in the following benefits over
a call to libc:
* no call/ret instructions
* no stack frame allocation
* no register saving/restoring
* no alignment test
The inlining mechanism is gated by a new switch ('-minline-strlen')
and by the variable 'optimize_size'.
Tested using the glibc string tests.
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
gcc/ChangeLog:
* config.gcc: Add new object riscv-string.o.
riscv-string.cc.
* config/riscv/riscv-protos.h (riscv_expand_strlen):
New function.
* config/riscv/riscv.md (strlen<mode>): New expand INSN.
* config/riscv/riscv.opt: New flag 'minline-strlen'.
* config/riscv/t-riscv: Add new object riscv-string.o.
* config/riscv/thead.md (th_rev<mode>2): Export INSN name.
(th_rev<mode>2): Likewise.
(th_tstnbz<mode>2): New INSN.
* doc/invoke.texi: Document '-minline-strlen'.
* emit-rtl.cc (emit_likely_jump_insn): New helper function.
(emit_unlikely_jump_insn): Likewise.
* rtl.h (emit_likely_jump_insn): New prototype.
(emit_unlikely_jump_insn): Likewise.
* config/riscv/riscv-string.cc: New file.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/xtheadbb-strlen-unaligned.c: New test.
* gcc.target/riscv/xtheadbb-strlen.c: New test.
* gcc.target/riscv/zbb-strlen-disabled-2.c: New test.
* gcc.target/riscv/zbb-strlen-disabled.c: New test.
* gcc.target/riscv/zbb-strlen-unaligned.c: New test.
* gcc.target/riscv/zbb-strlen.c: New test.
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build-tree testing (instead of build-time 'CC' etc.) [PR91884, PR109951]
This is commit c8e759b4215ba4b376c9d468aeffe163b3d520f0 (Subversion r279708)
"libgomp/test: Fix compilation for build sysroot" and follow-up
commit 749bd22ddc50b5112e5ed506ffef7249bf8e6fb3
"libgomp/test: Remove a build sysroot fix regression" done differently,
avoiding build-tree testing use of any random gunk that may appear in
build-time 'CC', 'CXX', 'FC'.
PR testsuite/91884
PR testsuite/109951
libgomp/
* configure.ac: Revert earlier changes, instead
'AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET)'.
* Makefile.in: Regenerate.
* configure: Likewise.
* testsuite/Makefile.in: Likewise.
* testsuite/lib/libgomp.exp (libgomp_init): Remove
"Fix up '-funconfigured-libstdc++-v3' in 'GXX_UNDER_TEST'" code.
If '--with-build-sysroot=[...]' was specified, use it for
build-tree testing.
* testsuite/libgomp-site-extra.exp.in (GCC_UNDER_TEST)
(GXX_UNDER_TEST, GFORTRAN_UNDER_TEST): Don't set.
(SYSROOT_CFLAGS_FOR_TARGET): Set.
* testsuite/libgomp.c++/c++.exp (lang_source_re)
(lang_include_flags): Set for build-tree testing.
* testsuite/libgomp.oacc-c++/c++.exp (lang_source_re)
(lang_include_flags): Likewise.
Co-authored-by: Chung-Lin Tang <cltang@codesourcery.com>
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..., where we need to use it (separate commits) for build-tree testing, similar
to 'gcc/Makefile.in:site.exp':
# TEST_ALWAYS_FLAGS are flags that should be passed to every compilation.
# They are passed first to allow individual tests to override them.
@echo "set TEST_ALWAYS_FLAGS \"$(SYSROOT_CFLAGS_FOR_TARGET)\"" >> ./site.tmp
PR testsuite/109951
* Makefile.tpl (BASE_TARGET_EXPORTS): Add
'SYSROOT_CFLAGS_FOR_TARGET'.
* Makefile.in: Regenerate.
Co-authored-by: Chung-Lin Tang <cltang@codesourcery.com>
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Walk expression tree of the 'allocator' clause of 'omp allocate' to
detect more cases where the allocator expression depends on code between
a variable declaration and its associated '#pragma omp allocate'. It also
contains the fix for the 'allocator((omp_allocator_handle_t)-1)' ICE, also
tested for in previous commit.
The changes of this commit were supposed to be part of
r14-3863-g35f498d8dfc8e579eaba2ff2d2b96769c632fd58
OpenMP (C only): omp allocate - extend parsing support, improve diagnostic
which also contains the associated testcase changes but were left out (oops!).
gcc/c/ChangeLog:
* c-parser.cc (struct c_omp_loc_tree): New.
(c_check_omp_allocate_allocator_r): New; checking moved from ...
(c_parser_omp_allocate): ... here. Call it via walk_tree. Avoid
ICE with tree_to_shwi for invalid too-large value.
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This patch adds all missed cond autovec testcases. For not support
cond patterns, the following patches will be sent to fix it.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/cond/cond_arith-1.c: Add vrem op.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_arith-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_run-1.c: Moved to...
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max_run-1.c: ...here.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_run-2.c: Moved to...
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max_run-2.c: ...here.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_run-3.c: Moved to...
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max_run-3.c: ...here.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_run-4.c: Moved to...
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max_run-4.c: ...here.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_run-5.c: Moved to...
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max_run-5.c: ...here.
* gcc.target/riscv/rvv/autovec/cond/cond_logical-1.c: Removed.
* gcc.target/riscv/rvv/autovec/cond/cond_logical-2.c: Removed.
* gcc.target/riscv/rvv/autovec/cond/cond_logical-3.c: Removed.
* gcc.target/riscv/rvv/autovec/cond/cond_logical-4.c: Removed.
* gcc.target/riscv/rvv/autovec/cond/cond_logical-5.c: Removed.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_logical_min_max-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-1.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-2.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-4.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-5.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-6.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-7.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-8.c: New test.
* gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-9.c: New test.
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This fixes up commit f8b15e177155960017ac0c5daef8780d1127f91c
"[nvptx] Use .alias directive for mptx >= 6.3", which regressed in
particular C++ test cases if the new '-malias' flag was not active.
In that case, we have to maintain (that is now, restore) the previous
state of 'TARGET_USE_LOCAL_THUNK_ALIAS_P', 'TARGET_SUPPORTS_ALIASES'.
The remaining three regressions are to be resolved via
<https://inbox.sourceware.org/87ledgzxcl.fsf@euler.schwinge.homeip.net>
"More '#ifdef ASM_OUTPUT_DEF' -> 'if (TARGET_SUPPORTS_ALIASES)' etc.".
gcc/
* config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
(TARGET_SUPPORTS_ALIASES): Define.
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This extends commit 4d706ff86ea86868615558e92407674a4f4b4af9
"Add dg test for matching function bodies" for nvptx.
gcc/testsuite/
* lib/scanasm.exp (configure_check-function-bodies): New proc.
(parse_function_bodies, check-function-bodies): Use it.
gcc/
* doc/sourcebuild.texi (check-function-bodies): Update.
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Remove new symbols from all namespaces they may have been added to in case a
statement mismatches in the end and all the symbols referenced in it have to
be reverted.
This fixes memory errors and random internal compiler errors caused by
a new symbol left with dangling pointers but not properly removed from the
namespace at statement rejection.
Before this change, new symbols were removed from their own namespace
(their ns field) only. This change additionally removes them from the
namespaces pointed to by respectively the gfc_current_ns global variable,
and the symbols' formal_ns field.
PR fortran/110996
gcc/fortran/ChangeLog:
* gfortran.h (gfc_release_symbol): Set return type to bool.
* symbol.cc (gfc_release_symbol): Ditto. Return whether symbol was
freed.
(delete_symbol_from_ns): New, outline code from...
(gfc_restore_last_undo_checkpoint): ... here. Delete new symbols
from two more namespaces.
gcc/testsuite/ChangeLog:
* gfortran.dg/pr110996.f90: New test.
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The 'allocate' directive can be used for both stack and static variables.
While the parser in C and C++ was pre-existing, it missed several
diagnostics, which this commit adds - for now only for C.
While the "sorry, unimplemented" for static variables is still issues
during parsing, the sorry for stack variables is now issued in the
middle end, preparing for the actual implementation. (Again: only for C.)
gcc/c/ChangeLog:
* c-parser.cc (c_parser_omp_construct): Move call to
c_parser_omp_allocate to ...
(c_parser_pragma): ... here.
(c_parser_omp_allocate): Avoid ICE is allocator could not be
parsed; set 'omp allocate' attribute for stack/automatic variables
and only reject static variables; add several additional
restriction checks.
* c-tree.h (c_mark_decl_jump_unsafe_in_current_scope): New prototype.
* c-decl.cc (decl_jump_unsafe): Return true for omp-allocated decls.
(c_mark_decl_jump_unsafe_in_current_scope): New.
(warn_about_goto, c_check_switch_jump_warnings): Add error for
omp-allocated decls.
gcc/ChangeLog:
* gimplify.cc (gimplify_bind_expr): Check for
insertion after variable cleanup. Convert 'omp allocate'
var-decl attribute to GOMP_alloc/GOMP_free calls.
gcc/testsuite/ChangeLog:
* c-c++-common/gomp/allocate-5.c: Fix testcase; make some
dg-messages for 'sorry' as c++, only.
* c-c++-common/gomp/directive-1.c: Make a 'sorry' c++ only.
* c-c++-common/gomp/allocate-9.c: New test.
* c-c++-common/gomp/allocate-11.c: New test.
* c-c++-common/gomp/allocate-12.c: New test.
* c-c++-common/gomp/allocate-14.c: New test.
* c-c++-common/gomp/allocate-15.c: New test.
* c-c++-common/gomp/allocate-16.c: New test.
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The following is the content of class vcreate:
class vcreate : public function_base
{
public:
gimple *fold (gimple_folder &f) const override
{
....
}
rtx expand (function_expander &e) const override
{
return NULL_RTX;
}
};
The warning caused is:
./riscv-gcc/gcc/config/riscv/riscv-vector-builtins-bases.cc:1719:34:
warning: unused parameter 'e' [-Wunused-parameter]
rtx expand (function_expander &e) const override
^
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: remove unused
parameter e and replace NULL_RTX with gcc_unreachable.
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Reorganize recursive type checking to use a structure to
store information collected during the recursion and
returned to the caller (warning_needed, enum_and_init_p,
different_types_p).
gcc/c:
* c-typeck.cc (struct comptypes_data): Add structure.
(tagged_types_tu_compatible_p,
function_types_compatible_p, type_lists_compatible_p,
comptypes_internal): Add structure to interface, change
return type to bool, and adapt calls.
(comptarget_types): Change return type too bool.
(comptypes, comptypes_check_enum_int,
comptypes_check_different_types): Adapt calls.
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gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
* config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
(SHAPE): Ditto.
* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
* config/riscv/riscv-vector-builtins.cc: Add args type.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/tuple_create.c: New test.
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ineffective
So that zcmp can be enabled in -Os where
shrink-wrap-separate is not effective.
To force enabling zcmp multi push/pop in speed perfered case,
fno-shrink-wrap-separate has to be explictly given.
gcc/ChangeLog:
* config/riscv/riscv.cc
(riscv_avoid_shrink_wrapping_separate): wrap the condition check in
riscv_avoid_shrink_wrapping_separate.
(riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
is active.
(riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rv32e_zcmp.c: remove -fno-shrink-wrap-separate
* gcc.target/riscv/rv32i_zcmp.c: likewise
* gcc.target/riscv/zcmp_push_fpr.c: likewise
* gcc.target/riscv/zcmp_stack_alignment.c: likewise
* gcc.target/riscv/zcmp_shrink_wrap_separate.c: New test.
* gcc.target/riscv/zcmp_shrink_wrap_separate2.c: New test.
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No functional changes but restructure and expose use_shrink_wrapping_separate
to the TARGETs.
gcc/ChangeLog:
* shrink-wrap.cc (try_shrink_wrapping_separate):call
use_shrink_wrapping_separate.
(use_shrink_wrapping_separate): wrap the condition
check in use_shrink_wrapping_separate.
* shrink-wrap.h (use_shrink_wrapping_separate): add to extern
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cc1gm2 issues a runtime case statement error and terminates
when building SeqFile.lo on Fedora mock. There are four
missing labels from the largest case statement in M2SymInit.mod.
This patch adds the case labels and appropriate actions.
gcc/m2/ChangeLog:
PR modula2/111330
* gm2-compiler/M2SymInit.mod (CheckReadBeforeInitQuad): Add
case labels LogicalDiffOp, DummyOp, OptParamOp and
InitAddressOp.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
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minmax<b, c>` pattern
When I added this pattern in r14-337-gc43819a9b4cd, I had missed the :c on the cmp
part of the pattern meaning there might be some missing optimizations happening.
The testcase shows an example of the missed optmization.
Committed as obvious after a bootstrap/test on x86_64-linux-gnu.
PR tree-optimization/111348
gcc/ChangeLog:
* match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
the cmp part of the pattern.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/minmax-26.c: New test.
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PR target/111340
gcc/ChangeLog:
* config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
Call output_addr_const for CASE_CONST_SCALAR_INT.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr111340.c: New test.
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Updates the THEAD instructions to ensure that no insn is left
without a type attribute.
Tested for regressions using rv32/64 multilib for linux/newlib.
gcc/Changelog:
* config/riscv/thead.md: Update types
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
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Adds types to riscv instructions that were added or were
missed by the original patch
https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628996.html
gcc/ChangeLog:
* config/riscv/riscv.md: Update types
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
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Creates a new "zicond" type and updates all zicond instructions
with that type.
gcc/ChangeLog:
* config/riscv/riscv.md: Add "zicond" type
* config/riscv/zicond.md: Update types
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
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Adds types to the untyped zc instructions. Creates a new
types "pushpop" and "mvpair" for now
gcc/ChangeLog:
* config/riscv/riscv.md: Add "pushpop" and "mvpair" types
* config/riscv/zc.md: Update types
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
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Adds types to vector instructions that were added after or were
missed by the original patch
https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628594.html
gcc/ChangeLog:
* config/riscv/autovec-opt.md: Update types
* config/riscv/autovec.md: likewise
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
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gcc/ChangeLog:
* config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
builtin flag.
(s390_vec_unsigned_flt): Ditto.
(s390_vec_revb_flt): Ditto.
(s390_vec_reve_flt): Ditto.
(s390_vclfnhs): Fix operand flags.
(s390_vclfnls): Ditto.
(s390_vcrnfs): Ditto.
(s390_vcfn): Ditto.
(s390_vcnf): Ditto.
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The second argument of these builtins is an unsigned immediate. For
vec_rli the API allows immediates up to 64 bits whereas the instruction
verll only allows immediates up to 32 bits. Since the shift count
equals the immediate modulo vector element size, truncating those
immediates is fine.
Passing a non-immediate argument to vec_rli already results in an error
message without this patch:
t.c: In function ‘foo’:
t.c:7:10: error: invalid argument 2 for builtin ‘__builtin_s390_verllf’
7 | return __builtin_s390_vec_rli (v, x);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Whereas with this patch
t.c: In function 'foo':
t.c:7:10: error: constant value required for builtin '__builtin_s390_verllf' argument 2
7 | return __builtin_s390_vec_rli (v, x);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
the error message, generated by s390_const_operand_ok, clearly speaks
about a constant argument value.
gcc/ChangeLog:
* config/s390/s390-builtins.def (O_U64): New.
(O1_U64): Ditto.
(O2_U64): Ditto.
(O3_U64): Ditto.
(O4_U64): Ditto.
(O_M12): Change bit position.
(O_S2): Ditto.
(O_S3): Ditto.
(O_S4): Ditto.
(O_S5): Ditto.
(O_S8): Ditto.
(O_S12): Ditto.
(O_S16): Ditto.
(O_S32): Ditto.
(O_ELEM): Ditto.
(O_LIT): Ditto.
(OB_DEF_VAR): Add operand constraints.
(B_DEF): Ditto.
* config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
operands.
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