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2016-06-05Daily bump.GCC Administrator1-1/+1
From-SVN: r237097
2016-06-04PR c/48116 - -Wreturn-type does not work as advertisedMartin Sebor2-2/+13
gcc/ChangeLog: 2016-06-04 Martin Sebor <msebor@redhat.com> Marcin Baczyński <marbacz@gmail.com> PR c/48116 * doc/invoke.texi (-Wreturn-type): Mention not warning on return with a void expression in a void function. Co-Authored-By: Marcin Baczyński <marbacz@gmail.com> From-SVN: r237093
2016-06-04tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Do not check aux; dump ↵Jan Hubicka2-16/+83
reasons of decisions. * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Do not check aux; dump reasons of decisions. (should_duplicate_loop_header_p): Likewise. (do_while_loop_p): Likewise. (ch_base::copy_headers): Dump asi num insns duplicated. From-SVN: r237092
2016-06-04re PR tree-optimization/71405 (ICE on valid C++ code at -Os and above on ↵Jakub Jelinek4-3/+44
x86_64-linux-gnu: verify_gimple failed) PR tree-optimization/71405 * tree-ssa.c (execute_update_addresses_taken): For clobber with incompatible type, build a new clobber with the right type instead of building a VIEW_CONVERT_EXPR around it. * g++.dg/torture/pr71405.C: New test. From-SVN: r237091
2016-06-04re PR tree-optimization/52171 (memcmp/strcmp/strncmp can be optimized when ↵Oleg Endo2-2/+8
the result is tested for [in]equality with 0) gcc/ChangeLog PR tree-optimization/52171 * config/sh/sh.c (sh_use_by_pieces_infrastructure_p): Use by_pieces_ninsns instead of move_by_pieces_ninsns. From-SVN: r237090
2016-06-04re PR c++/70202 (ICE on invalid code on x86_64-linux-gnu in ↵Paolo Carlini5-6/+27
build_simple_base_path, at cp/class.c:579) /cp 2016-06-04 Paolo Carlini <paolo.carlini@oracle.com> PR c++/70202 * parser.c (cp_parser_class_head): When xref_basetypes fails and emits an error do not zero the type. /testsuite 2016-06-04 Paolo Carlini <paolo.carlini@oracle.com> PR c++/70202 * g++.dg/inherit/crash5.C: New. * g++.dg/inherit/virtual1.C: Adjust. From-SVN: r237089
2016-06-04Avoid potential slient wrong-code with reg+reg addr. modes on SH.Oleg Endo2-2/+15
gcc/ * config/sh/sh.c (sh_print_operand_address): Don't use hardcoded 'r0' for reg+reg addressing mode. From-SVN: r237088
2016-06-04Daily bump.GCC Administrator1-1/+1
From-SVN: r237087
2016-06-03re PR tree-optimization/71316 (test case gcc.dg/tree-ssa/ssa-dom-thread-4.c ↵Jeff Law2-5/+9
fails starting with r236831) PR tree-optimization/71316 * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Update expected output. From-SVN: r237083
2016-06-03vect-live-1.c: Remove dg-options.Jakub Jelinek7-6/+16
* gcc.dg/vect/vect-live-1.c: Remove dg-options. Add dg-additional-options with just -fno-tree-scev-cprop in it. * gcc.dg/vect/vect-live-2.c: Likewise. * gcc.dg/vect/vect-live-5.c: Likewise. * gcc.dg/vect/vect-live-slp-1.c: Likewise. * gcc.dg/vect/vect-live-slp-2.c: Likewise. * gcc.dg/vect/vect-live-slp-3.c: Likewise. From-SVN: r237082
2016-06-03* sr.po: Update.Joseph Myers2-6/+8
From-SVN: r237079
2016-06-03re PR c++/27100 (ICE with multiple friend declarations)Patrick Palka4-2/+38
Fix PR c++/27100 gcc/cp/ChangeLog: PR c++/27100 * decl.c (duplicate_decls): Properly copy the DECL_PENDING_INLINE_P, DECL_PENDING_INLINE_INFO and DECL_SAVED_FUNCTION_DATA fields from OLDDECL to NEWDECL. gcc/testsuite/ChangeLog: PR c++/27100 * g++.dg/other/friend6.C: New test. From-SVN: r237078
2016-06-03rs6000-c.c (c/c-tree.h): Add #include.Bill Schmidt4-0/+45
[gcc] 2016-06-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * rs6000-c.c (c/c-tree.h): Add #include. (altivec_resolve_overloaded_builtin): Handle ARRAY_TYPE arguments in C++ when found in the base position of vec_ld or vec_st. [gcc/testsuite] 2016-06-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * g++.dg/torture/ppc-ldst-array.C: New. From-SVN: r237077
2016-06-03tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop): Avoid use of ↵Jan Hubicka3-7/+19
profile unless profile status is PROFILE_READ. * tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop): Avoid use of profile unless profile status is PROFILE_READ. * profile.c (compute_branch_probabilities): Set profile status only after reporting predictor hitrates. From-SVN: r237076
2016-06-03Add option for whether ceil etc. can raise "inexact", adjust x86 conditions.Joseph Myers17-52/+394
In ISO C99/C11, the ceil, floor, round and trunc functions may or may not raise the "inexact" exception for noninteger arguments. Under TS 18661-1:2014, the C bindings for IEEE 754-2008, these functions are prohibited from raising "inexact", in line with the general rule that "inexact" is only when the mathematical infinite precision result of a function differs from the result after rounding to the target type. GCC has no option to select TS 18661 requirements for not raising "inexact" when expanding built-in versions of these functions inline. Furthermore, even given such requirements, the conditions on the x86 insn patterns for these functions are unnecessarily restrictive. I'd like to make the out-of-line glibc versions follow the TS 18661 requirements; in the cases where this slows them down (the cases using x87 floating point), that makes it more important for inline versions to be used when the user does not care about "inexact". This patch fixes these issues. A new option -fno-fp-int-builtin-inexact is added to request TS 18661 rules for these functions; the default -ffp-int-builtin-inexact reflects that such exceptions are allowed by C99 and C11. (The intention is that if C2x incorporates TS 18661-1, then the default would change in C2x mode.) The x86 built-ins for rint (x87, SSE2 and SSE4.1) are made unconditionally available (no longer depending on -funsafe-math-optimizations or -fno-trapping-math); "inexact" is correct for noninteger arguments to rint. For floor, ceil and trunc, the x87 and SSE2 built-ins are OK if -ffp-int-builtin-inexact or -fno-trapping-math (they may raise "inexact" for noninteger arguments); the SSE4.1 built-ins are made to use ROUND_NO_EXC so that they do not raise "inexact" and so are OK unconditionally. Now, while there was no semantic reason for depending on -funsafe-math-optimizations, the insn patterns had such a dependence because of use of gen_truncxf<mode>2_i387_noop to truncate back to SFmode or DFmode after using frndint in XFmode. In this case a no-op truncation is safe because rounding to integer always produces an exactly representable value (the same reason why IEEE semantics say it shouldn't produce "inexact") - but of course that insn pattern isn't safe because it would also match cases where the truncation is not in fact a no-op. To allow frndint to be used for SFmode and DFmode without that unsafe pattern, the relevant frndint patterns are extended to SFmode and DFmode or new SFmode and DFmode patterns added, so that the frndint operation can be represented in RTL as an operation acting directly on SFmode or DFmode without the extension and the problematic truncation. A generic test of the new option is added, as well as x86-specific tests, both execution tests including the generic test with different x86 options and scan-assembler tests verifying that functions that should be inlined with different options are indeed inlined. I think other architectures are OK for TS 18661-1 semantics already. Considering those defining "ceil" patterns: aarch64, arm, rs6000, s390 use instructions that do not raise "inexact"; nvptx does not support floating-point exceptions. (This does mean the -f option in fact only affects one architecture, but I think it should still be a -f option; it's logically architecture-independent and is expected to be affected by future -std options, so is similar to e.g. -fexcess-precision=, which also does nothing on most architectures but is implied by -std options.) Bootstrapped with no regressions on x86_64-pc-linux-gnu. OK to commit? PR target/71276 PR target/71277 gcc: * common.opt (ffp-int-builtin-inexact): New option. * doc/invoke.texi (-fno-fp-int-builtin-inexact): Document. * doc/md.texi (floor@var{m}2, btrunc@var{m}2, round@var{m}2) (ceil@var{m}2): Document dependence on this option. * ipa-inline-transform.c (inline_call): Handle flag_fp_int_builtin_inexact. * ipa-inline.c (can_inline_edge_p): Likewise. * config/i386/i386.md (rintxf2): Do not test flag_unsafe_math_optimizations. (rint<mode>2_frndint): New define_insn. (rint<mode>2): Do not test flag_unsafe_math_optimizations for 387 or !flag_trapping_math for SSE. Just use gen_rint<mode>2_frndint for 387 instead of extending and truncating. (frndintxf2_<rounding>): Test flag_fp_int_builtin_inexact || !flag_trapping_math instead of flag_unsafe_math_optimizations. Change to frndint<mode>2_<rounding>. (frndintxf2_<rounding>_i387): Likewise. Change to frndint<mode>2_<rounding>_i387. (<rounding_insn>xf2): Likewise. (<rounding_insn><mode>2): Test flag_fp_int_builtin_inexact || !flag_trapping_math instead of flag_unsafe_math_optimizations for x87. Test TARGET_ROUND || !flag_trapping_math || flag_fp_int_builtin_inexact instead of !flag_trapping_math for SSE. Use ROUND_NO_EXC in constant operand of gen_sse4_1_round<mode>2. Just use gen_frndint<mode>2_<rounding> for 387 instead of extending and truncating. gcc/testsuite: * gcc.dg/torture/builtin-fp-int-inexact.c, gcc.target/i386/387-builtin-fp-int-inexact.c, gcc.target/i386/387-rint-inline-1.c, gcc.target/i386/387-rint-inline-2.c, gcc.target/i386/sse2-builtin-fp-int-inexact.c, gcc.target/i386/sse2-rint-inline-1.c, gcc.target/i386/sse2-rint-inline-2.c, gcc.target/i386/sse4_1-builtin-fp-int-inexact.c, gcc.target/i386/sse4_1-rint-inline.c: New tests. From-SVN: r237074
2016-06-03Implement x86 interrupt attributeH.J. Lu55-15/+2031
The interrupt and exception handlers are called by x86 processors. X86 hardware pushes information onto stack and calls the handler. The requirements are 1. Both interrupt and exception handlers must use the 'IRET' instruction, instead of the 'RET' instruction, to return from the handlers. 2. All registers are callee-saved in interrupt and exception handlers. 3. The difference between interrupt and exception handlers is the exception handler must pop 'ERROR_CODE' off the stack before the 'IRET' instruction. The design goals of interrupt and exception handlers for x86 processors are: 1. Support both 32-bit and 64-bit modes. 2. Flexible for compilers to optimize. 3. Easy to use by programmers. To implement interrupt and exception handlers for x86 processors, a compiler should support: 'interrupt' attribute Use this attribute to indicate that the specified function with mandatory arguments is an interrupt or exception handler. The compiler generates function entry and exit sequences suitable for use in an interrupt handler when this attribute is present. The 'IRET' instruction, instead of the 'RET' instruction, is used to return from interrupt or exception handlers. All registers, except for the EFLAGS register which is restored by the 'IRET' instruction, are preserved by the compiler. Since GCC doesn't preserve MPX, SSE, MMX nor x87 states, the GCC option, -mgeneral-regs-only, should be used to compile interrupt and exception handlers. Note for compiler implementers: If the compiler generates MPX, SSE, MMX or x87 instructions in an interrupt or exception handler, or functions called from an interrupt or exception handler may contain MPX, SSE, MMX or x87 instructions, the compiler must save and restore the corresponding state. Since the direction flag in the FLAGS register in interrupt (exception) handlers is undetermined, cld instruction must be emitted in function prologue if rep string instructions are used in interrupt (exception) handler or interrupt (exception) handler isn't a leaf function. Any interruptible-without-stack-switch code must be compiled with -mno-red-zone since interrupt handlers can and will, because of the hardware design, touch the red zone. 1. interrupt handler must be declared with a mandatory pointer argument: struct interrupt_frame; __attribute__ ((interrupt)) void f (struct interrupt_frame *frame) { ... } and user must properly define the structure the pointer pointing to. 2. exception handler: The exception handler is very similar to the interrupt handler with a different mandatory function signature: typedef unsigned int uword_t __attribute__ ((mode (__word__))); struct interrupt_frame; __attribute__ ((interrupt)) void f (struct interrupt_frame *frame, uword_t error_code) { ... } and compiler pops the error code off stack before the 'IRET' instruction. The exception handler should only be used for exceptions which push an error code and all other exceptions must use the interrupt handler. The system will crash if the wrong handler is used. 'no_caller_saved_registers' attribute Use this attribute to indicate that the specified function has no caller-saved registers. That is, all registers are callee-saved. The compiler generates proper function entry and exit sequences to save and restore any modified registers, except for the EFLAGS register. Since GCC doesn't preserve MPX, SSE, MMX nor x87 states, the GCC option, -mgeneral-regs-only, should be used to compile functions with 'no_caller_saved_registers'attribute. Note for compiler implementers: If the compiler generates MPX, SSE, MMX or x87 instructions in a function with 'no_caller_saved_registers' attribute or functions called from a function with 'no_caller_saved_registers' attribute may contain MPX, SSE, MMX or x87 instructions, the compiler must save and restore the corresponding state. The user can call functions specified with 'no_caller_saved_registers' attribute from an interrupt handler without saving and restoring all call clobbered registers. On x86, interrupt handlers are only called by processors which push interrupt data onto stack at the address where the normal return address is. Interrupt handlers must access interrupt data via pointers so that they can update interrupt data. gcc/ PR target/66960 PR target/67630 PR target/67634 PR target/67841 PR target/68037 PR target/68618 PR target/68661 PR target/69575 PR target/69596 PR target/69734 * config/i386/i386-protos.h (ix86_epilogue_uses): New prototype. * config/i386/i386.c (ix86_conditional_register_usage): Preserve all registers, except for function return registers if there are no caller-saved registers. (ix86_set_func_type): New function. (ix86_set_current_function): Call ix86_set_func_type to set no_caller_saved_registers and func_type. Call reinit_regs if caller-saved registers are changed. Don't allow MPX, SSE, MMX nor x87 instructions in interrupt handler nor function with no_caller_saved_registers attribute. (ix86_function_ok_for_sibcall): Return false if there are no caller-saved registers. (type_natural_mode): Don't warn ABI change for MMX in interrupt handler. (ix86_function_arg_advance): Skip for callee in interrupt handler. (ix86_function_arg): Return special arguments in interrupt handler. (ix86_promote_function_mode): Promote pointer to word_mode only for normal functions. (ix86_can_use_return_insn_p): Don't use `ret' instruction in interrupt handler. (ix86_epilogue_uses): New function. (ix86_hard_regno_scratch_ok): Likewise. (ix86_save_reg): Preserve all registers in interrupt handler after reload. Preserve all registers, except for function return registers, if there are no caller-saved registers after reload. (find_drap_reg): Always use callee-saved register if there are no caller-saved registers. (ix86_minimum_incoming_stack_boundary): Return MIN_STACK_BOUNDARY for interrupt handler. (ix86_expand_prologue): Don't allow DRAP in interrupt handler. Emit cld instruction if stringops are used in interrupt handler or interrupt handler isn't a leaf function. (ix86_expand_epilogue): Generate interrupt return for interrupt handler and pop the 'ERROR_CODE' off the stack before interrupt return in exception handler. (ix86_expand_call): Disallow calling interrupt handler directly. If there are no caller-saved registers, mark all registers that are clobbered by the call which returns as clobbered. (ix86_handle_no_caller_saved_registers_attribute): New function. (ix86_handle_interrupt_attribute): Likewise. (ix86_attribute_table): Add interrupt and no_caller_saved_registers attributes. (TARGET_HARD_REGNO_SCRATCH_OK): Likewise. * config/i386/i386.h (ACCUMULATE_OUTGOING_ARGS): Use argument accumulation in interrupt function if stack may be realigned to avoid DRAP. (EPILOGUE_USES): New. (function_type): New enum. (machine_function): Add func_type and no_caller_saved_registers. * config/i386/i386.md (UNSPEC_INTERRUPT_RETURN): New. (interrupt_return): New pattern. * doc/extend.texi: Document x86 interrupt and no_caller_saved_registers attributes. gcc/testsuite/ PR target/66960 PR target/67630 PR target/67634 PR target/67841 PR target/68037 PR target/68618 PR target/68661 PR target/69575 PR target/69596 PR target/69734 * gcc.dg/guality/pr68037-1.c: New test. * gcc.dg/guality/pr68037-2.c: Likewise. * gcc.dg/guality/pr68037-3.c: Likewise. * gcc.dg/torture/pr68037-1.c: Likewise. * gcc.dg/torture/pr68037-2.c: Likewise. * gcc.dg/torture/pr68037-3.c: Likewise. * gcc.dg/torture/pr68661-1a.c: Likewise. * gcc.dg/torture/pr68661-1b.c: Likewise. * gcc.target/i386/interrupt-1.c: Likewise. * gcc.target/i386/interrupt-2.c: Likewise. * gcc.target/i386/interrupt-3.c: Likewise. * gcc.target/i386/interrupt-4.c: Likewise. * gcc.target/i386/interrupt-5.c: Likewise. * gcc.target/i386/interrupt-6.c: Likewise. * gcc.target/i386/interrupt-7.c: Likewise. * gcc.target/i386/interrupt-8.c: Likewise. * gcc.target/i386/interrupt-9.c: Likewise. * gcc.target/i386/interrupt-10.c: Likewise. * gcc.target/i386/interrupt-11.c: Likewise. * gcc.target/i386/interrupt-12.c: Likewise. * gcc.target/i386/interrupt-13.c: Likewise. * gcc.target/i386/interrupt-14.c: Likewise. * gcc.target/i386/interrupt-15.c: Likewise. * gcc.target/i386/interrupt-16.c: Likewise. * gcc.target/i386/interrupt-17.c: Likewise. * gcc.target/i386/interrupt-18.c: Likewise. * gcc.target/i386/interrupt-19.c: Likewise. * gcc.target/i386/interrupt-20.c: Likewise. * gcc.target/i386/interrupt-21.c: Likewise. * gcc.target/i386/interrupt-22.c: Likewise. * gcc.target/i386/interrupt-23.c: Likewise. * gcc.target/i386/interrupt-24.c: Likewise. * gcc.target/i386/interrupt-25.c: Likewise. * gcc.target/i386/interrupt-26.c: Likewise. * gcc.target/i386/interrupt-27.c: Likewise. * gcc.target/i386/interrupt-28.c: Likewise. * gcc.target/i386/interrupt-387-err-1.c: Likewise. * gcc.target/i386/interrupt-387-err-2.c: Likewise. * gcc.target/i386/interrupt-bnd-err-1.c: Likewise. * gcc.target/i386/interrupt-bnd-err-2.c: Likewise. * gcc.target/i386/interrupt-iamcu.c: Likewise. * gcc.target/i386/interrupt-mmx-err-1.c: Likewise. * gcc.target/i386/interrupt-mmx-err-2.c: Likewise. * gcc.target/i386/interrupt-redzone-1.c: Likewise. * gcc.target/i386/interrupt-redzone-2.c: Likewise. * gcc.target/i386/interrupt-sibcall-1.c: Likewise. * gcc.target/i386/interrupt-sibcall-2.c: Likewise. * gcc.target/i386/interrupt-switch-abi.c: Likewise. Co-Authored-By: Julia Koval <julia.koval@intel.com> From-SVN: r237073
2016-06-03Convert leading spaces to tabsH.J. Lu1-3/+3
From-SVN: r237072
2016-06-03Convert leading spaces to tabsH.J. Lu1-54/+54
From-SVN: r237071
2016-06-03c-typeck.c (c_finish_omp_clauses): Mark OpenACC reduction arguments as ↵Chung-Lin Tang8-2/+117
addressable when async clause exists. 2016-06-03 Chung-Lin Tang <cltang@codesourcery.com> c/ * c-typeck.c (c_finish_omp_clauses): Mark OpenACC reduction arguments as addressable when async clause exists. cp/ * semantics.c (finish_omp_clauses): Mark OpenACC reduction arguments as addressable when async clause exists. fortran/ * trans-openmp.c (gfc_trans_omp_reduction_list): Add mark_addressable bool parameter, set reduction clause DECLs as addressable when true. (gfc_trans_omp_clauses): Pass clauses->async to gfc_trans_omp_reduction_list, add comment describing OpenACC situation. libgomp/ * testsuite/libgomp.oacc-fortran/reduction-8.f90: New testcase. * testsuite/libgomp.oacc-c-c++-common/reduction-8.c: New testcase. From-SVN: r237070
2016-06-03re PR tree-optimization/52171 (memcmp/strcmp/strncmp can be optimized when ↵Bernd Schmidt17-618/+1162
the result is tested for [in]equality with 0) PR tree-optimization/52171 * builtins.c (expand_cmpstrn_or_cmpmem): Delete, moved elsewhere. (expand_builtin_memcmp): New arg RESULT_EQ. All callers changed. Look for constant strings. Move some code to emit_block_cmp_hints and use it. * builtins.def (BUILT_IN_MEMCMP_EQ): New. * defaults.h (COMPARE_MAX_PIECES): New macro. * expr.c (move_by_pieces_d, store_by_pieces_d): Remove old structs. (move_by_pieces_1, store_by_pieces_1, store_by_pieces_2): Remvoe. (clear_by_pieces_1): Don't declare. Move definition before use. (can_do_by_pieces): New static function. (can_move_by_pieces): Use it. Return bool. (by_pieces_ninsns): Renamed from move_by_pieces_ninsns. New arg OP. All callers changed. Handle COMPARE_BY_PIECES. (class pieces_addr); New. (pieces_addr::pieces_addr, pieces_addr::decide_autoinc, pieces_addr::adjust, pieces_addr::increment_address, pieces_addr::maybe_predec, pieces_addr::maybe_postinc): New member functions for it. (class op_by_pieces_d): New. (op_by_pieces_d::op_by_pieces_d, op_by_pieces_d::run): New member functions for it. (class move_by_pieces_d, class compare_by_pieces_d, class store_by_pieces_d): New subclasses of op_by_pieces_d. (move_by_pieces_d::prepare_mode, move_by_pieces_d::generate, move_by_pieces_d::finish_endp, store_by_pieces_d::prepare_mode, store_by_pieces_d::generate, store_by_pieces_d::finish_endp, compare_by_pieces_d::generate, compare_by_pieces_d::prepare_mode, compare_by_pieces_d::finish_mode): New member functions. (compare_by_pieces, emit_block_cmp_via_cmpmem): New static functions. (expand_cmpstrn_or_cmpmem): Moved here from builtins.c. (emit_block_cmp_hints): New function. (move_by_pieces, store_by_pieces, clear_by_pieces): Rewrite to just use the newly defined classes. * expr.h (by_pieces_constfn): New typedef. (can_store_by_pieces, store_by_pieces): Use it in arg declarations. (emit_block_cmp_hints, expand_cmpstrn_or_cmpmem): Declare. (move_by_pieces_ninsns): Don't declare. (can_move_by_pieces): Change return value to bool. * target.def (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): Update docs. (compare_by_pieces_branch_ratio): New hook. * target.h (enum by_pieces_operation): Add COMPARE_BY_PIECES. (by_pieces_ninsns): Declare. * targethooks.c (default_use_by_pieces_infrastructure_p): Handle COMPARE_BY_PIECES. (default_compare_by_pieces_branch_ratio): New function. * targhooks.h (default_compare_by_pieces_branch_ratio): Declare. * doc/tm.texi.in (STORE_MAX_PIECES, COMPARE_MAX_PIECES): Document. * doc/tm.texi: Regenerate. * tree-ssa-strlen.c: Include "builtins.h". (handle_builtin_memcmp): New static function. (strlen_optimize_stmt): Call it for BUILT_IN_MEMCMP. * tree.c (build_common_builtin_nodes): Create __builtin_memcmp_eq. testsuite/ PR tree-optimization/52171 * gcc.dg/pr52171.c: New test. * gcc.target/i386/pr52171.c: New test. From-SVN: r237069
2016-06-03pred-1.C: New testcaseJan Hubicka5-1/+42
* g++.dg/tree-ssa/pred-1.C: New testcase * gcc.dg/tree-ssa/pred-1.c: New testcase * cp-gimplify.c (genericize_continue_stmt): Force addition of predict stmt. From-SVN: r237068
2016-06-03re PR target/70957 (testsuite/gcc.target/powerpc/vsx-elemrev-4.c fails on ↵Bill Schmidt3-0/+9
power7) 2016-06-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/70957 * gcc.target/powerpc/vsx-elemrev-2.c: Require p9vector hardware support. * gcc.target/powerpc/vsx-elemrev-4.c: Likewise. From-SVN: r237066
2016-06-03[3/3] No need to vectorize simple only-live stmtsAlan Hayward5-7/+19
2016-06-03 Alan Hayward <alan.hayward@arm.com> [3/3] No need to vectorize simple only-live stmts gcc/ * tree-vect-stmts.c (vect_stmt_relevant_p): Do not vectorize non live relevant stmts which are simple and invariant. * tree-vect-loop.c (vectorizable_live_operation): Check relevance instead of simple and invariant testsuite/ * gcc.dg/vect/vect-live-slp-5.c: Remove dg check. From-SVN: r237065
2016-06-03[2/3] Vectorize inductions that are live after the loopAlan Hayward15-127/+678
2016-06-03 Alan Hayward <alan.hayward@arm.com> [2/3] Vectorize inductions that are live after the loop gcc/ * tree-vect-loop.c (vect_analyze_loop_operations): Allow live stmts. (vectorizable_reduction): Check for new relevant state. (vectorizable_live_operation): vectorize live stmts using BIT_FIELD_REF. Remove special case for gimple assigns stmts. * tree-vect-stmts.c (is_simple_and_all_uses_invariant): New function. (vect_stmt_relevant_p): Check for stmts which are only used live. (process_use): Use of a stmt does not inherit it's live value. (vect_mark_stmts_to_be_vectorized): Simplify relevance inheritance. (vect_analyze_stmt): Check for new relevant state. * tree-vectorizer.h (vect_relevant): New entry for a stmt which is used outside the loop, but not inside it. testsuite/ * gcc.dg/tree-ssa/pr64183.c: Ensure test does not vectorize. * testsuite/gcc.dg/vect/no-scevccp-vect-iv-2.c: Remove xfail. * gcc.dg/vect/vect-live-1.c: New test. * gcc.dg/vect/vect-live-2.c: New test. * gcc.dg/vect/vect-live-3.c: New test. * gcc.dg/vect/vect-live-4.c: New test. * gcc.dg/vect/vect-live-5.c: New test. * gcc.dg/vect/vect-live-slp-1.c: New test. * gcc.dg/vect/vect-live-slp-2.c: New test. * gcc.dg/vect/vect-live-slp-3.c: New test. From-SVN: r237064
2016-06-03[1/3] Split vect_get_vec_def_for_operand into twoAlan Hayward3-54/+71
2016-06-03 Alan Hayward <alan.hayward@arm.com> [1/3] Split vect_get_vec_def_for_operand into two gcc/ * tree-vectorizer.h (vect_get_vec_def_for_operand_1): New * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): New (vect_get_vec_def_for_operand): Split out code. From-SVN: r237063
2016-06-03rs6000: Remove the ancient mfcr peepholesSegher Boessenkool2-31/+4
These peepholes replace two mfcr;mask sequences by one mfcr;mask;mask sequence. On modern cpus, the original mfcr's were actually mfocrf, but the new insn is an actual heavy-weight mfcr. This is very bad for performance. The comment says there is a three cycle delay between two consecutive mfcr insns. This may have been true on rios, and it's true on 604, but on 603, 750, 7400 it is just a single cycle (on 7450 it is two). This is also a define_peephole, and we should get rid of those. So this patch just removes the peepholes; the benefit is marginal at best, and it so very hurts in other cases. * config/rs6000/rs6000.md (define_peepholes for two mfcr's): Delete. From-SVN: r237062
2016-06-032016-06-03 Alan Hayward <alan.hayward@arm.com>Alan Hayward2-23/+4
gcc/ * tree-vect-stmts.c (vectorizable_call) Remove GOMP_SIMD_LANE code. From-SVN: r237061
2016-06-03[ARM][obvious] Fix typos in *thumb1_mulsi3 commentKyrylo Tkachov2-5/+9
* config/arm/thumb1.md (*thumb1_mulsi3): Fix typos in comment. From-SVN: r237058
2016-06-03* MAINTAINERS (Write After Approval): Add myself.Jose E. Marchesi2-0/+5
From-SVN: r237055
2016-06-03re PR middle-end/71387 (ICE in emit_move_insn, at expr.c:3418 with -Og)Jakub Jelinek4-2/+79
PR middle-end/71387 * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): If redirecting to noreturn e->callee->decl that has void return type and void arguments, adjust gimple_call_fntype and remove lhs even if it had previously addressable type. * g++.dg/opt/pr71387.C: New test. From-SVN: r237053
2016-06-02re PR tree-optimization/71328 (ice in verify_jump_thread)Jeff Law4-2/+29
PR tree-optimization/71328 * tree-ssa-threadupdate.c (duplicate_thread_path): Fix off-by-one error when checking for a jump back onto the copied path. */ PR tree-optimization/71328 * gcc.c-torture/compile/pr71328.c: New test. From-SVN: r237052
2016-06-03re PR fortran/52393 (I/O: "READ format" statement with parenthesed ↵Jerry DeLisle3-1/+15
default-char-expr) 2016-06-02 Jerry DeLisle <jvdelisle@gcc.gnu.org> PR fortran/52393 * gfortran.dg/fmt_read_3.f90: Fix typo. * gfortran.dg/fmt_read_4.f90: New test. From-SVN: r237051
2016-06-03Daily bump.GCC Administrator1-1/+1
From-SVN: r237050
2016-06-02decl.c (xref_tag_1): Change pairs of errors to error + inform.Paolo Carlini17-33/+55
/cp 2016-06-02 Paolo Carlini <paolo.carlini@oracle.com> * decl.c (xref_tag_1): Change pairs of errors to error + inform. (start_enum): Likewise. * parser.c (cp_parser_class_head): Likewise. /testsuite 2016-06-02 Paolo Carlini <paolo.carlini@oracle.com> * g++.dg/cpp0x/forw_enum10.C: Adjust for dg-message vs dg-error. * g++.dg/cpp0x/forw_enum6.C: Likewise. * g++.dg/cpp0x/forw_enum8.C: Likewise. * g++.dg/cpp0x/override2.C: Likewise. * g++.dg/parse/crash5.C: Likewise. * g++.dg/parse/error16.C: Likewise. * g++.dg/parse/error27.C: Likewise. * g++.dg/template/qualttp15.C: Likewise. * g++.dg/template/redecl4.C: Likewise. * g++.old-deja/g++.other/crash39.C: Likewise. * g++.old-deja/g++.other/struct1.C: Likewise. * g++.old-deja/g++.pt/m9a.C: Likewise. * g++.old-deja/g++.pt/memclass10.C: Likewise. From-SVN: r237046
2016-06-02microblaze.c: fix warningsDavid Malcolm2-2/+10
gcc/ChangeLog: * config/microblaze/microblaze.c (get_branch_target): Add return NULL_RTX for the non-CALL_P case. (insert_wic_for_ilb_runout): Remove unused local "wic_addr1". (insert_wic): Remove unused local "j". From-SVN: r237044
2016-06-02re PR c++/71372 (C++ FE drops TREE_THIS_VOLATILE in cp_fold on all ↵Jakub Jelinek4-2/+42
tcc_reference trees) PR c++/71372 * cp-gimplify.c (cp_fold): For INDIRECT_REF, if the folded expression is INDIRECT_REF or MEM_REF, copy over TREE_READONLY, TREE_SIDE_EFFECTS and TREE_THIS_VOLATILE flags. For ARRAY_REF and ARRAY_RANGE_REF, copy over TREE_READONLY, TREE_SIDE_EFFECTS and TREE_THIS_VOLATILE flags to the newly built tree. * c-c++-common/pr71372.c: New test. From-SVN: r237041
2016-06-02Fix display name of PRED_FORTRAN_FAIL_IOMartin Liska2-1/+5
* predict.def: Fix typo in PRED_FORTRAN_FAIL_IO display name. From-SVN: r237040
2016-06-02source_date_epoch-1.c (main): Test __DATE__ and __TIME__ strings with ↵Jakub Jelinek2-4/+10
__builtin_strcmp instead of printf and... * gcc.dg/cpp/source_date_epoch-1.c (main): Test __DATE__ and __TIME__ strings with __builtin_strcmp instead of printf and dg-output. From-SVN: r237039
2016-06-02Update TARGET_FUNCTION_INCOMING_ARG documentationH.J. Lu4-13/+32
On x86, interrupt handlers are only called by processors which push interrupt data onto stack at the address where the normal return address is. Since interrupt handlers must access interrupt data via pointers so that they can update interrupt data, the pointer argument is passed as "argument pointer - word". TARGET_FUNCTION_INCOMING_ARG defines how callee sees its argument. Normally it returns REG, NULL, or CONST_INT. This patch adds arbitrary address computation based on hard register, which can be forced into a register, to the list. When copying an incoming argument onto stack, assign_parm_setup_stack has: if (argument in memory) copy argument in memory to stack else move argument to stack Since an arbitrary address computation may be passed as an argument, we change it to: if (argument in memory) copy argument in memory to stack else { if (argument isn't in register) force argument into a register move argument to stack } * function.c (assign_parm_setup_stack): Force source into a register if needed. * target.def (function_incoming_arg): Update documentation to allow arbitrary address computation based on hard register. * doc/tm.texi: Regenerated. Co-Authored-By: Julia Koval <julia.koval@intel.com> From-SVN: r237037
2016-06-02Fix first match heuristicsMartin Liska4-1/+34
* predict.c (combine_predictions_for_bb): Fix first match in cases where a first predictor contains more than one occurence in list of predictors. Take the best value in such case. * gcc.dg/predict-9.c: New test. From-SVN: r237036
2016-06-02gcc-dg.exp (cleanup-after-saved-dg-test): Add missing global ↵Jakub Jelinek2-0/+7
set_compiler_env_var and global saved_compiler_env_var. * lib/gcc-dg.exp (cleanup-after-saved-dg-test): Add missing global set_compiler_env_var and global saved_compiler_env_var. From-SVN: r237035
2016-06-02[rtlanal] Fix rtl-optimization/71295Kyrylo Tkachov4-0/+33
PR rtl-optimization/71295 * rtlanal.c (subreg_get_info): If taking a subreg at the requested offset would go over the size of the inner mode reject it. * gcc.c-torture/compile/pr71295.c: New test. From-SVN: r237034
2016-06-02On behalf of Aaron Conole <aconole@redhat.com>Aaron Conole3-3/+62
On behalf of Aaron Conole <aconole@redhat.com> * libgcov-driver-system.c (__gcov_error_file): New. (get_gcov_error_file): New. (gcov_error): Use and set __gcov_error_file. (gcov_error_exit): New. * libgcov-driver.c (gcov_exit): Call gcov_error_exit. From-SVN: r237033
2016-06-02sse.md (*vec_concatv4si): Use v=v,v instead of x=x,x and v=v,m instead of x=x,m.Jakub Jelinek4-4/+32
* config/i386/sse.md (*vec_concatv4si): Use v=v,v instead of x=x,x and v=v,m instead of x=x,m. * gcc.target/i386/avx512vl-concatv4si-1.c: New test. From-SVN: r237031
2016-06-02sse.md (*vec_concatv2si_sse4_1): Add avx512dq v=Yv,rm alternative.Jakub Jelinek5-11/+105
* config/i386/sse.md (*vec_concatv2si_sse4_1): Add avx512dq v=Yv,rm alternative. Change x=x,x alternative to v=Yv,Yv and x=rm,C alternative to v=rm,C. * gcc.target/i386/avx512dq-concatv2si-1.c: New test. * gcc.target/i386/avx512vl-concatv2si-1.c: New test. From-SVN: r237030
2016-06-02sse.md (*vec_concatv2di): Add x86_avx512dq v=Yv,rm alternative.Jakub Jelinek6-14/+192
* config/i386/sse.md (*vec_concatv2di): Add x86_avx512dq v=Yv,rm alternative. Change x=xm,C alternative to v=vm,C, x=x,x alternative to v=Yv,Yv and x=x,m to v=v,m. Use maybe_evex prefix attribute instead of vex for the last two above mentioned alternatives. * gcc.target/i386/avx512dq-concatv2di-1.c: New test. * gcc.target/i386/avx512vl-concatv2di-1.c: New test. * gcc.target/i386/sse2-init-v2di-2.c: Adjust expected vec_concatv2di alternative number. From-SVN: r237028
2016-06-02Fix fallout from: [ARM] PR target/70830: Avoid POP-{reglist}^ when returning ↵Kyrylo Tkachov2-4/+7
from interrupt handlers PR target/70830 * config/arm/arm.c (arm_output_multireg_pop): Guard "pop" on update. From-SVN: r237027
2016-06-02rs6000: Correct the "length" attribute for trunctddd2Segher Boessenkool2-1/+6
* config/rs6000/dfp.md (trunctddd2): Correct the "length" attribute. From-SVN: r237026
2016-06-02Daily bump.GCC Administrator1-1/+1
From-SVN: r237025
2016-06-01Fix ChangeLog entry:Michael Meissner1-1/+1
2016-05-24 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/altivec.md (VNEG iterator): New iterator for VNEGW/VNEGD instructions. (p9_neg<mode>2): New insns for ISA 3.0 VNEGW/VNEGD. (neg<mode>2): Add expander for V2DImode added in ISA 2.07, and support for ISA 3.0 VNEGW/VNEGD instructions. From-SVN: r237020
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