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2020-10-08libstdc++: Avoid divide by zero in default template argumentsJonathan Wakely3-6/+52
My previous attempt to fix this only worked when m is a power of two. There is still a bug when a=00 and !has_single_bit(m). Instead of trying to make _Mod work for a==0 this change ensures that we never instantiate it with a==0. For C++17 we can use if-constexpr, but otherwise we need to use a different multipler. It doesn't matter what we use, as it won't actually be called, only instantiated. libstdc++-v3/ChangeLog: * include/bits/random.h (__detail::_Mod): Revert last change. (__detail::__mod): Do not use _Mod for a==0 case. * testsuite/26_numerics/random/linear_congruential_engine/operators/call.cc: Check other cases with a==0. Also check runtime results. * testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error line.
2020-10-08tree-optimization/97330 - fix bad load sinkingRichard Biener3-1/+36
This fixes bad placement of sunk loads. 2020-10-08 Richard Biener <rguenther@suse.de> PR tree-optimization/97330 * tree-ssa-sink.c (statement_sink_location): Avoid skipping PHIs when they dominate the insert location. * gcc.dg/torture/pr97330-1.c: New testcase. * gcc.dg/torture/pr97330-2.c: Likewise.
2020-10-08Fix handling of parm_offset in ipa-modref on 32bit targets.Jan Hubicka2-14/+25
* ipa-modref.c (get_access): Fix handling of offsets. * tree-ssa-alias.c (modref_may_conflict): Watch for overflows.
2020-10-08IPA MOD REF: add debug counter.Martin Liska2-0/+5
gcc/ChangeLog: * dbgcnt.def (DEBUG_COUNTER): Add ipa_mod_ref debug counter. * tree-ssa-alias.c (modref_may_conflict): Handle the counter.
2020-10-08adjust BB vectorization dump scanningRichard Biener72-83/+75
This adjusts BB vectorization testcases to look for the number of SLP subgraphs vectorized rather than for the number of basic blocks we've found opportunities in because followup patches will play with the granularity we work on, vectorizing multiple basic blocks at a time. Together with this, because I noticed when looking at non-obvious mismatches, I avoid analyzing group-size 1 SLP instances which result in pointless V1mode vectorizations. It might be interesting to work on adding sth like dg-warning to look for -fopt-info-{optimized,missing} so we could directly annotate (not) vectorized loops instead of relying on fragile counts. 2020-10-08 Richard Biener <rguenther@suse.de> * tree-vectorizer.c (try_vectorize_loop_1): Do not dump "basic block vectorized". (pass_slp_vectorize::execute): Likewise. * tree-vect-slp.c (vect_analyze_slp_instance): Avoid re-analyzing split single stmts. * g++.dg/vect/slp-pr50819.cc: Adjust. * gcc.dg/vect/bb-slp-1.c: Adjust. * gcc.dg/vect/bb-slp-10.c: Adjust. * gcc.dg/vect/bb-slp-11.c: Adjust. * gcc.dg/vect/bb-slp-13.c: Adjust. * gcc.dg/vect/bb-slp-14.c: Adjust. * gcc.dg/vect/bb-slp-15.c: Adjust. * gcc.dg/vect/bb-slp-16.c: Adjust. * gcc.dg/vect/bb-slp-17.c: Adjust. * gcc.dg/vect/bb-slp-18.c: Adjust. * gcc.dg/vect/bb-slp-19.c: Adjust. * gcc.dg/vect/bb-slp-2.c: Adjust. * gcc.dg/vect/bb-slp-20.c: Adjust. * gcc.dg/vect/bb-slp-21.c: Adjust. * gcc.dg/vect/bb-slp-22.c: Adjust. * gcc.dg/vect/bb-slp-23.c: Adjust. * gcc.dg/vect/bb-slp-24.c: Adjust. * gcc.dg/vect/bb-slp-25.c: Adjust. * gcc.dg/vect/bb-slp-26.c: Adjust. * gcc.dg/vect/bb-slp-27.c: Adjust. * gcc.dg/vect/bb-slp-28.c: Adjust. * gcc.dg/vect/bb-slp-29.c: Adjust. * gcc.dg/vect/bb-slp-3.c: Adjust. * gcc.dg/vect/bb-slp-30.c: Adjust. * gcc.dg/vect/bb-slp-31.c: Adjust. * gcc.dg/vect/bb-slp-34.c: Adjust. * gcc.dg/vect/bb-slp-35.c: Adjust. * gcc.dg/vect/bb-slp-36.c: Adjust. * gcc.dg/vect/bb-slp-38.c: Adjust. * gcc.dg/vect/bb-slp-4.c: Adjust. * gcc.dg/vect/bb-slp-45.c: Adjust. * gcc.dg/vect/bb-slp-46.c: Adjust. * gcc.dg/vect/bb-slp-48.c: Adjust. * gcc.dg/vect/bb-slp-5.c: Adjust. * gcc.dg/vect/bb-slp-6.c: Adjust. * gcc.dg/vect/bb-slp-7.c: Adjust. * gcc.dg/vect/bb-slp-8.c: Adjust. * gcc.dg/vect/bb-slp-8a.c: Adjust. * gcc.dg/vect/bb-slp-8b.c: Adjust. * gcc.dg/vect/bb-slp-9.c: Adjust. * gcc.dg/vect/bb-slp-div-2.c: Adjust. * gcc.dg/vect/bb-slp-over-widen-1.c: Adjust. * gcc.dg/vect/bb-slp-over-widen-2.c: Adjust. * gcc.dg/vect/bb-slp-pattern-2.c: Adjust. * gcc.dg/vect/bb-slp-pow-1.c: Adjust. * gcc.dg/vect/bb-slp-pr58135.c: Adjust. * gcc.dg/vect/bb-slp-pr65935.c: Adjust. * gcc.dg/vect/bb-slp-pr78205.c: Adjust. * gcc.dg/vect/bb-slp-pr81635-1.c: Adjust. * gcc.dg/vect/bb-slp-pr81635-3.c: Adjust. * gcc.dg/vect/bb-slp-pr95839-2.c: Adjust. * gcc.dg/vect/bb-slp-pr95839.c: Adjust. * gcc.dg/vect/bb-slp-pr95866.c: Adjust. * gcc.dg/vect/bb-slp-subgroups-1.c: Adjust. * gcc.dg/vect/bb-slp-subgroups-2.c: Adjust. * gcc.dg/vect/bb-slp-subgroups-3.c: Adjust. * gcc.dg/vect/fast-math-bb-slp-call-1.c: Adjust. * gcc.dg/vect/no-tree-reassoc-bb-slp-12.c: Adjust. * gcc.dg/vect/no-tree-sra-bb-slp-pr50730.c: Adjust. * gfortran.dg/vect/pr62283-2.f: Adjust. * gcc.target/i386/pr68961.c: Adjust. * gcc.target/i386/pr84101.c: Adjust. * gcc.dg/vect/bb-slp-pr81635-2.c: Adjust. * gcc.dg/vect/bb-slp-pr81635-4.c: Adjust. * gcc.dg/vect/fast-math-bb-slp-call-2.c: Adjust. * gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c: Adjust. * gcc.dg/vect/costmodel/x86_64/costmodel-vect-slp.c: Adjust. * gcc.dg/vect/bb-slp-div-1.c: Adjust. * gcc.dg/vect/bb-slp-pr90006.c: Adjust. * g++.dg/vect/slp-pr50413.cc: Adjust.
2020-10-08arm: [MVE] Remove illegal intrinsics (PR target/96914)Christophe Lyon16-443/+19
A few MVE intrinsics had an unsigned variant implement while they are supported by the hardware. This patch removes them: __arm_vqrdmlashq_n_u8 __arm_vqrdmlahq_n_u8 __arm_vqdmlahq_n_u8 __arm_vqrdmlashq_n_u16 __arm_vqrdmlahq_n_u16 __arm_vqdmlahq_n_u16 __arm_vqrdmlashq_n_u32 __arm_vqrdmlahq_n_u32 __arm_vqdmlahq_n_u32 __arm_vmlaldavaxq_p_u32 __arm_vmlaldavaxq_p_u16 2020-10-08 Christophe Lyon <christophe.lyon@linaro.org> gcc/ PR target/96914 * config/arm/arm_mve.h (vqrdmlashq_n_u8, vqrdmlashq_n_u16) (vqrdmlashq_n_u32, vqrdmlahq_n_u8, vqrdmlahq_n_u16) (vqrdmlahq_n_u32, vqdmlahq_n_u8, vqdmlahq_n_u16, vqdmlahq_n_u32) (vmlaldavaxq_p_u16, vmlaldavaxq_p_u32): Remove. * config/arm/arm_mve_builtins.def (vqrdmlashq_n_u, vqrdmlahq_n_u) (vqdmlahq_n_u, vmlaldavaxq_p_u): Remove. * config/arm/unspecs.md (VQDMLAHQ_N_U, VQRDMLAHQ_N_U) (VQRDMLASHQ_N_U) (VMLALDAVAXQ_P_U): Remove unspecs. * config/arm/iterators.md (VQDMLAHQ_N_U, VQRDMLAHQ_N_U) (VQRDMLASHQ_N_U, VMLALDAVAXQ_P_U): Remove attributes. (VQDMLAHQ_N, VQRDMLAHQ_N, VQRDMLASHQ_N, VMLALDAVAXQ_P): Remove unsigned variants from iterators. * config/arm/mve.md (mve_vqdmlahq_n_<supf><mode>) (mve_vqrdmlahq_n_<supf><mode>) (mve_vqrdmlashq_n_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>): Update comment. gcc/testsuite/ PR target/96914 * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u16.c: Remove. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u32.c: Remove. * gcc.target/arm/mve/intrinsics/vqdmlahq_n_u16.c: Remove. * gcc.target/arm/mve/intrinsics/vqdmlahq_n_u32.c: Remove. * gcc.target/arm/mve/intrinsics/vqdmlahq_n_u8.c: Remove. * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u16.c: Remove. * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u32.c: Remove. * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u8.c: Remove. * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u16.c: Remove. * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u32.c: Remove. * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u8.c: Remove.
2020-10-08arm: [MVE[ Add vqdmlashq intrinsics (PR target/96914)Christophe Lyon11-0/+288
This patch adds: vqdmlashq_m_n_s16 vqdmlashq_m_n_s32 vqdmlashq_m_n_s8 vqdmlashq_n_s16 vqdmlashq_n_s32 vqdmlashq_n_s8 2020-10-08 Christophe Lyon <christophe.lyon@linaro.org> gcc/ PR target/96914 * config/arm/arm_mve.h (vqdmlashq, vqdmlashq_m): Define. * config/arm/arm_mve_builtins.def (vqdmlashq_n_s) (vqdmlashq_m_n_s,): New. * config/arm/unspecs.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New unspecs. * config/arm/iterators.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New attributes. (VQDMLASHQ_N): New iterator. * config/arm/mve.md (mve_vqdmlashq_n_, mve_vqdmlashq_m_n_s): New patterns. gcc/testsuite/ PR target/96914 * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: New test. * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: New test. * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: New test. * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: New test. * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: New test. * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: New test.
2020-10-08arm: Fix ICE on glibc compilation after my DIVMOD optimization [PR97322]Jakub Jelinek2-3/+18
The arm target hook for divmod wasn't prepared to handle constants passed to the function. 2020-10-08 Jakub Jelinek <jakub@redhat.com> PR target/97322 * config/arm/arm.c (arm_expand_divmod_libfunc): Pass mode instead of GET_MODE (op0) or GET_MODE (op1) to emit_library_call_value. * gcc.dg/pr97322.c: New test.
2020-10-08Fix PR97325.Aldy Hernandez1-0/+2
gcc/ChangeLog: PR tree-optimization/97325 * gimple-range.cc (gimple_ranger::range_of_builtin_call): Handle negative numbers in __builtin_ffs and __builtin_popcount.
2020-10-08Fix PR97315 (part 2 of 2)Aldy Hernandez2-0/+20
gcc/ChangeLog: PR tree-optimization/97315 * range-op.cc (value_range_with_overflow): Change any non-overflow calculation in which both bounds are overflow/underflow to be undefined. gcc/testsuite/ChangeLog: * gcc.dg/pr97315-2.c: New test.
2020-10-08Fix PR97315 (part 1 of 2)Aldy Hernandez2-21/+54
gcc/ChangeLog: PR tree-optimization/97315 * gimple-ssa-evrp.c (hybrid_folder::choose_value): Removes the trap and instead annotates the listing. gcc/testsuite/ChangeLog: * gcc.dg/pr97315-1.c: New test.
2020-10-08openmp: Set cfun->calls_alloca when needed in OpenMP outlined regions [PR97294]Jakub Jelinek3-0/+44
The following testcase FAILs, because we don't mark the child OpenMP function as cfun->calls_alloca when it does call alloca. When optimizing, during DCE we reset those flags and recompute them again, but with -O0 DCE is not performed. Fixed by calling notice_special_calls when moving insns to the child function. cfun->calls_alloca is normally set during gimplification and most of the alloca calls omp-low.c does go through the gimplifier, but one spot didn't and built the gcall directly, so that one needs to set calls_alloca too. 2020-10-08 Jakub Jelinek <jakub@redhat.com> PR sanitizer/97294 * tree-cfg.c (move_block_to_fn): Call notice_special_calls on call stmts being moved into dest_cfun. * omp-low.c (lower_rec_input_clauses): Set cfun->calls_alloca when adding __builtin_alloca_with_align call without gimplification. * gcc.dg/asan/pr97294.c: New test.
2020-10-08[libgomp, nvptx] Report launch dimensions in GOMP_OFFLOAD_runTom de Vries1-1/+8
Using this patch, when using GOMP_DEBUG=1 and launching a kernel in GOMP_OFFLOAD_run (used by the omp implementation), we see the kernel launch dimensions: ... GOMP_OFFLOAD_run: kernel main$_omp_fn$0: \ launch [(teams: 1), 1, 1] [(lanes: 32), (threads: 1), 1] ... Build on x86_64-linux with nvptx accelerator, tested libgomp. libgomp/ChangeLog: 2020-10-08 Tom de Vries <tdevries@suse.de> PR libgomp/81802 * plugin/plugin-nvptx.c (GOMP_OFFLOAD_run): Report launch dimensions.
2020-10-08c++: ICE in dependent_type_p with constrained auto [PR97052]Patrick Palka3-0/+17
This patch fixes an "unguarded" call to coerce_template_parms in build_standard_check: processing_template_decl could be zero if we get here during processing of the first 'auto' parameter of an abbreviated function template, or if we're processing the type constraint of a non-templated variable. In the testcase below, this leads to an ICE when coerce_template_parms instantiates C's dependent default template argument. gcc/cp/ChangeLog: PR c++/97052 * constraint.cc (build_type_constraint): Temporarily increment processing_template_decl before calling build_concept_check. * pt.c (make_constrained_placeholder_type): Likewise. gcc/testsuite/ChangeLog: PR c++/97052 * g++.dg/cpp2a/concepts-defarg2.C: New test.
2020-10-08c++: Set the constraints of a class type sooner [PR96229]Patrick Palka3-7/+19
In the testcase below, during processing (at parse time) of Y's base class X<Y>, convert_template_argument calls is_compatible_template_arg to check if the template argument Y is no more constrained than the parameter P. But at this point we haven't yet set Y's constraints, so get_normalized_constraints_from_decl yields NULL_TREE as the normal form and caches this result into the normalized_map. We set Y's constraints later in cp_parser_class_specifier_1 but the stale normal form in the normalized_map remains. This ultimately causes us to miss the constraint failure for Y<Z> because according to the cached normal form, Y is not constrained. This patch fixes this issue by moving up the call to associate_classtype_constraints so that we set constraints before we start processing a class's bases. gcc/cp/ChangeLog: PR c++/96229 * parser.c (cp_parser_class_specifier_1): Move call to associate_classtype_constraints from here to ... (cp_parser_class_head): ... here. * pt.c (is_compatible_template_arg): Correct documentation to say "argument is _no_ more constrained than the parameter". gcc/testsuite/ChangeLog: PR c++/96229 * g++.dg/cpp2a/concepts-class2.C: New test.
2020-10-08Daily bump.GCC Administrator8-1/+240
2020-10-08libstdc++: Fix divide by zero in default template argumentJonathan Wakely2-1/+28
libstdc++-v3/ChangeLog: * include/bits/random.h (__detail::_Mod): Avoid divide by zero. * testsuite/26_numerics/random/linear_congruential_engine/operators/call.cc: New test.
2020-10-08libstdc++: Fix non-reserved names in headersJonathan Wakely4-20/+31
My recent changes to std::exception_ptr moved some members to be inline in the header but didn't replace the variable names with reserved names. The "tmp" variable must be fixed. The "other" parameter is actually a reserved name because of std::allocator<T>::rebind<U>::other but should be fixed anyway. There are also some bad uses of "ForwardIterator" in <ranges>. There's also a "il" parameter in a std::seed_seq constructor in <random> which is only reserved since C++14. libstdc++-v3/ChangeLog: * include/bits/random.h (seed_seq(initializer_list<T>)): Rename parameter to use reserved name. * include/bits/ranges_algo.h (shift_left, shift_right): Rename template parameters to use reserved name. * libsupc++/exception_ptr.h (exception_ptr): Likewise for parameters and local variables. * testsuite/17_intro/names.cc: Check "il". Do not check "d" and "y" in C++20 mode.
2020-10-07c++: Fix P0846 (ADL and function templates) in template [PR97010]Marek Polacek3-9/+77
To quickly recap, P0846 says that a name is also considered to refer to a template if it is an unqualified-id followed by a < and name lookup finds either one or more functions or finds nothing. In a template, when parsing a function call that has type-dependent arguments, we can't perform ADL right away so we set KOENIG_LOOKUP_P in the call to remember to do it when instantiating the call (tsubst_copy_and_build/CALL_EXPR). When the called function is a function template, we represent the call with a TEMPLATE_ID_EXPR; usually the operand is an OVERLOAD. In the P0846 case though, the operand can be an IDENTIFIER_NODE, when name lookup found nothing when parsing the template name. But we weren't handling this correctly in tsubst_copy_and_build. First we need to pass the FUNCTION_P argument from <case TEMPLATE_ID_EXPR> to <case IDENTIFIER_NODE>, otherwise we give a bogus error. And then in <case CALL_EXPR> we need to perform ADL. The rest of the changes is to give better errors when ADL didn't find anything. gcc/cp/ChangeLog: PR c++/97010 * pt.c (tsubst_copy_and_build) <case TEMPLATE_ID_EXPR>: Call tsubst_copy_and_build explicitly instead of using the RECUR macro. Handle a TEMPLATE_ID_EXPR with an IDENTIFIER_NODE as its operand. <case CALL_EXPR>: Perform ADL for a TEMPLATE_ID_EXPR with an IDENTIFIER_NODE as its operand. gcc/testsuite/ChangeLog: PR c++/97010 * g++.dg/cpp2a/fn-template21.C: New test. * g++.dg/cpp2a/fn-template22.C: New test.
2020-10-07libgo/configure: remove -fno-section-anchors for AIXClément Chigot3-11/+3
This option is no longer needed. There is no crash without it since at least gcc-9. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/260157
2020-10-07libgo: handle go1.10+ correctly in match.shNikhil Benesch3-9/+9
match.sh was not correctly handling build constraints for Go versions that have a two-digit suffix, like "go1.10". The same issue will arise with Go 1.100, but that is a long ways off. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/260077
2020-10-07Rename -fevrp-mode= to --param=evrp-mode=.Aldy Hernandez4-36/+36
* common.opt (-fevrp-mode): Rename and move... * params.opt (--param=evrp-mode): ...here. * gimple-range.h (DEBUG_RANGE_CACHE): Use param_evrp_mode instead of flag_evrp_mode. * gimple-ssa-evrp.c (rvrp_folder): Same. (hybrid_folder): Same. (execute_early_vrp): Same.
2020-10-07tree-optimization/97307 - improve sinking of loadsRichard Biener3-22/+43
This improves the heuristics finding a sink location for loads that does not cross any store. 2020-10-07 Richard Biener <rguenther@suse.de> PR tree-optimization/97307 * tree-ssa-sink.c (statement_sink_location): Change heuristic for not skipping stores to look for virtual definitions rather than uses. * gcc.dg/tree-ssa/ssa-sink-17.c: New testcase. * gcc.dg/vect/pr65947-3.c: XFAIL.
2020-10-07c++: Distinguish alignof and __alignof__ in cp_tree_equal [PR97273]Patrick Palka2-0/+15
cp_tree_equal currently considers alignof the same as __alignof__, but these operators are semantically different ever since r8-7957. In the testcase below, this causes the second static_assert to fail on targets where alignof(double) != __alignof__(double) because the specialization table (which uses cp_tree_equal as its equality predicate) conflates the two dependent specializations integral_constant<__alignof__(T)> and integral_constant<alignof(T)>. This patch makes cp_tree_equal distinguish between these two operators by inspecting the ALIGNOF_EXPR_STD_P flag. gcc/cp/ChangeLog: PR c++/88115 PR libstdc++/97273 * tree.c (cp_tree_equal) <case ALIGNOF_EXPR>: Return false if ALIGNOF_EXPR_STD_P differ. gcc/testsuite/ChangeLog: PR c++/88115 PR libstdc++/97273 * g++.dg/template/alignof3.C: New test.
2020-10-07Off by one final fix.Andrew MacLeod1-7/+6
Allocate the memory in an approved portable way. gcc/ChangeLog: 2020-10-06 Andrew MacLeod <amacleod@redhat.com> * value-range.h (irange_allocator::allocate): Allocate in two hunks instead of using the variably-sized trailing array approach.
2020-10-07This patch fixes PR47469 - a trivial bit of tidying up.Paul Thomas1-6/+2
2020-07-10 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/47469 * trans-expr.c (arrayfunc_assign_needs_temporary): Tidy detection of pointer and allocatable functions.
2020-10-07analyzer: handle C++ argument numbers and "this" [PR97116]David Malcolm2-14/+86
gcc/analyzer/ChangeLog: PR analyzer/97116 * sm-malloc.cc (method_p): New. (describe_argument_index): New. (inform_nonnull_attribute): Use describe_argument_index. (possible_null_arg::describe_final_event): Likewise. (null_arg::describe_final_event): Likewise. gcc/testsuite/ChangeLog: PR analyzer/97116 * g++.dg/analyzer/pr97116.C: New test.
2020-10-07Add -fdiagnostics-path-format=separate-events to -fdiagnostics-plain-outputDavid Malcolm9-151/+53
The path-printing default of -fdiagnostics-path-format=inline-events interacted poorly with -fdiagnostics-plain-output, so it makes most sense to add -fdiagnostics-path-format=separate-events to -fdiagnostics-plain-output. Seen when adding an experimental analyzer plugin to gcc.dg/plugin.exp. gcc/ChangeLog: * doc/invoke.texi (-fdiagnostics-plain-output): Add -fdiagnostics-path-format=separate-events to list of options injected by -fdiagnostics-plain-output. * opts-common.c (decode_cmdline_options_to_array): Likewise. gcc/testsuite/ChangeLog: * g++.dg/analyzer/analyzer.exp (DEFAULT_CXXFLAGS): Remove -fdiagnostics-path-format=separate-events. * gcc.dg/analyzer/analyzer.exp (DEFAULT_CFLAGS): Likewise. * gcc.dg/plugin/diagnostic-path-format-default.c: Rename to... * gcc.dg/plugin/diagnostic-path-format-plain.c: ...this. Remove dg-options directive. Copy remainder of test from diagnostic-path-format-separate-events.c. * gcc.dg/plugin/diagnostic-test-paths-2.c: Add -fdiagnostics-path-format=inline-events to options. Fix expected output for location of conditional within "for" loop. * gcc.dg/plugin/plugin.exp (plugin_test_list): Update for renaming. * gfortran.dg/analyzer/analyzer.exp (DEFAULT_FFLAGS): Remove -fdiagnostics-path-format=separate-events.
2020-10-07c++: block-scope externs get an alias [PR95677,PR31775,PR95677]Nathan Sidwell21-178/+206
This patch improves block-scope extern handling by always injecting a hidden copy into the enclosing namespace (or using a match already there). This hidden copy will be revealed if the user explicitly declares it later. We can get from the DECL_LOCAL_DECL_P local extern to the alias via DECL_LOCAL_DECL_ALIAS. This fixes several bugs and removes the kludgy per-function extern_decl_map. We only do this pushing for non-dependent local externs -- dependent ones will be pushed during instantiation. User code that expected to be able to handle incompatible local externs in different block-scopes will no longer work. That code is ill-formed. (always was, despite what 31775 claimed). I had to adjust a number of testcases that fell into this. I tried using DECL_VALUE_EXPR, but that didn't work out. Due to constexpr requirements we have to do the replacement very late (it happens in the gimplifier). Consider: extern int l[]; // #1 constexpr bool foo () { extern int l[3]; // this does not complete the type of decl #1 constexpr int *p = &l[2]; // ok return !p; } This requirement, coupled with our use of the common folding machinery makes pr97306 hard to fix, as we end up with an expression containing the two different decls for 'l', and only the c++ FE knows how to reconcile those. I punted on this. gcc/cp/ * cp-tree.h (struct language_function): Delete extern_decl_map. (DECL_LOCAL_DECL_ALIAS): New. * name-lookup.h (is_local_extern): Delete. * name-lookup.c (set_local_extern_decl_linkage): Replace with ... (push_local_extern_decl): ... this new function. (do_pushdecl): Call new function after pushing new decl. Unhide hidden non-functions. (is_local_extern): Delete. * decl.c (layout_var_decl): Do not allow VLA local externs. * decl2.c (mark_used): Also mark DECL_LOCAL_DECL_ALIAS. Drop old local-extern treatment. * parser.c (cp_parser_oacc_declare): Deal with local extern aliases. * pt.c (tsubst_expr): Adjust local extern instantiation. * cp-gimplify.c (cp_genericize_r): Remap DECL_LOCAL_DECLs. gcc/testsuite/ * g++.dg/cpp0x/lambda/lambda-sfinae1.C: Avoid ill-formed local extern * g++.dg/init/pr42844.C: Add expected error. * g++.dg/lookup/extern-redecl1.C: Likewise. * g++.dg/lookup/koenig15.C: Avoid ill-formed. * g++.dg/lto/pr95677.C: New. * g++.dg/other/nested-extern-1.C: Correct expected behabviour. * g++.dg/other/nested-extern-2.C: Likewise. * g++.dg/other/nested-extern.cc: Split ... * g++.dg/other/nested-extern-1.cc: ... here ... * g++.dg/other/nested-extern-2.cc: ... here. * g++.dg/template/scope5.C: Avoid ill-formed * g++.old-deja/g++.law/missed-error2.C: Allow extension. * g++.old-deja/g++.pt/crash3.C: Add expected error.
2020-10-07ipa-prop: Fix multiple-target speculation resolutionMartin Jambor2-4/+70
As the FIXME which this patch removes states, the current code does not work when a call with multiple speculative targets gets resolved through parameter tracking during inlining - it feeds the inliner an edge it has already dealt with. The patch makes the code which should prevent it aware of the possibility that that speculation can have more than one target now. gcc/ChangeLog: 2020-09-30 Martin Jambor <mjambor@suse.cz> PR ipa/96394 * ipa-prop.c (update_indirect_edges_after_inlining): Do not add resolved speculation edges to vector of new direct edges even in presence of multiple speculative direct edges for a single call. gcc/testsuite/ChangeLog: 2020-09-30 Martin Jambor <mjambor@suse.cz> PR ipa/96394 * gcc.dg/tree-prof/pr96394.c: New test.
2020-10-07c++: Rename DECL_BUILTIN_P to DECL_UNDECLARED_BUILTIN_PNathan Sidwell4-6/+7
I realized I'd misnamed DECL_BUILTIN_P, it's only true of compiler builtins unless and until the user declares them -- at that point they're real decls, and will have a location in the user's source. (BUILT_IN_FN and friends still work though). This renames them so future-me is not confused as to why the predicate becomes false. gcc/cp/ * cp-tree.h (DECL_BUILTIN_P): Rename to ... (DECL_UNDECLARED_BUILTIN_P): ... here. * decl.c (duplicate_decls): Adjust. * name-lookup.c (anticipated_builtin_p): Adjust. (do_nonmember_using_decl): Likewise. libcc1/ * libcp1plugin.cc (supplement_binding): Rename DECL_BUILTIN_P.
2020-10-07c++: Adding exception specs can changed dependentnessNathan Sidwell1-0/+3
Making an exception variant can cause a non-dependent function type to become dependent (since c++17 eh-specs are part of the type). The same is (possibly?) true for adding a late return type. Fixed thusly. My upcoming local extern-decl changes have a test case that covers this (which was how I found it). gcc/cp/ * tree.c (build_cp_fntype_variant): Clear TYPE_DEPENDENT_P_VALID if necessary.
2020-10-07amdgcn: Use scalar instructions for addptrdi3Andrew Stubbs1-12/+31
Allow addptr to use SPGRs as well as VGPRs for pointers. This ought to prevent some unnecessary copying back and forth. gcc/ChangeLog: * config/gcn/gcn.md (unspec): Add UNSPEC_ADDPTR. (addptrdi3): Add SGPR alternative.
2020-10-07Output filepath strings in .debug_line_str for DWARF5Mark Wielaard1-32/+68
DWARF5 has a new string table specially for file paths. .debug_line file and dir tables reference strings in .debug_line_str. If a .debug_line_str section is emitted then also place CU DIE file names and comp dirs there. gcc/ChangeLog: * dwarf2out.c (add_filepath_AT_string): New function. (asm_outputs_debug_line_str): Likewise. (add_filename_attribute): Likewise. (add_comp_dir_attribute): Call add_filepath_AT_string. (gen_compile_unit_die): Call add_filename_attribute for name. (init_sections_and_labels): Init debug_line_str_section when asm_outputs_debug_line_str return true. (dwarf2out_early_finish): Remove DW_AT_name and DW_AT_comp_dir hack and call add_filename_attribute for the remap_debug_filename.
2020-10-07debug: Pass --gdwarf-N to assembler if fixed gas is detected during configureJakub Jelinek6-4/+588
> > As for the test assembly, I'd say we should take > > #define F void foo (void) {} > > F > > compile it with > > gcc -S -O2 -g1 -dA -gno-as-loc-support -fno-merge-debug-strings > > remove .cfi_* directives, remove the ret instruction, change @function > > and @progbits to %function and %progbits, change .uleb128 to just .byte, > > I think all the values should be small enough, maybe change .value to > > .2byte and .long to .4byte (whatever is most portable across different > > arches and gas versions), simplify (shorten) strings and adjust > > sizes, and do something with the .quad directives, that is dependent on > > the address size, perhaps just take those attributes out and adjust > > .debug_abbrev? Finally, remove all comments (emit them in the first case > > just to better understand the debug info). > > I'm afraid it is hard to avoid the .quad or .8byte. > Here is a 64-bit address version that assembles fine by both x86_64 and > aarch64 as. > Unfortunately doesn't fail with broken gas versions with -gdwarf-2 without > the nop, so we'll need at least a nop in there. > Fortunately gcc/configure.ac already determines the right nop insn for the > target, in $insn. > So I guess what we want next is have the 32-bit version of this with .4byte > instead of .8byte and just let's try to assemble both versions, first > without -gdwarf-2 and the one that succeeds assemble again with -gdwarf-2 > and check for the duplicate .debug_line sections error. Ok, here it is in patch form. I've briefly tested it, with the older binutils I have around (no --gdwarf-N support), with latest gas (--gdwarf-N that can be passed to as even when compiling C/C++ etc. code and emitting .debug_line) and latest gas with Mark's fix reverted (--gdwarf-N support, but can only pass it to as when assembling user .s/.S files, not when compiling C/C++ etc.). 2020-10-07 Jakub Jelinek <jakub@redhat.com> * configure.ac (HAVE_AS_GDWARF_5_DEBUG_FLAG, HAVE_AS_WORKING_DWARF_4_FLAG): New tests. * gcc.c (ASM_DEBUG_DWARF_OPTION): Define. (ASM_DEBUG_SPEC): Use ASM_DEBUG_DWARF_OPTION instead of "--gdwarf2". Use %{cond:opt1;:opt2} style. (ASM_DEBUG_OPTION_DWARF_OPT): Define. (ASM_DEBUG_OPTION_SPEC): Define. (asm_debug_option): New variable. (asm_options): Add "%(asm_debug_option)". (static_specs): Add asm_debug_option entry. (static_spec_functions): Add dwarf-version-gt. (debug_level_greater_than_spec_func): New function. * config/darwin.h (ASM_DEBUG_OPTION_SPEC): Define. * config/darwin9.h (ASM_DEBUG_OPTION_SPEC): Redefine. * config.in: Regenerated. * configure: Regenerated.
2020-10-07options: Avoid unused variable mask warning [PR97305]Jakub Jelinek1-2/+24
> options-save.c: In function 'void cl_target_option_save(cl_target_option*, gcc_options*, gcc_options*)': > options-save.c:8526:26: error: unused variable 'mask' [-Werror=unused-variable] > 8526 | unsigned HOST_WIDE_INT mask = 0; > | ^~~~ > options-save.c: In function 'void cl_target_option_restore(gcc_options*, gcc_options*, cl_target_option*)': > options-save.c:8537:26: error: unused variable 'mask' [-Werror=unused-variable] > 8537 | unsigned HOST_WIDE_INT mask; > | ^~~~ Oops, missed that, sorry. The following patch should fix that, tested on x86_64-linux make options-save.c (same file as before) and -> ia64-linux cross make options-save.o (no warning anymore, just the unwanted declarations gone). 2020-10-07 Jakub Jelinek <jakub@redhat.com> PR bootstrap/97305 * optc-save-gen.awk: Don't declare mask variable if explicit_mask array is not present.
2020-10-07openmp: Improve composite simd vectorizationJakub Jelinek3-4/+117
> > I was really hoping bbs 4 and 5 would be one loop (the one I set safelen > > and force_vectorize etc. for) and that basic blocks 6 and 7 would be > > together with that inner loop another loop, but apparently loop discovery > > thinks it is just one loop. > > Any ideas what I'm doing wrong or is there any way how to make it two loops > > (that would also survive all the cfg cleanups until vectorization)? > > The early CFG looks like we have a common header with two latches > so it boils down to how we disambiguate those in the end (we seem > to unify the latches via a forwarder). IIRC OMP lowering builds > loops itself, could it not do the appropriate disambiguation itself? I realized I emit the same stmts on both paths (before goto doit; and before falling through it), at least the MIN_EXPR and PLUS_EXPR, so by forcing there an extra bb which does those two and having the "doit" label before that the innermost loop doesn't have multiple latches anymore and so is vectorized fine. 2020-10-07 Jakub Jelinek <jakub@redhat.com> * omp-expand.c (expand_omp_simd): Don't emit MIN_EXPR and PLUS_EXPR at the end of entry_bb and innermost init_bb, instead force arguments for MIN_EXPR into temporaries in both cases and jump to a new bb that performs MIN_EXPR and PLUS_EXPR. * gcc.dg/gomp/simd-2.c: New test. * gcc.dg/gomp/simd-3.c: New test.
2020-10-07[tree-ssa-loop-ch] Add missing NULL test for dump_fileTom de Vries1-1/+2
If we change gimple_can_duplicate_bb_p to return false instead of true, we run into a segfault in ch_base::copy_headers due to using dump_file while it's NULL: ... if (!gimple_duplicate_sese_region (entry, exit, bbs, n_bbs, copied_bbs, true)) { fprintf (dump_file, "Duplication failed.\n"); continue; } ... Fix this by adding the missing dump_file != NULL test. Tested by rebuilding lto1 and rerunning the failing test-case. gcc/ChangeLog: 2020-10-07 Tom de Vries <tdevries@suse.de> * tree-ssa-loop-ch.c (ch_base::copy_headers): Add missing NULL test for dump_file.
2020-10-07Daily bump.GCC Administrator8-1/+788
2020-10-06c++: typename in out-of-class member function definitions [PR97297]Marek Polacek2-2/+29
I was notified that our P0634R3 (Down with typename) implementation has a flaw: when we have an out-of-class member function definition, we still required 'typename' for its parameters. For example here: template <typename T> struct S { int simple(T::type); }; template <typename T> int S<T>::simple(/* typename */T::type) { return 0; } the 'typename' isn't necessary per [temp.res]/5.2.4. We have a qualified name here ("S<T>::simple") so we know it's already been declared so we can look it up to see if it's a function template or a variable template. In this case, the P0634R3 code in cp_parser_direct_declarator wasn't looking into uninstantiated templates and didn't find the member function 'simple' -- cp_parser_lookup_name returned a SCOPE_REF which means that the qualifying scope was dependent. With this fix, we find the BASELINK for 'simple', don't clear CP_PARSER_FLAGS_TYPENAME_OPTIONAL from the flags, and the typename is implicitly assumed. gcc/cp/ChangeLog: PR c++/97297 * parser.c (cp_parser_direct_declarator): When checking if a name is a function template declaration for the P0634R3 case, look in uninstantiated templates too. gcc/testsuite/ChangeLog: PR c++/97297 * g++.dg/cpp2a/typename18.C: New test.
2020-10-06c-c++-common/goacc/declare-pr90861.c: Remove xfailTobias Burnus1-1/+1
gcc/testsuite/ChangeLog PR middle-end/90861 * c-c++-common/goacc/declare-pr90861.c: Remove xfail.
2020-10-06compiler: avoid undefined behavior in Import::readNikhil Benesch4-10/+11
For some implementations of Stream, advancing the stream will invalidate the previously-returned peek buffer. Copy the peek buffer before advancing in Import::read to avoid this undefined behavior. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/259438
2020-10-06Hybrid EVRP and testcasesAndrew MacLeod8-16/+365
Provide a hybrid EVRP pass which uses legacy EVRP and adds additonal enhancements from the new ranger infrastructure. A New option is also provided, -fevrp-mode= And adjust testcases gcc/ChangeLog: 2020-10-06 Andrew MacLeod <amacleod@redhat.com> * flag-types.h (enum evrp_mode): New enumerated type EVRP_MODE_*. * common.opt (fevrp-mode): New undocumented flag. * gimple-ssa-evrp.c: Include gimple-range.h (class rvrp_folder): EVRP folding using ranger exclusively. (rvrp_folder::rvrp_folder): New. (rvrp_folder::~rvrp_folder): New. (rvrp_folder::value_of_expr): New. Use rangers value_of_expr. (rvrp_folder::value_on_edge): New. Use rangers value_on_edge. (rvrp_folder::value_of_Stmt): New. Use rangers value_of_stmt. (rvrp_folder::fold_stmt): New. Call the simplifier. (class hybrid_folder): EVRP folding using both engines. (hybrid_folder::hybrid_folder): New. (hybrid_folder::~hybrid_folder): New. (hybrid_folder::fold_stmt): New. Simplify with one engne, then the other. (hybrid_folder::value_of_expr): New. Use both value routines. (hybrid_folder::value_on_edge): New. Use both value routines. (hybrid_folder::value_of_stmt): New. Use both value routines. (hybrid_folder::choose_value): New. Choose between range_analzyer and rangers values. (execute_early_vrp): Choose a folder based on flag_evrp_mode. * vr-values.c (simplify_using_ranges::fold_cond): Try range_of_stmt first to see if it returns a value. (simplify_using_ranges::simplify_switch_using_ranges): Return true if any changes were made to the switch. gcc/testsuite/ChangeLog: 2020-10-06 Andrew MacLeod <amacleod@redhat.com> * gcc.dg/pr81192.c: Disable EVRP pass. * gcc.dg/tree-ssa/pr77445-2.c: Ditto. * gcc.dg/tree-ssa/ssa-dom-thread-6.c: Adjust. * gcc.dg/tree-ssa/ssa-dom-thread-7.c: Ditto.
2020-10-06Ranger classes.Andrew MacLeod9-0/+4166
Add the 8 ranger files and the Makefile changes to build it. 2020-10-06 Andrew MacLeod <amacleod@redhat.com> * Makefile.in (OBJS): Add gimple-range*.o. * gimple-range.h: New file. * gimple-range.cc: New file. * gimple-range-cache.h: New file. * gimple-range-cache.cc: New file. * gimple-range-edge.h: New file. * gimple-range-edge.cc: New file. * gimple-range-gori.h: New file. * gimple-range-gori.cc: New file.
2020-10-06[openacc, libgomp, testsuite] Xfail declare-5.f90Tom de Vries1-0/+1
We're currently running into: ... FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \ -DACC_MEM_SHARED=0 -foffload=nvptx-none -O0 execution test FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \ -DACC_MEM_SHARED=0 -foffload=nvptx-none -O1 execution test FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \ -DACC_MEM_SHARED=0 -foffload=nvptx-none -O2 execution test FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \ -DACC_MEM_SHARED=0 -foffload=nvptx-none -O3 -fomit-frame-pointer \ -funroll-loops -fpeel-loops -ftracer -finline-functions execution test FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \ -DACC_MEM_SHARED=0 -foffload=nvptx-none -O3 -g execution test FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \ -DACC_MEM_SHARED=0 -foffload=nvptx-none -Os execution test ... A PR was filed for this: PR92790 - "[OpenACC] declare device_resident - Fortran common blocks not handled / libgomp.oacc-fortran/declare-5.f90 fails" Xfail the fails. Tested on x86_64-linux with nvptx accelerator. libgomp/ChangeLog: 2020-10-06 Tom de Vries <tdevries@suse.de> * testsuite/libgomp.oacc-fortran/declare-5.f90: Add xfail for PR92790.
2020-10-06libstdc++: Inline std::exception_ptr members [PR 90295]Jonathan Wakely5-53/+143
This inlines most members of std::exception_ptr so that all operations on a null exception_ptr can be optimized away. This benefits code like std::future and coroutines where an exception_ptr object is present to cope with exceptional cases, but is usually not used and remains null. Since those functions were previously non-inline we have to continue to export them from the library, for objects that were compiled against the old headers and expect to find definitions in the library. In order to inline the copy constructor and destructor we need to export the _M_addref() and _M_release() members that increment/decrement the reference count when copying/destroying a non-null exception_ptr. The copy ctor and dtor check for null and don't call _M_addref and _M_release unless they need to. The checks for null pointers in _M_addref and _M_release are still needed because old code might call them without checking for null first. But we can use __builtin_expect to predict that they are usually called for the non-null case. libstdc++-v3/ChangeLog: PR libstdc++/90295 * config/abi/pre/gnu.ver (CXXABI_1.3.13): New symbol version. (exception_ptr::_M_addref(), exception_ptr::_M_release()): Export symbols. * libsupc++/eh_ptr.cc (exception_ptr::exception_ptr()): Remove out-of-line definition. (exception_ptr::exception_ptr(const exception_ptr&)): Likewise. (exception_ptr::~exception_ptr()): Likewise. (exception_ptr::operator=(const exception_ptr&)): Likewise. (exception_ptr::swap(exception_ptr&)): Likewise. (exception_ptr::_M_addref()): Add branch prediction. * libsupc++/exception_ptr.h (exception_ptr::operator bool): Add noexcept. [!_GLIBCXX_EH_PTR_COMPAT] (operator==, operator!=): Define inline as hidden friends. Remove declarations at namespace scope. (exception_ptr::exception_ptr()): Define inline. (exception_ptr::exception_ptr(const exception_ptr&)): Likewise. (exception_ptr::~exception_ptr()): Likewise. (exception_ptr::operator=(const exception_ptr&)): Likewise. (exception_ptr::swap(exception_ptr&)): Likewise. * testsuite/util/testsuite_abi.cc: Add CXXABI_1.3.13. * testsuite/18_support/exception_ptr/90295.cc: New test.
2020-10-06arm: Enable MVE SIMD modes for vectorizationDennis Zhang13-20/+62
This patch enables SIMD modes for MVE auto-vectorization. In this patch, the integer and float MVE SIMD modes are returned by arm_preferred_simd_mode (TARGET_VECTORIZE_PREFERRED_SIMD_MODE hook) when MVE or MVE_FLOAT is enabled. Then the expanders for auto-vectorization can be used for generating MVE SIMD code. This patch also fixes bugs in MVE vreiterpretq_*.c tests which are revealed by the enabled MVE SIMD modes. The tests are for checking the MVE reinterpret intrinsics. There are two functions in each of the tests. The two functions contain the pattern of identical code so that they are folded in icf pass. Because of icf, the instruction count only checks one function which is 8. However when the SIMD modes are enabled, the estimation of the code size becomes smaller so that inlining is applied after icf, then the instruction count becomes 16 which causes failure of the tests. Because the icf is not the expected pattern to be tested but causes above issues, -fno-ipa-icf is applied to the tests to avoid unstable instruction count. gcc/ChangeLog: 2020-10-05 Dennis Zhang <dennis.zhang@arm.com> * config/arm/arm.c (arm_preferred_simd_mode): Enable MVE SIMD modes. gcc/testsuite/ChangeLog: 2020-10-05 Dennis Zhang <dennis.zhang@arm.com> * gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c: Use additional option -fno-ipa-icf and change the instruction count from 8 to 16. * gcc.target/arm/mve/intrinsics/vreinterpretq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vreinterpretq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vreinterpretq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vreinterpretq_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vreinterpretq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vreinterpretq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vreinterpretq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c: Likewise.
2020-10-06[openacc] Fix acc declare for VLAsTom de Vries2-8/+10
Consider test-case test.c, with VLA A: ... int main (void) { int N = 1000; int A[N]; #pragma acc declare copy(A) return 0; } ... compiled using: ... $ gcc test.c -fopenacc -S -fdump-tree-all ... At original, we have: ... #pragma acc declare map(tofrom:A); ... but at gimple, we have a map (to:A.1), but not a map (from:A.1): ... int[0:D.2074] * A.1; { int A[0:D.2074] [value-expr: *A.1]; saved_stack.2 = __builtin_stack_save (); try { A.1 = __builtin_alloca_with_align (D.2078, 32); #pragma omp target oacc_declare map(to:(*A.1) [len: D.2076]) } finally { __builtin_stack_restore (saved_stack.2); } } ... This is caused by the following incompatibility. When storing the desired from clause in oacc_declare_returns, we use 'A.1' as the key: ... 10898 oacc_declare_returns->put (decl, c); (gdb) call debug_generic_expr (decl) A.1 (gdb) call debug_generic_expr (c) map(from:(*A.1)) ... but when looking it up, we use 'A' as the key: ... (gdb) 1471 tree *c = oacc_declare_returns->get (t); (gdb) call debug_generic_expr (t) A ... Fix this by extracing the 'A.1' lookup key from 'A' using the decl-expr. In addition, unshare the looked up value, to fix avoid running into an "incorrect sharing of tree nodes" error. Using these two fixes, we get our desired: ... finally { + #pragma omp target oacc_declare map(from:(*A.1)) __builtin_stack_restore (saved_stack.2); } ... Build on x86_64-linux with nvptx accelerator, tested libgomp. gcc/ChangeLog: 2020-10-06 Tom de Vries <tdevries@suse.de> PR middle-end/90861 * gimplify.c (gimplify_bind_expr): Handle lookup in oacc_declare_returns using key with decl-expr. libgomp/ChangeLog: 2020-10-06 Tom de Vries <tdevries@suse.de> PR middle-end/90861 * testsuite/libgomp.oacc-c-c++-common/declare-vla.c: Remove xfail.
2020-10-06lto: fix LTO debug sections copying.Martin Liska1-4/+7
readelf -S prints: There are 81999 section headers, starting at offset 0x1f488060: Section Headers: [Nr] Name Type Address Off Size ES Flg Lk Inf Al [ 0] NULL 0000000000000000 000000 01404f 00 81998 0 0 [ 1] .group GROUP 0000000000000000 000040 000008 04 81995 105027 4 ... [81995] .symtab SYMTAB 0000000000000000 d5d9298 2db310 18 81997 105026 8 [81996] .symtab_shndx SYMTAB SECTION INDICES 0000000000000000 d8b45a8 079dd8 04 81995 0 4 [81997] .strtab STRTAB 0000000000000000 d92e380 80460c 00 0 0 1 ... Looking at the documentation: Table 7–15 ELF sh_link and sh_info Interpretation sh_type - sh_link SHT_SYMTAB - The section header index of the associated string table. SHT_SYMTAB_SHNDX - The section header index of the associated symbol table. As seen, sh_link of a SHT_SYMTAB always points to a .strtab and readelf confirms that. So we need to use reverse mapping taken from [81996] .symtab_shndx SYMTAB SECTION INDICES 0000000000000000 d8b45a8 079dd8 04 81995 0 4 where sh_link points to 81995. libiberty/ChangeLog: PR lto/97290 * simple-object-elf.c (simple_object_elf_copy_lto_debug_sections): Use sh_link of a .symtab_shndx section.
2020-10-06[PATCH][GCC] arm: Move iterators from mve.md to iterators.md to maintain ↵Srinath Parvathaneni3-648/+1266
consistency. To maintain consistency with other Arm Architectures backend, iterators and iterator attributes are moved from mve.md file to iterators.md. Also move enumerators for MVE unspecs from mve.md file to unspecs.md file. gcc/ChangeLog: 2020-10-06 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * config/arm/iterators.md (MVE_types): Move mode iterator from mve.md to iterators.md. (MVE_VLD_ST): Likewise. (MVE_0): Likewise. (MVE_1): Likewise. (MVE_3): Likewise. (MVE_2): Likewise. (MVE_5): Likewise. (MVE_6): Likewise. (MVE_CNVT): Move mode attribute iterator from mve.md to iterators.md. (MVE_LANES): Likewise. (MVE_constraint): Likewise. (MVE_constraint1): Likewise. (MVE_constraint2): Likewise. (MVE_constraint3): Likewise. (MVE_pred): Likewise. (MVE_pred1): Likewise. (MVE_pred2): Likewise. (MVE_pred3): Likewise. (MVE_B_ELEM): Likewise. (MVE_H_ELEM): Likewise. (V_sz_elem1): Likewise. (V_extr_elem): Likewise. (earlyclobber_32): Likewise. (supf): Move int attribute from mve.md to iterators.md. (mode1): Likewise. (VCVTQ_TO_F): Move int iterator from mve.md to iterators.md. (VMVNQ_N): Likewise. (VREV64Q): Likewise. (VCVTQ_FROM_F): Likewise. (VREV16Q): Likewise. (VCVTAQ): Likewise. (VMVNQ): Likewise. (VDUPQ_N): Likewise. (VCLZQ): Likewise. (VADDVQ): Likewise. (VREV32Q): Likewise. (VMOVLBQ): Likewise. (VMOVLTQ): Likewise. (VCVTPQ): Likewise. (VCVTNQ): Likewise. (VCVTMQ): Likewise. (VADDLVQ): Likewise. (VCTPQ): Likewise. (VCTPQ_M): Likewise. (VCVTQ_N_TO_F): Likewise. (VCREATEQ): Likewise. (VSHRQ_N): Likewise. (VCVTQ_N_FROM_F): Likewise. (VADDLVQ_P): Likewise. (VCMPNEQ): Likewise. (VSHLQ): Likewise. (VABDQ): Likewise. (VADDQ_N): Likewise. (VADDVAQ): Likewise. (VADDVQ_P): Likewise. (VANDQ): Likewise. (VBICQ): Likewise. (VBRSRQ_N): Likewise. (VCADDQ_ROT270): Likewise. (VCADDQ_ROT90): Likewise. (VCMPEQQ): Likewise. (VCMPEQQ_N): Likewise. (VCMPNEQ_N): Likewise. (VEORQ): Likewise. (VHADDQ): Likewise. (VHADDQ_N): Likewise. (VHSUBQ): Likewise. (VHSUBQ_N): Likewise. (VMAXQ): Likewise. (VMAXVQ): Likewise. (VMINQ): Likewise. (VMINVQ): Likewise. (VMLADAVQ): Likewise. (VMULHQ): Likewise. (VMULLBQ_INT): Likewise. (VMULLTQ_INT): Likewise. (VMULQ): Likewise. (VMULQ_N): Likewise. (VORNQ): Likewise. (VORRQ): Likewise. (VQADDQ): Likewise. (VQADDQ_N): Likewise. (VQRSHLQ): Likewise. (VQRSHLQ_N): Likewise. (VQSHLQ): Likewise. (VQSHLQ_N): Likewise. (VQSHLQ_R): Likewise. (VQSUBQ): Likewise. (VQSUBQ_N): Likewise. (VRHADDQ): Likewise. (VRMULHQ): Likewise. (VRSHLQ): Likewise. (VRSHLQ_N): Likewise. (VRSHRQ_N): Likewise. (VSHLQ_N): Likewise. (VSHLQ_R): Likewise. (VSUBQ): Likewise. (VSUBQ_N): Likewise. (VADDLVAQ): Likewise. (VBICQ_N): Likewise. (VMLALDAVQ): Likewise. (VMLALDAVXQ): Likewise. (VMOVNBQ): Likewise. (VMOVNTQ): Likewise. (VORRQ_N): Likewise. (VQMOVNBQ): Likewise. (VQMOVNTQ): Likewise. (VSHLLBQ_N): Likewise. (VSHLLTQ_N): Likewise. (VRMLALDAVHQ): Likewise. (VBICQ_M_N): Likewise. (VCVTAQ_M): Likewise. (VCVTQ_M_TO_F): Likewise. (VQRSHRNBQ_N): Likewise. (VABAVQ): Likewise. (VSHLCQ): Likewise. (VRMLALDAVHAQ): Likewise. (VADDVAQ_P): Likewise. (VCLZQ_M): Likewise. (VCMPEQQ_M_N): Likewise. (VCMPEQQ_M): Likewise. (VCMPNEQ_M_N): Likewise. (VCMPNEQ_M): Likewise. (VDUPQ_M_N): Likewise. (VMAXVQ_P): Likewise. (VMINVQ_P): Likewise. (VMLADAVAQ): Likewise. (VMLADAVQ_P): Likewise. (VMLAQ_N): Likewise. (VMLASQ_N): Likewise. (VMVNQ_M): Likewise. (VPSELQ): Likewise. (VQDMLAHQ_N): Likewise. (VQRDMLAHQ_N): Likewise. (VQRDMLASHQ_N): Likewise. (VQRSHLQ_M_N): Likewise. (VQSHLQ_M_R): Likewise. (VREV64Q_M): Likewise. (VRSHLQ_M_N): Likewise. (VSHLQ_M_R): Likewise. (VSLIQ_N): Likewise. (VSRIQ_N): Likewise. (VMLALDAVQ_P): Likewise. (VQMOVNBQ_M): Likewise. (VMOVLTQ_M): Likewise. (VMOVNBQ_M): Likewise. (VRSHRNTQ_N): Likewise. (VORRQ_M_N): Likewise. (VREV32Q_M): Likewise. (VREV16Q_M): Likewise. (VQRSHRNTQ_N): Likewise. (VMOVNTQ_M): Likewise. (VMOVLBQ_M): Likewise. (VMLALDAVAQ): Likewise. (VQSHRNBQ_N): Likewise. (VSHRNBQ_N): Likewise. (VRSHRNBQ_N): Likewise. (VMLALDAVXQ_P): Likewise. (VQMOVNTQ_M): Likewise. (VMVNQ_M_N): Likewise. (VQSHRNTQ_N): Likewise. (VMLALDAVAXQ): Likewise. (VSHRNTQ_N): Likewise. (VCVTMQ_M): Likewise. (VCVTNQ_M): Likewise. (VCVTPQ_M): Likewise. (VCVTQ_M_N_FROM_F): Likewise. (VCVTQ_M_FROM_F): Likewise. (VRMLALDAVHQ_P): Likewise. (VADDLVAQ_P): Likewise. (VABAVQ_P): Likewise. (VSHLQ_M): Likewise. (VSRIQ_M_N): Likewise. (VSUBQ_M): Likewise. (VCVTQ_M_N_TO_F): Likewise. (VHSUBQ_M): Likewise. (VSLIQ_M_N): Likewise. (VRSHLQ_M): Likewise. (VMINQ_M): Likewise. (VMULLBQ_INT_M): Likewise. (VMULHQ_M): Likewise. (VMULQ_M): Likewise. (VHSUBQ_M_N): Likewise. (VHADDQ_M_N): Likewise. (VORRQ_M): Likewise. (VRMULHQ_M): Likewise. (VQADDQ_M): Likewise. (VRSHRQ_M_N): Likewise. (VQSUBQ_M_N): Likewise. (VADDQ_M): Likewise. (VORNQ_M): Likewise. (VRHADDQ_M): Likewise. (VQSHLQ_M): Likewise. (VANDQ_M): Likewise. (VBICQ_M): Likewise. (VSHLQ_M_N): Likewise. (VCADDQ_ROT270_M): Likewise. (VQRSHLQ_M): Likewise. (VQADDQ_M_N): Likewise. (VADDQ_M_N): Likewise. (VMAXQ_M): Likewise. (VQSUBQ_M): Likewise. (VMLASQ_M_N): Likewise. (VMLADAVAQ_P): Likewise. (VBRSRQ_M_N): Likewise. (VMULQ_M_N): Likewise. (VCADDQ_ROT90_M): Likewise. (VMULLTQ_INT_M): Likewise. (VEORQ_M): Likewise. (VSHRQ_M_N): Likewise. (VSUBQ_M_N): Likewise. (VHADDQ_M): Likewise. (VABDQ_M): Likewise. (VMLAQ_M_N): Likewise. (VQSHLQ_M_N): Likewise. (VMLALDAVAQ_P): Likewise. (VMLALDAVAXQ_P): Likewise. (VQRSHRNBQ_M_N): Likewise. (VQRSHRNTQ_M_N): Likewise. (VQSHRNBQ_M_N): Likewise. (VQSHRNTQ_M_N): Likewise. (VRSHRNBQ_M_N): Likewise. (VRSHRNTQ_M_N): Likewise. (VSHLLBQ_M_N): Likewise. (VSHLLTQ_M_N): Likewise. (VSHRNBQ_M_N): Likewise. (VSHRNTQ_M_N): Likewise. (VSTRWSBQ): Likewise. (VSTRBSOQ): Likewise. (VSTRBQ): Likewise. (VLDRBGOQ): Likewise. (VLDRBQ): Likewise. (VLDRWGBQ): Likewise. (VLD1Q): Likewise. (VLDRHGOQ): Likewise. (VLDRHGSOQ): Likewise. (VLDRHQ): Likewise. (VLDRWQ): Likewise. (VLDRDGBQ): Likewise. (VLDRDGOQ): Likewise. (VLDRDGSOQ): Likewise. (VLDRWGOQ): Likewise. (VLDRWGSOQ): Likewise. (VST1Q): Likewise. (VSTRHSOQ): Likewise. (VSTRHSSOQ): Likewise. (VSTRHQ): Likewise. (VSTRWQ): Likewise. (VSTRDSBQ): Likewise. (VSTRDSOQ): Likewise. (VSTRDSSOQ): Likewise. (VSTRWSOQ): Likewise. (VSTRWSSOQ): Likewise. (VSTRWSBWBQ): Likewise. (VLDRWGBWBQ): Likewise. (VSTRDSBWBQ): Likewise. (VLDRDGBWBQ): Likewise. (VADCIQ): Likewise. (VADCIQ_M): Likewise. (VSBCQ): Likewise. (VSBCQ_M): Likewise. (VSBCIQ): Likewise. (VSBCIQ_M): Likewise. (VADCQ): Likewise. (VADCQ_M): Likewise. (UQRSHLLQ): Likewise. (SQRSHRLQ): Likewise. (VSHLCQ_M): Likewise. * config/arm/mve.md (MVE_types): Move mode iterator to iterators.md from mve.md. (MVE_VLD_ST): Likewise. (MVE_0): Likewise. (MVE_1): Likewise. (MVE_3): Likewise. (MVE_2): Likewise. (MVE_5): Likewise. (MVE_6): Likewise. (MVE_CNVT): Move mode attribute iterator to iterators.md from mve.md. (MVE_LANES): Likewise. (MVE_constraint): Likewise. (MVE_constraint1): Likewise. (MVE_constraint2): Likewise. (MVE_constraint3): Likewise. (MVE_pred): Likewise. (MVE_pred1): Likewise. (MVE_pred2): Likewise. (MVE_pred3): Likewise. (MVE_B_ELEM): Likewise. (MVE_H_ELEM): Likewise. (V_sz_elem1): Likewise. (V_extr_elem): Likewise. (earlyclobber_32): Likewise. (supf): Move int attribute to iterators.md from mve.md. (mode1): Likewise. (VCVTQ_TO_F): Move int iterator to iterators.md from mve.md. (VMVNQ_N): Likewise. (VREV64Q): Likewise. (VCVTQ_FROM_F): Likewise. (VREV16Q): Likewise. (VCVTAQ): Likewise. (VMVNQ): Likewise. (VDUPQ_N): Likewise. (VCLZQ): Likewise. (VADDVQ): Likewise. (VREV32Q): Likewise. (VMOVLBQ): Likewise. (VMOVLTQ): Likewise. (VCVTPQ): Likewise. (VCVTNQ): Likewise. (VCVTMQ): Likewise. (VADDLVQ): Likewise. (VCTPQ): Likewise. (VCTPQ_M): Likewise. (VCVTQ_N_TO_F): Likewise. (VCREATEQ): Likewise. (VSHRQ_N): Likewise. (VCVTQ_N_FROM_F): Likewise. (VADDLVQ_P): Likewise. (VCMPNEQ): Likewise. (VSHLQ): Likewise. (VABDQ): Likewise. (VADDQ_N): Likewise. (VADDVAQ): Likewise. (VADDVQ_P): Likewise. (VANDQ): Likewise. (VBICQ): Likewise. (VBRSRQ_N): Likewise. (VCADDQ_ROT270): Likewise. (VCADDQ_ROT90): Likewise. (VCMPEQQ): Likewise. (VCMPEQQ_N): Likewise. (VCMPNEQ_N): Likewise. (VEORQ): Likewise. (VHADDQ): Likewise. (VHADDQ_N): Likewise. (VHSUBQ): Likewise. (VHSUBQ_N): Likewise. (VMAXQ): Likewise. (VMAXVQ): Likewise. (VMINQ): Likewise. (VMINVQ): Likewise. (VMLADAVQ): Likewise. (VMULHQ): Likewise. (VMULLBQ_INT): Likewise. (VMULLTQ_INT): Likewise. (VMULQ): Likewise. (VMULQ_N): Likewise. (VORNQ): Likewise. (VORRQ): Likewise. (VQADDQ): Likewise. (VQADDQ_N): Likewise. (VQRSHLQ): Likewise. (VQRSHLQ_N): Likewise. (VQSHLQ): Likewise. (VQSHLQ_N): Likewise. (VQSHLQ_R): Likewise. (VQSUBQ): Likewise. (VQSUBQ_N): Likewise. (VRHADDQ): Likewise. (VRMULHQ): Likewise. (VRSHLQ): Likewise. (VRSHLQ_N): Likewise. (VRSHRQ_N): Likewise. (VSHLQ_N): Likewise. (VSHLQ_R): Likewise. (VSUBQ): Likewise. (VSUBQ_N): Likewise. (VADDLVAQ): Likewise. (VBICQ_N): Likewise. (VMLALDAVQ): Likewise. (VMLALDAVXQ): Likewise. (VMOVNBQ): Likewise. (VMOVNTQ): Likewise. (VORRQ_N): Likewise. (VQMOVNBQ): Likewise. (VQMOVNTQ): Likewise. (VSHLLBQ_N): Likewise. (VSHLLTQ_N): Likewise. (VRMLALDAVHQ): Likewise. (VBICQ_M_N): Likewise. (VCVTAQ_M): Likewise. (VCVTQ_M_TO_F): Likewise. (VQRSHRNBQ_N): Likewise. (VABAVQ): Likewise. (VSHLCQ): Likewise. (VRMLALDAVHAQ): Likewise. (VADDVAQ_P): Likewise. (VCLZQ_M): Likewise. (VCMPEQQ_M_N): Likewise. (VCMPEQQ_M): Likewise. (VCMPNEQ_M_N): Likewise. (VCMPNEQ_M): Likewise. (VDUPQ_M_N): Likewise. (VMAXVQ_P): Likewise. (VMINVQ_P): Likewise. (VMLADAVAQ): Likewise. (VMLADAVQ_P): Likewise. (VMLAQ_N): Likewise. (VMLASQ_N): Likewise. (VMVNQ_M): Likewise. (VPSELQ): Likewise. (VQDMLAHQ_N): Likewise. (VQRDMLAHQ_N): Likewise. (VQRDMLASHQ_N): Likewise. (VQRSHLQ_M_N): Likewise. (VQSHLQ_M_R): Likewise. (VREV64Q_M): Likewise. (VRSHLQ_M_N): Likewise. (VSHLQ_M_R): Likewise. (VSLIQ_N): Likewise. (VSRIQ_N): Likewise. (VMLALDAVQ_P): Likewise. (VQMOVNBQ_M): Likewise. (VMOVLTQ_M): Likewise. (VMOVNBQ_M): Likewise. (VRSHRNTQ_N): Likewise. (VORRQ_M_N): Likewise. (VREV32Q_M): Likewise. (VREV16Q_M): Likewise. (VQRSHRNTQ_N): Likewise. (VMOVNTQ_M): Likewise. (VMOVLBQ_M): Likewise. (VMLALDAVAQ): Likewise. (VQSHRNBQ_N): Likewise. (VSHRNBQ_N): Likewise. (VRSHRNBQ_N): Likewise. (VMLALDAVXQ_P): Likewise. (VQMOVNTQ_M): Likewise. (VMVNQ_M_N): Likewise. (VQSHRNTQ_N): Likewise. (VMLALDAVAXQ): Likewise. (VSHRNTQ_N): Likewise. (VCVTMQ_M): Likewise. (VCVTNQ_M): Likewise. (VCVTPQ_M): Likewise. (VCVTQ_M_N_FROM_F): Likewise. (VCVTQ_M_FROM_F): Likewise. (VRMLALDAVHQ_P): Likewise. (VADDLVAQ_P): Likewise. (VABAVQ_P): Likewise. (VSHLQ_M): Likewise. (VSRIQ_M_N): Likewise. (VSUBQ_M): Likewise. (VCVTQ_M_N_TO_F): Likewise. (VHSUBQ_M): Likewise. (VSLIQ_M_N): Likewise. (VRSHLQ_M): Likewise. (VMINQ_M): Likewise. (VMULLBQ_INT_M): Likewise. (VMULHQ_M): Likewise. (VMULQ_M): Likewise. (VHSUBQ_M_N): Likewise. (VHADDQ_M_N): Likewise. (VORRQ_M): Likewise. (VRMULHQ_M): Likewise. (VQADDQ_M): Likewise. (VRSHRQ_M_N): Likewise. (VQSUBQ_M_N): Likewise. (VADDQ_M): Likewise. (VORNQ_M): Likewise. (VRHADDQ_M): Likewise. (VQSHLQ_M): Likewise. (VANDQ_M): Likewise. (VBICQ_M): Likewise. (VSHLQ_M_N): Likewise. (VCADDQ_ROT270_M): Likewise. (VQRSHLQ_M): Likewise. (VQADDQ_M_N): Likewise. (VADDQ_M_N): Likewise. (VMAXQ_M): Likewise. (VQSUBQ_M): Likewise. (VMLASQ_M_N): Likewise. (VMLADAVAQ_P): Likewise. (VBRSRQ_M_N): Likewise. (VMULQ_M_N): Likewise. (VCADDQ_ROT90_M): Likewise. (VMULLTQ_INT_M): Likewise. (VEORQ_M): Likewise. (VSHRQ_M_N): Likewise. (VSUBQ_M_N): Likewise. (VHADDQ_M): Likewise. (VABDQ_M): Likewise. (VMLAQ_M_N): Likewise. (VQSHLQ_M_N): Likewise. (VMLALDAVAQ_P): Likewise. (VMLALDAVAXQ_P): Likewise. (VQRSHRNBQ_M_N): Likewise. (VQRSHRNTQ_M_N): Likewise. (VQSHRNBQ_M_N): Likewise. (VQSHRNTQ_M_N): Likewise. (VRSHRNBQ_M_N): Likewise. (VRSHRNTQ_M_N): Likewise. (VSHLLBQ_M_N): Likewise. (VSHLLTQ_M_N): Likewise. (VSHRNBQ_M_N): Likewise. (VSHRNTQ_M_N): Likewise. (VSTRWSBQ): Likewise. (VSTRBSOQ): Likewise. (VSTRBQ): Likewise. (VLDRBGOQ): Likewise. (VLDRBQ): Likewise. (VLDRWGBQ): Likewise. (VLD1Q): Likewise. (VLDRHGOQ): Likewise. (VLDRHGSOQ): Likewise. (VLDRHQ): Likewise. (VLDRWQ): Likewise. (VLDRDGBQ): Likewise. (VLDRDGOQ): Likewise. (VLDRDGSOQ): Likewise. (VLDRWGOQ): Likewise. (VLDRWGSOQ): Likewise. (VST1Q): Likewise. (VSTRHSOQ): Likewise. (VSTRHSSOQ): Likewise. (VSTRHQ): Likewise. (VSTRWQ): Likewise. (VSTRDSBQ): Likewise. (VSTRDSOQ): Likewise. (VSTRDSSOQ): Likewise. (VSTRWSOQ): Likewise. (VSTRWSSOQ): Likewise. (VSTRWSBWBQ): Likewise. (VLDRWGBWBQ): Likewise. (VSTRDSBWBQ): Likewise. (VLDRDGBWBQ): Likewise. (VADCIQ): Likewise. (VADCIQ_M): Likewise. (VSBCQ): Likewise. (VSBCQ_M): Likewise. (VSBCIQ): Likewise. (VSBCIQ_M): Likewise. (VADCQ): Likewise. (VADCQ_M): Likewise. (UQRSHLLQ): Likewise. (SQRSHRLQ): Likewise. (VSHLCQ_M): Likewise. (define_c_enum "unspec"): Move MVE enumerator to unspecs.md from mve.md. * config/arm/unspecs.md (define_c_enum "unspec"): Move MVE enumerator from mve.md to unspecs.md.
generated by cgit v1.1 at 2025-09-27 04:47:00 +0000