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The MATMUL intrinsic provided a wrong result for rank-1 times rank-2 array
when a negative stride was used for addressing the elements of the rank-1
array, because a check on strides was erroneously placed before the check
on the rank. Interchange order of checks.
libgfortran/ChangeLog:
* m4/matmul_internal.m4: Move check for rank-1 times rank-2 before
checks on strides for rank-2 times rank-2.
* generated/matmul_c10.c: Regenerated.
* generated/matmul_c16.c: Likewise.
* generated/matmul_c4.c: Likewise.
* generated/matmul_c8.c: Likewise.
* generated/matmul_i1.c: Likewise.
* generated/matmul_i16.c: Likewise.
* generated/matmul_i2.c: Likewise.
* generated/matmul_i4.c: Likewise.
* generated/matmul_i8.c: Likewise.
* generated/matmul_r10.c: Likewise.
* generated/matmul_r16.c: Likewise.
* generated/matmul_r4.c: Likewise.
* generated/matmul_r8.c: Likewise.
* generated/matmulavx128_c10.c: Likewise.
* generated/matmulavx128_c16.c: Likewise.
* generated/matmulavx128_c4.c: Likewise.
* generated/matmulavx128_c8.c: Likewise.
* generated/matmulavx128_i1.c: Likewise.
* generated/matmulavx128_i16.c: Likewise.
* generated/matmulavx128_i2.c: Likewise.
* generated/matmulavx128_i4.c: Likewise.
* generated/matmulavx128_i8.c: Likewise.
* generated/matmulavx128_r10.c: Likewise.
* generated/matmulavx128_r16.c: Likewise.
* generated/matmulavx128_r4.c: Likewise.
* generated/matmulavx128_r8.c: Likewise.
gcc/testsuite/ChangeLog:
* gfortran.dg/matmul_20.f90: New test.
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This patch removes unnnecessary or simplifies requirements for various
Power9 testcase.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/p9-dimode1.c: Remove target.
* gcc.target/powerpc/p9-dimode2.c: Remove target.
* gcc.target/powerpc/p9-fpcvt-1.c: Remove target.
* gcc.target/powerpc/p9-fpcvt-2.c: Require lp64.
* gcc.target/powerpc/p9-minmax-1.c: Remove target.
* gcc.target/powerpc/p9-minmax-2.c: Remove target.
* gcc.target/powerpc/p9-minmax-3.c: Remove target.
* gcc.target/powerpc/p9-splat-1.c: Require lp64.
* gcc.target/powerpc/p9-splat-2.c: Remove target.
* gcc.target/powerpc/p9-splat-3.c: Remove target.
* gcc.target/powerpc/p9-splat-4.c: Require lp64.
* gcc.target/powerpc/p9-vbpermd.c: Require lp64.
* gcc.target/powerpc/p9-vneg.c: Require lp64.
* gcc.target/powerpc/p9-vparity.c: Require lp64.
* gcc.target/powerpc/p9-vpermr.c: Require LE.
* gcc.target/powerpc/p9-xxbr-1.c: Remove target.
* gcc.target/powerpc/p9-xxbr-2.c: Require lp64.
* gcc.target/powerpc/p9-xxbr-3.c: Require lp64.
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libstdc++-v3/ChangeLog:
PR libstdc++/97449
* include/std/variant
(__gen_vtable_impl<>::_S_apply_single_alt):
Diagnose visitor return type mismatches here..
(__gen_vtable_impl</*base case*/>::_S_apply):
..not here.
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This patch removes the unnecessary "le" target requirement
of the builtins-3-p9.c testcase.
gcc/testsuite/ChangeLog:
2020-10-16 David Edelsohn <dje.gcc@gmail.com>
* gcc.target/powerpc/builtins-3-p9.c: Remove le.
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Two tests in the powerpc-specific testsuite explicitly add the -m32
and -m64 commandline options, which only are valid for Linux. And the
tests check for lp64 or ilp32, which is redundant. This patch removes
the unnecessary commandline options.
gcc/testsuite/ChangeLog:
2020-10-16 David Edelsohn <dje.gcc@gmail.com>
* gcc.target/powerpc/pr96139-a.c: Remove -m32.
* gcc.target/powerpc/pr96139-b.c: Remove -m64.
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Simplification of the elemental intrinsic INDEX with constant array-valued
arguments failed with an ICE or did not reduce to a constant array, depending
also on the presence of the optional KIND argument. Add a further attempt of
simplification in the case of elemental intrinsics, and make sure the KIND
argument is not removed prematurely during simplification of INDEX.
gcc/fortran/ChangeLog:
PR fortran/95979
* expr.c (gfc_check_init_expr): Fix check of return code from
gfc_intrinsic_func_interface.
* intrinsic.c (gfc_intrinsic_func_interface): Add further attempt
of simplification of elemental intrinsics with array arguments.
* iresolve.c (gfc_resolve_index_func): Keep optional KIND argument
for simplification of elemental use of INDEX.
gcc/testsuite/ChangeLog:
PR fortran/95979
* gfortran.dg/index_4.f90: New test.
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Dont show names that have been removed.
* vr-values.c (dump_all_value_ranges): Only dump names which are
still active.
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Return a constant range if POINTER_PLUS is [0,0] plus a const.
* range-op.cc (pointer_plus_operator::wi_fold): Make pointer_plus
[0, 0] + const return a [const, const] range.
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Call evrp_folder::range_of_expr directly so we dont end up calling
hybrid_folder::range_of_expr and doing double lookups/comparisons.
* gimple-ssa-evrp.c (hybrid_folder::value_on_edge): Call
evrp_folder::value_of_expr directly.
(hybrid_folder::value_of_stmt): Ditto.
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Don't assert, simply Return false for negative shifts as we can't tell
anything about the operand.
PR tree-optimization/97462
gcc/
* range-op.cc (operator_lshift::op1_range): Don't trap on negative
shifts.
gcc/testsuite/
* gcc.dg/pr97462.c: New file.
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My changes to friend handling meant that there are now cases where a
friend doesn't get a lang-specific object. So we need to check there
is one before looking inside it.
PR c++/97460
gcc/cp/
* pt.c (push_template_decl): Check DECL_LANG_SPECIFIC in friend
case.
gcc/testsuite/
* g++.dg/template/pr97460.C: New.
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cp_parser_declaration peeks at 1 or 2 tokens, when I changed it not to
peek past EOF, I set the second token to NULL. But there are paths
through the function that just look at the second token. Fixed by
setting that token to EOF rather than NULL in this case.
PR c++/96258
gcc/cp/
* parser.c (cp_parser_declaration): Make token2 point to EOF if
token1 was EOF.
gcc/testsuite/
* g++.dg/parse/pr96258.C: New.
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As for condition variables, the C++0x threads support relies on
VxWorks entry points not available in VxWorks versions prior to 6.
We just expose absence of support for C++0x threads on such systems.
2020-10-15 Rasmus Villemoes <rv@rasmusvillemoes.dk>
libgcc/
* config/gthr-vxworks.h: Condition the ___GTHREADS_CXX0X
section on VxWorks >= 6.
* config/gthr-vxworks-thread.c: Condition the entire
implementation on __GTHREAD_CXX0X.
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The condition variables support relies on kernel entry points
to enforce critical aspects of it's expected behavior.
Some of these entry points are not available prior to VxWorks 6,
so we just expose absence of support for condition variables on
such systems.
2020-10-15 Rasmus Villemoes <rv@rasmusvillemoes.dk>
libgcc/
* config/gthr-vxworks.h: Condition the __GTHREAD_HAS_COND
section on VxWorks >= 6.
* config/gthr-vxworks-cond.c: Condition the entire
implementation on __GTHREAD_HAS_COND.
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This fixes an oversight and addresses a few build time warnings.
2020-10-15 Rasmus Villemoes <rv@rasmusvillemoes.dk>
libgcc/
* config/gthr-vxworks.c: #include <taskLib.h>.
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2020-10-15 Rasmus Villemoes <rv@rasmusvillemoes.dk>
libgcc/
* config/gthr-vxworks.h: Rewrite remaining occurrence
of _VXW_PRE_69 as _VXWORKS_PRE(6,9).
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As of today, the __gthread_enter/leave entry points are
only meaningful on VxWorks 6. Refactor the VX_ENTER_TLS_DTOR
macros accordingly.
2020-10-15 Rasmus Villemoes <rv@rasmusvillemoes.dk>
libgcc/
* config/gthr-vxworks-tls.c (VX_ENTER_TLS_DTOR): Nil
except on VxWorks 6.
Co-authored-by: Olivier Hainque <hainque@adacore.com>
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The ports that support RTPs achieve the kernel/rtp compilation
and link distinction through the multilib mechanism.
This patch just removes the bogus explicit extraneous
materialization of this distinction in the common VxWorks
configuration files and leaves the rtp specialization all
to the multilib machinery.
2020-10-15 Olivier Hainque <hainque@adacore.com>
libgcc/
* config/t-vxcrtstuff: Remove the -kernel/-rtp specialization.
gcc/
* config/vxworks.h (VX_CRTBEGIN_SPEC): Likewise.
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This conditions the use of system headers to fetch a
_WRS_VXWORKS_MAJOR macro on the non definition of that
macro. This allows builds where a specific value is
predefined, e.g. with a self spec, useful in environments
where the system headers don't actually define that macro
(e.g. vxworks 5 or 653).
In addition, _WRS_VXWORKS_MINOR is only provided by the
system headers when really meaningful, e.g. from 6.4 to 6.9.
We just pick a conservative default to 0 for all the cases
where it is not exposed by the system headers or otherwise.
2020-10-15 Olivier Hainque <hainque@adacore.com>
gcc/
* config/vxworks/_vxworks-versions.h: Only include
version.h if _WRS_VXWORKS_MAJOR is not defined.
Provide a default _WRS_VXWORKS_MINOR (0).
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(pr97327).
This patch fixes (PR97327) the warning -mcpu=cortex-m55 conflicts with -march=armv8.1-m.main
for -mfloat-abi=soft by adding the isa_bit_mve_float to clearing FP bit list.
The following combination are fixed with this patch:
$ cat bug.c
int main(){
return 0;
}
$ arm-none-eabi-gcc -mcpu=cortex-m55 -mfloat-abi=soft bug.c -c
$ arm-none-eabi-gcc -mcpu=cortex-m55 -mfloat-abi=soft -march=armv8.1-m.main+mve bug.c -c
Before this patch for above combinations:
cc1: warning: switch '-mcpu=cortex-m55' conflicts with '-march=armv8.1-m.main' switch
After this patch for above combinations no warning/errors.
gcc/ChangeLog:
2020-10-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
PR target/97327
* config/arm/arm.c (fp_bitlist): Add isa_bit_mve_float to FP bits array.
gcc/testsuite/ChangeLog:
PR target/97327
* gcc.target/arm/mve/intrinsics/pr97327.c: New test.
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This changes SLP def gathering to not fail due to mismatched
def type but instead demote the def to external. This allows the
new testcase to be vectorized in full (with GCC 10 it is not
vectorized at all and with current trunk we vectorize only the
store). This is important since with BB vectorization being
applied to bigger pieces of code the chance that we mix
internal and external defs for an operand that should end up
treated as external (built from scalars) increases.
2020-10-16 Richard Biener <rguenther@suse.de>
* tree-vect-slp.c (vect_get_and_check_slp_defs): For BB
vectorization swap operands only if it helps, demote mismatches to
external.
* gcc.dg/vect/bb-slp-53.c: New testcase.
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intrinsics with -O2 (PR97271).
This patch fixes (PR97271) the wrong code-gen for mve scatter store with writeback intrinsics with -O2.
$cat bug.c
void
foo (uint32x4_t * addr, const int offset, int32x4_t value)
{
vstrwq_scatter_base_wb_s32 (addr, 8, value);
}
$ arm-none-eabi-gcc bug.c -S -O2 -march=armv8.1-m.main+mve -mfloat-abi=hard -o -
Without this patch:
...
foo:
vldrw.32 q3, [r0]
vstrw.u32 q0, [q3, #8]! ---> (A)
vldr.64 d4, .L3
vldr.64 d5, .L3+8
vldrw.32 q3, [r0]
vstrw.u32 q2, [q3, #8]! ---> (B)
bx lr
...
With this patch:
...
foo:
vldrw.32 q3, [r0]
vstrw.u32 q0, [q3, #8]! --> (C)
vstrw.32 q3, [r0]
bx lr
...
Without this patch 2 vstrw assembly instructions (A and B) are generated for vstrwq_scatter_base_wb_s32
intrinsic where as fix generates only one vstrw assembly instruction (C).
gcc/ChangeLog:
2020-10-06 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
PR target/97291
* config/arm/arm-builtins.c (arm_strsbwbs_qualifiers): Modify array.
(arm_strsbwbu_qualifiers): Likewise.
(arm_strsbwbs_p_qualifiers): Likewise.
(arm_strsbwbu_p_qualifiers): Likewise.
* config/arm/arm_mve.h (__arm_vstrdq_scatter_base_wb_s64): Modify
function definition.
(__arm_vstrdq_scatter_base_wb_u64): Likewise.
(__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
(__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
(__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
(__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
(__arm_vstrwq_scatter_base_wb_s32): Likewise.
(__arm_vstrwq_scatter_base_wb_u32): Likewise.
(__arm_vstrwq_scatter_base_wb_f32): Likewise.
(__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
* config/arm/arm_mve_builtins.def (vstrwq_scatter_base_wb_add_u): Remove
expansion for the builtin.
(vstrwq_scatter_base_wb_add_s): Likewise.
(vstrwq_scatter_base_wb_add_f): Likewise.
(vstrdq_scatter_base_wb_add_u): Likewise.
(vstrdq_scatter_base_wb_add_s): Likewise.
(vstrwq_scatter_base_wb_p_add_u): Likewise.
(vstrwq_scatter_base_wb_p_add_s): Likewise.
(vstrwq_scatter_base_wb_p_add_f): Likewise.
(vstrdq_scatter_base_wb_p_add_u): Likewise.
(vstrdq_scatter_base_wb_p_add_s): Likewise.
* config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Remove
expand.
(mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
(mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Rename pattern to ...
(mve_vstrwq_scatter_base_wb_<supf>v4si): This.
(mve_vstrwq_scatter_base_wb_p_<supf>v4si): Remove expand.
(mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
(mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Rename pattern to ...
(mve_vstrwq_scatter_base_wb_p_<supf>v4si): This.
(mve_vstrwq_scatter_base_wb_fv4sf): Remove expand.
(mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
(mve_vstrwq_scatter_base_wb_fv4sf_insn): Rename pattern to ...
(mve_vstrwq_scatter_base_wb_fv4sf): This.
(mve_vstrwq_scatter_base_wb_p_fv4sf): Remove expand.
(mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
(mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Rename pattern to ...
(mve_vstrwq_scatter_base_wb_p_fv4sf): This.
(mve_vstrdq_scatter_base_wb_<supf>v2di): Remove expand.
(mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
(mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Rename pattern to ...
(mve_vstrdq_scatter_base_wb_<supf>v2di): This.
(mve_vstrdq_scatter_base_wb_p_<supf>v2di): Remove expand.
(mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
(mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Rename pattern to ...
(mve_vstrdq_scatter_base_wb_p_<supf>v2di): This.
gcc/testsuite/ChangeLog:
PR target/97291
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c: Modify.
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c: Likewise.
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PR testsuite/97426
* gcc.dg/tree-ssa/modref-4.c: Fix return test.
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libsanitizer/ChangeLog:
* LOCAL_PATCHES: Update revision.
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(cherry picked from commit 21bb1625bd4f183984223ce31bd03ba47ed62f27)
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- -march has handle implied extension for a while, so I think
multilib-generator should handle this well too.
- Currently only add rule for D imply F.
gcc/ChangeLog:
* config/riscv/multilib-generator (IMPLIED_EXT): New.
(arch_canonicalize): Update comment and handle implied extensions.
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This refactors vect_get_and_check_slp_defs so that the ops and def_stmts
arrays are filled for all stmts and operands even when we signal failure.
This allows later changes for BB vectorization SLP discovery heuristics.
2020-10-16 Richard Biener <rguenther@suse.de>
* tree-vect-slp.c (vect_get_and_check_slp_defs): First analyze
all operands and fill in the def_stmts and ops entries.
(vect_def_types_match): New helper.
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gcc/ChangeLog:
PR ipa/97404
* ipa-prop.c (struct ipa_vr_ggc_hash_traits):
Compare types of VRP as we can merge ranges of different types.
gcc/testsuite/ChangeLog:
PR ipa/97404
* gcc.c-torture/execute/pr97404.c: New test.
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gcc/ada/
* checks.adb, exp_aggr.adb, exp_attr.adb, exp_ch6.adb,
freeze.adb, sem_aggr.adb, sem_attr.adb, sem_ch13.adb,
sem_ch13.ads, sem_ch6.adb, sem_eval.adb, sem_util.adb: Fix style
and typos.
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gcc/ada/
* sem_cat.adb (Is_Primary): Handle N_Range properly.
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gcc/ada/
* elists.ads (New_Elmt_List): New functions.
* elists.adb (New_Elmt_List): New functions.
* exp_prag.adb: Add dependency on Elists.
(Expand_Pragma_CUDA_Execute): New function.
(Expand_N_Pragma): Add call to Expand_Pragma_CUDA_Execute.
* rtsfind.ads: Add CUDA.Internal, CUDA.Runtime, System.C
packages and RE_Push_Call_Configuration,
RE_Pop_Call_Configuration, RE_Launch_Kernel, RO_IC_Unsigned,
RO_IC_Unsigned_Long_Long entities.
* rtsfind.adb: Extend Interfaces_Descendant to include
Interfaces_C.
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gcc/ada/
* par-ch4.adb (P_Name): Allow Tok_Left_Bracket in two places to
call P_Qualified_Expression. We don't need to modify other
places that call P_Qualified_Expression, because a
qualified_expression is a name in Ada 2012 and higher, so P_Name
is the right place. The parser already parses aggregates with
brackets; we just need to allow that in qualified expressions.
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gcc/ada/
* sem_ch12.adb (Check_Generic_Child_Unit): When the child unit
is a renaming of a generic child unit then traverse the scope
containing the renaming declaration to locate the instance of
its parent. Otherwise the parent is not installed and the
frontend cannot process the instantiation.
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gcc/ada/
* libgnat/a-numeri.ads: Remove the greek letter.
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gcc/ada/
* exp_imgv.adb (Expand_Image_Attribute): Refine previous patch
to use root type (and not base type) on enumeration types.
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gcc/ada/
* exp_imgv.adb (Expand_Image_Attribute): Use the base type
instead of the root type when type of object is private. Remove
Ada_2020 guard, because it has been checked during prior
analysis. Use Underlying_Type in all cases, as it is a no-op on
types that are not private.
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gcc/ada/
* aspects.ads, snames.ads-tmpl: Add support for
Exclusive_Functions aspect.
* sem_ch13.adb (Analyze_Aspect_Specifications): Ditto.
* exp_ch9.adb (Build_Protected_Subprogram_Body): Take aspect
Exclusive_Functions into account.
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gcc/ada/
* gcc-interface/Make-lang.in: Update dependencies on system.ads,
add gnatbind switch -t to avoid timestamp inconsistencies during
build.
* libgnat/system.ads: Move...
* gcc-interface/system.ads: ... here.
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gcc/ada/
* sem_eval.adb (Subtypes_Statically_Match): Retrieve
discriminant constraints from the two types via new function
Original_Discriminant_Constraint rather than
Discriminant_Constraint.
(Original_Discriminant_Constraint): New function to locate the
nearest explicit discriminant constraint associated with a type
that may possibly have inherited a constraint from an ancestor
type.
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gcc/ada/
* exp_ch6.adb (Expand_Simple_Function_Return): Remove obsolete
comment and code.
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gcc/ada/
PR ada/95953
* libgnat/a-suenco.adb (Convert): Fix handling of third UTF-8
byte.
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gcc/ada/
* exp_util.adb (Is_Related_To_Func_Return): Cope with the case
where the FE introduces a type conversion.
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gcc/ada/
* sem_util.ads, sem_util.adb (Is_Access_Variable): New function.
(Is_Synchronized_Object): Call new function when determining if
a constant can be regarded as synchronized.
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gcc/ada/
* exp_ch6.adb (Make_Build_In_Place_Call_In_Object_Declaration):
Call Set_BIP_Initialization_Call systematically.
* exp_ch7.adb (Process_Transient_In_Scope): Take
BIP_Initialization_Call into account to decide where to insert
the Hook.
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gcc/ada/
* sem_util.adb (Is_View_Conversion): Detect qualified types.
* sem_util.ads (Is_Actual_In_Out_Parameter): Fix style in
comment.
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gcc/ada/
* scil_ll.adb, sem_scil.adb: Update assertions.
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gcc/ada/
* sem_attr.adb (Min_Max): Handle the case where attribute
name (qualified by required type) appears as the reducer of a
'Reduce attribute reference.
(Resolve_Attribute) <Reduce>: Handle properly the presence of a
procedure or an attribute reference Min/Max as a reducer.
* exp_attr.adb (Expand_Attribute_Reference) <Reduce>: New
subprogram Build_Stat, to construct the combining statement
which appears in the generated loop for Reduce, and which is
either a function call when the reducer is a function or an
attribute, or a procedure call when reducer is an appropriate
procedure. BuilD_Stat is used both when the prefix of 'Reduce
is a value sequence and when it is an object
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