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2020-09-24arm: Fix canary address calculation for non-PICRichard Sandiford3-2/+46
For non-PIC, the stack protector patterns did: rtx mem = XEXP (force_const_mem (SImode, operands[1]), 0); emit_move_insn (operands[2], mem); Here, operands[1] is the address of the canary (&__stack_chk_guard) and operands[2] is the register that we want to move that address into. However, the code above instead sets operands[2] to the address of a constant pool entry that contains &__stack_chk_guard, rather than to &__stack_chk_guard itself. The sequence therefore does one less pointer indirection than it should. The net effect was to use &__stack_chk_guard for stack-smash detection, instead of using __stack_chk_guard itself. gcc/ * config/arm/arm.md (*stack_protect_combined_set_insn): For non-PIC, load the address of the canary rather than the address of the constant pool entry that points to it. (*stack_protect_combined_test_insn): Likewise. gcc/testsuite/ * gcc.target/arm/stack-protector-3.c: New test. * gcc.target/arm/stack-protector-4.c: Likewise.
2020-09-24tree-optimization/97085 - fold some trivial bool vector ?:Richard Biener2-0/+24
The following aovids the ICE in the testcase by doing some additional simplification of VEC_COND_EXPRs for VECTOR_BOOLEAN_TYPE_P which we don't really expect, esp. when they are not classical vectors, thus AVX512 or SVE masks. 2020-09-24 Richard Biener <rguenther@suse.de> PR tree-optimization/97085 * match.pd (mask ? { false,..} : { true, ..} -> ~mask): New. * gcc.dg/vect/pr97085.c: New testcase.
2020-09-24[testsuite] Require non_strict_align in pr94600-{1,3}.cTom de Vries2-4/+4
With the nvptx target, we run into: ... FAIL: gcc.dg/pr94600-1.c scan-rtl-dump-times final "\\(mem/v" 6 FAIL: gcc.dg/pr94600-1.c scan-rtl-dump-times final "\\(set \\(mem/v" 6 FAIL: gcc.dg/pr94600-3.c scan-rtl-dump-times final "\\(mem/v" 1 FAIL: gcc.dg/pr94600-3.c scan-rtl-dump-times final "\\(set \\(mem/v" 1 ... The scans attempt to check for volatile stores, but on nvptx we have memcpy instead. This is due to nvptx being a STRICT_ALIGNMENT target, which has the effect that the TYPE_MODE for the store target is set to BKLmode in compute_record_mode. Fix the FAILs by requiring effective target non_strict_align. Tested on nvptx. gcc/testsuite/ChangeLog: 2020-09-24 Tom de Vries <tdevries@suse.de> * gcc.dg/pr94600-1.c: Require effective target non_strict_align for scan-rtl-dump-times. * gcc.dg/pr94600-3.c: Same.
2020-09-24Fix memory allocations in ipa-modref.Jan Hubicka2-42/+65
Pair ggc_delete with ggc_alloc_no_dtor. I copy same scheme as used by Martin in ipa-fnsummary, that is creating a static member function create_ggc hidding the ugly bits and using it in ipa-modref.c. I also noticed that modref-tree leaks memory on destruction/collapse method and fixed that. Bootstrapped/regtested x86_64-linux. gcc/ChangeLog: 2020-09-24 Jan Hubicka <hubicka@ucw.cz> * ipa-modref-tree.h (modref_base::collapse): Release memory. (modref_tree::create_ggc): New member function. (modref_tree::colapse): Release memory. (modref_tree::~modref_tree): New destructor. * ipa-modref.c (modref_summaries::create_ggc): New function. (analyze_function): Use create_ggc. (modref_summaries::duplicate): Likewise. (read_modref_records): Likewise. (modref_read): Likewise.
2020-09-24[testsuite] Check target alias in builtin-has-attribute-3.cTom de Vries1-1/+1
When running test-case c-c++-common/builtin-has-attribute-3.c on nvptx, I get: ... FAIL: c-c++-common/builtin-has-attribute-3.c -Wc++-compat \ (test for excess errors) Excess errors: src/gcc/testsuite/c-c++-common/builtin-has-attribute-3.c:33:33: error: \ alias definitions not supported in this configuration ... Fix this by adding -DSKIP_ALIAS to the compilation options for effective target ! alias. Tested on nvptx. gcc/testsuite/ChangeLog: * c-c++-common/builtin-has-attribute-3.c: Compile with -DSKIP_ALIAS for effective target ! alias.
2020-09-24test: Adjust case p9-vec-length-full-6.c [PR97075]Kewen Lin1-5/+4
The commit r11-3230 brings a nice improvement to use full vectors instead of partial vectors when available. This patch is to fix the test failures on p9-vec-length-full-6.c, where 64bit/32bit pairs are able to use full vector instead. Bootstrapped/regtested on powerpc64le-linux-gnu P9. gcc/testsuite/ChangeLog: PR tree-optimization/97075 * gcc.target/powerpc/p9-vec-length-full-6.c: Adjust.
2020-09-24Re: [RS6000] Power10 libffi fixesAlan Modra1-1/+3
Adding a nop broke ffi_closure_LINUX64! * src/powerpc/linux64_closure.S (ffi_closure_LINUX64): Correct location of .Lret.
2020-09-24[RS6000] rs6000_rtx_costs for PLUS/MINUS constantAlan Modra1-2/+2
These functions do behave a little differently for SImode, so the mode should be passed. * config/rs6000/rs6000.c (rs6000_rtx_costs): Pass mode to reg_or_add_cint_operand and reg_or_sub_cint_operand.
2020-09-24[RS6000] Count rldimi constant insnsAlan Modra1-2/+2
rldimi is generated by rs6000_emit_set_long_const when the high and low 32 bits of a 64-bit constant are equal. PR target/93012 * config/rs6000/rs6000.c (num_insns_constant_gpr): Count rldimi constants correctly.
2020-09-24[RS6000] Power10 libffi fixesAlan Modra2-1/+19
Power10 pc-relative code doesn't use or preserve r2 as a TOC pointer. That means calling between pc-relative and TOC using code can't be done without intervening linker stubs, and a call from TOC code to pc-relative code must have a nop after the bl in order to restore r2. Now the PowerPC libffi assembly code doesn't use r2 except for the implicit use when making calls back to C, ffi_closure_helper_LINUX64 and ffi_prep_args64. So changing the assembly to interoperate with pc-relative code without stubs is easily done. * src/powerpc/linux64.S (ffi_call_LINUX64): Don't emit global entry when __PCREL__. Call using @notoc. Add nops. * src/powerpc/linux64_closure.S (ffi_closure_LINUX64): Likewise. (ffi_go_closure_linux64): Likewise.
2020-09-24[RS6000] Built-in __PCREL__ defineAlan Modra1-0/+3
Useful in assembly to know details of power10 function calls. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Conditionally define __PCREL__.
2020-09-24[RS6000] PR97107, libgo fails to build for power10Alan Modra2-3/+14
Calls from split-stack code to non-split-stack code need to expand mapped stack memory via __morestack. Even tail calls. __morestack is quite a surprising function on powerpc in that it calls back to its caller, and a tail call will continue running in the context of extra mapped stack. PR target/97107 * config/rs6000/rs6000-internal.h (struct rs6000_stack): Improve calls_p comment. * config/rs6000/rs6000-logue.c (rs6000_stack_info): Likewise. (rs6000_expand_split_stack_prologue): Emit the prologue for functions that make a sibling call.
2020-09-23analyzer: add testcases for PR 93355 (intl/localealias.c leak)David Malcolm3-0/+514
PR analyzer/93355 reports a missing diagnostic about a FILE leak in intl/localealias.c. This appears to be due to a issue in the feasibility-checking code, though there is also a state explosion. This patch adds test cases that I've been using when investigating this, two of them currently requiring -fno-analyzer-feasibility, and one currently requiring -Wno-analyzer-too-complex. gcc/testsuite/ChangeLog: PR analyzer/93355 * gcc.dg/analyzer/pr93355-localealias-feasibility.c: New test. * gcc.dg/analyzer/pr93355-localealias-simplified.c: New test. * gcc.dg/analyzer/pr93355-localealias.c: New test.
2020-09-23analyzer: add -fno-analyzer-feasibilityDavid Malcolm12-49/+219
This patch provides a new option "-fno-analyzer-feasibility" as a way to disable feasibility-checking of the constraints along the control flow paths for -fanalyzer diagnostics. I'm adding this in the hope of making it easier to debug issues involving the feasibility-checking logic. The patch adds a new rejected_constraint object which is captured if exploded_path::feasible_p fails, and adds logic that uses this to emit an additional custom_event within the checker_path for the diagnostic, showing where in the control flow path the diagnostic would have been rejected, and giving details of why. gcc/analyzer/ChangeLog: * analyzer.h (struct rejected_constraint): New decl. * analyzer.opt (fanalyzer-feasibility): New option. * diagnostic-manager.cc (path_builder::path_builder): Add "problem" param and use it to initialize new field. (path_builder::get_feasibility_problem): New accessor. (path_builder::m_feasibility_problem): New field. (dedupe_winners::add): Remove inversion of logic in "if" clause, swapping if/else suites. In the !feasible_p suite, inspect flag_analyzer_feasibility and add code to handle when this is off, accepting the infeasible path, but recording the feasibility_problem. (diagnostic_manager::emit_saved_diagnostic): Pass the feasibility_problem to the path_builder. (diagnostic_manager::add_events_for_eedge): If we have a feasibility_problem at this edge, use it to add a custom event. * engine.cc (exploded_path::feasible_p): Pass a rejected_constraint ** to model.maybe_update_for_edge and transfer ownership of any created instance to any feasibility_problem. (feasibility_problem::dump_to_pp): New. * exploded-graph.h (feasibility_problem::feasibility_problem): Drop "model" param; add rejected_constraint * param. (feasibility_problem::~feasibility_problem): New. (feasibility_problem::dump_to_pp): New decl. (feasibility_problem::m_model): Drop field. (feasibility_problem::m_rc): New field. * program-point.cc (function_point::get_location): Handle PK_BEFORE_SUPERNODE and PK_AFTER_SUPERNODE. * program-state.cc (program_state::on_edge): Pass NULL to new param of region_model::maybe_update_for_edge. * region-model.cc (region_model::add_constraint): New overload adding a rejected_constraint ** param. (region_model::maybe_update_for_edge): Add rejected_constraint ** param and pass it to the various apply_constraints_for_ calls. (region_model::apply_constraints_for_gcond): Add rejected_constraint ** param and pass it to add_constraint calls. (region_model::apply_constraints_for_gswitch): Likewise. (region_model::apply_constraints_for_exception): Likewise. (rejected_constraint::dump_to_pp): New. * region-model.h (region_model::maybe_update_for_edge): Add rejected_constraint ** param. (region_model::add_constraint): New overload adding a rejected_constraint ** param. (region_model::apply_constraints_for_gcond): Add rejected_constraint ** param. (region_model::apply_constraints_for_gswitch): Likewise. (region_model::apply_constraints_for_exception): Likewise. (struct rejected_constraint): New. gcc/ChangeLog: * doc/analyzer.texi (Analyzer Paths): Add note about -fno-analyzer-feasibility. * doc/invoke.texi (Static Analyzer Options): Add -fno-analyzer-feasibility. gcc/testsuite/ChangeLog: * gcc.dg/analyzer/feasibility-2.c: New test.
2020-09-23libgo: update to Go1.15.2 releaseIan Lance Taylor34-109/+709
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/256618
2020-09-24Daily bump.GCC Administrator7-1/+341
2020-09-24rs6000: Add 'd' for doubleword variant of vector insertPaul A. Clarke1-4/+4
When the "Vector Insert" section was added to the documentation, the doubleword ('d') variant was omitted. Add it. 2020-09-23 Paul A. Clarke <pc@us.ibm.com> gcc/ * doc/extend.texi: Add 'd' for doubleword variant of vector insert instruction.
2020-09-23Build a zero element array type that reliably renders as T[0] in diagnostcs.Martin Sebor1-1/+18
gcc/ChangeLog: * gimple-array-bounds.cc (build_zero_elt_array_type): New function. (array_bounds_checker::check_mem_ref): Call it.
2020-09-23Handle DECLs and EXPRESSIONs consistently (PR middle-end/97175).Martin Sebor2-2/+137
gcc/ChangeLog: PR middle-end/97175 * builtins.c (maybe_warn_for_bound): Handle both DECLs and EXPRESSIONs in pad->dst.ref, same is pad->src.ref. gcc/testsuite/ChangeLog: PR middle-end/97175 * gcc.dg/Wstringop-overflow-44.c: New test.
2020-09-23Cleanup modref interfaces.Jan Hubicka5-32/+52
* ipa-fnsummary.c (refs_local_or_readonly_memory_p): New function. (points_to_local_or_readonly_memory_p): New function. * ipa-fnsummary.h (refs_local_or_readonly_memory_p): Declare. (points_to_local_or_readonly_memory_p): Declare. * ipa-modref.c (record_access_p): Use refs_local_or_readonly_memory_p. * ipa-pure-const.c (check_op): Likewise. * gcc.dg/tree-ssa/local-pure-const.c: Update template.
2020-09-23Avoid assuming input corresponds to valid source code (PR c/97131).Martin Sebor2-0/+14
gcc/c-family/ChangeLog: PR c/97131 * c-warn.c (warn_parm_ptrarray_mismatch): Handle more invalid input. gcc/testsuite/ChangeLog: PR c/97131 * gcc.dg/Warray-parameter-6.c: New test.
2020-09-23[nvptx] Split up function ref plus constTom de Vries1-0/+18
With test-case gcc.c-torture/compile/pr92231.c, we run into: ... nvptx-as: ptxas terminated with signal 11 [Segmentation fault], core dumped^M compiler exited with status 1 FAIL: gcc.c-torture/compile/pr92231.c -O0 (test for excess errors) ... due to using a function reference plus constant as operand: ... mov.u64 %r24,bar+4096'; ... Fix this by splitting such an insn into: ... mov.u64 %r24,bar'; add.u64 %r24,%r24,4096'; ... Tested on nvptx. gcc/ChangeLog: * config/nvptx/nvptx.md: Don't allow operand containing sum of function ref and const.
2020-09-23aarch64: Prevent canary address being spilled to stackRichard Sandiford6-97/+228
This patch fixes the equivalent of arm bug PR85434/CVE-2018-12886 for aarch64: under high register pressure, the -fstack-protector code might spill the address of the canary onto the stack and reload it at the test site, giving an attacker the opportunity to change the expected canary value. This would happen in two cases: - when generating PIC for -mstack-protector-guard=global (tested by stack-protector-6.c). This is a direct analogue of PR85434, which was also about PIC for the global case. - when using -mstack-protector-guard=sysreg. The two problems were really separate bugs and caused by separate code, but it was more convenient to fix them together. The post-patch code still spills _GLOBAL_OFFSET_TABLE_ for stack-protector-6.c, which is a more general problem. However, it no longer spills the canary address itself. The patch also fixes an ICE when using -mstack-protector-guard=sysreg with ILP32: even if the register read is SImode, the address calculation itself should still be DImode. gcc/ * config/aarch64/aarch64-protos.h (aarch64_salt_type): New enum. (aarch64_stack_protect_canary_mem): Declare. * config/aarch64/aarch64.md (UNSPEC_SALT_ADDR): New unspec. (stack_protect_set): Forward to stack_protect_combined_set. (stack_protect_combined_set): New pattern. Use aarch64_stack_protect_canary_mem. (reg_stack_protect_address_<mode>): Add a salt operand. (stack_protect_test): Forward to stack_protect_combined_test. (stack_protect_combined_test): New pattern. Use aarch64_stack_protect_canary_mem. * config/aarch64/aarch64.c (strip_salt): New function. (strip_offset_and_salt): Likewise. (tls_symbolic_operand_type): Use strip_offset_and_salt. (aarch64_stack_protect_canary_mem): New function. (aarch64_cannot_force_const_mem): Use strip_offset_and_salt. (aarch64_classify_address): Likewise. (aarch64_symbolic_address_p): Likewise. (aarch64_print_operand): Likewise. (aarch64_output_addr_const_extra): New function. (aarch64_tls_symbol_p): Use strip_salt. (aarch64_classify_symbol): Likewise. (aarch64_legitimate_pic_operand_p): Use strip_offset_and_salt. (aarch64_legitimate_constant_p): Likewise. (aarch64_mov_operand_p): Use strip_salt. (TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA): Override. gcc/testsuite/ * gcc.target/aarch64/stack-protector-5.c: New test. * gcc.target/aarch64/stack-protector-6.c: Likewise. * gcc.target/aarch64/stack-protector-7.c: Likewise.
2020-09-23aarch64: Add a couple of extra stack-protector testsRichard Sandiford2-0/+51
These tests were inspired by corresponding arm ones. They already pass. gcc/testsuite/ * gcc.target/aarch64/stack-protector-3.c: New test. * gcc.target/aarch64/stack-protector-4.c: Likewise.
2020-09-23analyzer: fix member call on null seen with ubsan [PR97178]David Malcolm3-8/+10
gcc/analyzer/ChangeLog: PR analyzer/97178 * engine.cc (impl_run_checkers): Update for change to ext_state ctor. * program-state.cc (selftest::test_sm_state_map): Pass an engine instance to ext_state ctor. (selftest::test_program_state_1): Likewise. (selftest::test_program_state_2): Likewise. (selftest::test_program_state_merging): Likewise. (selftest::test_program_state_merging_2): Likewise. * program-state.h (extrinsic_state::extrinsic_state): Remove NULL default value for "eng" param.
2020-09-23AArch64: Implement missing p128<->f64 reinterpret intrinsicsKyrylo Tkachov3-2/+39
This patch implements the missing reinterprets to and from poly128_t and float64x2_t. I've plugged in the appropriate testing in the advsimd-intrinsics.exp too. Bootstrapped and tested on aarch64-none-linux-gnu. Tested advsimd-intrinsics.exp on arm-none-eabi too to make sure arm testing isn't affected. gcc/ PR target/71233 * config/aarch64/arm_neon.h (vreinterpretq_f64_p128, vreinterpretq_p128_f64): Define. gcc/testsuite/ PR target/71233 * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (clean_results): Add float64x2_t cleanup. (DECL_VARIABLE_128BITS_VARIANTS): Add float64x2_t variable. * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Add testing of vreinterpretq_f64_p128, vreinterpretq_p128_f64.
2020-09-23c++: Remove some gratuitous typedefingNathan Sidwell1-7/+6
This is C++, we don't need 'typedef struct foo foo;'. Oh, and bool bitfields are a thing. gcc/cp/ * name-lookup.h (typedef cxx_binding): Delete tdef. (typedef cp_binding_level): Likewise. (struct cxx_binding): Flags are bools.
2020-09-23arm: Add support for Neoverse V1 CPUAlex Coplan4-5/+18
This adds support for Arm's Neoverse V1 CPU to the AArch32 backend. --- gcc/ChangeLog: * config/arm/arm-cpus.in (neoverse-v1): New. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Regenerate. * doc/invoke.texi: Document support for Neoverse V1.
2020-09-23aarch64: Add support for Neoverse V1 CPUAlex Coplan3-2/+4
This adds support for Arm's Neoverse V1 CPU to the AArch64 backend. --- gcc/ChangeLog: * config/aarch64/aarch64-cores.def: Add Neoverse V1. * config/aarch64/aarch64-tune.md: Regenerate. * doc/invoke.texi: Document support for Neoverse V1.
2020-09-23c++: dependent local extern decl ICE [PR97171]Nathan Sidwell2-0/+23
I'd missed the piece of substutution for the uses of a local extern decl. Just grab the local specialization. We need to do this regardless of dependentness because we always cloned the local extern. PR c++/97171 gcc/cp/ * pt.c (tsubst_copy) [FUNCTION_DECL,VAR_DECL]: Retrieve local specialization for DECL_LOCAL_P decls. gcc/testsuite/ * g++.dg/template/local10.C: New.
2020-09-23c: Fix -Wduplicated-branches ICE [PR97125]Marek Polacek2-4/+36
We crash here because since r11-3302 the C FE uses codes like SWITCH_STMT in the else branches in the attached test, and inchash::add_expr in do_warn_duplicated_branches doesn't handle these front-end codes. In the C++ FE this works because by the time we get to do_warn_duplicated_branches we've already cp_genericize'd the SWITCH_STMT tree into a SWITCH_EXPR. The fix is to call do_warn_duplicated_branches_r only after loops and other structured control constructs have been lowered. gcc/c-family/ChangeLog: PR c/97125 * c-gimplify.c (c_genericize): Only call do_warn_duplicated_branches_r after loops and other structured control constructs have been lowered. gcc/testsuite/ChangeLog: PR c/97125 * c-c++-common/Wduplicated-branches-15.c: New test.
2020-09-23middle-end/96453 - relax gimple_expand_vec_cond_exprRichard Biener2-13/+24
This relaxes the condition under which we also try NE_EXPR for a fake generated compare in addition to LT_EXPR given the fact the verification ICEd when it failed but obviously was only implemented for constants. Thus the patch removes the verification and the restriction to constant operands. 2020-09-23 Richard Biener <rguenther@suse.de> PR middle-end/96453 * gimple-isel.cc (gimple_expand_vec_cond_expr): Remove LT_EXPR -> NE_EXPR verification and also apply it for non-constant masks. * gcc.dg/pr96453.c: New testcase.
2020-09-23Minor modref optimization and statistics fixJan Hubicka3-10/+48
this patch fixes bug in tracking memory stats and also I have noticed that while the pass takes care to stop traking things when things are obviously out of hand it still keeps summaries that have no useful info for loads or stores and also many summaries are just copying const/pure attributes. This patch thus also adds logic to detect if summary is useful and drop it early otherwise. This reduces number of queries to the oracle and saves memory/lto streaming. For cc1plus LTO build (configured with --disable-plugin --enable-checking=release --with-build-config=lto) I now get: Alias oracle query stats: refs_may_alias_p: 62488734 disambiguations, 72660949 queries ref_maybe_used_by_call_p: 128863 disambiguations, 63393551 queries call_may_clobber_ref_p: 16013 disambiguations, 21776 queries nonoverlapping_component_refs_p: 0 disambiguations, 37628 queries nonoverlapping_refs_since_match_p: 19397 disambiguations, 55370 must overlaps, 75516 queries aliasing_component_refs_p: 54741 disambiguations, 752198 queries TBAA oracle: 21632692 disambiguations 52565147 queries 15656420 are in alias set 0 10108172 queries asked about the same object 124 queries asked about the same alias set 0 access volatile 3640460 are dependent in the DAG 1527279 are aritificially in conflict with void * Modref stats: modref use: 5712 disambiguations, 31221 queries modref clobber: 684316 disambiguations, 1010000 queries 1779717 tbaa queries (1.762096 per modref query) PTA query stats: pt_solution_includes: 947334 disambiguations, 13601373 queries pt_solutions_intersect: 1011662 disambiguations, 13139565 queries The number of queries should change, but the number of disambiguations should not. However comparing with stats here https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554309.html I see about 50% drop in clobber disambiguations. There is however same drop in other alias oracle stats. I suppose someting changed in meanwhile on mainline because I was basing that on older tree. I tried to proofread changes between mainline and branch and they seem all quite obvious. This is consistent with what I get on tramp3d: Alias oracle query stats: refs_may_alias_p: 2051320 disambiguations, 2312132 queries ref_maybe_used_by_call_p: 7058 disambiguations, 2088222 queries call_may_clobber_ref_p: 232 disambiguations, 232 queries nonoverlapping_component_refs_p: 0 disambiguations, 4339 queries nonoverlapping_refs_since_match_p: 329 disambiguations, 10200 must overlaps, 10616 queries aliasing_component_refs_p: 857 disambiguations, 34639 queries TBAA oracle: 886768 disambiguations 1670635 queries 131572 are in alias set 0 461689 queries asked about the same object 0 queries asked about the same alias set 0 access volatile 190291 are dependent in the DAG 315 are aritificially in conflict with void * Modref stats: modref use: 430 disambiguations, 1885 queries modref clobber: 9657 disambiguations, 16076 queries 19027 tbaa queries (1.183566 per modref query) PTA query stats: pt_solution_includes: 311756 disambiguations, 524179 queries pt_solutions_intersect: 129689 disambiguations, 415878 queries In both cases the number of disambiguations should be same (queries are not comparable). Bootstrapped/regtested x86_64-linux, comitted. gcc/ChangeLog: 2020-09-23 Jan Hubicka <hubicka@ucw.cz> * ipa-modref.c (modref_summary::lto_useful_p): New member function. (modref_summary::useful_p): New member function. (analyze_function): Drop useless summaries. (modref_write): Skip useless summaries. (pass_ipa_modref::execute): Drop useless summaries. * ipa-modref.h (struct GTY): Declare useful_p and lto_useful_p. * tree-ssa-alias.c (dump_alias_stats): Fix. (modref_may_conflict): Fix stats.
2020-09-23middle-end/96466 - fix VEC_COND isel/expansion issueRichard Biener3-2/+21
We need to avoid forcing BLKmode for truth vectors, instead do as other code and use VOIDmode so layout_type can pick a suitable and consistent mode. RTL expansion of vect_cond_mask also needs to deal with CONST_INT operands which means passing the mode explicitely. 2020-09-23 Richard Biener <rguenther@suse.de> PR middle-end/96466 * internal-fn.c (expand_vect_cond_mask_optab_fn): Use appropriate mode for force_reg. * tree.c (build_truth_vector_type_for): Pass VOIDmode to make_vector_type. * gcc.dg/pr96466.c: New testcase.
2020-09-23vect: Fix epilogue loop handling of partial vectorsRichard Sandiford6-100/+192
This patch fixes the fallout that Kewen reported on Power after the recent change to avoid unnecessary use of partial vectors. As Kewen said, the problem is that vect_analyze_loop_2 doesn't know how many epilogue iterations there will be, and so it cannot make a final decision about whether the number of iterations forces an epilogue loop to use partial vectors. This is similar to the current situation for peeling: we don't know during initial analysis whether an epilogue loop will itself require peeling. Instead we decide that during vect_do_peeling, where the final number of epilogue loop iterations is known. The patch takes a similar approach for the decision about whether to use partial vectors. As the comments in the patch say, the idea is that vect_analyze_loop_2 should make peeling and partial- vector decisions based on the assumption that the loop_vinfo will be used as the main loop, while vect_do_peeling should make them in the knowledge that the loop_vinfo will be used as an epilogue loop. This allows the same analysis to be used for both cases, which we rely on for implementing VECT_COMPARE_COSTS; see the big comment in vect_analyze_loop for details. I hope the patch makes the (mostly preexisting) structure a bit more obvious. It isn't what anyone would design from scratch, but that's the nature of working with a mature vector framework. Arranging things this way means that vect_verify_full_masking and vect_verify_loop_lens now become part of the “can” rather than “will” test for partial vectors. Also, while splitting out the logic that handles epilogues with constant iterations, I added a check to make sure that we don't try to use partial vectors to vectorise a single-scalar loop. This required some changes to the Power tests. gcc/ * tree-vectorizer.h (determine_peel_for_niter): Delete in favor of... (vect_determine_partial_vectors_and_peeling): ...this new function. * tree-vect-loop-manip.c (vect_update_epilogue_niters): New function. Reject using vector epilogue loops for single iterations. Install the constant number of epilogue loop iterations in the associated loop_vinfo. Rely on vect_determine_partial_vectors_and_peeling to do the main part of the test. (vect_do_peeling): Use vect_update_epilogue_niters to handle epilogue loops with a known number of iterations. Skip recomputing the number of iterations later in that case. Otherwise, use vect_determine_partial_vectors_and_peeling to decide whether the epilogue loop needs to use partial vectors or peeling. * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Set the default can_use_partial_vectors_p to false if partial-vector-usage=0. (determine_peel_for_niter): Remove in favor of... (vect_determine_partial_vectors_and_peeling): ...this new function, split out from... (vect_analyze_loop_2): ...here. Reflect the vect_verify_full_masking and vect_verify_loop_lens results in CAN_USE_PARTIAL_VECTORS_P rather than USING_PARTIAL_VECTORS_P. gcc/testsuite/ * gcc.target/powerpc/p9-vec-length-epil-1.c: Do not expect the single-iteration epilogues of the 64-bit loops to be vectorized. * gcc.target/powerpc/p9-vec-length-epil-7.c: Likewise. * gcc.target/powerpc/p9-vec-length-epil-8.c: Likewise.
2020-09-23AArch64: Implement missing vrndns_f32 intrinsicKyrylo Tkachov3-2/+21
This patch implements the missing vrndns_f32 intrinsic. This operates on a scalar float32_t value. It can be mapped down to a __builtin_aarch64_frintnsf builtin. This patch does that. Bootstrapped and tested on aarch64-none-linux-gnu. gcc/ PR target/71233 * config/aarch64/aarch64-simd-builtins.def (frintn): Use BUILTIN_VHSDF_HSDF for modes. Remove explicit hf instantiation. * config/aarch64/arm_neon.h (vrndns_f32): Define. gcc/testsuite/ PR target/71233 * gcc.target/aarch64/simd/vrndns_f32_1.c: New test.
2020-09-23tree-optimization/97173 - extend assert in vectorizable_live_operationRichard Biener2-2/+23
The condition we're expecting to eventually run into isn't fully captured by checking for CTORs, instead we can also run into the CTOR element conversion. 2020-09-23 Richard Biener <rguenther@suse.de> PR tree-optimization/97173 * tree-vect-loop.c (vectorizable_live_operation): Extend assert to also conver element conversions. * gcc.dg/vect/pr97173.c: New testcase.
2020-09-23AArch64: Implement missing _p64 intrinsics for vector permutesKyrylo Tkachov2-0/+111
This patch implements some missing vector permute intrinsics operating on poly64x2_t types. They are implemented identically to their uint64x2_t brethren. Bootstrapped and tested on aarch64-none-linux-gnu. gcc/ PR target/71233 * config/aarch64/arm_neon.h (vtrn1q_p64, vtrn2q_p64, vuzp1q_p64, vuzp2q_p64, vzip1q_p64, vzip2q_p64): Define. gcc/testsuite/ PR target/71233 * gcc.target/aarch64/simd/trn_zip_p64_1.c: New test.
2020-09-23AArch64: Implement vldrq_p128 intrinsicKyrylo Tkachov2-0/+20
This patch implements the missing vldrq_p128 intrinsic that just loads from the appropriate pointer. Bootstrapped and tested on aarch64-none-linux-gnu. gcc/ PR target/71233 * config/aarch64/arm_neon.h (vldrq_p128): Define. gcc/testsuite/ PR target/71233 * gcc.target/aarch64/simd/vldrq_p128_1.c: New test.
2020-09-23AArch64: Implement vstrq_p128 intrinsicKyrylo Tkachov2-0/+19
This patch implements the missing vstrq_p128 intrinsic. It just performs a store of the poly128_t argument to a memory location. Bootstrapped and tested on aarch64-none-linux-gnu. gcc/ PR target/71233 * config/aarch64/arm_neon.h (vstrq_p128): Define. gcc/testsuite/ PR target/71233 * gcc.target/aarch64/simd/vstrq_p128_1.c: New test.
2020-09-23gcc/analyzer: Silence -Wpragma warns with GCC < 10Tobias Burnus3-1/+6
gcc/analyzer/ChangeLog: * analyzer-logging.cc: Guard '#pragma ... ignored "-Wformat-diag"' by '#if __GNUC__ >= 10' * analyzer.h: Likewise. * call-string.cc: Likewise.
2020-09-23tree-optimization/97151 - improve PTA for C++ operator deleteRichard Biener2-2/+4
C++ operator delete, when DECL_IS_REPLACEABLE_OPERATOR_DELETE_P, does not cause the deleted object to be escaped. It also has no other interesting side-effects for PTA so skip it like we do for BUILT_IN_FREE. 2020-09-23 Richard Biener <rguenther@suse.de> PR tree-optimization/97151 * tree-ssa-structalias.c (find_func_aliases_for_call): DECL_IS_REPLACEABLE_OPERATOR_DELETE_P has no effect on arguments. * g++.dg/cpp1y/new1.C: Adjust for two more handled transforms.
2020-09-23middle-end/97162 - fix ICE when building gamessRichard Biener1-4/+4
This appropriately guards the check for a hard register in compare_base_decls which otherwise ICEs when passed a CONST_DECL. 2020-09-23 Richard Biener <rguenther@suse.de> PR middle-end/97162 * alias.c (compare_base_decls): Use DECL_HARD_REGISTER and guard with VAR_P.
2020-09-23gcov: fix streaming corruptionMartin Liska2-3/+23
gcc/ChangeLog: PR gcov-profile/97069 * profile.c (branch_prob): Line number must be at least 1. gcc/testsuite/ChangeLog: PR gcov-profile/97069 * g++.dg/gcov/pr97069.C: New test.
2020-09-23[nvptx] Handle move from DF subreg to DF reg in nvptx_output_mov_insnTom de Vries1-1/+6
When compiling test-case gcc.dg/atomic/c11-atomic-exec-1.c, we run into these ptxas errors: ... line 100; error: Rounding modifier required for instruction 'cvt' line 105; error: Rounding modifier required for instruction 'cvt' ... The problem is that this move: ... //(insn 13 11 14 2 // (set (reg:DF 28 [ _9 ]) // (subreg:DF (reg:TI 22 [ _1 ]) 0)) 9 {*movdf_insn} // (nil)) cvt.f64.u64 %r28, %r22$0; ... is emitted as cvt.f64.u64, while it should be a mov.b64 instead. Fix this by handling this case in nvptx_output_mov_insn. Tested on nvptx. gcc/ChangeLog: PR target/97158 * config/nvptx/nvptx.c (nvptx_output_mov_insn): Handle move from DF subreg to DF reg.
2020-09-23[testsuite] Add missing require-effective-target allocaTom de Vries3-2/+5
Add missing require-effect-target alloca directives. Tested on nvptx. gcc/testsuite/ChangeLog: * gcc.dg/Warray-bounds-63.c: Add require-effective-target alloca. * gcc.dg/Warray-bounds-66.c: Same. * gcc.dg/atomic/stdatomic-vm.c: Same.
2020-09-22syscall: fix TestForeground for AIXClément Chigot3-2/+18
Syscall function can't be used on AIX. Therefore, Ioctl in TestForeground must call raw_ioctl. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/175080
2020-09-22syscall: remove ptrace syscall on ppc64Clément Chigot3-4/+4
ptrace is available only for 32 bits programs. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/252558
2020-09-22Add $(ZLIBINC) to CFLAGS-analyzer/engine.oDavid Malcolm1-0/+1
gcc/ChangeLog: * Makefile.in: Add $(ZLIBINC) to CFLAGS-analyzer/engine.o.
2020-09-22analyzer: use switch in exploded_node::on_stmtDavid Malcolm1-54/+80
This patch replaces a sequence of dyn_cast to different gimple stmt types in exploded_node::on_stmt with a switch on the gimple_code. This makes clearer which kinds of stmt are currently treated as no-ops, as a precursor to handling them properly. No functional change intended. gcc/analyzer/ChangeLog: * engine.cc (exploded_node::on_stmt): Replace sequence of dyn_cast with switch.
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