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2020-09-29tree-optimization/97241 - fix ICE in reduction vectorizationRichard Biener2-12/+24
The following moves an ad-hoc attempt at discovering the SLP node for a stmt to the place where we can find it in lock-step when we find the stmt itself. 2020-09-29 Richard Biener <rguenther@suse.de> PR tree-optimization/97241 * tree-vect-loop.c (vectorizable_reduction): Move finding the SLP node for the reduction stmt to a better place. * gcc.dg/vect/pr97241.c: New testcase.
2020-09-29move permute optimization to optimize-slpRichard Biener2-10/+10
This moves optimizing permutes of SLP reductions to vect_optimize_slp, eliding the global slp_loads array. 2020-09-29 Richard Biener <rguenther@suse.de> * tree-vect-slp.c (vect_analyze_slp): Move SLP reduction re-arrangement and SLP graph load gathering... (vect_optimize_slp): ... here. * tree-vectorizer.h (vec_info::slp_loads): Remove.
2020-09-29Add missing FSF copyright notes for x86 intrinsic headers.Hongyu Wang8-0/+184
gcc/ChangeLog: PR target/97231 * config/i386/amxbf16intrin.h: Add FSF copyright notes. * config/i386/amxint8intrin.h: Ditto. * config/i386/amxtileintrin.h: Ditto. * config/i386/avx512vp2intersectintrin.h: Ditto. * config/i386/avx512vp2intersectvlintrin.h: Ditto. * config/i386/pconfigintrin.h: Ditto. * config/i386/tsxldtrkintrin.h: Ditto. * config/i386/wbnoinvdintrin.h: Ditto.
2020-09-29tree-optimization/97238 - fix typo causing ICERichard Biener2-1/+13
This fixes a typo causing a NULL dereference. 2020-09-29 Richard Biener <rguenther@suse.de> PR tree-optimization/97238 * tree-ssa-reassoc.c (ovce_extract_ops): Fix typo. * gcc.dg/pr97238.c: New testcase.
2020-09-29libgomp: disable barriers in nested teamsAndrew Stubbs3-11/+53
Both GCN and NVPTX allow nested parallel regions, but the barrier implementation did not allow the nested teams to run independently of each other (due to hardware limitations). This patch fixes that, under the assumption that each thread will create a new subteam of one thread, by simply not using barriers when there's no other thread to synchronise. libgomp/ChangeLog: * config/gcn/bar.c (gomp_barrier_wait_end): Skip the barrier if the total number of threads is one. (gomp_team_barrier_wake): Likewise. (gomp_team_barrier_wait_end): Likewise. (gomp_team_barrier_wait_cancel_end): Likewise. * config/nvptx/bar.c (gomp_barrier_wait_end): Likewise. (gomp_team_barrier_wake): Likewise. (gomp_team_barrier_wait_end): Likewise. (gomp_team_barrier_wait_cancel_end): Likewise. * testsuite/libgomp.c-c++-common/nested-parallel-unbalanced.c: New test.
2020-09-29arm: Add new vector mode macrosRichard Sandiford5-97/+61
The AArch32 port now has three vector extensions: iwMMXt, Neon and MVE. We already have some named expanders that are shared by all three, and soon we'll need more. One way of handling this would be to use define_mode_iterators that specify the condition for each mode. For example, (V16QI "TARGET_NEON || TARGET_HAVE_MVE") (V8QI "TARGET_NEON || TARGET_REALLY_IWMXXT") ... (V2SF "TARGET_NEON && flag_unsafe_math_optimizations") etc. However, we'll need several mode iterators, and it would be repetitive to specify the mode condition every time. This patch therefore introduces per-mode macros that say whether we can perform general arithmetic on the mode. Initially there are two sets of macros: ARM_HAVE_NEON_<MODE>_ARITH true if Neon can handle general arithmetic on <MODE> ARM_HAVE_<MODE>_ARITH true if any vector extension can handle general arithmetic on <MODE> The macro definitions themselves are undeniably ugly, but hopefully they're justified by the simplifications they allow. The patch converts the addition patterns to use this scheme. Previously there were three copies of the V8HF and V4HF addition patterns for Neon: (1) *add<VDQ:mode>3_neon, which provided plus:VnHF even without TARGET_NEON_FP16INST. This was probably harmless since all the named patterns had an appropriate guard, but it is possible that something could have tried to generate the plus directly, such as by using a REG_EQUAL note to generate a new pattern. (2) addv8hf3_neon and addv4hf3, which had the correct TARGET_NEON_FP16INST target condition, but unnecessarily required flag_unsafe_math_optimizations. Unlike VnSF operations, VnHF operations do not force flush to zero. (3) add<VH:mode>3_fp16, which provided plus:VnHF with the correct conditions (TARGET_NEON_FP16INST, with no flag_unsafe_math_optimizations test). The patch in essence renames add<VH:mode>3_fp16 to *add<VH:mode>3_neon (part of *add<VDQ:mode>3_neon) and removes the other two patterns. gcc/ * config/arm/arm.h (ARM_HAVE_NEON_V8QI_ARITH, ARM_HAVE_NEON_V4HI_ARITH) (ARM_HAVE_NEON_V2SI_ARITH, ARM_HAVE_NEON_V16QI_ARITH): New macros. (ARM_HAVE_NEON_V8HI_ARITH, ARM_HAVE_NEON_V4SI_ARITH): Likewise. (ARM_HAVE_NEON_V2DI_ARITH, ARM_HAVE_NEON_V4HF_ARITH): Likewise. (ARM_HAVE_NEON_V8HF_ARITH, ARM_HAVE_NEON_V2SF_ARITH): Likewise. (ARM_HAVE_NEON_V4SF_ARITH, ARM_HAVE_V8QI_ARITH, ARM_HAVE_V4HI_ARITH) (ARM_HAVE_V2SI_ARITH, ARM_HAVE_V16QI_ARITH, ARM_HAVE_V8HI_ARITH) (ARM_HAVE_V4SI_ARITH, ARM_HAVE_V2DI_ARITH, ARM_HAVE_V4HF_ARITH) (ARM_HAVE_V2SF_ARITH, ARM_HAVE_V8HF_ARITH, ARM_HAVE_V4SF_ARITH): Likewise. * config/arm/iterators.md (VNIM, VNINOTM): Delete. * config/arm/vec-common.md (add<VNIM:mode>3, addv8hf3) (add<VNINOTM:mode>3): Replace with... (add<VDQ:mode>3): ...this new expander. * config/arm/neon.md (*add<VDQ:mode>3_neon): Use the new ARM_HAVE_NEON_<MODE>_ARITH macros as the C condition. (addv8hf3_neon, addv4hf3, add<VFH:mode>3_fp16): Delete in favor of the above. (neon_vadd<VH:mode>): Use gen_add<mode>3 instead of gen_add<mode>3_fp16. gcc/testsuite/ * gcc.target/arm/armv8_2-fp16-arith-2.c: Expect FP16 vectorization even without -ffast-math.
2020-09-29RISC-V: Define __riscv_cmodel_medany for PIC mode.Kito Cheng3-9/+12
- According the conclusion in RISC-V C API document, we decide to deprecat the __riscv_cmodel_pic marco - __riscv_cmodel_pic is deprecated and will removed in next GCC release. [1] https://github.com/riscv/riscv-c-api-doc/pull/11 gcc/ChangeLog: * config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define __riscv_cmodel_medany when PIC mode. gcc/testsuite/ChangeLog: * gcc.target/riscv/predef-3.c: Update testcase. * gcc.target/riscv/predef-6.c: Ditto.
2020-09-29aarch64: Fix ordering of aarch64-cores.defAlex Coplan2-4/+4
This patch moves the entry for Neoverse N2 (an Armv8.5-A CPU) after Saphira (an Armv8.4-A CPU) to preserve the overall ordering in the file. Committing as obvious. gcc/ChangeLog: * config/aarch64/aarch64-cores.def: Move neoverse-n2 after saphira. * config/aarch64/aarch64-tune.md: Regenerate.
2020-09-29switch conversion: make a rapid speed upMartin Liska3-13/+79
gcc/ChangeLog: PR tree-optimization/96979 * tree-switch-conversion.c (jump_table_cluster::can_be_handled): Make a fast bail out. (bit_test_cluster::can_be_handled): Likewise here. * tree-switch-conversion.h (get_range): Use wi::to_wide instead of a folding. gcc/testsuite/ChangeLog: PR tree-optimization/96979 * g++.dg/tree-ssa/pr96979.C: New test.
2020-09-29Revert "switch lowering: limit number of cluster attemps"Martin Liska4-75/+0
This reverts commit c6df6039e9180c580945266302ec14047d358364.
2020-09-28testsuite: Skip symver1 on AIX.David Edelsohn1-1/+1
symver1.c only is valid on ELF targets. Add AIX to the skip list. gcc/testsuite/ChangeLog 2020-09-28 David Edelsohn <dje.gcc@gmail.com> * gcc.dg/ipa/symver1.c: Skip on AIX.
2020-09-29RISC-V/libgcc: Use `-fasynchronous-unwind-tables' for LIB2_DIVMOD_FUNCSMaciej W. Rozycki1-0/+2
Use `-fasynchronous-unwind-tables' rather than `-fexceptions -fnon-call-exceptions' in LIB2_DIVMOD_FUNCS compilation flags so as to provide unwind tables for the affected functions while not pulling the unwinder proper, which is not required here. Beyond saving program space it fixes a RISC-V glibc build error due to unsatisfied `malloc' and `free' references from the unwinder causing link errors with `ld.so' where libgcc has been built at -O0. libgcc/ * config/riscv/t-elf (LIB2_DIVMOD_EXCEPTION_FLAGS): New variable.
2020-09-29Daily bump.GCC Administrator11-1/+254
2020-09-28analyzer: add some missing FINAL OVERRIDEsDavid Malcolm1-4/+16
Spotted by cppcheck. gcc/analyzer/ChangeLog: * region-model.h (binop_svalue::dyn_cast_binop_svalue): Remove redundant "virtual". Add FINAL OVERRIDE. (widening_svalue::dyn_cast_widening_svalue): Add FINAL OVERRIDE. (compound_svalue::dyn_cast_compound_svalue): Likewise. (conjured_svalue::dyn_cast_conjured_svalue): Likewise.
2020-09-28analyzer: remove unused fieldDavid Malcolm1-1/+0
I added this field (and the struct itself) in the rewrite of region and value-handling (808f4dfeb3a95f50f15e71148e5c1067f90a126d), but the field was never used. Found by cppcheck. gcc/analyzer/ChangeLog: * diagnostic-manager.cc (null_assignment_sm_context::m_visitor): Remove unused field.
2020-09-28analyzer: fix ICE on non-pointer longjmp [PR97233]David Malcolm3-1/+13
gcc/analyzer/ChangeLog: PR analyzer/97233 * analyzer.cc (is_longjmp_call_p): Require the initial argument to be a pointer. * engine.cc (exploded_node::on_longjmp): Likewise. gcc/testsuite/ChangeLog: PR analyzer/97233 * gcc.dg/analyzer/pr97233.c: New test.
2020-09-28analyzer: fix sm_state_map::printDavid Malcolm1-1/+1
In 10fc42a8396072912e9d9d940fba25950b3fdfc5 I converted state_t from unsigned to const state *, but missed this comparison against 0. gcc/analyzer/ChangeLog: * program-state.cc (sm_state_map::print): Update check for m_global_state being the start state.
2020-09-28net: add hurd build tagIan Lance Taylor2-2/+2
Patch from Svante Signell. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/257857
2020-09-29irange_allocator classAldy Hernandez1-0/+65
This is the irange storage class. It is used to allocate the minimum amount of storage needed for a given irange. Storage is automatically freed at destruction of the storage class. It is meant for long term storage, as opposed to int_range_max which is meant for intermediate temporary results on the stack. The general gist is: irange_allocator alloc; // Allocate an irange of 5 sub-ranges. irange *p = alloc.allocate (5); // Allocate an irange of 3 sub-ranges. irange *q = alloc.allocate (3); // Allocate an irange with as many sub-ranges as are currently // used in "some_other_range". irange *r = alloc.allocate (some_other_range); gcc/ChangeLog: * value-range.h (class irange): Add irange_allocator friend. (class irange_allocator): New.
2020-09-28libgfortran/m4/unpack.m4: Silence -Wmaybe-uninitializedTobias Burnus14-56/+56
libgfortran/ChangeLog: * m4/unpack.m4 (unpack0_'rtype_code`, unpack1_'rtype_code`): Move 'rstride[0]' initialization outside conditional branch to silence -Wmaybe-uninitialized. * generated/unpack_c10.c: Regenerate. * generated/unpack_c16.c: Regenerate. * generated/unpack_c4.c: Regenerate. * generated/unpack_c8.c: Regenerate. * generated/unpack_i1.c: Regenerate. * generated/unpack_i16.c: Regenerate. * generated/unpack_i2.c: Regenerate. * generated/unpack_i4.c: Regenerate. * generated/unpack_i8.c: Regenerate. * generated/unpack_r10.c: Regenerate. * generated/unpack_r16.c: Regenerate. * generated/unpack_r4.c: Regenerate. * generated/unpack_r8.c: Regenerate.
2020-09-28libbacktrace: build mtest.dSYM if using dsymutilIan Lance Taylor2-8/+14
libbacktrace/ChangeLog: PR libbacktrace/97082 * Makefile.am (check_DATA): Add mtest.dSYM if USE_DSYMUTIL. * Makefile.in: Regenerate.
2020-09-28libbacktrace: only run dsymutil with Mach-OIan Lance Taylor4-44/+46
libbacktrace/ChangeLog: PR libbacktrace/97227 * configure.ac (USE_DSYMUTIL): Define instead of HAVE_DSYMUTIL. * Makefile.am: Change all uses of HAVE_DSYMUTIL to USE_DSYMUTIL. * configure: Regenerate. * Makefile.in: Regenerate.
2020-09-28OpenMP: Handle cpp_implicit_alias in declare-target discovery (PR96390)Tobias Burnus3-6/+113
gcc/ChangeLog: PR middle-end/96390 * omp-offload.c (omp_discover_declare_target_tgt_fn_r): Handle alias nodes. libgomp/ChangeLog: PR middle-end/96390 * testsuite/libgomp.c++/pr96390.C: New test. * testsuite/libgomp.c-c++-common/pr96390.c: New test.
2020-09-28libstdc++: Rearrange some range adaptors' data membersPatrick Palka2-35/+32
Since the standard range adaptors are specified to derive from the empty class view_base, having their first data member store the underlying view is suboptimal, for if the underlying view also derives from view_base then the two view_base subobjects will be adjacent; this prevents the compiler from applying the empty base optimization to elide away the storage for these two empty bases. This patch improves the situation by declaring the _M_base data member last instead of first in each range adaptor that has more than one data member, so that the empty base optimization can apply in more cases. libstdc++-v3/ChangeLog: * include/std/ranges (filter_view): Declare the data member _M_base last instead of first, and adjust constructors' member initializer lists accordingly. (transform_view): Likewise. (take_view): Likewise. (take_while_view): Likewise. (drop_view): Likewise. (drop_while_view): Likewise. (join_view): Likewise. (split_view): Likewise (and tweak nearby formatting). (reverse_view): Likewise. * testsuite/std/ranges/adaptors/sizeof.cc: Update expected sizes.
2020-09-28libstdc++: Add test that tracks range adaptors' sizesPatrick Palka1-0/+52
libstdc++-v3/ChangeLog: * testsuite/std/ranges/adaptors/sizeof.cc: New test.
2020-09-28libstdc++: Reduce the size of a subrange with empty sentinel typePatrick Palka2-1/+29
libstdc++-v3/ChangeLog: * include/bits/ranges_util.h (subrange::_M_end): Give it [[no_unique_address]]. * testsuite/std/ranges/subrange/sizeof.cc: New test.
2020-09-28libstdc++: Reduce the size of an unbounded iota_viewPatrick Palka2-1/+4
libstdc++-v3/ChangeLog: * include/std/ranges (iota_view::_M_bound): Give it [[no_unique_address]]. * testsuite/std/ranges/iota/iota_view.cc: Check that an unbounded iota_view has minimal size.
2020-09-28rs6000: Add tests for _mm_insert_epi{8,32,64}Paul A. Clarke3-0/+250
Copied from gcc.target/i386. 2020-09-23 Paul A. Clarke <pc@us.ibm.com> gcc/testsuite/ChangeLog: * gcc.target/powerpc/sse4_1-pinsrb.c: New test. * gcc.target/powerpc/sse4_1-pinsrd.c: New test. * gcc.target/powerpc/sse4_1-pinsrq.c: New test.
2020-09-28rs6000: Support _mm_insert_epi{8,32,64}Paul A. Clarke1-0/+30
Add compatibility implementations for SSE4.1 intrinsics _mm_insert_epi8, _mm_insert_epi32, _mm_insert_epi64. 2020-09-23 Paul A. Clarke <pc@us.ibm.com> gcc/ * config/rs6000/smmintrin.h (_mm_insert_epi8): New. (_mm_insert_epi32): New. (_mm_insert_epi64): New.
2020-09-28Enable GCC support for AMX-TILE,AMX-INT8,AMX-BF16.liuhongt39-13/+1032
AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud AMX-BF16:tdpbf16ps gcc/ChangeLog * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET, OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET, OPTION_MASK_ISA2_AMX_TILE_UNSET, OPTION_MASK_ISA2_AMX_INT8_UNSET, OPTION_MASK_ISA2_AMX_BF16_UNSET, OPTION_MASK_ISA2_XSAVE_UNSET): New marcos. (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16. * common/config/i386/i386-cpuinfo.h (processor_types): Add FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16. * common/config/i386/cpuinfo.h (XSTATE_TILECFG, XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro. (get_available_features): Enable AMX features only if their states are suoorited by OSXSAVE. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for amx-tile, amx-int8, amx-bf16. * config.gcc: Add amxtileintrin.h, amxint8intrin.h, amxbf16intrin.h to extra headers. * config/i386/amxbf16intrin.h: New file. * config/i386/amxint8intrin.h: Ditto. * config/i386/amxtileintrin.h: Ditto. * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8): New macro. * config/i386/i386-c.c (ix86_target_macros_internal): Define __AMX_TILE__, __AMX_INT8__, AMX_BF16__. * config/i386/i386-options.c (ix86_target_string): Add -mamx-tile, -mamx-int8, -mamx-bf16. (ix86_option_override_internal): Handle AMX-TILE, AMX-INT8, AMX-BF16. * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P, TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P, PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros. * config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16. * config/i386/immintrin.h: Include amxtileintrin.h, amxint8intrin.h, amxbf16intrin.h. * doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16. * doc/extend.texi: Document amx-tile, amx-int8, amx-bf16. * doc/sourcebuild.texi ((Effective-Target Keywords, Other hardware attributes): Document amx_int8, amx_tile, amx_bf16. gcc/testsuite/ChangeLog * lib/target-supports.exp (check_effective_target_amx_tile, check_effective_target_amx_int8, check_effective_target_amx_bf16): New proc. * g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * gcc.target/i386/amx-check.h: New header file. * gcc.target/i386/amxbf16-asmatt-1.c: New test. * gcc.target/i386/amxint8-asmatt-1.c: New test. * gcc.target/i386/amxtile-asmatt-1.c: Ditto. * gcc.target/i386/amxbf16-asmintel-1.c: Ditto. * gcc.target/i386/amxint8-asmintel-1.c: Ditto. * gcc.target/i386/amxtile-asmintel-1.c: Ditto. * gcc.target/i386/amxbf16-dpbf16ps-2.c: Ditto. * gcc.target/i386/amxint8-dpbssd-2.c: Ditto. * gcc.target/i386/amxint8-dpbsud-2.c: Ditto. * gcc.target/i386/amxint8-dpbusd-2.c: Ditto. * gcc.target/i386/amxint8-dpbuud-2.c: Ditto. * gcc.target/i386/amxtile-2.c: Ditto.
2020-09-28aarch64: Do not alter force_reg returned rtx expanding pauth builtinsAndrea Corallo1-11/+2
2020-09-21 Andrea Corallo <andrea.corallo@arm.com> * config/aarch64/aarch64-builtins.c (aarch64_general_expand_builtin): Do not alter value on a force_reg returned rtx.
2020-09-28aarch64: Add HF routines to libgcc_s.soRichard Sandiford2-0/+29
The libgcc HF support routines were being linked into libgcc_s.so, but weren't being exported. libgcc/ * config/aarch64/libgcc-softfp.ver: New file. * config/aarch64/t-softfp (SHLIB_MAPFILES): Add it.
2020-09-28Revert "Fortran : ICE in build_field PR95614"Mark Eggleston6-26/+8
This reverts commit e5a76af3a2f3324efc60b4b2778ffb29d5c377bc.
2020-09-28Add missing end location informationEric Botcazou1-6/+5
In some cases we would fail to put the end location information on the outermost BIND_EXPR of a function, which is problematic when there is a dynamic stack allocation. gcc/ada/ChangeLog: * gcc-interface/trans.c (Subprogram_Body_to_gnu): Set the end locus of body and declaration earlier.
2020-09-28Fix bogus alignment warning on address clauseEric Botcazou3-8/+43
The compiler gives a bogus alignment warning on an address clause and a discriminated record type with variable size. gcc/ada/ChangeLog: * gcc-interface/decl.c (maybe_saturate_size): Add ALIGN parameter and round down the result to ALIGN. (gnat_to_gnu_entity): Adjust calls to maybe_saturate_size. gcc/testsuite/ChangeLog: * gnat.dg/addr16.adb: New test. * gnat.dg/addr16_pkg.ads: New helper.
2020-09-28Revert recent changes to lower_try_finally_dup_blockEric Botcazou1-10/+2
This reverts the recent changes made to lower_try_finally_dup_block and aimed at tweaking the souce location info for __builtin_stack_restore. gcc/ChangeLog: * tree-eh.c (lower_try_finally_dup_block): Revert latest change.
2020-09-28Daily bump.GCC Administrator9-1/+74
2020-09-27Fix handling of stores in modref_summary::useful_pJan Hubicka1-1/+1
* ipa-modref.c (modref_summary::useful_p): Fix testing of stores.
2020-09-27optabs: Don't reuse target for multi-word expansions if it overlaps ↵Jakub Jelinek2-1/+34
operand(s) [PR97073] The following testcase is miscompiled on i686-linux, because we try to expand a double-word bitwise logic operation with op0 being a (mem:DI u) and target (mem:DI u+4), i.e. partial overlap, and thus end up with: movl 4(%esp), %eax andl u, %eax movl %eax, u+4 ! movl u+4, %eax optimized out andl 8(%esp), %eax movl %eax, u+8 rather than with the desired: movl 4(%esp), %edx movl 8(%esp), %eax andl u, %edx andl u+4, %eax movl %eax, u+8 movl %edx, u+4 because the store of the first word to target overwrites the second word of the operand. expand_binop for this (and several similar places) already check for target == op0 or target == op1, this patch just adds reg_overlap_mentioned_p calls next to it. Pedantically, at least for some of these it might be sufficient to force a different target if there is overlap but target is not rtx_equal_p to the operand (e.g. in this bitwise logical case, but e.g. not in the shift cases where there is reordering), though that would go against the preexisting target == op? checks and the rationale that REG_EQUAL notes in that case isn't correct. 2020-09-27 Jakub Jelinek <jakub@redhat.com> PR middle-end/97073 * optabs.c (expand_binop, expand_absneg_bit, expand_unop, expand_copysign_bit): Check reg_overlap_mentioned_p between target and operand(s) and if it returns true, force a pseudo as target. * gcc.c-torture/execute/pr97073.c: New test.
2020-09-27aix: Use $(AR) without -X32_64 to build FAT libraries.Clément Chigot5-24/+28
AIX FAT libraries should be built with the version of AR chosen by configure. The GNU Make $(AR) variable includes the AIX -X32_64 option needed by the default Makefile rules to accept both 32 bit and 64 bit object files. The -X32_64 option conflicts with ar archiving objects of the same name used to build FAT libraries. This patch changes the Makefile fragments for AIX FAT libraries to use $(AR), but strips the -X32_64 option from the Make variable. libgcc/ChangeLog: 2020-09-27 Clement Chigot <clement.chigot@atos.net> * config/rs6000/t-slibgcc-aix: Use $(AR) without -X32_64. libatomic/ChangeLog: 2020-09-27 Clement Chigot <clement.chigot@atos.net> * config/t-aix: Use $(AR) without -X32_64. libgomp/ChangeLog: 2020-09-27 Clement Chigot <clement.chigot@atos.net> * config/t-aix: Use $(AR) without -X32_64. libstdc++-v3/ChangeLog: 2020-09-27 Clement Chigot <clement.chigot@atos.net> * config/os/aix/t-aix: Use $(AR) without -X32_64. libgfortran/ChangeLog: 2020-09-27 Clement Chigot <clement.chigot@atos.net> * config/t-aix: Use $(AR) without -X32_64.
2020-09-27Fortran : ICE in build_field PR95614Mark Eggleston6-8/+26
Local identifiers can not be the same as a module name. Original patch by Steve Kargl resulted in name clashes between common block names and local identifiers. A local identifier can be the same as a global identier if that identifier represents a common. The patch was modified to allow global identifiers that represent a common block. 2020-09-27 Steven G. Kargl <kargl@gcc.gnu.org> Mark Eggleston <markeggleston@gcc.gnu.org> gcc/fortran/ PR fortran/95614 * decl.c (gfc_get_common): Use gfc_match_common_name instead of match_common_name. * decl.c (gfc_bind_idents): Use gfc_match_common_name instead of match_common_name. * match.c : Rename match_common_name to gfc_match_common_name. * match.c (gfc_match_common): Use gfc_match_common_name instead of match_common_name. * match.h : Rename match_common_name to gfc_match_common_name. * resolve.c (resolve_common_vars): Check each symbol in a common block has a global symbol. If there is a global symbol issue an error if the symbol type is known as is not a common block name. 2020-09-27 Mark Eggleston <markeggleston@gcc.gnu.org> gcc/testsuite/ PR fortran/95614 * gfortran.dg/pr95614_1.f90: New test. * gfortran.dg/pr95614_2.f90: New test.
2020-09-27IFN: Implement IFN_VEC_SET for ARRAY_REF with VIEW_CONVERT_EXPRXionghu Luo5-2/+141
This patch enables transformation from ARRAY_REF(VIEW_CONVERT_EXPR) to VEC_SET internal function in gimple-isel pass if target supports vec_set with variable index by checking can_vec_set_var_idx_p. gcc/ChangeLog: 2020-09-27 Xionghu Luo <luoxhu@linux.ibm.com> * gimple-isel.cc (gimple_expand_vec_set_expr): New function. (gimple_expand_vec_cond_exprs): Rename to ... (gimple_expand_vec_exprs): ... this and call gimple_expand_vec_set_expr. * internal-fn.c (vec_set_direct): New define. (expand_vec_set_optab_fn): New function. (direct_vec_set_optab_supported_p): New define. * internal-fn.def (VEC_SET): New DEF_INTERNAL_OPTAB_FN. * optabs.c (can_vec_set_var_idx_p): New function. * optabs.h (can_vec_set_var_idx_p): New declaration.
2020-09-27Daily bump.GCC Administrator7-1/+131
2020-09-26libstdc++: Use __libc_single_threaded to optimise atomics [PR 96817]Jonathan Wakely3-19/+102
Glibc 2.32 adds a global variable that says whether the process is single-threaded. We can use this to decide whether to elide atomic operations, as a more precise and reliable indicator than __gthread_active_p. This means that guard variables for statics and reference counting in shared_ptr can use less expensive, non-atomic ops even in processes that are linked to libpthread, as long as no threads have been created yet. It also means that we switch to using atomics if libpthread gets loaded later via dlopen (this still isn't supported in general, for other reasons). We can't use __libc_single_threaded to replace __gthread_active_p everywhere. If we replaced the uses of __gthread_active_p in std::mutex then we would elide the pthread_mutex_lock in the code below, but not the pthread_mutex_unlock: std::mutex m; m.lock(); // pthread_mutex_lock std::thread t([]{}); // __libc_single_threaded = false t.join(); m.unlock(); // pthread_mutex_unlock We need the lock and unlock to use the same "is threading enabled" predicate, and similarly for init/destroy pairs for mutexes and condition variables, so that we don't try to release resources that were never acquired. There are other places that could use __libc_single_threaded, such as _Sp_locker in src/c++11/shared_ptr.cc and locale init functions, but they can be changed later. libstdc++-v3/ChangeLog: PR libstdc++/96817 * include/ext/atomicity.h (__gnu_cxx::__is_single_threaded()): New function wrapping __libc_single_threaded if available. (__exchange_and_add_dispatch, __atomic_add_dispatch): Use it. * libsupc++/guard.cc (__cxa_guard_acquire, __cxa_guard_abort) (__cxa_guard_release): Likewise. * testsuite/18_support/96817.cc: New test.
2020-09-26Fix handling of clobbers in ipa-modref.cJan Hubicka2-4/+9
* ipa-modref.c (analyze_stmt): Do not skip clobbers in early pass. * ipa-pure-const.c (analyze_stmt): Update comment.
2020-09-26aix: Fix _STDC_FORMAT_MACROS in inttypes.h [PR97044]David Edelsohn3-5/+75
AIX protects the STDC Format Macros in a manner that can prevent the definition of the macros depending on the order of header inclusion. The protection of the macros was referenced in C99, removed in C11, and never specified in any C++ standard. Also, the macros are in the namespace reserved to the implementation (compiler) so the compiler is permitted to choose to inject those names. fixincludes/ChangeLog: 2020-09-17 David Edelsohn <dje.gcc@gmail.com> PR target/97044 * inclhack.def (aix_inttypes): New fix. * fixincl.x: Regenerate. * tests/base/sys/inttypes.h: New file.
2020-09-26aix: collect2 visibilityDavid Edelsohn1-1/+25
The code that collect2 generates, compiles and links into applications and shared libraries to initialize constructors and register DWARF tables is built with the compiler options used to invoke the linker. If the compiler options change the visibility from default, the library initialization routines will not be visible and this can prevent initialization. This patch checks if the command line sets visibiliity and then adds GCC pragmas to the initialization code generated by collect2 if necessary to define the visibility on global, exported functions as default. gcc/ChangeLog: 2020-09-26 David Edelsohn <dje.gcc@gmail.com> Clement Chigot <clement.chigot@atos.com> * collect2.c (visibility_flag): New. (main): Detect -fvisibility. (write_c_file_stat): Push and pop default visibility.
2020-09-26Correct overwrite of alloc_comp_result_2.f90 in fix of PR96495.Paul Thomas2-71/+98
2020-26-09 Paul Thomas <pault@gcc.gnu.org> gcc/testsuite/ PR fortran/96495 * gfortran.dg/alloc_comp_result_2.f90 : Restore original. * gfortran.dg/alloc_comp_result_3.f90 : New test.
2020-09-26Add modref testcasesJan Hubicka3-0/+53
gcc/testsuite/ * gcc.dg/lto/modref-1_0.c: New test. * gcc.dg/lto/modref-1_1.c: New test. * gcc.dg/tree-ssa/modref-2.c: New test.
2020-09-26Implement iterative dataflow in mod-refJan Hubicka4-205/+373
cc1plus stats are now: Alias oracle query stats: refs_may_alias_p: 62971744 disambiguations, 73160711 queries ref_maybe_used_by_call_p: 141176 disambiguations, 63867883 queries call_may_clobber_ref_p: 23573 disambiguations, 29322 queries nonoverlapping_component_refs_p: 0 disambiguations, 37720 queries nonoverlapping_refs_since_match_p: 19432 disambiguations, 55659 must overlaps, 75860 queries aliasing_component_refs_p: 54724 disambiguations, 753570 queries TBAA oracle: 24124230 disambiguations 56228428 queries 16058141 are in alias set 0 10338303 queries asked about the same object 125 queries asked about the same alias set 0 access volatile 3919230 are dependent in the DAG 1788399 are aritificially in conflict with void * Modref stats: modref use: 10408 disambiguations, 46993 queries modref clobber: 1418549 disambiguations, 1951251 queries 4898707 tbaa queries (2.510547 per modref query) 396878 base compares (0.203397 per modref query) PTA query stats: pt_solution_includes: 975364 disambiguations, 13604284 queries pt_solutions_intersect: 1026606 disambiguations, 13181198 queries So compared to https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554692.html we get 25% use disambiguations and 91% more clobber disambiguations. Tramp3d is Alias oracle query stats: refs_may_alias_p: 2056905 disambiguations, 2317461 queries ref_maybe_used_by_call_p: 7137 disambiguations, 2093762 queries call_may_clobber_ref_p: 234 disambiguations, 234 queries nonoverlapping_component_refs_p: 0 disambiguations, 4313 queries nonoverlapping_refs_since_match_p: 329 disambiguations, 10200 must overlaps, 10616 queries aliasing_component_refs_p: 858 disambiguations, 34600 queries TBAA oracle: 894996 disambiguations 1695991 queries 138346 are in alias set 0 470668 queries asked about the same object 0 queries asked about the same alias set 0 access volatile 191666 are dependent in the DAG 315 are aritificially in conflict with void * Modref stats: modref use: 842 disambiguations, 2265 queries modref clobber: 14833 disambiguations, 28900 queries 34884 tbaa queries (1.207059 per modref query) 5041 base compares (0.174429 per modref query) PTA query stats: pt_solution_includes: 313372 disambiguations, 525724 queries pt_solutions_intersect: 130374 disambiguations, 415138 queries So about twice many use and 40% clobber disambiguations. Bootstrapped/regtested x86_64-linux, I plan to commit it later today after more testing. 2020-09-26 Jan Hubicka <hubicka@ucw.cz> * ipa-inline-transform.c: Include ipa-modref-tree.h and ipa-modref.h. (inline_call): Call ipa_merge_modref_summary_after_inlining. * ipa-inline.c (ipa_inline): Do not free summaries. * ipa-modref.c (dump_records): Fix formating. (merge_call_side_effects): Break out from ... (analyze_call): ... here; record recursive calls. (analyze_stmt): Add new parameter RECURSIVE_CALLS. (analyze_function): Do iterative dataflow on recursive calls. (compute_parm_map): New function. (ipa_merge_modref_summary_after_inlining): New function. (collapse_loads): New function. (modref_propagate_in_scc): Break out from ... (pass_ipa_modref::execute): ... here; Do iterative dataflow. * ipa-modref.h (ipa_merge_modref_summary_after_inlining): Declare.
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