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2018-01-03* update-copyright.py: Skip pdt-5.f03 in gfortran.dg subdir.Jakub Jelinek2-0/+6
2018-01-03Handle noipa attribute in IPA visibility (PR ipa/83594).Martin Liska4-1/+18
2018-01-03gcc.c (process_command): Update copyright notice dates.Jakub Jelinek32-56863/+56923
2018-01-03poly_int: vector_builder element countRichard Sandiford8-41/+114
2018-01-03poly_int: vec_perm_indices element typeRichard Sandiford10-30/+66
2018-01-03poly_int: memrefs_conflict_pRichard Sandiford2-34/+43
2018-01-03poly_int: struct_value_sizeRichard Sandiford2-5/+14
2018-01-03poly_int: load_register_parametersRichard Sandiford2-23/+48
2018-01-03poly_int: alter_regRichard Sandiford2-12/+31
2018-01-03poly_int: reloading complex subregsRichard Sandiford2-11/+26
2018-01-03poly_int: process_alt_operandsRichard Sandiford2-0/+17
2018-01-03poly_int: expand_ifn_atomic_compare_exchange_into_callRichard Sandiford2-1/+11
2018-01-03poly_int: adjust_memsRichard Sandiford2-11/+15
2018-01-03poly_int: PUSH_ROUNDINGRichard Sandiford27-68/+151
2018-01-03poly_int: emit_single_push_insn_1Richard Sandiford2-13/+13
2018-01-03poly_int: set_inc_stateRichard Sandiford2-3/+10
2018-01-03poly_int: expand_expr_real_1Richard Sandiford2-3/+12
2018-01-03poly_int: expand_expr_real_2Richard Sandiford2-4/+16
2018-01-03poly_int: subreg_get_infoRichard Sandiford2-15/+25
2018-01-03poly_int: REGMODE_NATURAL_SIZERichard Sandiford7-32/+69
2018-01-03poly_int: expand_vector_ubsan_overflowRichard Sandiford2-7/+17
2018-01-03poly_int: folding BIT_FIELD_REFs on vectorsRichard Sandiford2-25/+28
2018-01-03poly_int: fold_indirect_ref_1Richard Sandiford2-9/+14
2018-01-03poly_int: omp-simd-clone.cRichard Sandiford2-4/+21
2018-01-03poly_int: brig vector elementsRichard Sandiford4-18/+49
2018-01-03poly_int: tree-vect-generic.cRichard Sandiford2-27/+46
2018-01-03poly_int: vect_no_alias_pRichard Sandiford2-39/+50
2018-01-03poly_int: two-operation SLPRichard Sandiford2-5/+26
2018-01-03poly_int: vect_get_constant_vectorsRichard Sandiford2-0/+24
2018-01-03poly_int: vectorizable_conversionRichard Sandiford2-6/+17
2018-01-03poly_int: vectorizable_simd_clone_callRichard Sandiford2-17/+34
2018-01-03poly_int: vectorizable_callRichard Sandiford2-10/+14
2018-01-03poly_int: vectorizable_load/storeRichard Sandiford2-69/+117
2018-01-03poly_int: vectorizable_live_operationRichard Sandiford2-13/+35
2018-01-03poly_int: vectorizable_inductionRichard Sandiford2-17/+68
2018-01-03poly_int: vectorizable_reductionRichard Sandiford4-15/+91
2018-01-03poly_int: vector_alignment_reachable_pRichard Sandiford2-3/+11
2018-01-03poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECTOR_SIZESRichard Sandiford20-117/+231
2018-01-03poly_int: get_mask_modeRichard Sandiford6-8/+19
2018-01-03poly_int: omp_max_vfRichard Sandiford5-25/+42
2018-01-03poly_int: vect_nunits_for_costRichard Sandiford5-20/+53
2018-01-03poly_int: SLP max_unitsRichard Sandiford2-35/+58
2018-01-03poly_int: vectoriser vf and ufRichard Sandiford10-233/+432
2018-01-03match.pd handling of three-constant bitopsRichard Sandiford2-1/+25
2018-01-03Add an alternative vector loop iv mechanismRichard Sandiford4-50/+223
2018-01-03Summary: Replace a few instances of 8 leading spaces with horizontal tabs.Ben Elliston1-5/+5
2018-01-03config.guess: Import latest version.Ben Elliston3-76/+101
2018-01-03rs6000.md (floor<mode>2): Add support for IEEE 128-bit round to integer instr...Michael Meissner11-0/+314
2018-01-03Daily bump.GCC Administrator1-1/+1
2018-01-02rs6000-string.c (expand_block_move): Allow the use of unaligned VSX load/stor...Aaron Sawdey2-3/+10
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