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2024-06-19doloop: Add support for predicated vectorized loopsAndre Vieira3-67/+113
2024-06-19Build: Fix typo ac_cv_search_pthread_crateYunQiang Su2-2/+2
2024-06-19RISC-V: Add testcases for unsigned .SAT_SUB vector form 10Pan Li9-0/+397
2024-06-19RISC-V: Add testcases for unsigned .SAT_SUB vector form 9Pan Li9-0/+398
2024-06-19RISC-V: Add testcases for unsigned .SAT_SUB vector form 8Pan Li9-0/+397
2024-06-19RISC-V: Add testcases for unsigned .SAT_SUB vector form 7Pan Li9-0/+397
2024-06-19RISC-V: Add testcases for unsigned .SAT_SUB vector form 6Pan Li9-0/+395
2024-06-19RISC-V: Add testcases for unsigned .SAT_SUB vector form 5Pan Li9-0/+395
2024-06-19RISC-V: Add testcases for unsigned .SAT_SUB vector form 4Pan Li9-0/+395
2024-06-19RISC-V: Add testcases for unsigned .SAT_SUB vector form 3Pan Li9-0/+396
2024-06-19libstdc++: Fix warning regressions in <bits/stl_tempbuf.h>Jonathan Wakely1-4/+4
2024-06-19build: Fix missing variable quotesCollin Funk4-11/+11
2024-06-19Improve gcc.dg/vect/bb-slp-32.c testcaseRichard Biener1-6/+20
2024-06-19Fortran: Set the vptr of a class typed result.Andre Vehreschild5-11/+45
2024-06-19xtensa: constantsynth: Reforge to fix some non-fatal issuesTakayuki 'January June' Suwa3-30/+103
2024-06-19RISC-V: Add testcases for unsigned .SAT_ADD vector form 8Pan Li9-0/+395
2024-06-19RISC-V: Add testcases for unsigned .SAT_ADD vector form 7Pan Li9-0/+395
2024-06-19RISC-V: Add testcases for unsigned .SAT_ADD vector form 6Pan Li9-0/+395
2024-06-19RISC-V: Add testcases for unsigned .SAT_ADD vector form 5Pan Li9-0/+396
2024-06-19RISC-V: Add testcases for unsigned .SAT_ADD vector form 4Pan Li9-0/+396
2024-06-19RISC-V: Add testcases for unsigned .SAT_ADD vector form 3Pan Li9-0/+397
2024-06-19RISC-V: Add testcases for unsigned .SAT_ADD vector form 2Pan Li9-0/+395
2024-06-19RISC-V: Add testcases for unsigned .SAT_SUB scalar form 12Pan Li9-0/+182
2024-06-19RISC-V: Add testcases for unsigned .SAT_SUB scalar form 11Pan Li9-0/+183
2024-06-19[MAINTAINERS] Update my email address and move to DCO.Ramana Radhakrishnan1-1/+2
2024-06-19Daily bump.GCC Administrator8-1/+698
2024-06-18RISC-V: Move mode assertion out of conditional branch in emit_insnEdwin Lu1-6/+19
2024-06-18RISC-V: Fix vwsll combine on rv32 targetsEdwin Lu1-4/+2
2024-06-18[committed] [RISC-V] Fix wrong patch applicationJeff Law1-1/+1
2024-06-18aarch64: Add comment about thunderxt81/t83 being aliasesAndrew Pinski1-0/+1
2024-06-18aarch64: make thunderxt88p1 an alias of thunderxt88Andrew Pinski2-4/+3
2024-06-18diagnostics: rename tree-diagnostic-path.cc to diagnostic-path.ccDavid Malcolm4-7/+6
2024-06-18diagnostics: eliminate diagnostic_context::m_print_path callbackDavid Malcolm7-23/+19
2024-06-18diagnostics: introduce diagnostic-macro-unwinding.h/ccDavid Malcolm7-202/+253
2024-06-18diagnostics: eliminate diagnostic_context::m_make_json_for_pathDavid Malcolm5-40/+34
2024-06-18diagnostics: remove tree usage from tree-diagnostic-path.ccDavid Malcolm7-113/+580
2024-06-18diagnostics: eliminate "tree" from diagnostic_{event,path}David Malcolm11-70/+161
2024-06-18diagnostics: move simple_diagnostic_{path,thread,event} to their own .h/ccDavid Malcolm10-251/+366
2024-06-18Match: Support forms 7 and 8 for the unsigned .SAT_ADDPan Li1-0/+10
2024-06-18Match: Support form 11 for the unsigned scalar .SAT_SUBPan Li1-1/+8
2024-06-18tree-optimization/115537 - ICE with SLP condition reduction vectorizationRichard Biener2-2/+22
2024-06-18[to-be-committed,RISC-V] Improve bset generation when bit position is limitedJeff Law2-0/+60
2024-06-18libstdc++: Fix outdated comment about standard integer typesJonathan Wakely1-4/+2
2024-06-18analyzer: Fix g++ 4.8 bootstrap without using std::move to return std::unique...Jonathan Wakely12-33/+33
2024-06-18[MAINTAINERS] Update my email addressKyrylo Tkachov1-2/+2
2024-06-18aarch64: Add some uses of force_highpart_subregRichard Sandiford1-13/+4
2024-06-18Add force_highpart_subregRichard Sandiford4-14/+20
2024-06-18Make more use of force_lowpart_subregRichard Sandiford3-14/+12
2024-06-18aarch64: Add some uses of force_lowpart_subregRichard Sandiford5-17/+23
2024-06-18Add force_lowpart_subregRichard Sandiford3-22/+17
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