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2024-09-24Implement MATMUL and DOT_PRODUCT for unsigned.Thomas Koenig28-1073/+1207
gcc/fortran/ChangeLog: * arith.cc (gfc_arith_uminus): Fix warning. (gfc_arith_minus): Correctly truncate unsigneds. * check.cc (gfc_check_dot_product): Handle unsigned arguments. (gfc_check_matmul): Likewise. * expr.cc (gfc_get_unsigned_expr): New function. * gfortran.h (gfc_get_unsigned_expr): Add prototype. * iresolve.cc (gfc_resolve_matmul): If using UNSIGNED, use the signed integer version. * gfortran.texi: Document MATMUL and DOT_PRODUCT for unsigned. * simplify.cc (compute_dot_product): Handle unsigneds. libgfortran/ChangeLog: * m4/iparm.m4: Add UNSIGED if type is m. * m4/matmul.m4: If type is GFC_INTEGER, use GFC_UINTEGER instead. Whitespace fixes. * m4/matmul_internal.m4: Whitespace fixes. * generated/matmul_c10.c: Regenerated. * generated/matmul_c16.c: Regenerated. * generated/matmul_c17.c: Regenerated. * generated/matmul_c4.c: Regenerated. * generated/matmul_c8.c: Regeneraated. * generated/matmul_i1.c: Regenerated. * generated/matmul_i16.c: Regenerated. * generated/matmul_i2.c: Regenerated. * generated/matmul_i4.c: Regenerated. * generated/matmul_i8.c: Regenerated. * generated/matmul_r10.c: Regenerated. * generated/matmul_r16.c: Regenerated. * generated/matmul_r17.c: Regenerated. * generated/matmul_r4.c: Regenerated. * generated/matmul_r8.c: Regenerated. * libgfortran.h: Add array types for unsiged. gcc/testsuite/ChangeLog: * gfortran.dg/unsigned_25.f90: New test. * gfortran.dg/unsigned_26.f90: New test.
2024-09-24c++: Implement C++23 P2718R0 - Wording for P2644R1 Fix for Range-based for ↵Jakub Jelinek28-31/+961
Loop [PR107637] The following patch implements the C++23 P2718R0 paper - Wording for P2644R1 Fix for Range-based for Loop. The patch introduces a new option, -f{,no-}range-for-ext-temps so that user can control the behavior even in older C++ versions. The option is on by default in C++23 and later (-fno-range-for-ext-temps is an error in that case) and in the -std=gnu++11 ... -std=gnu++20 modes (one can use -fno-range-for-ext-temps to request previous behavior in that case), and is not enabled by default in -std=c++11 ... -std=c++20 modes but one can explicitly enable it with -frange-for-ext-temps. As all the temporaries from __for_range initialization should have life extended until the end of __for_range scope, this patch disables (for -frange-for-ext-temps and if !processing_template_decl) CLEANUP_POINT_EXPR wrapping of the __for_range declaration, also disables -Wdangling-reference warning as well as the rest of extend_ref_init_temps (we know the __for_range temporary is not TREE_STATIC and as all the temporaries from the initializer will be life extended, we shouldn't try to handle temporaries referenced by references any differently) and adds an extra push_stmt_list/pop_stmt_list before cp_finish_decl of __for_range and after end of the for body and wraps all that into CLEANUP_POINT_EXPR. I had to repeat that also for OpenMP range loops because those are handled differently. 2024-09-24 Jakub Jelinek <jakub@redhat.com> PR c++/107637 gcc/ * omp-general.cc (find_combined_omp_for, find_nested_loop_xform): Handle CLEANUP_POINT_EXPR like TRY_FINALLY_EXPR. * doc/invoke.texi (frange-for-ext-temps): Document. Add -fconcepts to the C++ option list. gcc/c-family/ * c.opt (frange-for-ext-temps): New option. * c-opts.cc (c_common_post_options): Set flag_range_for_ext_temps for C++23 or later or for C++11 or later in !flag_iso mode if the option wasn't set by user. * c-cppbuiltin.cc (c_cpp_builtins): Change __cpp_range_based_for value for flag_range_for_ext_temps from 201603L to 202212L in C++17 or later. * c-omp.cc (c_find_nested_loop_xform_r): Handle CLEANUP_POINT_EXPR like TRY_FINALLY_EXPR. gcc/cp/ * cp-tree.h: Implement C++23 P2718R0 - Wording for P2644R1 Fix for Range-based for Loop. (cp_convert_omp_range_for): Add bool tmpl_p argument. (find_range_for_decls): Declare. * parser.cc (cp_convert_range_for): For flag_range_for_ext_temps call push_stmt_list () before cp_finish_decl for range_temp and save it temporarily to FOR_INIT_STMT. (cp_convert_omp_range_for): Add tmpl_p argument. If set, remember DECL_NAME of range_temp and for cp_finish_decl call restore it before clearing it again, if unset, don't adjust DECL_NAME of range_temp at all. (cp_parser_omp_loop_nest): For flag_range_for_ext_temps range for add CLEANUP_POINT_EXPR around sl. Call find_range_for_decls and adjust DECL_NAMEs for range fors if not processing_template_decl. Adjust cp_convert_omp_range_for caller. Remove superfluous backslash at the end of line. * decl.cc (initialize_local_var): For flag_range_for_ext_temps temporarily clear stmts_are_full_exprs_p rather than set for for_range__identifier decls. * call.cc (extend_ref_init_temps): For flag_range_for_ext_temps return init early for for_range__identifier decls. * semantics.cc (find_range_for_decls): New function. (finish_for_stmt): Use it. For flag_range_for_ext_temps if cp_convert_range_for set FOR_INIT_STMT, pop_stmt_list it and wrap into CLEANUP_POINT_EXPR. * pt.cc (tsubst_omp_for_iterator): Adjust tsubst_omp_for_iterator caller. (tsubst_stmt) <case OMP_FOR>: For flag_range_for_ext_temps if there are any range fors in the loop nest, add push_stmt_list starting before the initializations, pop_stmt_list it after the body and wrap into CLEANUP_POINT_EXPR. Change DECL_NAME of range for temps from NULL to for_range_identifier. gcc/testsuite/ * g++.dg/cpp23/range-for1.C: New test. * g++.dg/cpp23/range-for2.C: New test. * g++.dg/cpp23/range-for3.C: New test. * g++.dg/cpp23/range-for4.C: New test. * g++.dg/cpp23/range-for5.C: New test. * g++.dg/cpp23/range-for6.C: New test. * g++.dg/cpp23/range-for7.C: New test. * g++.dg/cpp23/range-for8.C: New test. * g++.dg/cpp23/feat-cxx2b.C (__cpp_range_based_for): Check for 202212L rather than 201603L. * g++.dg/cpp26/feat-cxx26.C (__cpp_range_based_for): Likewise. * g++.dg/warn/Wdangling-reference4.C: Don't expect warning for C++23 or newer. Use dg-additional-options rather than dg-options. libgomp/ * testsuite/libgomp.c++/range-for-1.C: New test. * testsuite/libgomp.c++/range-for-2.C: New test. * testsuite/libgomp.c++/range-for-3.C: New test. * testsuite/libgomp.c++/range-for-4.C: New test. * testsuite/libgomp.c++/range-for-5.C: New test.
2024-09-24libgcc, Darwin: Drop the legacy library build for macOS >= 15 [PR116809].Iain Sandoe4-10/+10
We have been building a legacy libgcc_s.1 DSO to support code that was built with older compilers. From macOS 15, the unwinder no longer exports some of the symbols used in that library which (a) cuases bootstrap fail and (b) means that the legacy library is no longer useful. No open branch of GCC emits references to this library - and any already -built code that depends on the symbols would need rework anyway. PR target/116809 libgcc/ChangeLog: * config.host: Build legacy libgcc_s.1 on hosts before macOS 15. * config/i386/t-darwin: Remove reference to legacy libgcc_s.1 * config/rs6000/t-darwin: Likewise. * config/t-darwin-libgccs1: New file. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-09-24i386: Fix comment typoJakub Jelinek1-1/+1
Found a comment typo, fixed as obvious. 2024-09-24 Jakub Jelinek <jakub@redhat.com> * config/i386/i386-expand.cc (ix86_expand_round_builtin): Fix comment typo, insead -> instead.
2024-09-24c++/contracts: ICE in build_contract_condition_function [PR116490]Nina Dinka Ranns2-3/+65
We currently do not expect comdat group of the guarded function to be set at the time of generating pre and post check function. However, in the case of an explicit instantiation, the guarded function has been added to a comdat group before generating contract check functions, which causes the observed ICE. Current assert removed and an additional check for comdat group of the guarded function added. With this change, the pre and post check functions get added to the same comdat group of the guarded function if the guarded function is already placed in a comdat group. PR c++/116490 gcc/cp/ChangeLog: * contracts.cc (build_contract_condition_function): added a check for comdat group of the guarded function. If set, the condition check function is added to the same comdat group. gcc/testsuite/ChangeLog: * g++.dg/contracts/pr116490.C: New test. Signed-off-by: Nina Ranns <dinka.ranns@gmail.com>
2024-09-24libgomp: with USM, init 'link' variables with host addressTobias Burnus3-0/+110
If requires unified_shared_memory or self_maps is set, make 'declare target link' variables to point initially to the host pointer. libgomp/ChangeLog: * target.c (gomp_load_image_to_device): For requires unified_shared_memory, update 'link' vars to point to the host var. * testsuite/libgomp.c-c++-common/target-link-3.c: New test. * testsuite/libgomp.c-c++-common/target-link-4.c: New test.
2024-09-24[PATCH] RISC-V: Fix FIXED_REGISTERS comment missing return address registerYixuan Chen1-1/+1
gcc/ChangeLog: * config/riscv/riscv.h: Fix FIXED_REGISTERS comment missing return address register.
2024-09-24OpenMP: Check additional restrictions on context selector propertiesSandra Loosemore11-24/+176
TR13 (pre-6.0) of the OpenMP spec says: "Each trait-property may only be specified once in a trait selector other than those in the construct selector set." and "If trait-property any is specified in the kind trait-selector of the device selector set or the target_device selector sets, no other trait-property may be specified in the same selector set." These restrictions (with slightly different wording) date back to OpenMP 5.1, but were not in 5.0 which was the basis for GCC's implementation. This patch adds a diagnostic, adds new testcases, and fixes some older testcases that include now-invalid selectors. gcc/ChangeLog * omp-general.cc (omp_check_context_selector): Reject other properties in the same selector set with kind(any). Also reject duplicate name-list properties. gcc/testsuite/ChangeLog * c-c++-common/gomp/declare-variant-10.c: Fix broken tests. * c-c++-common/gomp/declare-variant-3.c: Likewise. * c-c++-common/gomp/declare-variant-9.c: Likewise. * c-c++-common/gomp/declare-variant-any.c: New. * c-c++-common/gomp/declare-variant-duplicates.c: New. * gfortran.dg/gomp/declare-variant-10.f90: Fix broken tests. * gfortran.dg/gomp/declare-variant-3.f90: Likewise. * gfortran.dg/gomp/declare-variant-9.f90: Likewise. * gfortran.dg/gomp/declare-variant-any.f90: New. * gfortran.dg/gomp/declare-variant-duplicates.f90: New.
2024-09-24Simplify range-op shift mask generationRichard Biener1-1/+1
The following reduces the number of wide_ints built which show up in the profile for PR114855 as the largest remaining bit at -O1. * range-op.cc (operator_rshift::op1_range): Use wi::mask instead of shift and not.
2024-09-24Widening-Mul: Fix one ICE for SAT_SUB matching operand checkingPan Li2-1/+13
This patch would like to fix the following ICE for -O2 -m32 of x86_64. during RTL pass: expand JackMidiAsyncWaitQueue.cpp.cpp: In function 'void DequeueEvent(unsigned int)': JackMidiAsyncWaitQueue.cpp.cpp:3:6: internal compiler error: in expand_fn_using_insn, at internal-fn.cc:263 3 | void DequeueEvent(unsigned frame) { | ^~~~~~~~~~~~ 0x27b580d diagnostic_context::diagnostic_impl(rich_location*, diagnostic_metadata const*, diagnostic_option_id, char const*, __va_list_tag (*) [1], diagnostic_t) ???:0 0x27c4a3f internal_error(char const*, ...) ???:0 0x27b3994 fancy_abort(char const*, int, char const*) ???:0 0xf25ae5 expand_fn_using_insn(gcall*, insn_code, unsigned int, unsigned int) ???:0 0xf2a124 expand_direct_optab_fn(internal_fn, gcall*, optab_tag, unsigned int) ???:0 0xf2c87c expand_SAT_SUB(internal_fn, gcall*) ???:0 We allowed the operand convert when matching SAT_SUB in match.pd, to support the zip benchmark SAT_SUB pattern. Aka, (convert? (minus (convert1? @0) (convert1? @1))) for below sample code. void test (uint16_t *x, unsigned b, unsigned n) { unsigned a = 0; register uint16_t *p = x; do { a = *--p; *p = (uint16_t)(a >= b ? a - b : 0); // Truncate after .SAT_SUB } while (--n); } The pattern match for SAT_SUB itself may also act on below scalar sample code too. unsigned long long GetTimeFromFrames(int); unsigned long long GetMicroSeconds(); void DequeueEvent(unsigned frame) { long long frame_time = GetTimeFromFrames(frame); unsigned long long current_time = GetMicroSeconds(); DequeueEvent(frame_time < current_time ? 0 : frame_time - current_time); } Aka: uint32_t a = (uint32_t)SAT_SUB(uint64_t, uint64_t); Then there will be a problem when ia32 or -m32 is given when compiling. Because we only check the lhs (aka uint32_t) type is supported by ifn instead of the operand (aka uint64_t). Mostly DImode is disabled for 32 bits target like ia32 or rv32gcv, and then trigger ICE when expanding. The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. PR middle-end/116814 gcc/ChangeLog: * tree-ssa-math-opts.cc (build_saturation_binary_arith_call): Make ifn is_supported type check based on operand instead of lhs. gcc/testsuite/ChangeLog: * g++.dg/torture/pr116814-1.C: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-09-24tree-optimization/116819 - SLP with !STMT_VINFO_RELEVANT representativeRichard Biener1-0/+6
Under some circumstances we can end up picking a not relevant stmt as representative of a SLP node. Instead of skipping stmt analysis and declaring success we have to either ignore relevancy throughout the code base or fail SLP operation verification. The following does the latter. PR tree-optimization/116819 * tree-vect-stmts.cc (vect_analyze_stmt): When the SLP representative isn't relevant signal failure instead of success.
2024-09-24RISC-V: testsuite: Fix SELECT_VL SLP fallout.Robin Dapp103-103/+103
This fixes asm-scan fallout from r15-3712-g5e3a4a01785e2d where we allow SLP with SELECT_VL. Assisted by sed and regtested on rv64gcv_zvfh_zvbb. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-1.c: Expect length-controlled loop. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-2.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-3.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-4.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-1.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-10.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-11.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-12.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-2.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-3.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-4.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-9.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-1.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-2.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-25.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-26.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-27.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-28.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-29.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-3.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-30.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-31.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-32.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-4.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-5.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-6.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-7.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-8.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-1.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-2.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-3.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-10.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-11.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-12.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-13.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-14.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-15.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-16.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-17.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-18.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-19.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-2.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-20.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-21.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-22.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-23.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-24.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-3.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-4.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-5.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-6.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-7.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-8.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-9.c: Ditto.
2024-09-24RISC-V: Add more vector-vector extract cases.Robin Dapp2-0/+212
This adds a V16SI -> V4SI and related i.e. "quartering" vector-vector extract expander for VLS modes. It helps with spills in x264 that may cause a load-hit-store. gcc/ChangeLog: * config/riscv/autovec.md (vec_extract<mode><vls_quarter>): Add quarter vec-vec extract. * config/riscv/vector-iterators.md: New iterators.
2024-09-24RISC-V: Fix effective target check.Robin Dapp1-6/+6
The return value is inverted in check_effective_target_rvv_zvl256b_ok and check_effective_target_rvv_zvl512b_ok. Fix this and also just use the current march. gcc/testsuite/ChangeLog: * lib/target-supports.exp: Fix effective target check.
2024-09-24Fortran: Allow to nullify caf token when not in ultimate component. [PR101100]Andre Vehreschild2-1/+36
gcc/fortran/ChangeLog: PR fortran/101100 * trans-expr.cc (trans_caf_token_assign): Take caf-token from decl for non ultimate coarray components. gcc/testsuite/ChangeLog: * gfortran.dg/coarray/proc_pointer_assign_1.f90: New test.
2024-09-24build: enable C++11 narrowing warningsJason Merrill14-39/+40
We've been using -Wno-narrowing since gcc 4.7, but at this point narrowing diagnostics seem like a stable part of C++ and we should adjust. This patch changes -Wno-narrowing to -Wno-error=narrowing so that narrowing issues will still not break bootstrap, but we can see them. The rest of the patch fixes the narrowing warnings I see in an x86_64-pc-linux-gnu bootstrap. In most of the cases, by adjusting the types of various declarations so that we store the values in the same types we compute them in, which seems worthwhile anyway. This also allowed us to remove a few -Wsign-compare casts. gcc/ChangeLog: * configure.ac (CXX_WARNING_OPTS): Change -Wno-narrowing to -Wno-error=narrowing. * configure: Regenerate. * config/i386/i386.h (debugger_register_map) (debugger64_register_map) (svr4_debugger_register_map): Make unsigned. * config/i386/i386.cc: Likewise. * diagnostic-event-id.h (diagnostic_thread_id_t): Make int. * vec.h (vec::size): Make unsigned int. * ipa-modref.cc (escape_point::arg): Make unsigned. (modref_lattice::add_escape_point): Use eaf_flags_t. (update_escape_summary_1): Use eaf_flags_t, && for bool. * pair-fusion.cc (pair_fusion_bb_info::track_access): Make mem_size unsigned int. * pretty-print.cc (format_phase_2): Cast va_arg to char. * tree-ssa-loop-ch.cc (ch_base::copy_headers): Make nheaders unsigned, remove cast. * tree-ssa-structalias.cc (bitpos_of_field): Return unsigned. (push_fields_onto_fieldstack):Make offset unsigned, remove cast. * tree-vect-slp.cc (vect_prologue_cost_for_slp): Use nelt_limit. * tree-vect-stmts.cc (vect_truncate_gather_scatter_offset): Make scale unsigned. (vectorizable_operation): Make ncopies unsigned. * rtl-ssa/member-fns.inl: Make num_accesses unsigned int.
2024-09-24Fortran: Assign allocated caf-memory to scalar members [PR84870]Andre Vehreschild2-0/+26
Allocating a coarray required an array-descriptor. For scalars a temporary descriptor was created. Assigning the allocated memory from the temporary descriptor back to the scalar is now added. gcc/fortran/ChangeLog: PR fortran/84870 * trans-array.cc (duplicate_allocatable_coarray): For scalar allocatable components the memory allocated is now assigned to the component's pointer. gcc/testsuite/ChangeLog: * gfortran.dg/coarray/alloc_comp_10.f90: New test.
2024-09-24tree-optimization/114855 - more update_ssa speedupRichard Biener1-0/+5
The following tackles another source of slow bitmap operations, namely populating blocks_to_update. We already have that in tree view around PHI insertion but also the initial population is slow. There's unfortunately a conditional inbetween list view requirement and the bitmap API doesn't allow opportunistic switching but rejects tree -> tree or list -> list transitions. So the following patch wraps the early population in a tree view section with possibly one redundant tree -> list -> tree view transition. This cuts tree SSA incremental from 228.25s (21%) to 65.05s (7%). PR tree-optimization/114855 * tree-into-ssa.cc (update_ssa): Use tree view for the initial population of blocks_to_update.
2024-09-24Alphabetize my entry in MAINTAINER's DCO list.Aldy Hernandez1-1/+1
ChangeLog: * MAINTAINERS: Move my entry in DCO list into alphabetical order.
2024-09-24OpenMP: Add support for 'self_maps' to the 'require' directiveTobias Burnus23-24/+185
'self_maps' implies 'unified_shared_memory', except that the latter also permits that explicit maps copy data to device memory while self_maps does not. In GCC, currently, both are handled identical. gcc/c/ChangeLog: * c-parser.cc (c_parser_omp_requires): Handle self_maps clause. gcc/cp/ChangeLog: * parser.cc (cp_parser_omp_requires): Handle self_maps clause. gcc/fortran/ChangeLog: * gfortran.h (enum gfc_omp_requires_kind): Add OMP_REQ_SELF_MAPS. (gfc_namespace): Enlarge omp_requires bitfield. * module.cc (enum ab_attribute, attr_bits): Add AB_OMP_REQ_SELF_MAPS. (mio_symbol_attribute): Handle it. * openmp.cc (gfc_check_omp_requires, gfc_match_omp_requires): Handle self_maps clause. * parse.cc (gfc_parse_file): Handle self_maps clause. gcc/ChangeLog: * lto-cgraph.cc (output_offload_tables, omp_requires_to_name): Handle self_maps clause. * omp-general.cc (struct omp_ts_info, omp_context_selector_matches): Likewise for the associated trait. * omp-general.h (enum omp_requires): Add OMP_REQUIRES_SELF_MAPS. * omp-selectors.h (enum omp_ts_code): Add OMP_TRAIT_IMPLEMENTATION_SELF_MAPS. include/ChangeLog: * gomp-constants.h (GOMP_REQUIRES_SELF_MAPS): #define. libgomp/ChangeLog: * plugin/plugin-gcn.c (GOMP_OFFLOAD_get_num_devices): Accept self_maps clause. * plugin/plugin-nvptx.c (GOMP_OFFLOAD_get_num_devices): Likewise. * libgomp.texi (TR13 Impl. Status): Set to 'Y'. * target.c (gomp_requires_to_name, GOMP_offload_register_ver, gomp_target_init): Handle self_maps clause. * testsuite/libgomp.fortran/self_maps.f90: New test. gcc/testsuite/ChangeLog: * c-c++-common/gomp/declare-variant-1.c: Add self_maps test. * c-c++-common/gomp/requires-4.c: Likewise. * gfortran.dg/gomp/declare-variant-3.f90: Likewise. * c-c++-common/gomp/requires-2.c: Update dg-error msg. * gfortran.dg/gomp/requires-2.f90: Likewise. * gfortran.dg/gomp/requires-self-maps-aux.f90: New. * gfortran.dg/gomp/requires-self-maps.f90: New.
2024-09-24Testsuite, darwin: account for macOS 15Francois-Xavier Coudert1-0/+1
gcc/testsuite/ChangeLog: * gcc.dg/darwin-minversion-link.c: Account for macOS 15.
2024-09-24tree-optimization/115372 - failed store-lanes in some casesRichard Biener1-0/+18
The gcc.target/riscv/rvv/autovec/struct/struct_vect-4.c testcase shows that we sometimes fail to use store-lanes even though it should be profitable. We're currently relying on vect_slp_prefer_store_lanes_p at the point we run into the first SLP discovery mismatch with obviously limited information. For the case at hand we have 3, 5 or 7 lanes of VnDImode [2, 2] vectors with the first mismatch at lane 2 so the new group size is 1. The heuristic says that might be an OK split given the rest is a multiple of the vector lanes. Now we continue discovery but in the end mismatches result in uniformly single-lane SLP instances which we can handle via interleaving but of course are prime candidates for store-lanes. The following patch re-assesses with the extra knowledge now just relying on the fact whether the target supports store-lanes for the given group size. PR tree-optimization/115372 * tree-vect-slp.cc (vect_build_slp_instance): Compute the uniform, if, number of lanes of the RHS sub-graphs feeding the store and if uniformly one, use store-lanes if the target supports that.
2024-09-24libstdc++: Remove unnecessary 'static' from __is_specialization_ofNathaniel Shead1-3/+2
This makes the declarations internal linkage, which is an ODR issue, and causes a future modules patch to fail regtest as it now detects attempted uses of TU-local entities in module CMIs. libstdc++-v3/ChangeLog: * include/std/format: Remove unnecessary 'static'. Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
2024-09-24tree-optimization/114855 - high update_ssa timeRichard Biener1-36/+8
Part of the problem in PR114855 is high update_ssa time. When one fixes the backward jump threading issue tree SSA incremental is at 439.91s ( 26%), mostly doing bitmap element searches for blocks_with_phis_to_rewrite. The following turns that bitmap to tree view noticing the two-dimensional vector of PHIs it guards is excessive compared to what we actually save with it - walking all PHI nodes in a block, something we already do once to initialize stmt flags. So instead of optimizing that walk we use the stmt flag, saving allocations and global state that lives throughout the whole compilation. This reduces the tree SSA incremental time to 203.13 ( 14%) The array was added in r0-74758-g2ce798794df8e1 when we still possibly had gazillion virtual operands for PR26830, I checked the testcase still behaves OK. PR tree-optimization/114855 * tree-into-ssa.cc (phis_to_rewrite): Remove global var. (mark_phi_for_rewrite): Simplify. (rewrite_update_phi_arguments): Walk all PHIs, process those satisfying rewrite_uses_p. (delete_update_ssa): Simplify. (update_ssa): Likewise. Switch blocks_with_phis_to_rewrite to tree view.
2024-09-24hosthooks.h: Fix GCC_HOST_HOOKS_H typoYangyu Chen1-1/+1
The comment of the final endif in hosthooks.h is wrong, it should be GCC_HOST_HOOKS_H instead of GCC_LANG_HOOKS_H. gcc/ChangeLog: * hosthooks.h (struct host_hooks): Fix GCC_HOST_HOOKS_H typo. Signed-off-by: Yangyu Chen <chenyangyu@isrc.iscas.ac.cn>
2024-09-24nvptx: Partial support for aliases to aliases.Prathamesh Kulkarni2-5/+25
For the following test (adapted from pr96390.c): __attribute__((noipa)) int foo () { return 42; } int bar () __attribute__((alias ("foo"))); int baz () __attribute__((alias ("bar"))); int main () { int n; #pragma omp target map(from:n) n = baz (); return n; } gcc emits following ptx for baz: .visible .func (.param.u32 %value_out) bar; .alias bar,foo; .visible .func (.param.u32 %value_out) baz; .alias baz,bar; which is incorrect since PTX requires aliasee to be a defined function. The patch instead uses cgraph_node::get(name)->ultimate_alias_target, which generates the following PTX: .visible .func (.param.u32 %value_out) baz; .alias baz,foo; gcc/ChangeLog: PR target/104957 * config/nvptx/nvptx.cc (nvptx_asm_output_def_from_decls): Use cgraph_node::get(name)->ultimate_alias_target instead of value. gcc/testsuite/ChangeLog: PR target/104957 * gcc.target/nvptx/alias-to-alias-1.c: Adjust. Signed-off-by: Prathamesh Kulkarni <prathameshk@nvidia.com> Co-authored-by: Thomas Schwinge <tschwinge@baylibre.com>
2024-09-24Daily bump.GCC Administrator13-1/+417
2024-09-24modula2: Add noreturn attribute to m2/gm2-libs/M2RTS.modGaius Mulley3-2/+4
This patch removes a build warning by adding a noreturn attribute to the M2RTS.mod:HaltC procedure. Also add an infinite loop to gm2-libs-min/M2RTS.mod. gcc/m2/ChangeLog: * Make-lang.in (m2/gm2-libs-boot/M2RTS.o): Remove --suppress-noreturn. * gm2-libs/M2RTS.mod (HaltC): Add noreturn attribute. * gm2-libs-min/M2RTS.mod (HALT): Add LOOP END. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-09-23libobjc: Fix typosAndrew Kreimer8-10/+10
Fix typos in comments. libobjc/ChangeLog: * Makefile.in: s/overrridden/overridden. * encoding.c (_darwin_rs6000_special_round_type_align): Fix typo in comment. (rs6000_special_round_type_align): Likewise. * exception.c (is_kind_of_exception_matcher): Likewise. (PERSONALITY_FUNCTION): Likewise. * hash.c (objc_hash_next): Likewise. * init.c (__objc_create_classes_tree): Likewise. * objc-private/objc-list.h (list_remove_head): Likewise. * sendmsg.c (__objc_install_dtable_for_class): Likewise. * thr.c (objc_thread_yield): Likewise. Signed-off-by: Andrew Kreimer <algonell@gmail.com>
2024-09-23c++: diagnose this specifier in requires expr [PR116798]Marek Polacek2-3/+18
We don't detect an explicit object parameter in a requires expression. We can get there by way of requires-expression -> requirement-parameter-list -> parameter-declaration-clause -> ... -> parameter-declaration with this[opt]. But [dcl.fct]/5 doesn't allow an explicit object parameter in this context. So let's fix it like r14-9033 and not like r14-8832. PR c++/116798 gcc/cp/ChangeLog: * parser.cc (cp_parser_parameter_declaration): Detect an explicit object parameter in a requires expression. gcc/testsuite/ChangeLog: * g++.dg/cpp23/explicit-obj-diagnostics12.C: New test. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-09-23aarch64: Add codegen support for AdvSIMD faminmaxSaurabh Jha5-0/+693
The AArch64 FEAT_FAMINMAX extension is optional from Armv9.2-a and mandatory from Armv9.5-a. It introduces instructions for computing the floating point absolute maximum and minimum of the two vectors element-wise. This patch adds code generation support for famax and famin in terms of existing RTL operators. famax/famin is equivalent to first taking abs of the operands and then taking smax/smin on the results of abs. famax/famin (a, b) = smax/smin (abs (a), abs (b)) This fusion of operators is only possible when -march=armv9-a+faminmax flags are passed. We also need to pass -ffast-math flag; if we don't, then a statement like c[i] = __builtin_fmaxf16 (a[i], b[i]); is RTL expanded to UNSPEC_FMAXNM instead of smax (likewise for smin). This code generation is only available on -O2 or -O3 as that is when auto-vectorization is enabled. gcc/ChangeLog: * config/aarch64/aarch64-simd.md (*aarch64_faminmax_fused): Instruction pattern for faminmax codegen. * config/aarch64/iterators.md: Attribute for faminmax codegen. gcc/testsuite/ChangeLog: * gcc.target/aarch64/simd/faminmax-codegen-no-flag.c: New test. * gcc.target/aarch64/simd/faminmax-codegen.c: New test. * gcc.target/aarch64/simd/faminmax-no-codegen.c: New test.
2024-09-23aarch64: Add AdvSIMD faminmax intrinsicsSaurabh Jha9-0/+294
The AArch64 FEAT_FAMINMAX extension is optional from Armv9.2-a and mandatory from Armv9.5-a. It introduces instructions for computing the floating point absolute maximum and minimum of the two vectors element-wise. This patch introduces AdvSIMD faminmax intrinsics. The intrinsics of this extension are implemented as the following builtin functions: * vamax_f16 * vamaxq_f16 * vamax_f32 * vamaxq_f32 * vamaxq_f64 * vamin_f16 * vaminq_f16 * vamin_f32 * vaminq_f32 * vaminq_f64 We are defining a new way to add AArch64 AdvSIMD intrinsics by listing all the intrinsics in a .def file and then using that .def file to initialise various data structures. This would lead to more concise code and easier addition of the new AdvSIMD intrinsics in future. The faminmax intrinsics are defined using the new approach. gcc/ChangeLog: * config/aarch64/aarch64-builtins.cc (ENTRY): Macro to parse the contents of aarch64-simd-pragma-builtins.def. (ENTRY_VHSDF): Macro to parse the contents of aarch64-simd-pragma-builtins.def. (enum aarch64_builtins): New enum values for faminmax builtins via aarch64-simd-pragma-builtins.def. (enum class aarch64_builtin_signatures): Enum class to specify the number of operands a builtin will take. (struct aarch64_pragma_builtins_data): Struct to hold data from aarch64-simd-pragma-builtins.def. (aarch64_fntype): New function to define function types of intrinsics given an object of type aarch64_pragma_builtins_data. (aarch64_init_pragma_builtins): New function to define pragma builtins. (aarch64_get_pragma_builtin): New function to get a row of aarch64_pragma_builtins, given code. (handle_arm_neon_h): Modify to call aarch64_init_pragma_builtins. (aarch64_general_check_builtin_call): Modify to check whether required flag is being used for pragma builtins. (aarch64_expand_pragma_builtin): New function to emit instructions of pragma_builtin. (aarch64_general_expand_builtin): Modify to call aarch64_expand_pragma_builtin. * config/aarch64/aarch64-option-extensions.def (AARCH64_OPT_EXTENSION): Introduce new flag for this extension. * config/aarch64/aarch64-simd.md (@aarch64_<faminmax_uns_op><mode>): Instruction pattern for faminmax intrinsics. * config/aarch64/aarch64.h (TARGET_FAMINMAX): Introduce new flag for this extension. * config/aarch64/iterators.md: New iterators and unspecs. * doc/invoke.texi: Document extension in AArch64 Options. * config/aarch64/aarch64-simd-pragma-builtins.def: New file to list pragma builtins. gcc/testsuite/ChangeLog: * gcc.target/aarch64/simd/faminmax-builtins-no-flag.c: New test. * gcc.target/aarch64/simd/faminmax-builtins.c: New test.
2024-09-23[MAINTAINERS] Fix myself in order and add usernameSaurabh Jha1-1/+1
ChangeLog: * MAINTAINERS: Fix sort order and add username.
2024-09-23libstdc++: guard c++config pragmasJason Merrill1-0/+2
c++config needs to be compilable as C, in which mode we complain about the -Wc++ pragmas. libstdc++-v3/ChangeLog: * include/bits/c++config: Don't try to disable -Wc++??-extensions when compiling as C.
2024-09-23libstdc++: operator new/delete are transaction_safeJason Merrill1-18/+38
With the changes to #pragma system_header, g++.dg/tm/pr46270.C was failing because <new> didn't implement the N4514 change to [new.delete] that says "The library versions of the global allocation and deallocation functions are declared transaction_safe (8.3.5 dcl.fct)." We already have the _GLIBCXX_TXN_SAFE macro, just need to add it. libstdc++-v3/ChangeLog: * libsupc++/new: Add _GLIBCXX_TXN_SAFE.
2024-09-23dwarf2: store the RA state in CFI rowMatthieu Longo1-6/+18
On AArch64, the RA state informs the unwinder whether the return address is mangled and how, or not. This information is encoded in a boolean in the CFI row. This binary approach prevents from expressing more complex configuration, as it is the case with PAuth_LR introduced in Armv9.5-A. This patch addresses this limitation by replacing the boolean by an enum. gcc/ChangeLog: * dwarf2cfi.cc (struct dw_cfi_row): Declare a new enum type to replace ra_mangled. (cfi_row_equal_p): Use ra_state instead of ra_mangled. (dwarf2out_frame_debug_cfa_negate_ra_state): Same. (change_cfi_row): Same.
2024-09-23aarch64 testsuite: explain expectections for pr94515* testsMatthieu Longo2-6/+41
gcc/testsuite/ChangeLog: * g++.target/aarch64/pr94515-1.C: Improve test documentation. * g++.target/aarch64/pr94515-2.C: Same.
2024-09-23dwarf2: add hooks for architecture-specific CFIsMatthieu Longo17-45/+171
Architecture-specific CFI directives are currently declared an processed among others architecture-independent CFI directives in gcc/dwarf2* files. This approach creates confusion, specifically in the case of DWARF instructions in the vendor space and using the same instruction code. Such a clash currently happen between DW_CFA_GNU_window_save (used on SPARC) and DW_CFA_AARCH64_negate_ra_state (used on AArch64), and both having the same instruction code 0x2d. Then AArch64 compilers generates a SPARC CFI directive (.cfi_window_save) instead of .cfi_negate_ra_state, contrarilly to what is expected in [DWARF for the Arm 64-bit Architecture (AArch64)](https://github.com/ ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst). This refactoring does not solve completely the problem, but improve the situation by moving some of the processing of those directives (more specifically their output in the assembly) to the backend via 2 target hooks: - DW_CFI_OPRND1_DESC: parse the first operand of the directive (if any). - OUTPUT_CFI_DIRECTIVE: output the CFI directive as a string. Additionally, this patch also contains a renaming of an enum used for return address mangling on AArch64. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_output_cfi_directive): New hook for CFI directives. (aarch64_dw_cfi_oprnd1_desc): Same. (TARGET_OUTPUT_CFI_DIRECTIVE): Hook for output_cfi_directive. (TARGET_DW_CFI_OPRND1_DESC): Hook for dw_cfi_oprnd1_desc. * config/sparc/sparc.cc (sparc_output_cfi_directive): New hook for CFI directives. (sparc_dw_cfi_oprnd1_desc): Same. (TARGET_OUTPUT_CFI_DIRECTIVE): Hook for output_cfi_directive. (TARGET_DW_CFI_OPRND1_DESC): Hook for dw_cfi_oprnd1_desc. * coretypes.h (struct dw_cfi_node): Forward declaration of CFI type from gcc/dwarf2out.h. (enum dw_cfi_oprnd_type): Same. (enum dwarf_call_frame_info): Same. * doc/tm.texi: Regenerated from doc/tm.texi.in. * doc/tm.texi.in: Add doc for new target hooks. type of enum to allow forward declaration. * dwarf2cfi.cc (struct dw_cfi_row): Update the description for window_save and ra_mangled. (dwarf2out_frame_debug_cfa_negate_ra_state): Use AArch64 CFI directive instead of the SPARC one. (change_cfi_row): Use the right CFI directive's name for RA mangling. (output_cfi): Remove explicit architecture-specific CFI directive DW_CFA_GNU_window_save that falls into default case. (output_cfi_directive): Use target hook as default. * dwarf2out.cc (dw_cfi_oprnd1_desc): Use target hook as default. * dwarf2out.h (enum dw_cfi_oprnd_type): specify underlying type of enum to allow forward declaration. (dw_cfi_oprnd1_desc): Call target hook. (output_cfi_directive): Use dw_cfi_ref instead of struct dw_cfi_node *. * hooks.cc (hook_bool_dwcfi_dwcfioprndtyperef_false): New. (hook_bool_FILEptr_dwcfiptr_false): New. * hooks.h (hook_bool_dwcfi_dwcfioprndtyperef_false): New. (hook_bool_FILEptr_dwcfiptr_false): New. * target.def: Documentation for new hooks. include/ChangeLog: * dwarf2.h (enum dwarf_call_frame_info): specify underlying libffi/ChangeLog: * include/ffi_cfi.h (cfi_negate_ra_state): Declare AArch64 cfi directive. libgcc/ChangeLog: * config/aarch64/aarch64-asm.h (PACIASP): Replace SPARC CFI directive by AArch64 one. (AUTIASP): Same. libitm/ChangeLog: * config/aarch64/sjlj.S: Replace SPARC CFI directive by AArch64 one. gcc/testsuite/ChangeLog: * g++.target/aarch64/pr94515-1.C: Replace SPARC CFI directive by AArch64 one. * g++.target/aarch64/pr94515-2.C: Same.
2024-09-23Rename REG_CFA_TOGGLE_RA_MANGLE to REG_CFA_NEGATE_RA_STATEMatthieu Longo4-11/+11
The current name REG_CFA_TOGGLE_RA_MANGLE is not representative of what it really is, i.e. a register to represent several states, not only a binary one. Same for dwarf2out_frame_debug_cfa_toggle_ra_mangle. gcc/ChangeLog: * combine-stack-adj.cc (no_unhandled_cfa): Rename. * config/aarch64/aarch64.cc (aarch64_expand_prologue): Rename. (aarch64_expand_epilogue): Rename. * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_toggle_ra_mangle): Rename this... (dwarf2out_frame_debug_cfa_negate_ra_state): To this. (dwarf2out_frame_debug): Rename. * reg-notes.def (REG_CFA_NOTE): Rename REG_CFA_TOGGLE_RA_MANGLE.
2024-09-23libgcc: hide CIE and FDE data for DWARF architecture extensions behind a ↵Matthieu Longo8-15/+71
handler. This patch provides a new handler MD_ARCH_FRAME_STATE_T to hide an architecture-specific structure containing CIE and FDE data related to DWARF architecture extensions. Hiding the architecture-specific attributes behind a handler has the following benefits: 1. isolating those data from the generic ones in _Unwind_FrameState 2. avoiding casts to custom types. 3. preserving typing information when debugging with GDB, and so facilitating their printing. This approach required to add a new header md-unwind-def.h included at the top of libgcc/unwind-dw2.h, and redirecting to the corresponding architecture header via a symbolic link. An obvious drawback is the increase in complexity with macros, and headers. It also caused a split of architecture definitions between md-unwind-def.h (types definitions used in unwind-dw2.h) and md-unwind.h (local types definitions and handlers implementations). The naming of md-unwind.h with .h extension is a bit misleading as the file is only included in the middle of unwind-dw2.c. Changing this naming would require modification of others backends, which I prefered to abstain from. Overall the benefits are worth the added complexity from my perspective. libgcc/ChangeLog: * Makefile.in: New target for symbolic link to md-unwind-def.h * config.host: New parameter md_unwind_def_header. Set it to aarch64/aarch64-unwind-def.h for AArch64 targets, or no-unwind.h by default. * config/aarch64/aarch64-unwind.h (aarch64_pointer_auth_key): Move to aarch64-unwind-def.h (aarch64_cie_aug_handler): Update. (aarch64_arch_extension_frame_init): Update. (aarch64_demangle_return_addr): Update. * configure.ac: New substitute variable md_unwind_def_header. * unwind-dw2.h (defined): MD_ARCH_FRAME_STATE_T. * config/aarch64/aarch64-unwind-def.h: New file. * configure: Regenerate. * config/no-unwind.h: Updated comment
2024-09-23aarch64: skip copy of RA state register into target contextMatthieu Longo2-0/+16
The RA state register is local to a frame, so it should not be copied to the target frame during the context installation. This patch adds a new backend handler that check whether a register needs to be skipped or not before its installation. libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (MD_FRAME_LOCAL_REGISTER_P): new handler checking whether a register from the current context needs to be skipped before installation into the target context. (aarch64_frame_local_register): Likewise. * unwind-dw2.c (uw_install_context_1): use MD_FRAME_LOCAL_REGISTER_P.
2024-09-23aarch64: store signing key and signing method in DWARF _Unwind_FrameStateMatthieu Longo4-48/+159
This patch is only a refactoring of the existing implementation of PAuth and returned-address signing. The existing behavior is preserved. _Unwind_FrameState already contains several CIE and FDE information (see the attributes below the comment "The information we care about from the CIE/FDE" in libgcc/unwind-dw2.h). The patch aims at moving the information from DWARF CIE (signing key stored in the augmentation string) and FDE (the used signing method) into _Unwind_FrameState along the already-stored CIE and FDE information. Note: those information have to be saved in frame_state_reg_info instead of _Unwind_FrameState as they need to be savable by DW_CFA_remember_state and restorable by DW_CFA_restore_state, that both rely on the attribute "prev". Those new information in _Unwind_FrameState simplifies the look-up of the signing key when the return address is demangled. It also allows future signing methods to be easily added. _Unwind_FrameState is not a part of the public API of libunwind, so the change is backward compatible. A new architecture-specific handler MD_ARCH_EXTENSION_FRAME_INIT allows to reset values (if needed) in the frame state and unwind context before changing the frame state to the caller context. A new architecture-specific handler MD_ARCH_EXTENSION_CIE_AUG_HANDLER isolates the architecture-specific augmentation strings in AArch64 backend, and allows others architectures to reuse augmentation strings that would have clashed with AArch64 DWARF extensions. aarch64_demangle_return_addr, DW_CFA_AARCH64_negate_ra_state and DW_CFA_val_expression cases in libgcc/unwind-dw2-execute_cfa.h were documented to clarify where the value of the RA state register is stored (FS and CONTEXT respectively). libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (AARCH64_DWARF_RA_STATE_MASK): The mask for RA state register. (aarch64_ra_signing_method_t): The diversifiers used to sign a function's return address. (aarch64_pointer_auth_key): The key used to sign a function's return address. (aarch64_cie_signed_with_b_key): Deleted as the signing key is available now in _Unwind_FrameState. (MD_ARCH_EXTENSION_CIE_AUG_HANDLER): New CIE augmentation string handler for architecture extensions. (MD_ARCH_EXTENSION_FRAME_INIT): New architecture-extension initialization routine for DWARF frame state and context before execution of DWARF instructions. (aarch64_context_ra_state_get): Read RA state register from CONTEXT. (aarch64_ra_state_get): Read RA state register from FS. (aarch64_ra_state_set): Write RA state register into FS. (aarch64_ra_state_toggle): Toggle RA state register in FS. (aarch64_cie_aug_handler): Handler AArch64 augmentation strings. (aarch64_arch_extension_frame_init): Initialize defaults for the signing key (PAUTH_KEY_A), and RA state register (RA_no_signing). (aarch64_demangle_return_addr): Rely on the frame registers and the signing_key attribute in _Unwind_FrameState. * unwind-dw2-execute_cfa.h: Use the right alias DW_CFA_AARCH64_negate_ra_state for __aarch64__ instead of DW_CFA_GNU_window_save. (DW_CFA_AARCH64_negate_ra_state): Save the signing method in RA state register. Toggle RA state register without resetting 'how' to REG_UNSAVED. * unwind-dw2.c: (extract_cie_info): Save the signing key in the current _Unwind_FrameState while parsing the augmentation data. (uw_frame_state_for): Reset some attributes related to architecture extensions in _Unwind_FrameState. (uw_update_context): Move authentication code to AArch64 unwinding. * unwind-dw2.h (enum register_rule): Give a name to the existing enum for the register rules, and replace 'unsigned char' by 'enum register_rule' to facilitate debugging in GDB. (_Unwind_FrameState): Add a new architecture-extension attribute to store the signing key.
2024-09-23OpenMP: Fix omp_get_device_from_uid, minor cleanupTobias Burnus10-15/+60
In Fortran, omp_get_device_from_uid can also accept substrings, which are then not NUL terminated. Fixed by introducing a fortran.c wrapper function. Additionally, in case of a fail the plugin functions now return NULL instead of failing fatally such that a fall-back UID is generated. gcc/ChangeLog: * omp-general.cc (omp_runtime_api_procname): Strip "omp_" from string; move get_device_from_uid as now a '_' suffix exists. libgomp/ChangeLog: * fortran.c (omp_get_device_from_uid_): New function. * libgomp.map (GOMP_6.0): Add it. * oacc-host.c (host_dispatch): Init '.uid' and '.get_uid_func'. * omp_lib.f90.in: Make it used by removing bind(C). * omp_lib.h.in: Likewise. * target.c (omp_get_device_from_uid): Ensure the device is initialized. * plugin/plugin-gcn.c (GOMP_OFFLOAD_get_uid): Add function comment; return NULL in case of an error. * plugin/plugin-nvptx.c (GOMP_OFFLOAD_get_uid): Likewise. * testsuite/libgomp.fortran/device_uid.f90: Update to test substrings.
2024-09-23arc: Remove mlra option [PR113954]Claudiu Zissulescu4-18/+4
The target dependent mlra option was designed to be able to quickly switch between LRA and reload. The reload register allocator step is scheduled for retirement, thus, remove the functionality of mlra, keeping it for backward compatibility. PR target/113954 gcc/ChangeLog: * config/arc/arc.cc (TARGET_LRA_P): Always return true. (arc_lra_p): Remove. * config/arc/arc.h (TARGET_LRA): Remove. * config/arc/arc.opt (mlra): Change it to do nothing. * doc/invoke.texi (mlra): Update option description. Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
2024-09-23c++: Don't crash when mangling member with anonymous union or template type ↵Simon Martin6-1/+90
[PR100632, PR109790] We currently crash upon mangling members that have an anonymous union or a template operator type. The problem is that before calling write_unqualified_name, write_member_name asserts that it has a declaration whose DECL_NAME is an identifier node that is not that of an operator. This is wrong: - In PR100632, it's an anonymous union declaration, hence a 0 DECL_NAME - In PR109790, it's a legitimate template declaration for an operator (this was accepted up to GCC 10) This assert was added via r11-6301, to be sure that we do write the "on" marker for operator members. This patch removes that assert and instead - Lets members with an anonymous union type go through - For operators, adds the missing "on" marker for ABI versions greater than the highest usable with GCC 10 PR c++/109790 PR c++/100632 gcc/cp/ChangeLog: * mangle.cc (write_member_name): Handle members whose type is an anonymous union member. Write missing "on" marker for operators when ABI version is at least 16. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/decltype83.C: New test. * g++.dg/cpp0x/decltype83a.C: New test. * g++.dg/cpp1y/lambda-ice3.C: New test. * g++.dg/cpp1y/lambda-ice3a.C: New test. * g++.dg/cpp2a/nontype-class67.C: New test.
2024-09-23c++: Don't ICE due to artificial constructor parameters [PR116722]Simon Martin2-1/+25
The following code triggers an ICE === cut here === class base {}; class derived : virtual public base { public: template<typename Arg> constexpr derived(Arg) {} }; int main() { derived obj(1.); } === cut here === The problem is that cxx_bind_parameters_in_call ends up attempting to convert a REAL_CST (the first non artificial parameter) to INTEGER_TYPE (the type of the __in_chrg parameter), which ICEs. This patch changes cxx_bind_parameters_in_call to return early if it's called with a *structor that has an __in_chrg or __vtt_parm parameter since the expression won't be a constant expression. Note that in the test case, the constructor is not constexpr-suitable, however it's OK since it's a template according to my read of paragraph (3) of [dcl.constexpr]. PR c++/116722 gcc/cp/ChangeLog: * constexpr.cc (cxx_bind_parameters_in_call): Leave early for {con,de}structors of classes with virtual bases. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/constexpr-ctor22.C: New test.
2024-09-23Add myself to write after approvalSaurabh Jha1-0/+1
ChangeLog: * MAINTAINERS: Add myself to write after approval.
2024-09-23tree-optimization/116810 - out-of-bound access to matches[]Richard Biener1-1/+1
The following makes sure to apply forced splitting of groups for firced single-lane SLP only when the group being analyzed has more than one lane. This avoids an out-of-bound access to matches[]. PR tree-optimization/116810 * tree-vect-slp.cc (vect_build_slp_instance): Onlu force splitting for group_size > 1.
2024-09-23tree-optimization/116796 - virtual LC SSA broken after unrollingRichard Biener1-4/+6
When the unroller unloops loops it tracks whether it changes any nesting relationship of remaining loops but when scanning a loops preheader it fails to pass down the LC-SSA-invalidated bitmap, losing the fact that an unrolled formerly inner loop can now be placed on an exit of its outer loop. The following fixes that. PR tree-optimization/116796 * cfgloopmanip.cc (fix_loop_placements): Get LC-SSA-invalidated bitmap and pass it on. (remove_path): Pass LC-SSA-invalidated to fix_loop_placements.
2024-09-23middle-end: Insert invariant instructions before the gsi [PR116812]Tamar Christina2-4/+19
The new invariant statements should be inserted before the current statement and not after. This goes fine 99% of the time but when the current statement is a gcond the control flow gets corrupted. gcc/ChangeLog: PR tree-optimization/116812 * tree-vect-slp.cc (vect_slp_region): Fix insertion. gcc/testsuite/ChangeLog: PR tree-optimization/116812 * gcc.dg/vect/pr116812.c: New test.
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