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2023-01-24tree-optimization/108500 - avoid useless fast-query compute in CFG cleanupRichard Biener3-6/+11
CFG cleanup computes dominators before the loop over blocks looking for merging opportunities. That computes also the fast-query DFS numbers but that's a bit pointless since any CFG cleanup will invalidate them immediately (they are re-computed before fixing up loops). The following avoids this and fixes the SIGSEGV due to the deep recursion in assign_dfs_numbers after inlining very many small functions. PR tree-optimization/108500 * dominance.h (calculate_dominance_info): Add parameter to indicate fast-query compute, defaulted to true. * dominance.cc (calculate_dominance_info): Honor fast-query compute parameter. * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do not compute the dominator fast-query DFS numbers.
2023-01-24options: fix cl_target_option_print_diff() with stringsEric Biggers1-1/+1
Fix an obvious copy-and-paste error where ptr1 was used instead of ptr2. This bug caused the dump file produced by -fdump-ipa-inline-details to not correctly show the difference in target options when a function could not be inlined due to a target option mismatch. gcc/ChangeLog: PR bootstrap/90543 * optc-save-gen.awk: Fix copy-and-paste error. Signed-off-by: Eric Biggers <ebiggers@google.com>
2023-01-24c++: Handle structured bindings like anon unions in initializers [PR108474]Jakub Jelinek4-10/+78
As reported by Andrew Pinski, structured bindings (with the exception of the ones using std::tuple_{size,element} and get which are really standalone variables in addition to the binding one) also use DECL_VALUE_EXPR and needs the same treatment in static initializers. On Sun, Jan 22, 2023 at 07:19:07PM -0500, Jason Merrill wrote: > Though, actually, why not instead fix expand_expr_real_1 (and staticp) to > look through DECL_VALUE_EXPR? Doing it when emitting the initializers seems to be too late to me, we in various spots try to put parts of the static var DECL_INITIAL expressions into the IL, or e.g. for varpool purposes remember which vars are referenced there. This patch moves it to record_reference, which is called from varpool_node::analyze and so about the same time as gimplification of the bodies which also replaces DECL_VALUE_EXPRs. 2023-01-24 Jakub Jelinek <jakub@redhat.com> PR c++/108474 * cgraphbuild.cc: Include gimplify.h. (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with their corresponding DECL_VALUE_EXPR expressions after unsharing. * cp-gimplify.cc (cp_fold_r): Revert 2023-01-19 changes. * g++.dg/cpp1z/decomp57.C: New test. * g++.dg/cpp1z/decomp58.C: New test.
2023-01-24arm: Fix inclusion of arm-mlib.h header more than once (pr108505).Srinath Parvathaneni1-1/+1
The patch fixes the build issue for arm-none-eabi target configured with --with-multilib-list=aprofile,rmprofile, in which case the header file arm/arm-mlib.h is being included more than once and the toolchain build is failing (PR108505). gcc/ChangeLog: 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com> PR target/108505 * config.gcc (tm_file): Move the variable out of loop.
2023-01-24testsuite: Fix gcc.dg/vect/vect-bitfield-write-[23].c on SPARC [PR107808]Rainer Orth2-0/+2
The gcc.dg/vect/vect-bitfield-write-[23].c tests FAIL on 32 and 64-bit SPARC: FAIL: gcc.dg/vect/vect-bitfield-write-2.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorized 1 loops" 1 FAIL: gcc.dg/vect/vect-bitfield-write-2.c scan-tree-dump-times vect "vectorized 1 loops" 1 FAIL: gcc.dg/vect/vect-bitfield-write-3.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorized 1 loops" 1 FAIL: gcc.dg/vect/vect-bitfield-write-3.c scan-tree-dump-times vect "vectorized 1 loops" 1 As discussed in the PR, they require vect_long_long support, but fail to require that. This patch fixes this. Tested on sparc-sun-solaris2.11 and i386-pc-solaris2.11. 2023-01-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> gcc/testsuite: PR testsuite/107808 * gcc.dg/vect/vect-bitfield-write-2.c: Require vect_long_long. * gcc.dg/vect/vect-bitfield-write-3.c: Likewise.
2023-01-24testsuite: Fix gcc.dg/vect/vect-fmax-1.c etc. on SPARC [PR104756]Rainer Orth6-0/+12
The gcc.dg/vect/vect-fmax-?.c etc. tests FAIL on 32 and 64-bit SPARC: FAIL: gcc.dg/vect/vect-fmax-1.c -flto -ffat-lto-objects scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmax-1.c scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmax-2.c -flto -ffat-lto-objects scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmax-2.c scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmax-3.c -flto -ffat-lto-objects scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmax-3.c scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmin-1.c -flto -ffat-lto-objects scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmin-1.c -flto -ffat-lto-objects scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmin-1.c scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmin-1.c scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmin-2.c -flto -ffat-lto-objects scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmin-2.c scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmin-3.c -flto -ffat-lto-objects scan-tree-dump vect "Detected reduction" FAIL: gcc.dg/vect/vect-fmin-3.c scan-tree-dump vect "Detected reduction" As discussed in the PR, they require vect_float support, but the tests don't declare it. This patch fixes this. Tested on sparc-sun-solaris2.11 and i386-pc-solaris2.11. 2023-01-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> gcc/testsuite: PR testsuite/104756 * gcc.dg/vect/vect-fmax-1.c: Require vect_float. * gcc.dg/vect/vect-fmax-2.c: Likewise. * gcc.dg/vect/vect-fmax-3.c: Likewise. * gcc.dg/vect/vect-fmin-1.c: Likewise. * gcc.dg/vect/vect-fmin-2.c: Likewise. * gcc.dg/vect/vect-fmin-3.c: Likewise.
2023-01-24LoongArch: Fixed a compilation failure with '%c' in inline assembly [PR107731].Lulu Cheng3-7/+64
Co-authored-by: Yang Yujie <yangyujie@loongson.cn> PR target/107731 gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_classify_address): Add precessint for CONST_INT. (loongarch_print_operand_reloc): Operand modifier 'c' is supported. (loongarch_print_operand): Increase the processing of '%c'. * doc/extend.texi: Adds documents for LoongArch operand modifiers. And port the public operand modifiers information to this document. gcc/testsuite/ChangeLog: * gcc.target/loongarch/tst-asm-const.c: Moved to... * gcc.target/loongarch/pr107731.c: ...here.
2023-01-23c++: TARGET_EXPR collapsing [PR107303]Jason Merrill3-3/+52
In r13-2978 I tried to eliminate TARGET_EXPR around TARGET_EXPR by discarding the outer one, but as in this testcase that breaks if the TARGET_EXPR_SLOT of the outer one is used elsewhere. But it should always be safe to strip the inner one; if its slot were reused, there would be a COMPOUND_EXPR around the TARGET_EXPR. For 107329, if we're setting *walk_subtrees, we also need to fold TARGET_EXPR_CLEANUP. PR c++/107303 PR c++/107329 gcc/cp/ChangeLog: * cp-gimplify.cc (cp_fold_r) [TARGET_EXPR]: In case of double TARGET_EXPR, keep the outer one instead of the inner one. (maybe_replace_decl): New. gcc/testsuite/ChangeLog: * g++.dg/ext/builtin-shufflevector-5.C: New test. * g++.dg/init/new51.C: New test.
2023-01-24Daily bump.GCC Administrator10-1/+495
2023-01-23c++: TARGET_EXPR_ELIDING_P and std::move [PR107267]Jason Merrill2-1/+18
With -ffold-simple-inlines, we turn calls to std::move into the static_cast equivalent. In this testcase, this exposes the FindResult temporary to copy elision which is not specified by the standard, through an optimization in gimplify_modify_expr_rhs. Since the type is not TREE_ADDRESSABLE, this is not detectable by the user, so we just need to soften the assert. PR c++/107267 gcc/cp/ChangeLog: * cp-gimplify.cc (cp_gimplify_init_expr): Allow unexpected elision of trivial types. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/move2.C: New test.
2023-01-23Fortran: fix NULL pointer dereference in gfc_check_dependency [PR108502]Harald Anlauf2-0/+17
gcc/fortran/ChangeLog: PR fortran/108502 * dependency.cc (gfc_check_dependency): Prevent NULL pointer dereference while recursively checking expressions. gcc/testsuite/ChangeLog: PR fortran/108502 * gfortran.dg/pr108502.f90: New test.
2023-01-23c++: Quash bogus -Wunused-value with new [PR107797]Marek Polacek3-2/+18
We shouldn't emit "right operand of comma operator has no effect" when that comma operator was created by the compiler for "new int{}". convert_to_void/COMPOUND_EXPR already checks warning_suppressed_p so we can just suppress -Wunused-value. PR c++/107797 gcc/cp/ChangeLog: * cvt.cc (ocp_convert): copy_warning when creating a new COMPOUND_EXPR. * init.cc (build_new_1): Suppress -Wunused-value on compiler-generated COMPOUND_EXPRs. gcc/testsuite/ChangeLog: * g++.dg/warn/Wunused-value-1.C: New test.
2023-01-23c++: vector of class with bool ctor [PR108195]Jason Merrill2-1/+17
The transformation done by r13-4564 to use the iterator constructor instead of the initializer-list constructor breaks if the iterator pointers are themselves treated as elements of an initializer-list, so check for that. PR c++/108195 gcc/cp/ChangeLog: * call.cc (build_user_type_conversion_1): Check whether the iterators also find a list ctor. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/initlist-vect2.C: New test.
2023-01-23Fortran: avoid ICE on invalid array subscript triplets [PR108501]Harald Anlauf2-7/+30
gcc/fortran/ChangeLog: PR fortran/108501 * interface.cc (get_expr_storage_size): Check array subscript triplets that we actually have integer values before trying to extract with mpz_get_si. gcc/testsuite/ChangeLog: PR fortran/108501 * gfortran.dg/pr108501.f90: New test.
2023-01-23Fortran: fix ICE in check_charlen_present [PR108420]Harald Anlauf2-3/+16
gcc/fortran/ChangeLog: PR fortran/108420 * iresolve.cc (check_charlen_present): Preserve character length if there is no array constructor. gcc/testsuite/ChangeLog: PR fortran/108420 * gfortran.dg/pr108420.f90: New test.
2023-01-23c++: result location and explicit inst [PR108496]Jason Merrill2-1/+20
In r13-4469 we started to build the RESULT_DECL in grokdeclarator, while we still know the location of the return type. But in this testcase, we hit that code again when parsing the explicit instantiation, and clobber the DECL_RESULT that was previously used in parsing the function. So, only set DECL_RESULT if it isn't already set. PR c++/108496 gcc/cp/ChangeLog: * decl.cc (grokdeclarator): Check whether DECL_RESULT is already set. gcc/testsuite/ChangeLog: * g++.dg/template/explicit-instantiation5.C: New test.
2023-01-23libstdc++: [_GLIBCXX_DEBUG] Remove useless constructor checksFrançois Dumont3-16/+87
Creating a safe iterator from a normal iterator is done within the library where we already know that it is done correctly. The rare situation where a user would use safe iterators for his own purpose is non-Standard code so outside _GLIBCXX_DEBUG scope. For those reasons the __msg_init_singular is useless and can be removed. Additionally in the copy constructor used for post-increment and post-decrement operators the __msg_init_copy_singular check can also be ommitted because of the preliminary __msg_bad_incr and __msg_bad_decr checks. libstdc++-v3/ChangeLog: * include/debug/safe_iterator.h (_Safe_iterator<>::_Unchecked): New. (_Safe_iterator(const _Safe_iterator&, _Unchecked)): New. (_Safe_iterator::operator++(int)): Use latter. (_Safe_iterator::operator--(int)): Likewise. (_Safe_iterator(_Iterator, const _Safe_sequence_base*)): Remove !_M_insular() check. * include/debug/safe_local_iterator.h (_Safe_local_iterator<>::_Unchecked): New. (_Safe_local_iterator(const _Safe_local_iterator&, _Unchecked)): New. (_Safe_local_iterator::operator++(int)): Use latter. * src/c++11/debug.cc (_S_debug_messages): Add as comment the _Debug_msg_id entry associated to the array entry.
2023-01-23modula-2, driver, Front end: Revise handling of I and L paths [PR108182].Iain Sandoe5-270/+304
The adds the includes in the FE as done in other GCC languages. It also revises the library handling to avoid additional -L options from hiding LIBDIR. For the include/import paths as presented to the front end initialisation, we capture them and then arrange to emit the 'standard library' paths in the same order as specified for C. The specs are tidied up. The use of the internal prefix also fixes searching in a relocated compiler. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> PR modula2/108182 PR modula2/108480 gcc/m2/ChangeLog: * Make-lang.in: Pass libsubdir to the language init build. * gm2-lang.cc (INCLUDE_VECTOR): Define. (add_one_import_path): New. (add_m2_import_paths): New. (gm2_langhook_post_options): Arrange to add the include paths (and add the system ones) in the same order as C uses. * gm2spec.cc (build_archive_path): Remove. (add_default_combination): Remove. (add_default_archives): Remove. (add_default_libs): We no longer need a '-L' option, just emit the -l and each library in use. (build_include_path): Remove. (add_include): Remove. (add_default_includes): Remove. (library_installed): Remove. (check_valid_library): Remove. (check_valid_list): Remove. (convert_abbreviation): Diagnose unhandled cases. (lang_specific_driver): Skip options where we will add back a validated version. * lang-specs.h (M2CPP): Reformat, append %I when -fcpp is not in use. Revise the cc1gm2 spec to omit mentioning options that are handled in the c pre-processor line. * lang.opt: Allow preprocessing and path options as input to the cc1gm2 invocation, so that they can be passed to the preprocessor invocation.
2023-01-23modula-2: Fix stack size request in initPreemptive [PR108405]Iain Sandoe1-1/+4
As noted in the PR, the problem is that we make a request for additional stack that violates the constraints on some systems. This patch chooses a value that is divisible by common OS page sizes. TODO: the user value should be checked and then an exception thrown if it is not suitable. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> PR modula2/108405 gcc/m2/ChangeLog: * gm2-libs-iso/Preemptive.mod (initPreemptive): Use a value for extra space that is divisible by common OS pagesizes.
2023-01-23arm: Documentation fix for -mbranch-protection option.Srinath Parvathaneni1-2/+1
This patch fixes the documentation for -mbranch-protection command line option. gcc/ChangeLog: 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * doc/invoke.texi (-mbranch-protection): Update documentation.
2023-01-23sparc: Don't add crtfastmath.o for -sharedRichard Biener5-5/+5
Don't add crtfastmath.o for -shared to avoid altering the FP environment when loading a shared library. PR target/55522 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared. * config/sparc/linux.h (ENDFILE_SPEC): Likewise. * config/sparc/linux64.h (ENDFILE_SPEC): Likewise. * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise. * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
2023-01-23arm: Add support for new frame unwinding instruction "0xb5".Srinath Parvathaneni1-2/+13
This patch adds support for Arm frame unwinding instruction "0xb5" [1]. When an exception is taken and "0xb5" instruction is encounter during runtime stack-unwinding, we use effective vsp as modifier in pointer authentication. On completion of stack unwinding if "0xb5" instruction is not encountered then CFA will be used as modifier in pointer authentication. [1] https://github.com/ARM-software/abi-aa/releases/download/2022Q3/ehabi32.pdf libgcc/ChangeLog: 2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * config/arm/pr-support.c (__gnu_unwind_execute): Decode opcode "0xb5".
2023-01-23arm: Add support for dwarf debug directives and pseudo hard-register for PAC ↵Srinath Parvathaneni6-21/+160
feature. This patch teaches the DWARF support in gcc about RA_AUTH_CODE pseudo hard-register and also updates the ".save", ".cfi_register", ".cfi_offset", ".cfi_restore" directives accordingly. This patch also adds support to emit ".pacspval" directive when "pac ip, lr, sp" instruction in generated in the assembly. RA_AUTH_CODE register number is 107 and it's dwarf register number is 143. Applying this patch on top of PACBTI series posted here https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599658.html and when compiling the following test.c with "-march=armv8.1-m.main+mve+pacbti -mbranch-protection=pac-ret -mthumb -mfloat-abi=hard fasynchronous-unwind-tables -g -O0 -S" command line options, the assembly output after this patch looks like below: $cat test.c void fun1(int a); void fun(int a,...) { fun1(a); } int main() { fun (10); return 0; } $ arm-none-eabi-gcc -march=armv8.1-m.main+mve+pacbti -mbranch-protection=pac-ret -mthumb -mfloat-abi=hard -fasynchronous-unwind-tables -g -O0 -S test.s Assembly output: ... fun: ... .pacspval pac ip, lr, sp .cfi_register 143, 12 push {r3, r7, ip, lr} .save {r3, r7, ra_auth_code, lr} ... .cfi_offset 143, -24 ... .cfi_restore 143 ... aut ip, lr, sp bx lr ... main: ... .pacspval pac ip, lr, sp .cfi_register 143, 12 push {r3, r7, ip, lr} .save {r3, r7, ra_auth_code, lr} ... .cfi_offset 143, -8 ... .cfi_restore 143 ... aut ip, lr, sp bx lr ... gcc/ChangeLog: 2023-01-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * config/arm/aout.h (ra_auth_code): Add entry in enum. * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register to dwarf frame expression. (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register. (arm_expand_prologue): Update frame related information and reg notes for pac/pacbit insn. (arm_regno_class): Check for pac pseudo reigster. (arm_dbx_register_number): Assign ra_auth_code register number in dwarf. (arm_init_machine_status): Set pacspval_needed to zero. (arm_debugger_regno): Check for PAC register. (arm_unwind_emit_sequence): Print .save directive with ra_auth_code register. (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case. (arm_unwind_emit): Update REG_CFA_REGISTER case._ * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify. (DWARF_PAC_REGNUM): Define. (IS_PAC_REGNUM): Likewise. (enum reg_class): Add PAC_REG entry. (machine_function): Add pacbti_needed state to structure. * config/arm/arm.md (RA_AUTH_CODE): Define. gcc/testsuite/ChangeLog: 2023-01-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * g++.target/arm/pac-1.C: New test. * gcc.target/arm/pac-15.c: Likewise.
2023-01-23arm: Add pacbti related multilib support for armv8.1-m.main.Srinath Parvathaneni7-18/+106
This patch adds the support for pacbti multlilib linking by making "-mbranch-protection=none" as default multilib option for arm-none-eabi target. Eg 1. If the passed command line flags are (without mbranch-protection): a) -march=armv8.1-m.main+mve -mfloat-abi=hard -mfpu=auto "-mbranch-protection=none" will be used in the multilib matching. Eg 2. If the passed command line flags are (with mbranch-protection): a) -march=armv8.1-m.main+mve+pacbti -mfloat-abi=hard -mfpu=auto -mbranch-protection=pac-ret "-mbranch-protection=standard" will be used in the multilib matching. gcc/ChangeLog: 2023-01-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * config.gcc ($tm_file): Update variable. * config/arm/arm-mlib.h: Create new header file. * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection multilib arch directory. (MULTILIB_REUSE): Add multilib reuse rules. (MULTILIB_MATCHES): Add multilib match rules. gcc/testsuite/ChangeLog: 2023-01-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * gcc.target/arm/multilib.exp (multilib_config "rmprofile"): Update tests. * gcc.target/arm/pac-12.c: New test. * gcc.target/arm/pac-13.c: Likewise. * gcc.target/arm/pac-14.c: Likewise.
2023-01-23arm: Add support for Arm Cortex-M85 CPU.Srinath Parvathaneni5-16/+64
This patch adds the -mcpu support for the Arm Cortex-M85 CPU which is an Armv8.1-M Mainline CPU supporting MVE and PACBTI by default. -mpcu=cortex-m85 switch by default matches to -march=armv8.1-m.main+pacbti+mve.fp+fp.dp. Also following options are provided to disable default features. +nomve.fp (disables MVE Floating point) +nomve (disables MVE Integer and MVE Floating point) +nodsp (disables dsp, MVE Integer and MVE Floating point) +nopacbti (disables pacbti) +nofp (disables floating point and MVE floating point) gcc/ChangeLog: 2022-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * config/arm/arm-cpus.in (cortex-m85): Define new CPU. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Likewise. * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85. * (-mfix-cmse-cve-2021-35465): Likewise. gcc/testsuite/ChangeLog: 2022-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * gcc.target/arm/multilib.exp: Add tests for cortex-m85.
2023-01-23tree-optimization/108482 - remove stray .LOOP_DIST_ALIAS callsRichard Biener2-0/+26
The following deals with .LOOP_DIST_ALIAS surviving vectorization because any of the loops involved were elided between loop distribution and vectorization. As opposed to .LOOP_VECTORIZED which exists only between if-conversion and vectorization with no intermediate passes this is more difficult to deal with in advance and thus cleaning up after vectorization looks better. There's the unconditional vector lowering pass which looks like a good place for this (for SIMD uid we have pass_simduid_cleanup). PR tree-optimization/108482 * tree-vect-generic.cc (expand_vector_operations): Fold remaining .LOOP_DIST_ALIAS calls. * gcc.dg/torture/pr108482.c: New testcase.
2023-01-23[PATCH 12/15] arm: implement bti injectionAndrea Corallo12-4/+181
Hi all, this patch enables Branch Target Identification Armv8.1-M Mechanism [1]. This is achieved by using the bti pass made common with Aarch64. The pass iterates through the instructions and adds the necessary BTI instructions at the beginning of every function and at every landing pads targeted by indirect jumps. Best Regards Andrea [1] <https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension> gcc/ChangeLog 2022-04-07 Andrea Corallo <andrea.corallo@arm.com> * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object. * config/arm/arm-protos.h: Update. * config/arm/aarch-common-protos.h: Declare 'aarch_bti_arch_check'. * config/arm/arm.cc (aarch_bti_enabled) Update. (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c) (aarch_gen_bti_j, aarch_bti_arch_check): New functions. * config/arm/arm.md (bti_nop): New insn. * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'. (aarch-bti-insert.o): New target. * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec. * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch compatibility. (gate): Make use of 'aarch_bti_arch_check'. * config/arm/arm-passes.def: New file. * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function. gcc/testsuite/ChangeLog 2022-04-07 Andrea Corallo <andrea.corallo@arm.com> * gcc.target/arm/bti-1.c: New testcase. * gcc.target/arm/bti-2.c: Likewise.
2023-01-23[PATCH 11/15] aarch64: Make bti pass generic so it can be used by the arm ↵Andrea Corallo7-62/+77
backend Hi all, this patch splits and restructures the aarch64 bti pass code in order to have it usable by the arm backend as well. These changes have no functional impact. Best Regards Andrea gcc/Changelog * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into 'aarch-bti-insert.o'. * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled' proto. * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename. (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions. (aarch64_output_mi_thunk) (aarch64_print_patchable_function_entry) (aarch64_file_end_indicate_exec_stack): Update renamed function calls to renamed functions. * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise. * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update target. * config/aarch64/aarch64-bti-insert.cc: Delete. * config/arm/aarch-bti-insert.cc: New file including and generalizing code from aarch64-bti-insert.cc. * config/arm/aarch-common-protos.h: Update.
2023-01-23[PATCH 10/15] arm: Implement cortex-M return signing address codegenAndrea Corallo17-9/+305
Hi all, this patch enables address return signature and verification based on Armv8.1-M Pointer Authentication [1]. To sign the return address, we use the PAC R12, LR, SP instruction upon function entry. This is signing LR using SP and storing the result in R12. R12 will be pushed into the stack. During function epilogue R12 will be popped and AUT R12, LR, SP will be used to verify that the content of LR is still valid before return. Here an example of PAC instrumented function prologue and epilogue: void foo (void); int main() { foo (); return 0; } Compiled with '-march=armv8.1-m.main -mbranch-protection=pac-ret -mthumb' translates into: main: pac ip, lr, sp push {r3, r7, ip, lr} add r7, sp, #0 bl foo movs r3, #0 mov r0, r3 pop {r3, r7, ip, lr} aut ip, lr, sp bx lr The patch also takes care of generating a PACBTI instruction in place of the sequence BTI+PAC when Branch Target Identification is enabled contextually. Ex. the previous example compiled with '-march=armv8.1-m.main -mbranch-protection=pac-ret+bti -mthumb' translates into: main: pacbti ip, lr, sp push {r3, r7, ip, lr} add r7, sp, #0 bl foo movs r3, #0 mov r0, r3 pop {r3, r7, ip, lr} aut ip, lr, sp bx lr As part of previous upstream suggestions a test for varargs has been added and '-mtpcs-frame' is deemed being incompatible with this return signing address feature being introduced. [1] <https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension> gcc/ * config/arm/arm.h (arm_arch8m_main): Declare it. * config/arm/arm-protos.h (arm_current_function_pac_enabled_p): Declare it. * config/arm/arm.cc (arm_arch8m_main): Define it. (arm_option_reconfigure_globals): Set arm_arch8m_main. (arm_compute_frame_layout, arm_expand_prologue) (thumb2_expand_return, arm_expand_epilogue) (arm_conditional_register_usage): Update for pac codegen. (arm_current_function_pac_enabled_p): New function. (aarch_bti_enabled) New function. (use_return_insn): Return zero when pac is enabled. * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp): Add new patterns. * config/arm/unspecs.md (UNSPEC_PAC_NOP) (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs. gcc/testsuite/ * gcc.target/arm/pac.h : New file. * gcc.target/arm/pac-1.c : New test case. * gcc.target/arm/pac-2.c : Likewise. * gcc.target/arm/pac-3.c : Likewise. * gcc.target/arm/pac-4.c : Likewise. * gcc.target/arm/pac-5.c : Likewise. * gcc.target/arm/pac-6.c : Likewise. * gcc.target/arm/pac-7.c : Likewise. * gcc.target/arm/pac-8.c : Likewise. * gcc.target/arm/pac-9.c : Likewise. * gcc.target/arm/pac-10.c : Likewise. * gcc.target/arm/pac-11.c : Likewise.
2023-01-23[PATCH 8/15] arm: Introduce multilibs for PACBTI target featureAndrea Corallo2-2/+32
This patch add the following new multilibs. thumb/v8.1-m.main+pacbti/mbranch-protection/nofp thumb/v8.1-m.main+pacbti+dp/mbranch-protection/soft thumb/v8.1-m.main+pacbti+dp/mbranch-protection/hard thumb/v8.1-m.main+pacbti+fp/mbranch-protection/soft thumb/v8.1-m.main+pacbti+fp/mbranch-protection/hard thumb/v8.1-m.main+pacbti+mve/mbranch-protection/hard Triggering the following compiler flags: -mthumb -march=armv8.1-m.main+pacbti -mbranch-protection=standard -mfloat-abi=soft -mthumb -march=armv8.1-m.main+pacbti+fp -mbranch-protection=standard -mfloat-abi=softfp -mthumb -march=armv8.1-m.main+pacbti+fp -mbranch-protection=standard -mfloat-abi=hard -mthumb -march=armv8.1-m.main+pacbti+fp.dp -mbranch-protection=standard -mfloat-abi=softfp -mthumb -march=armv8.1-m.main+pacbti+fp.dp -mbranch-protection=standard -mfloat-abi=hard -mthumb -march=armv8.1-m.main+pacbti+mve -mbranch-protection=standard -mfloat-abi=hard gcc/ * config/arm/t-rmprofile: Add multilib rules for march +pacbti and mbranch-protection. gcc/testsuite/ * gcc.target/arm/multilib.exp: Add pacbti related entries.
2023-01-23[PATCH 7/15] arm: Emit build attributes for PACBTI target featureAndrea Corallo5-0/+85
This patch emits assembler directives for PACBTI build attributes as defined by the ABI. <https://github.com/ARM-software/abi-aa/releases/download/2021Q1/addenda32.pdf> gcc/ChangeLog: * config/arm/arm.cc (arm_file_start): Emit EABI attributes for Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use. gcc/testsuite/ChangeLog: * gcc.target/arm/acle/pacbti-m-predef-1.c: New test. * gcc.target/arm/acle/pacbti-m-predef-3.c: Likewise. * gcc.target/arm/acle/pacbti-m-predef-6.c: Likewise. * gcc.target/arm/acle/pacbti-m-predef-7.c: Likewise. Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
2023-01-23[PATCH 6/15] arm: Add pointer authentication for stack-unwinding runtimeAndrea Corallo3-1/+62
This patch adds authentication for when the stack is unwound when an exception is taken. All the changes here are done to the runtime code in libgcc's unwinder code for Arm target. All the changes are guarded under defined (__ARM_FEATURE_PAC_DEFAULT) and activated only if the +pacbti feature is switched on for the architecture. This means that switching on the target feature via -march or -mcpu is sufficient and -mbranch-protection need not be enabled. This ensures that the unwinder is authenticated only if the PACBTI instructions are available in the non-NOP space as it uses AUTG. Just generating PAC/AUT instructions using -mbranch-protection will not enable authentication on the unwinder. Pre-approved with the requested changes here <https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586555.html>. gcc/ChangeLog: * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce new pseudo register class _UVRSC_PAC. libgcc/ChangeLog: * config/arm/pr-support.c (__gnu_unwind_execute): Decode exception opcode (0xb4) for saving RA_AUTH_CODE and authenticate with AUTG if found. * config/arm/unwind-arm.c (struct pseudo_regs): New. (phase1_vrs): Introduce new field to store pseudo-reg state. (phase2_vrs): Likewise. (_Unwind_VRS_Get): Load pseudo register state from virtual reg set. (_Unwind_VRS_Set): Store pseudo register state to virtual reg set. (_Unwind_VRS_Pop): Load pseudo register value from stack into VRS. Co-Authored-By: Tejas Belagod <tbelagod@arm.com> Co-Authored-By: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2023-01-23[PATCH 5/15] arm: Implement target feature macros for PACBTIAndrea Corallo10-0/+153
This patch implements target feature macros when PACBTI is enabled through the -march option or -mbranch-protection. The target feature macros __ARM_FEATURE_PAC_DEFAULT and __ARM_FEATURE_BTI_DEFAULT are specified in ARM ACLE <https://developer.arm.com/documentation/101028/0012/5--Feature-test-macros?lang=en> __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI are specified in the pull-request <https://github.com/ARM-software/acle/pull/55>. Approved here <https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586334.html>. gcc/ * config/arm/arm-c.cc (arm_cpu_builtins): Define __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT, __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI. gcc/testsuite/ * lib/target-supports.exp (check_effective_target_mbranch_protection_ok): New function. * gcc.target/arm/acle/pacbti-m-predef-2.c: New test. * gcc.target/arm/acle/pacbti-m-predef-4.c: Likewise. * gcc.target/arm/acle/pacbti-m-predef-5.c: Likewise. * gcc.target/arm/acle/pacbti-m-predef-8.c: Likewise. * gcc.target/arm/acle/pacbti-m-predef-9.c: Likewise. * gcc.target/arm/acle/pacbti-m-predef-10.c: Likewise. * gcc.target/arm/acle/pacbti-m-predef-11.c: Likewise. * gcc.target/arm/acle/pacbti-m-predef-12.c: Likewise. Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
2023-01-23[PATCH 4/15] arm: Add testsuite library support for PACBTI targetAndrea Corallo2-0/+26
Add targeting-checking entities for PACBTI in testsuite framework. Pre-approved with the requested changes here <https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586331.html>. gcc/testsuite/ChangeLog * lib/target-supports.exp: (check_effective_target_arm_pacbti_hw): New. gcc/ChangeLog: * doc/sourcebuild.texi: Document arm_pacbti_hw. Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
2023-01-23[PATCH 3/15] arm: Add option -mbranch-protectionAndrea Corallo3-1/+52
Add -mbranch-protection option. This option enables the code-generation of pointer signing and authentication instructions in function prologues and epilogues. gcc/ChangeLog: * config/arm/arm.cc (arm_configure_build_target): Parse and validate -mbranch-protection option and initialize appropriate data structures. * config/arm/arm.opt (-mbranch-protection): New option. * doc/invoke.texi (Arm Options): Document it. Co-Authored-By: Tejas Belagod <tbelagod@arm.com> Co-Authored-By: Richard Earnshaw <Richard.Earnshaw@arm.com>
2023-01-23[PATCH 2/15] arm: Add Armv8.1-M Mainline target feature +pacbtiAndrea Corallo3-0/+14
This patch adds the -march feature +pacbti to Armv8.1-M Mainline. This feature enables pointer signing and authentication instructions on M-class architectures. Pre-approved here <https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586144.html>. gcc/Changelog: * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro. * config/arm/arm-cpus.in (pacbti): New feature. * doc/invoke.texi (Arm Options): Document it. Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
2023-01-23[PATCH 1/15] arm: Make mbranch-protection opts parsing common to AArch32/64Andrea Corallo13-321/+390
Hi all, This change refactors all the mbranch-protection option parsing code and types to make it common to both AArch32 and AArch64 backends. This change also pulls in some supporting types from AArch64 to make it common (aarch_parse_opt_result). The significant changes in this patch are the movement of all branch protection parsing routines from aarch64.c to aarch-common.c and supporting data types and static data structures. This patch also pre-declares variables and types required in the aarch32 back-end for moved variables for function sign scope and key to prepare for the impending series of patches that support parsing the feature mbranch-protection in the aarch32 back-end. gcc/ChangeLog: * common/config/aarch64/aarch64-common.cc: Include aarch-common.h. (all_architectures): Fix comment. (aarch64_parse_extension): Rename return type, enum value names. * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename factored out aarch_ra_sign_scope and aarch_ra_sign_key variables. Also rename corresponding enum values. * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor out aarch64_function_type and move it to common code as aarch_function_type in aarch-common.h. * config/aarch64/aarch64-protos.h: Include common types header, move out types aarch64_parse_opt_result and aarch64_key_type to aarch-common.h * config/aarch64/aarch64.cc: Move mbranch-protection parsing types and functions out into aarch-common.h and aarch-common.cc. Fix up all the name changes resulting from the move. * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change and enum value. * config/aarch64/aarch64.opt: Include aarch-common.h to import type move. Fix up name changes from factoring out common code and data. * config/arm/aarch-common-protos.h: Export factored out routines to both backends. * config/arm/aarch-common.cc: Include newly factored out types. Move all mbranch-protection code and data structures from aarch64.cc. * config/arm/aarch-common.h: New header that declares types shared between aarch32 and aarch64 backends. * config/arm/arm-protos.h: Declare types and variables that are made common to aarch64 and aarch32 backends - aarch_ra_sign_key, aarch_ra_sign_scope and aarch_enable_bti. * config/arm/arm.opt (config/arm/aarch-common.h): Include header. (aarch_ra_sign_scope, aarch_enable_bti): Declare variable. * config/arm/arm.cc: Add missing includes. Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
2023-01-23modula2/108144 - fix mistake in previous changeRichard Biener10-92/+92
The previous change to avoid a duplicate multi directory caused the m2/m2{cor,iso,log,min,pim} installs to happen relative to the main library directory when not using --enable-version-specific-runtime-libs which doesn't match the drivers expectation where to find them. The following fixes the original issue by simply dropping the duplicate multi directory since the one in the $(inst_libdir) variable now works. Tested by building and installing with and without --enable-version-specific-runtime-libs and compiling and linking a modula-2 testcase successfully with the installed compilers. PR modula2/108144 libgm2/ * libm2cor/Makefile.am: Revert previous change, instead drop the redundant $(MULTIDIR). * libm2iso/Makefile.am: Likewise. * libm2log/Makefile.am: Likewise. * libm2min/Makefile.am: Likewise. * libm2pim/Makefile.am: Likewise. * libm2cor/Makefile.in: Regenerate. * libm2iso/Makefile.in: Likewise. * libm2log/Makefile.in: Likewise. * libm2min/Makefile.in: Likewise. * libm2pim/Makefile.in: Likewise.
2023-01-23libgomp.texi: Impl. status - non-rect loop nest only partialTobias Burnus1-1/+1
libgomp/ * libgomp.texi (OpenMP 5.0): Set non-rectangular loop nest back to 'P' as Fortran support is incomplete.
2023-01-23install.texi: Bump newlib version for nvptx + gcnTobias Burnus1-2/+2
Before, newlib 3.2 was required for amdgcn and 3.1 for nvptx. Now recommended is 4.3.0 which was just released on 2023-01-20. While currently the old versions would work fine, upcoming GCC changes depend on a newer newlib. Thus, the minimal version is bumped instead of just recommending the new version. For GCN, the bump is in preparation for permitting non-threadlocal stack variables and vectorized math functions - both scheduled for GCC 13 and added to newlib in 4.3.0. For nvptx, this includes an emulated clock (commit 6bb96d13a), a calloc fix (5fca4e0f1) and changes to permit libgfortran to be compiled with I/O support instead of only in minimal mode. (Patch approved for GCC 13 but pending on a nvtpx patch, which for which review is pending.) gcc/ChangeLog: * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
2023-01-23tree-optimization/108449 - keep maybe_special_function_p behaviorRichard Biener2-2/+5
When we have a static declaration without definition we diagnose that and turn it into an extern declaration. That can alter the outcome of maybe_special_function_p here and there's really no point in doing that, so don't. PR tree-optimization/108449 * cgraphunit.cc (check_global_declaration): Do not turn undefined statics into externs. * gcc.dg/pr108449.c: New testcase.
2023-01-23modula2/108144 - Fix multilib install of libgm2Richard Biener14-113/+183
The following adjusts libgm2 to properly use the multilib build infrastructure, thereby fixing the install with --enable-version-specific-runtime-libs In particular config-ml.pl needs to be applied to generated Makefiles as documented in the manual and we have to avoid clobbering the variables via make arguments. The explicit install rules used different ways to construct the multilib dir which isn't necessary and breaks when MUTLIDIR is now finally set correctly. Instead use $(toolexeclibdir). This results in some dead variables in the Makefile.am (and there were some before), I refrained from doing even more changes here. Verified with an install with and without --enable-version-specific-runtime-libs and checking the result. PR modula2/108144 libgm2/ * configure.ac: Apply config-ml.pl to the generated Makefiles. Set multilib_arg, use AM_PROG_LIBTOOL. * configure: Regenerate. * Makefile.am (AM_MAKEFLAGS): Do not override MULTI* flags. * Makefile.in: Regenerate. * libm2cor/Makefile.am: Install to $(toolexeclibdir)$(M2LIBDIR) rather than $(inst_libdir)/$(MULTIDIR)$(M2LIBDIR). * libm2iso/Makefile.am: Likewise. * libm2log/Makefile.am: Likewise. * libm2min/Makefile.am: Likewise. * libm2pim/Makefile.am: Likewise. * libm2cor/Makefile.in: Regenerate. * libm2iso/Makefile.in: Likewise. * libm2log/Makefile.in: Likewise. * libm2min/Makefile.in: Likewise. * libm2pim/Makefile.in: Likewise.
2023-01-22c++: lifetime extension with .* expression [PR53288]Jason Merrill2-0/+77
This PR points out a case where we are not extending the lifetime of a temporary when the subobject is denoted by a pointer-to-member operation. These rules were clarified in C++20 by CWG1299. There are other cases that also need to be handled under CWG1299, but are not fixed by this patch. PR c++/53288 DR 1299 gcc/cp/ChangeLog: * call.cc (extend_ref_init_temps_1): Handle ptrmem expression. gcc/testsuite/ChangeLog: * g++.dg/init/lifetime4.C: New test.
2023-01-23Daily bump.GCC Administrator4-1/+55
2023-01-22Modula-2, testsuite: Remove use of concatenated paths.Iain Sandoe26-176/+200
The original implementation for Modula-2 search paths allows things like '-I/path/a:/path/b'. Such paths are not compatible with the rest of the compiler (in particular, the preprocessor, which Modula-2 uses). In preparation for removing that idiom, this patch rewrites the cases in the testsuite and removes string processing where possible from lists of paths. TODO: There are some apparent discrepancies and/or extraneous insertions of partial include paths (especially in gm2_init_log, gm2_init_iso and gm2_init_pim) - to be handled in some future patch. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> gcc/testsuite/ChangeLog: * gm2/case/pass/case-pass.exp: Update for removal of concatenated paths. * gm2/complex/pass/complex-pass.exp: Likewise. * gm2/coroutines/pim/run/pass/coroutines-pim-run-pass.exp: Likewise. * gm2/iso/analysis/fail/iso-analysis-fail.exp: Likewise. * gm2/iso/check/fail/iso-check-fail.exp: Likewise. * gm2/iso/fail/iso-fail.exp: Likewise. * gm2/iso/pass/iso-pass.exp: Likewise. * gm2/isolib/run/pass/isolib-run-pass.exp: Likewise. * gm2/pim/fail/pim-fail.exp: Likewise. * gm2/pim/pass/pim-pass.exp: Likewise. * gm2/pimlib/logitech/run/pass/pimlib-logitech-run-pass.exp: Likewise. * gm2/pimlib/pass/pimlib-pass.exp: Likewise. * gm2/pimlib/run/pass/pimlib-run-pass.exp: Likewise. * gm2/projects/iso/run/pass/halma/projects-iso-run-pass-halma.exp: Likewise. * gm2/projects/iso/run/pass/hello/projects-iso-run-pass-hello.exp: Likewise. * gm2/projects/log/run/pass/hello/projects-log-run-pass-hello.exp: Likewise. * gm2/projects/pim/run/pass/hello/projects-pim-run-pass-hello.exp: Likewise. * gm2/recover/pass/recover-pass.exp: Likewise. * gm2/switches/makeall/fail/switches-makeall-fail.exp: Likewise. * gm2/switches/makeall/pass/switches-makeall-pass.exp: Likewise. * gm2/switches/none/run/pass/gm2-none.exp: Likewise. * gm2/switches/pim2/run/pass/switches-pim2-run-pass.exp: Likewise. * gm2/ulmlib/pass/ulmlib-pass.exp: Likewise. * gm2/ulmlib/std/pass/ulmlib-std-pass.exp: Likewise. * gm2/ulmlib/sys/pass/ulmlib-sys-pass.exp: Likewise. * lib/gm2.exp: Make the paths list a mandatory entry for each gm2_init_xxx function. Remove the use of concatenated include and library paths. Remove string processing where possible.
2023-01-22pru: Fix CLZ expansion for QI and HI modesDimitar Dimitrov4-5/+74
The recent gcc.dg/tree-ssa/clz-char.c test case failed for PRU target, exposing a wrong code generation bug in the PRU backend. The "clz" pattern did not produce correct output for QI and HI input operand modes. SI mode is ok. The "clz" pattern is expanded to an LMBD instruction to get the left-most bit position having value "1". In turn, to get the correct "clz" value, that bit position must be subtracted from the MSB bit position of the input operand. The old behaviour of hard-coding 31 for MSB bit position is wrong. The LMBD instruction returns 32 if input operand is zero, irrespective of its register mode. This maps nicely for SI mode, where the "clz" pattern outputs -1. It also leads to peculiar (but valid!) output values from the "clz" pattern for QI and HI zero-valued inputs. gcc/ChangeLog: * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI and HI input modes. * config/pru/pru.md (clz): Fix generated code for QI and HI input modes. gcc/testsuite/ChangeLog: * gcc.target/pru/clz-hi-2.c: New test. * gcc.target/pru/clz-hi.c: New test. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2023-01-22[PATCH 1/2] select .rodata for const volatile variables.Cupertino Miranda1-1/+0
gcc/ * config/v850/v850.cc (v850_select_section): Put const volatile objects into read-only sections.
2023-01-22Darwin, libffi, testsuite: Ensure we pick up the convenience lib.Iain Sandoe1-0/+1
For several Darwin linker versions, the link paths are first traversed looking for shared libraries, and then again looking for archives. We want the paths to be searched for both shared and archives in order so that we will find the non-shared libffi in the testsuite (otherwise the installed version in the system will be found instead). Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> libffi/ChangeLog: * testsuite/lib/libffi.exp: Search for both shared and archive in each path in turn.
2023-01-22Daily bump.GCC Administrator4-1/+27
2023-01-21fortran: [PR102595]Jerry DeLisle4-10/+15
PR fortran/102595 gcc/fortran/ChangeLog: * data.cc (gfc_assign_data_value): Remove check for PARAMETER in DATA. * primary.cc (match_variable): Add check for PARAMETER in DATA. gcc/testsuite/ChangeLog: * gfortran.dg/pr88048.f90: Adjust for changed error message. * gfortran.dg/parameter_data0.f90: New test.
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