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2014-10-15tree-ssa-reassoc.c (optimize_range_tests_diff): Perform MINUS_EXPR in ↵Jakub Jelinek2-1/+11
unsigned type to avoid undefined behavior. * tree-ssa-reassoc.c (optimize_range_tests_diff): Perform MINUS_EXPR in unsigned type to avoid undefined behavior. From-SVN: r216252
2014-10-15* stor-layout.c (self_referential_size): Do not promote arguments.Eric Botcazou6-6/+106
From-SVN: r216249
2014-10-15invoke.texi: Update to reflect that GNU11 is the default mode for C.Marek Polacek5-5/+17
* doc/invoke.texi: Update to reflect that GNU11 is the default mode for C. * c-common.h (c_language_kind): Update comment. c-family/ * c-opts.c (c_common_init_options): Make -std=gnu11 the default for C. From-SVN: r216247
2014-10-15hash-table.c: Include bconfig.h if building for the host.Richard Biener3-0/+17
2014-10-15 Richard Biener <rguenther@suse.de> * hash-table.c: Include bconfig.h if building for the host. * hash-table.h: Do not include ggc.h on the host but just declare a few ggc allocation templates. From-SVN: r216246
2014-10-15alias_decl.cc: New.Paolo Carlini13-0/+407
2014-10-15 Paolo Carlini <paolo.carlini@oracle.com> * testsuite/20_util/add_const/requirements/alias_decl.cc: New. * testsuite/20_util/add_cv/requirements/alias_decl.cc: Likewise. * testsuite/20_util/add_pointer/requirements/alias_decl.cc: Likewise. * testsuite/20_util/add_volatile/requirements/alias_decl.cc: Likewise. * testsuite/20_util/aligned_storage/requirements/alias_decl.cc: Likewise. * testsuite/20_util/aligned_union/requirements/alias_decl.cc: Likewise. * testsuite/20_util/remove_all_extents/requirements/alias_decl.cc: Likewise. * testsuite/20_util/remove_const/requirements/alias_decl.cc: Likewise. * testsuite/20_util/remove_cv/requirements/alias_decl.cc: Likewise. * testsuite/20_util/remove_extent/requirements/alias_decl.cc: Likewise. * testsuite/20_util/remove_pointer/requirements/alias_decl.cc: Likewise. * testsuite/20_util/remove_volatile/requirements/alias_decl.cc: Likewise. From-SVN: r216245
2014-10-15As discussed: https://gcc.gnu.org/ml/gcc-patches/2014-10/msg00420.htmlJoern Rennecke2-3/+12
2014-10-15 Joern Rennecke <joern.rennecke@embecosm.com> Jeff Law <law@redhat.com> * caller-save.c (replace_reg_with_saved_mem): If saved_mode covers multiple hard registers, use smaller mode derived from MODE. Co-Authored-By: Jeff Law <law@redhat.com> From-SVN: r216243
2014-10-15limits: Remove stray spaces after backslash.Paolo Carlini5-6/+16
2014-10-15 Paolo Carlini <paolo.carlini@oracle.com> * include/std/limits: Remove stray spaces after backslash. * testsuite/20_util/declval/requirements/1_neg.cc: Adjust dg-error line number. * testsuite/20_util/make_signed/requirements/typedefs_neg.cc: Likewise. * testsuite/20_util/make_unsigned/requirements/typedefs_neg.cc: Likewise. From-SVN: r216242
2014-10-15pr63419.C: Add -Wno-psabi.Richard Biener2-0/+5
2014-10-15 Richard Biener <rguenther@suse.de> * g++.dg/torture/pr63419.C: Add -Wno-psabi. From-SVN: r216241
2014-10-15explow.c (convert_memory_address_addr_space_1): Mark in_const as ↵Andreas Schwab2-1/+6
ATTRIBUTE_UNUSED. * explow.c (convert_memory_address_addr_space_1): Mark in_const as ATTRIBUTE_UNUSED. From-SVN: r216240
2014-10-15loop-unroll.c: (decide_unrolling_and_peeling): Rename toJan Hubicka13-544/+268
* loop-unroll.c: (decide_unrolling_and_peeling): Rename to (decide_unrolling): ... this one. (peel_loops_completely): Remove. (decide_peel_simple): Remove. (decide_peel_once_rolling): Remove. (decide_peel_completely): Remove. (peel_loop_simple): Remove. (peel_loop_completely): Remove. (unroll_and_peel_loops): Rename to ... (unroll_loops): ... this one; handle only unrolling. * cfgloop.h (lpt_dec): Remove LPT_PEEL_COMPLETELY and LPT_PEEL_SIMPLE. (UAP_PEEL): Remove. (unroll_and_peel_loops): Remove. (unroll_loops): New. * passes.def: Replace pass_rtl_unroll_and_peel_loops by pass_rtl_unroll_loops. * loop-init.c (gate_rtl_unroll_and_peel_loops, rtl_unroll_and_peel_loops): Rename to ... (gate_rtl_unroll_loops, rtl_unroll_loops): ... these; update. (pass_rtl_unroll_and_peel_loops): Rename to ... (pass_rtl_unroll_loops): ... this one. * tree-pass.h (make_pass_rtl_unroll_and_peel_loops): Remove. (make_pass_rtl_unroll_loops): New. * tree-ssa-loop-ivcanon.c: (estimated_peeled_sequence_size, try_peel_loop): New. (canonicalize_loop_induction_variables): Update. * gcc.dg/tree-prof/peel-1.c: Update. * gcc.dg/tree-prof/unroll-1.c: Update. * gcc.dg/gcc.dg/unroll_1.c: Update. * gcc.dg/gcc.dg/unroll_2.c: Update. * gcc.dg/gcc.dg/unroll_3.c: Update. * gcc.dg/gcc.dg/unroll_4.c: Update. From-SVN: r216238
2014-10-15typedefs.cc: Rename to alias_decl.cc.Paolo Carlini1-0/+19
2014-10-14 Paolo Carlini <paolo.carlini@oracle.com> * testsuite/20_util/add_lvalue_reference/requirements/typedefs.cc: Rename to alias_decl.cc. * testsuite/20_util/add_rvalue_reference/requirements/typedefs.cc: Likewise. * testsuite/20_util/common_type/requirements/typedefs-3.cc: Likewise. * testsuite/20_util/conditional/requirements/typedefs-2.cc: Likewise. * testsuite/20_util/decay/requirements/typedefs-2.cc: Likewise. * testsuite/20_util/enable_if/requirements/typedefs-2.cc: Likewise. * testsuite/20_util/make_signed/requirements/typedefs-3.cc: Likewise. * testsuite/20_util/make_unsigned/requirements/typedefs-3.cc: Likewise. * testsuite/20_util/remove_reference/requirements/typedefs.cc: Likewise. * testsuite/20_util/result_of/requirements/typedefs.cc: Likewise. * testsuite/20_util/underlying_type/requirements/typedefs-3.cc: Likewise. From-SVN: r216237
2014-10-15xtensa: use pre- and postincrement FP load/store when availableMax Filippov3-2/+45
Earlier versions of xtensa FPU used to support preincrement FP load and store instructions (lsiu/ssiu). Recent FPU supports postincrement FP load and store instructions only (lsip/ssip). Use configuration macro to decide which version is available. 2014-10-14 Max Filippov <jcmvbkbc@gmail.com> gcc/ * config/xtensa/xtensa.h (TARGET_HARD_FLOAT_POSTINC): new macro. * config/xtensa/xtensa.md (*lsiu, *ssiu): add dependency on !TARGET_HARD_FLOAT_POSTINC. (*lsip, *ssip): new instructions. From-SVN: r216234
2014-10-15xtensa: drop unimplemented floating point operationsMax Filippov2-43/+6
xtensa ISA never implemented FP division, reciprocal, square root and inverse square root as single opcode. Remove patterns that can emit them. 2014-10-09 Max Filippov <jcmvbkbc@gmail.com> gcc/ * config/xtensa/xtensa.md (divsf3, *recipsf2, sqrtsf2, *rsqrtsf2): remove. From-SVN: r216233
2014-10-15MAINTAINERS: add myself to write-after-approval list.Max Filippov2-0/+5
2014-10-15 Max Filippov <jcmvbkbc@gmail.com> * MAINTAINERS (write-after-approval): Add myself. From-SVN: r216232
2014-10-14explow.c (convert_memory_address_addr_space): Rename to ...Andrew Pinski2-12/+36
2014-10-14 Andrew Pinski <apinski@cavium.com> * explow.c (convert_memory_address_addr_space): Rename to ... (convert_memory_address_addr_space_1): This. Add in_const argument. Inside a CONST RTL, permute the conversion and addition of constant for zero and sign extended pointers. (convert_memory_address_addr_space): New function. From-SVN: r216230
2014-10-14revert: re PR middle-end/49721 (convert_memory_address_addr_space may ↵Andrew Pinski2-12/+16
generate invalid new insns) 2014-10-14 Andrew Pinski <apinski@cavium.com> Revert: 2011-08-19 H.J. Lu <hongjiu.lu@intel.com> PR middle-end/49721 * explow.c (convert_memory_address_addr_space): Also permute the conversion and addition of constant for zero-extend. From-SVN: r216229
2014-10-15Daily bump.GCC Administrator1-1/+1
From-SVN: r216228
2014-10-14msp430-modes.def (PSI): Add.DJ Delorie6-20/+168
* config/msp430/msp430-modes.def (PSI): Add. * config/msp430/msp430-protos.h (msp430_hard_regno_nregs_has_padding): New. (msp430_hard_regno_nregs_with_padding): New. * config/msp430/msp430.c (msp430_scalar_mode_supported_p): New. (msp430_hard_regno_nregs_has_padding): New. (msp430_hard_regno_nregs_with_padding): New. (msp430_unwind_word_mode): Use PSImode instead of SImode. (msp430_addr_space_legitimate_address_p): New. (msp430_asm_integer): New. (msp430_init_dwarf_reg_sizes_extra): New. (msp430_print_operand): Use X suffix for PSImode even in small model. * config/msp430/msp430.h (POINTER_SIZE): Use 20 bits, not 32. (PTR_SIZE): ...but 4 bytes for EH. (SIZE_TYPE): Use __int20. (PTRDIFF_TYPE): Likewise. (INCOMING_FRAME_SP_OFFSET): Adjust. * config/msp430/msp430.md (movqi_topbyte): New. (movpsi): Use fixed suffixes. (movsipsi2): Enable for 430X, not large model. (extendhipsi2): Likewise. (zero_extendhisi2): Likewise. (zero_extendhisipsi2): Likewise. (extend_and_shift1_hipsi2): Likewise. (extendpsisi2): Likewise. (*bitbranch<mode>4_z): Fix suffix logic. From-SVN: r216225
2014-10-14Fix sanitizer build on sparc.David S. Miller3-3/+72
* sanitizer_common/sanitizer_platform_limits_linux.cc (time_t): Define at __kernel_time_t, as needed for sparc. (struct __old_kernel_stat): Don't check if __sparc__ is defined. * libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h (__sanitizer): Define struct___old_kernel_stat_sz, struct_kernel_stat_sz, and struct_kernel_stat64_sz for sparc. (__sanitizer_ipc_perm): Adjust for sparc targets. (__sanitizer_shmid_ds): Likewsie. (__sanitizer_sigaction): Likewsie. (IOC_SIZE): Likewsie. From-SVN: r216224
2014-10-14re PR ada/62019 (gnat.dg/weak2.adb fails everywhere)Eric Botcazou2-16/+17
PR ada/62019 * tree-eh.c (tree_could_trap) <FUNCTION_DECL>: Revamp and really do not choke on null node. <VAR_DECL>: Likewise. From-SVN: r216223
2014-10-14More missed bits from the big __intN patchDJ Delorie2-18/+21
From-SVN: r216222
2014-10-14Missed bit of previous commit.DJ Delorie1-13/+14
From-SVN: r216221
2014-10-14machmode.h (int_n_data_t): New.DJ Delorie39-353/+1041
* machmode.h (int_n_data_t): New. (int_n_enabled_p): New. (int_n_data): New. * tree.c (int_n_enabled_p): New. (int_n_trees): New. (make_or_reuse_type): Check for all __intN types, not just __int128. (build_common_tree_nodes): Likewise. Also fill in integer_typs[] entries. * tree.h (int128_integer_type_node): Remove. (int128_unsigned_type_node): Remove. (int_n_trees_t): New. (int_n_enabled_p): New. (int_n_trees): New. * toplev.c (standard_type_bitsize): New. (do_compile): Check which __intN types are enabled for the current run. * builtin-types.def (BT_INT128): Remove. (BT_UINT128): Remove. * machmode.def: Add macro to create __int128 for all targets. * stor-layout.c (mode_for_size): Support __intN types. (smallest_mode_for_size): Likewise. (initialize_sizetypes): Support __intN types. * genmodes.c (struct mode_data): Add int_n field. (blank_mode): Likewise. (INT_N): New. (make_int_n): New. (emit_insn_modes_h): Count __intN entries and define NUM_INT_N_ENTS. (emit_mode_int_n): New. (emit_insn_modes_c): Call it. * gimple.c (gimple_signed_or_unsigned_type): Check for all __intN types, not just __int128. * tree-core.h (integer_type_kind): Remove __int128-specific entries, reserve spots for __intN entries. libstdc++-v3/ * src/c++11/limits.cc: Add support for __intN types. * include/std/type_traits: Likewise. * include/std/limits: Likewise. * include/c_std/cstdlib: Likewise. * include/bits/cpp_type_traits.h: Likewise. * include/c_global/cstdlib: Likewise. c-family/ * c-pretty-print.c (pp_c_integer_constant): Check for all __intN types, not just __int128. * c-cppbuiltin.c (c_cpp_builtins): Add builtins for all __intN types, not just __int128. (cpp_atomic_builtins): Round pointer sizes up. (type_suffix): Use type precision, not specific types. * c-common.c (c_common_reswords): Remove __int128 special case. (c_common_type_for_size): Check for all __intN types, not just __int128. (c_common_type_for_mode): Likewise. (c_common_signed_or_unsigned_type): Likewise. (c_build_bitfield_integer_type): Likewise. (c_common_nodes_and_builtins): Likewise. (keyword_begins_type_specifier): Likewise. * c-common.h (rid): Remove RID_INT128 and add RID_INT_N_* for all __intN variants. c/ * c-parser.c (c_parse_init): Add RID entries for each __intN. (c_token_starts_typename): Check all __intN, not just __int128. (c_token_starts_declspecs): Likewise. (c_parser_declspecs): Likewise. (c_parser_attribute_any_word): Likewise. (c_parser_objc_selector): Likewise. * c-tree.h (c_typespec_keyword): cts_int128 -> cts_int_n. (struct c_declspecs): Add int_n_idx field to record *which* __intN is specified. * c-decl.c (declspecs_add_type): Check for all __intN, not just __int128. (finish_declspecs): Likewise. testsuite/ * g++.dg/abi/mangle64.C: New. cp/ * typeck.c (cp_common_type): Check for all __intN types, not just __int128. * decl.c (grokdeclarator): Likewise. * rtti.c (emit_support_tinfos): Check for all __intN types, not just __int128. * parser.c (cp_lexer_next_token_is_decl_specifier_keyword): Check for all __intN types, not just __int128. (cp_parser_simple_type_specifier): Likewise. * mangle.c (integer_type_codes): Remove int128-specific codes. * cp-tree.h (cp_decl_specifier_seq): Add int_n_idx to store which __intN was specified. * lex.c (init_reswords): Reserve all __intN keywords. lto/ * lto-lang.c (lto_build_c_type_nodes): Check intN types for size-type as well. (lto_init): Initialize all intN types, not just int128. From-SVN: r216220
2014-10-14ira.c: Fix typo in comment.Kito Cheng9-28/+38
2014-10-14 Kito Cheng <kito@0xlab.org> * ira.c: Fix typo in comment. * ira.h: Ditto. * ira-build.c: Ditto. * ira-color.c: Ditto. * ira-emit.c: Ditto. * ira-int.h: Ditto. * ira-lives.c: Ditto. From-SVN: r216218
2014-10-14re PR rtl-optimization/63475 (Postreload CSE propagates aliased memory operand)Uros Bizjak2-56/+39
PR rtl-optimization/63475 * alias.c (true_dependence_1): Always use get_addr to extract true address operands from x_addr and mem_addr. Use extracted address operands to check for references with alignment ANDs. Use extracted address operands with find_base_term and base_alias_check. For noncanonicalized operands call canon_rtx with extracted address operand. (write_dependence_1): Ditto. (may_alias_p): Ditto. Remove unused calls to canon_rtx. From-SVN: r216217
2014-10-14Use strtod instead of strtold in libiberty/d-demangle.cJoel Brobecker2-5/+14
strtold is currently used to decode templates which have a floating-point value encoded inside; but this routine is not available on some systems, such as Solaris 2.9 for instance. This patch fixes the issue by replace the use of strtold by strtod. It reduces a bit the precision, but it should still remain acceptable in most cases. libiberty/ChangeLog: * d-demangle.c: Replace strtold with strtod in global comment. (strtold): Remove declaration. (strtod): New declaration. (dlang_parse_real): Declare value as double instead of long double. Replace call to strtold by call to strtod. Update format in call to snprintf. From-SVN: r216216
2014-10-14intro.xml: Update.Jonathan Wakely5-5/+18
* doc/xml/manual/intro.xml: Update. * doc/xml/manual/status_cxx2011.xml: Update. * doc/html/manual/*: Regenerate. From-SVN: r216215
2014-10-141.cc: Add dg-require-stdint.Jonathan Wakely3-0/+9
* testsuite/20_util/align/1.cc: Add dg-require-stdint. * testsuite/20_util/align/2.cc: Likewise. From-SVN: r216214
2014-10-14re PR libstdc++/54354 (TODO extended iomanip manipulators std::get_time and ↵Rüdiger Sonderfeld6-0/+248
std::put_time (C++11, section 27.7.5)) 2014-10-14 Rüdiger Sonderfeld <ruediger@c-plusplus.de> PR libstdc++/54354 * include/std/iomanip (_Put_time): New struct. (put_time): New manipulator. (operator<<): New overloaded function. * testsuite/27_io/manipulators/extended/put_time/char/1.cc: New. * testsuite/27_io/manipulators/extended/put_time/char/2.cc: New. * testsuite/27_io/manipulators/extended/put_time/wchar_t/1.cc: New. * testsuite/27_io/manipulators/extended/put_time/wchar_t/2.cc: New. From-SVN: r216211
2014-10-14re PR libstdc++/57440 (Memory usage with future and std containers)Kai Tietz3-0/+13
2014-10-14 Kai Tietz <ktietz@redhat.com> PR libstdc++/57440 * config/os/mingw32/os_defines.h (_GTHREAD_USE_MUTEX_INIT_FUNC): Define to avoid leak. * config/os/mingw32-w64/os_defines.h: Likewise. From-SVN: r216210
2014-10-14re PR target/63534 (Bootstrap failure on x86_64/i686-linux)Evgeny Stupachenko2-4/+15
PR target/63534 gcc/ * config/i386/i386.c (ix86_expand_split_stack_prologue): Make __morestack local. From-SVN: r216208
2014-10-14Makefile.am (DEFS): Add -DPIC.Jakub Jelinek3-2/+7
* ubsan/Makefile.am (DEFS): Add -DPIC. * ubsan/Makefile.in: Regenerated. From-SVN: r216206
2014-10-14line-map.h (linemap_location_from_macro_expansion_p): const struct line_maps ↵Manuel López-Ibáñez3-17/+31
* argument. libcpp/ChangeLog: 2014-10-14 Manuel López-Ibáñez <manu@gcc.gnu.org> * include/line-map.h (linemap_location_from_macro_expansion_p): const struct line_maps * argument. (linemap_position_for_line_and_column): const struct line_map * argument. * line-map.c (linemap_add_macro_token): Use correct argument name in comment. (linemap_position_for_line_and_column): const struct line_map * argument. (linemap_macro_map_loc_to_def_point): Fix comment. Make static. (linemap_location_from_macro_expansion_p): const struct line_maps * argument. (linemap_resolve_location): Fix argument names in comment. From-SVN: r216205
2014-10-14typeck.c (cp_build_unary_op): Accept float vectors.Marc Glisse4-1/+10
2014-10-14 Marc Glisse <marc.glisse@inria.fr> gcc/cp/ * typeck.c (cp_build_unary_op) [TRUTH_NOT_EXPR]: Accept float vectors. gcc/testsuite/ * g++.dg/ext/vector9.C: Test ! with float vectors. From-SVN: r216201
2014-10-14AVX-512. 77/n. Use blend for cond-set V32HI and V64QI.Alexander Ivchenko2-0/+21
gcc/ * config/i386/i386.c (ix86_expand_sse_movcc): Handle V64QI and V32HI mode. (ix86_expand_int_vcond): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216193
2014-10-14AVX-512. 74/n. Add byte/word max/mix reduction.Alexander Ivchenko3-3/+22
gcc/ * config/i386/i386.c (emit_reduc_half): Handle V64QI and V32HI mode. * config/i386/sse.md (define_mode_iterator VI_AVX512BW): New. (define_expand "reduc_<code>_<mode>"): Use VI512_48F_12BW. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216192
2014-10-14AVX-512. 73/n. Extend reduc min/max autogen.Alexander Ivchenko2-1/+14
gcc/ * config/i386/sse.md (define_mode_iterator REDUC_SMINMAX_MODE): Add V64QI and V32HI modes. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216191
2014-10-14AVX-512. 72/n. Extend VI itterator.Alexander Ivchenko3-2/+18
gcc/ * config/i386/i386.c (ix86_expand_vector_logical_operator): Handle V16SF and V8DF modes. * config/i386/sse.md (define_mode_iterator VI): Add V64QI and V32HI modes. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216190
2014-10-14AVX-512. 71/n. Remove redudant iterator attribute.Alexander Ivchenko2-6/+11
gcc/ * config/i386/sse.md (define_mode_attr avx2_avx512f): Remove. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216189
2014-10-14typedefs.cc: Rename to alias_decl.cc.Paolo Carlini11-0/+0
2014-10-14 Paolo Carlini <paolo.carlini@oracle.com> * testsuite/20_util/add_lvalue_reference/requirements/typedefs.cc: Rename to alias_decl.cc. * testsuite/20_util/add_rvalue_reference/requirements/typedefs.cc: Likewise. * testsuite/20_util/common_type/requirements/typedefs-3.cc: Likewise. * testsuite/20_util/conditional/requirements/typedefs-2.cc: Likewise. * testsuite/20_util/decay/requirements/typedefs-2.cc: Likewise. * testsuite/20_util/enable_if/requirements/typedefs-2.cc: Likewise. * testsuite/20_util/make_signed/requirements/typedefs-3.cc: Likewise. * testsuite/20_util/make_unsigned/requirements/typedefs-3.cc: Likewise. * testsuite/20_util/remove_reference/requirements/typedefs.cc: Likewise. * testsuite/20_util/result_of/requirements/typedefs.cc: Likewise. * testsuite/20_util/underlying_type/requirements/typedefs-3.cc: Likewise. From-SVN: r216188
2014-10-14AVX-512. 70/n. Add vpmaxmin.Alexander Ivchenko2-12/+29
gcc/ * config/i386/sse.md (define_insn "*sse4_1_<code><mode>3<mask_name>"): Add masking. (define_insn "*sse4_1_<code><mode>3<mask_name>"): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216187
2014-10-14AVX-512. 69/n. Add vpmulhrsw insn support.Alexander Ivchenko2-0/+71
gcc/ * config/i386/sse.md (define_insn "avx512bw_umulhrswv32hi3<mask_name>"): New. (define_expand "<ssse3_avx2>_pmulhrsw<mode>3_mask"): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216186
2014-10-14AVX-512. 68/n. Add vpmullw, vpacksdw, pmaddwd insn.Alexander Ivchenko2-56/+89
gcc/ * config/i386/sse.md (define_c_enum "unspec"): Add UNSPEC_PMADDWD512. (define_mode_iterator VI2_AVX2): Add V32HI mode. (define_expand "mul<mode>3<mask_name>"): Add masking. (define_insn "*mul<mode>3<mask_name>"): Ditto. (define_expand "<s>mul<mode>3_highpart<mask_name>"): Ditto. (define_insn "*<s>mul<mode>3_highpart<mask_name>"): Ditto. (define_insn "avx512bw_pmaddwd512<mode><mask_name>"): New. (define_mode_attr SDOT_PMADD_SUF): Ditto. (define_expand "sdot_prod<mode>"): Add <SDOT_PMADD_SUF>. (define_insn "<sse2_avx2>_packssdw<mask_name>"): Add masking. (define_insn "*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>"): Ditto. (define_insn "avx2_packusdw"): Delete. (define_insn "sse4_1_packusdw"): Ditto. (define_insn "<sse4_1_avx2>_packusdw<mask_name>"): New. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216185
2014-10-14AVX-512. 67/n. Update constraints in vec_dup insn.Alexander Ivchenko2-2/+14
gcc/ * config/i386/sse.md (define_insn "vec_dup<mode>"): Update constraints. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216184
2014-10-14AVX-512. 66/n. Extend vpalignr insn patterns.Alexander Ivchenko2-4/+40
gcc/ * config/i386/sse.md (define_mode_iterator SSESCALARMODE): Add V4TI mode. (define_insn "<ssse3_avx2>_palignr<mode>_mask"): New. (define_insn "<ssse3_avx2>_palignr<mode>"): Add EVEX version. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216183
2014-10-14AVX-512. 65/n. Add rest of VI1-AVX2: mul insn pattern.Alexander Ivchenko2-2/+14
gcc/ * config/i386/sse.md (define_expand "mul<mode>3<mask_name>"): Add masking. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216182
2014-10-14AVX-512. 64/n. Add rest of VI1-AVX2: vpack[us]wb.Alexander Ivchenko2-13/+26
gcc/ * config/i386/sse.md (define_insn "<sse2_avx2>_packsswb<mask_name>"): Add masking. (define_insn "<sse2_avx2>_packuswb<mask_name>"): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216181
2014-10-14AVX-512. 62/n. Add vpmaddubsw,vdbpsadbw insn patterns.Alexander Ivchenko2-0/+48
gcc/ * config/i386/sse.md (define_c_enum "unspec"): Add UNSPEC_DBPSADBW, UNSPEC_PMADDUBSW512. (define_insn "avx512bw_pmaddubsw512<mode><mask_name>"): New. (define_insn "<mask_codefor>avx512bw_dbpsadbw<mode><mask_name>"): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216180
2014-10-14AVX-512. 61/n. Update FP logic insn patterns.Alexander Ivchenko2-65/+167
gcc/ * config/i386/sse.md (define_insn "<sse>_andnot<VF_128_256:mode>3<mask_name>"): Add masking, use VF_128_256 mode iterator and update assembler emit code. (define_insn "<sse>_andnot<VF_512:mode>3<mask_name>"): New. (define_expand "<any_logic:code><VF_128_256:mode>3<mask_name>"): Add masking, use VF_128_256 mode iterator. (define_expand "<any_logic:code><VF_512:mode>3<mask_name>"): New. (define_insn "*<any_logic:code><VF_128_256:mode>3<mask_name>"): Add masking, use VF_128_256 mode iterator and update assembler emit code. (define_insn "*<any_logic:code><VF_512:mode>3<mask_name>"): New. (define_mode_attr avx512flogicsuff): Delete. (define_insn "avx512f_<logic><mode>"): Ditto. (define_insn "*andnot<mode>3<mask_name>"): Update MODE_XI, MODE_OI, MODE_TI. (define_insn "<mask_codefor><code><mode>3<mask_name>"): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216179
2014-10-14AVX-512. 60/n. Update 128bit ashrv insn pattern.Alexander Ivchenko2-11/+44
gcc/ * config/i386/sse.md (define_mode_iterator VI128_128 [V16QI V8HI V2DI]): Delete. (define_expand "vashr<mode>3<mask_name>"): Add masking, use VI12_128 mode iterator. (define_expand "ashrv2di3<mask_name>"): New. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r216178
generated by cgit v1.1 at 2025-09-19 10:56:15 +0000