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2018-05-13gfortran.h: Remove prototype.Steven G. Kargl3-17/+5
2018-05-13 Steven G. Kargl <kargl@gcc.gnu.org> * gfortran.h: Remove prototype. * symbol.c (gfc_new_undo_checkpoint): Remove unused function. From-SVN: r260210
2018-05-13re PR libstdc++/80165 (Constexpr tuple of variant doesn't work)Ville Voutilainen2-0/+17
PR libstdc++/80165 * testsuite/20_util/variant/80165.cc: New. From-SVN: r260209
2018-05-13[NDS32] Implment n10 pipeline.Kito Cheng10-17/+780
gcc/ * config.gcc (nds32*-*-*): Check that n10/d10 are valid to --with-cpu. * config/nds32/nds32-n10.md: New file. * config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N10. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for n10 pipeline. * config/nds32/nds32-protos.h: More declarations for n10 pipeline. * config/nds32/nds32-utils.c: More implementations for n10 pipeline. * config/nds32/nds32.md (pipeline_model): Add n10. * config/nds32/nds32.opt (mcpu): Support n10 pipeline cpus. * config/nds32/pipelines.md: Include n10 settings. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r260207
2018-05-13[NDS32] Add DSP extension instructions.Monk Chiang19-35/+8151
gcc/ * config.gcc (nds32be-*-*): Handle --with-ext-dsp. * config/nds32/constants.md (unspec_element, unspec_volatile_element): Add enum values for DSP extension instructions. * config/nds32/constraints.md (Iu06, IU06, CVp5, CVs5, CVs2, CVhi): New constraints. * config/nds32/iterators.md (shifts, shiftrt, sat_plus, all_plus, sat_minus, all_minus, plus_minus, extend, sumax, sumin, sumin_max): New code iterators. (su, zs, uk, opcode, add_rsub, add_sub): New code attributes. * config/nds32/nds32-dspext.md: New file for DSP implementation. * config/nds32/nds32-intrinsic.c: Implementation of DSP extension. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32-md-auxiliary.c: Likewise. * config/nds32/nds32-memory-manipulation.c: Consider DSP extension. * config/nds32/nds32-predicates.c (const_vector_to_hwint): New. (nds32_valid_CVp5_p, nds32_valid_CVs5_p): New. (nds32_valid_CVs2_p, nds32_valid_CVhi_p): New. * config/nds32/nds32-protos.h: New declarations for DSP extension. * config/nds32/nds32-utils.c (extract_mac_non_acc_rtx): New case TYPE_DMAC in switch statement. * config/nds32/nds32.c: New checking and implementation for DSP extension instructions. * config/nds32/nds32.h: Likewise. * config/nds32/nds32.md: Likewise. * config/nds32/nds32.opt (mhw-abs, mext-dsp): New options. * config/nds32/predicates.md: Implement new predicates for DSP extension. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r260206
2018-05-13Daily bump.GCC Administrator1-1/+1
From-SVN: r260205
2018-05-12Daily bump.GCC Administrator1-1/+1
From-SVN: r260194
2018-05-11rs6000.md (mov<mode>_softfloat, FMOVE32): Reformat alternatives and ↵Michael Meissner2-19/+106
attributes so it is easier to identify which... 2018-05-11 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/rs6000.md (mov<mode>_softfloat, FMOVE32): Reformat alternatives and attributes so it is easier to identify which constraints/attributes go with which instruction. (mov<mode>_hardfloat32, FMOVE64): Likewise. (mov<mode>_softfloat32, FMOVE64): Likewise. (mov<mode>_hardfloat64, FMOVE64): Likewise. (mov<mode>_softfloat64, FMOVE64): Likewise. From-SVN: r260190
2018-05-11re PR fortran/85542 (ICE in check_inquiry, at fortran/expr.c:2426)Steven G. Kargl4-1/+18
2018-05-11 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85542 * expr.c (check_inquiry): Avoid NULL pointer dereference. 2018-05-11 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85542 * gfortran.dg/pr85542.f90: New test. From-SVN: r260182
2018-05-11...and actually resture the *new* testcase.Edward Smith-Rowland1-265/+265
From-SVN: r260172
2018-05-11Restore the testcase that was clobbered by the recent PR83140 patches.Edward Smith-Rowland1-0/+2052
* libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions /02_assoc_legendre/check_value.cc From-SVN: r260168
2018-05-11extend.texi (PowerPC Built-in Functions): Rename this subsection.Kelvin Nilsen2-414/+497
gcc/ChangeLog: 2018-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * doc/extend.texi (PowerPC Built-in Functions): Rename this subsection. (Basic PowerPC Built-in Functions): The new name of the subsection previously known as "PowerPC Built-in Functions". (Basic PowerPC Built-in Functions Available on all Configurations): New subsubsection. (Basic PowerPC Built-in Functions Available on ISA 2.05): Likewise. (Basic PowerPC Built-in Functions Available on ISA 2.06): Likewise. (Basic PowerPC Built-in Functions Available on ISA 2.07): Likewise. (Basic PowerPC Built-in Functions Available on ISA 3.0): Likewise. From-SVN: r260167
2018-05-11Check is_single_const in intersect_with_platsMartin Jambor4-1/+56
2018-05-11 Martin Jambor <mjambor@suse.cz> PR ipa/85655 * ipa-cp.c (intersect_with_plats): Check that the lattice contains single const. testsuite/ * g++.dg/lto/pr85655_0.C: New test. From-SVN: r260165
2018-05-11[arm] PR target/85733 Restore be8 linking behaviour for ARMv6-M and products ↵Richard Earnshaw2-1/+6
deriving from its capabilities My patch last year to automate passing the be8 flag to the linker had a nasty flaw in that I forgot entirely that the ARMv6-M architecture did not derive its capabilities directly from the ARMv6 capability list, but was a new group of capabilities (since it needs to leave out the ARM -- notm -- feature bit). The feature list defined was thus missing the be8 bit. Furthermore, any product derived from that feature group consequently lacked the be8 feature as well and this included all ARMv7 and ARMv8 parts. The fix is embarrassingly simple... PR target/85733 * config/arm/arm-cpus.in (fgroup ARMv6m): Add be8 feature. From-SVN: r260162
2018-05-11i386-common.c (OPTION_MASK_ISA_WAITPKG_SET, [...]): New defines.Sebastian Peryt17-12/+346
2018-05-11 Sebastian Peryt <sebastian.peryt@intel.com> gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_WAITPKG_SET, OPTION_MASK_ISA_WAITPKG_UNSET): New defines. (ix86_handle_option): Handle -mwaitpkg. * config.gcc: New header. * config/i386/cpuid.h (bit_WAITPKG): New bit. * config/i386/driver-i386.c (host_detect_local_cpu): Detect -mwaitpkg. * config/i386/i386-builtin-types.def ((UINT8, UNSIGNED, UINT64)): New function type. * config/i386/i386-c.c (ix86_target_macros_internal): Handle OPTION_MASK_ISA_WAITPKG. * config/i386/i386.c (ix86_target_string): Add -mwaitpkg. (ix86_option_override_internal): Add PTA_WAITPKG. (ix86_valid_target_attribute_inner_p): Add -mwaitpkg. (enum ix86_builtins): Add IX86_BUILTIN_UMONITOR, IX86_BUILTIN_UMWAIT, IX86_BUILTIN_TPAUSE. (ix86_init_mmx_sse_builtins): Define __builtin_ia32_umonitor, __builtin_ia32_umwait and __builtin_ia32_tpause. (ix86_expand_builtin): Expand IX86_BUILTIN_UMONITOR, IX86_BUILTIN_UMWAIT, IX86_BUILTIN_TPAUSE. * config/i386/i386.h (TARGET_WAITPKG, TARGET_WAITPKG_P): New. * config/i386/i386.md (UNSPECV_UMWAIT, UNSPECV_UMONITOR, UNSPECV_TPAUSE): New. (umwait, umwait_rex64, umonitor_<mode>, tpause, tpause_rex64): New. * config/i386/i386.opt: Add -mwaitpkg. * config/i386/waitpkgintrin.h: New file. * config/i386/x86intrin.h: New header. * doc/invoke.texi: Add -mwaitpkg. gcc/testsuite/ * gcc.target/i386/tpause-1.c: New test. * gcc.target/i386/umonitor-1.c: New test. From-SVN: r260161
2018-05-11[arm] PR target/85606 prefer armv6s-m for armv6-m partsRichard Earnshaw2-6/+20
When Arm introduced ARMv6-M there were two variants, ARMv6-M and ARMv6S-M. The two differed only in support for the SVC instruction. Later on SVC was then made a mandatory part of ARMv6-M and the ARMv6S-M name was dropped. GCC and GAS, however still recognize both names and at least some versions of GAS still distinguish between the two. To address this, this patch changes the architecture for the ARMv6-m cortex parts (m0, m0plus, m1 and the variants will small multiply units) to use the ARMv6S-M name in conjunction with the assembler. This avoids problems with them rejecting code that was previously accepted with older versions of GCC where we did not pass an explicit architecture string through to the compiler when using -mcpu on the command line. PR target/85606 * config/arm/arm-cpus.in: Add comment that ARMv6-m and ARMv6S-m are now equivalent. (cortex-m0): Use armv6s-m isa. (cortex-m0plus): Likewise. (cortex-m1): Likewise. (cortex-m0.small-multiply): Likewise. (cortex-m0plus.small-multiply): Likewise. (cortex-m1.small-multiply): Likewise. From-SVN: r260157
2018-05-11re PR c/85696 (OpenMP with variably modified and default(none) won't compile)Jakub Jelinek8-2/+78
PR c/85696 * c-omp.c (c_omp_predetermined_sharing): Return OMP_CLAUSE_DEFAULT_SHARED for artificial vars with integral type. * cp-tree.h (cxx_omp_predetermined_sharing_1): New prototype. * cp-gimplify.c (cxx_omp_predetermined_sharing): New wrapper around cxx_omp_predetermined_sharing_1. Rename old function to ... (cxx_omp_predetermined_sharing_1): ... this. * semantics.c (finish_omp_clauses): Use cxx_omp_predetermined_sharing_1 instead of cxx_omp_predetermined_sharing. * c-c++-common/gomp/pr85696.c: New test. From-SVN: r260156
2018-05-11re PR tree-optimization/85692 (Two source permute not used for vector ↵Allan Sandfeld Jensen4-26/+72
initialization) PR tree-optimization/85692 * tree-ssa-forwprop.c (simplify_vector_constructor): Try two source permute as well. * gcc.target/i386/pr85692.c: New test. Co-Authored-By: Jakub Jelinek <jakub@redhat.com> From-SVN: r260155
2018-05-11Support LLVM style of no_sanitize attribute (PR sanitizer/85556).Martin Liska6-8/+57
2018-05-11 Martin Liska <mliska@suse.cz> PR sanitizer/85556 * doc/extend.texi: Document LLVM style format for no_sanitize attribute. 2018-05-11 Martin Liska <mliska@suse.cz> PR sanitizer/85556 * c-attribs.c (handle_no_sanitize_attribute): Iterate all TREE_LIST values. 2018-05-11 Martin Liska <mliska@suse.cz> PR sanitizer/85556 * c-c++-common/ubsan/attrib-6.c: New test. From-SVN: r260154
2018-05-10decl.c (cp_finish_decl): Don't instantiate auto variable.Jason Merrill4-14/+32
* decl.c (cp_finish_decl): Don't instantiate auto variable. (check_static_variable_definition): Allow auto. * constexpr.c (ensure_literal_type_for_constexpr_object): Likewise. From-SVN: r260150
2018-05-11correct changelog!Edward Smith-Rowland1-2/+2
2018-05-10 Edward Smith-Rowland <3dw4rd@verizon.net> PR libstdc++/83140 - assoc_legendre returns negated value when m is odd * include/tr1/legendre_function.tcc (__assoc_legendre_p): Add __phase argument defaulted to +1. Doxy comments on same. * testsuite/special_functions/02_assoc_legendre/ check_value.cc: Regen. * testsuite/tr1/5_numerical_facilities/special_functions/ 02_assoc_legendre/check_value.cc: Regen. From-SVN: r260149
2018-05-11Daily bump.GCC Administrator1-1/+1
From-SVN: r260147
2018-05-10re PR fortran/85687 (ICE in gfc_sym_identifier, at fortran/trans-decl.c:351)Steven G. Kargl4-2/+23
2018-05-10 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85687 * check.c (gfc_check_rank): Check that the argument is a data object. 2018-05-10 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85687 * gfortran.dg/pr85687.f90: new test. From-SVN: r260141
2018-05-10rs6000.c (mode_supports_dq_form): Rename mode_supports_vsx_dform_quad to ↵Michael Meissner2-30/+50
mode_supports_dq_form. 2018-05-10 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/rs6000.c (mode_supports_dq_form): Rename mode_supports_vsx_dform_quad to mode_supports_dq_form. (mode_supports_vsx_dform_quad): Likewise. (mode_supports_vmx_dform): Move these functions to be next to the other mode_supports functions. (mode_supports_dq_form): Likewise. (quad_address_p): Change calls of mode_supports_vsx_dform_quad to mode_supports_dq_form. (reg_offset_addressing_ok_p): Likewise. (offsettable_ok_by_alignment): Likewise. (rs6000_legitimate_offset_address_p): Likewise. (legitimate_lo_sum_address_p): Likewise. (rs6000_legitimize_address): Likewise. (rs6000_legitimize_reload_address): Likewise. (rs6000_secondary_reload_inner): Likewise. (rs6000_preferred_reload_class): Likewise. (rs6000_output_move_128bit): Likewise. From-SVN: r260140
2018-05-10re PR fortran/85521 (ICE in gfc_resolve_character_array_constructor, at ↵Steven G. Kargl5-1/+30
fortran/array.c:2049) 2018-05-10 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85521 * array.c (gfc_resolve_character_array_constructor): Substrings with upper bound smaller than lower bound are zero length strings. 2018-05-10 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85521 * gfortran.dg/pr85521_1.f90: New test. * gfortran.dg/pr85521_2.f90: New test. From-SVN: r260139
2018-05-10re PR fortran/70870 (Segmentation violation in gfc_assign_data_value)Steven G. Kargl4-0/+29
2018-05-10 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/70870 * data.c (gfc_assign_data_value): Check that a data object does not also have default initialization. 2018-05-10 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/70870 * gfortran.dg/pr70870_1.f90: New test. From-SVN: r260138
2018-05-10* gcc.target/i386/xgetsetbv.c: Fix whitespace.Uros Bizjak1-3/+3
From-SVN: r260137
2018-05-10i386.c (ix86_expand_builtin): Generate SImode target register for null target.Uros Bizjak5-29/+46
* config/i386/i386.c (ix86_expand_builtin) <case IX86_BUILTIN_RDPID>: Generate SImode target register for null target. <case IX86_BUILTIN_XGETBV>: Ditto. <case IX86_BUILTIN_XSETBV>: Optimize LSHIFTRT generation. * config/i386/xsaveintrin.h (_xgetbv): Add missing return. testsuite/ChangeLog: * gcc.target/i386/xgetsetbv.c: Check also variable arguments. From-SVN: r260135
2018-05-10rs6000.md (prefetch): Generate ISA 2.06 instructions dcbtt and dcbtstt if ↵Carl Love2-3/+22
operands[2] is 0. gcc/ChangeLog: 2018-05-10 Carl Love <cel@us.ibm.com> * config/rs6000/rs6000.md (prefetch): Generate ISA 2.06 instructions dcbtt and dcbtstt if operands[2] is 0. From-SVN: r260134
2018-05-10cp-tree.h (DECL_CONSTRUCTOR_P): Use DECL_CXX_CONSTRUCTOR_P.Jason Merrill2-2/+5
* cp-tree.h (DECL_CONSTRUCTOR_P): Use DECL_CXX_CONSTRUCTOR_P. (DECL_DESTRUCTOR_P): Use DECL_CXX_DESTRUCTOR_P. From-SVN: r260133
2018-05-10Document Dual ABI for std::ios_base::failureJonathan Wakely8-19/+98
* doc/xml/faq.xml: Link to C++17 status. Add note to outdated answer. * doc/xml/manual/debug_mode.xml: Add array and forward_list to list of C++11 containers with Debug Mode support. * doc/xml/manual/using.xml: Document Dual ABI for ios_base::failure. * doc/html/*: Regenerate. From-SVN: r260129
2018-05-10regex_compiler.h (_S_cache_size): Change from function to variable.Jason Merrill2-5/+8
* include/bits/regex_compiler.h (_S_cache_size): Change from function to variable. From-SVN: r260128
2018-05-10Core issue 2310 - conversion to base of incomplete type.Jason Merrill3-0/+26
* class.c (build_base_path): Check COMPLETE_TYPE_P for source type. From-SVN: r260127
2018-05-10CWG 2267 - list-initialization of reference temporaryJason Merrill3-6/+22
* call.c (reference_binding): List-initializing a reference temporary is copy-list-initialization. From-SVN: r260126
2018-05-10* parser.c (cp_parser_class_head): Use num_template_headers_for_class.Jason Merrill2-14/+3
From-SVN: r260125
2018-05-10Make sure we aren't trying to do a nested instantiation in template context.Jason Merrill2-0/+4
* pt.c (instantiate_decl): Make sure we aren't trying to do a nested instantiation in template context. From-SVN: r260124
2018-05-10* class.c (vbase_has_user_provided_move_assign): Use user_provided_p.Jason Merrill2-1/+4
From-SVN: r260123
2018-05-10* lambda.c (lambda_expr_this_capture): Improve logic.Jason Merrill2-10/+12
From-SVN: r260122
2018-05-10decl.c (make_typename_type): s/parameters/arguments/.Jason Merrill7-7/+13
* decl.c (make_typename_type): s/parameters/arguments/. * parser.c (cp_parser_nested_name_specifier_opt): Likewise. * pt.c (make_pack_expansion): Correct error message. From-SVN: r260121
2018-05-10re PR fortran/85735 (f951 crashes on empty input)Marek Polacek2-0/+6
PR fortran/85735 * options.c (gfc_post_options): Set main_input_filename. From-SVN: r260120
2018-05-10re PR c++/85662 ("error: non-constant condition for static assertion" from ↵Jakub Jelinek10-20/+54
__builtin_offsetof in C++) PR c++/85662 * c-common.h (fold_offsetof_1): Removed. (fold_offsetof): Add TYPE argument defaulted to size_type_node and CTX argument defaulted to ERROR_MARK. * c-common.c (fold_offsetof_1): Renamed to ... (fold_offsetof): ... this. Remove wrapper function. Add TYPE argument, convert the pointer constant to TYPE and use size_binop with PLUS_EXPR instead of fold_build_pointer_plus if type is not a pointer type. Adjust recursive calls. * c-fold.c (c_fully_fold_internal): Use fold_offsetof rather than fold_offsetof_1, pass TREE_TYPE (expr) as TYPE to it and drop the fold_convert_loc. * c-typeck.c (build_unary_op): Use fold_offsetof rather than fold_offsetof_1, pass argtype as TYPE to it and drop the fold_convert_loc. * cp-gimplify.c (cp_fold): Use fold_offsetof rather than fold_offsetof_1, pass TREE_TYPE (x) as TYPE to it and drop the fold_convert. * g++.dg/ext/offsetof2.C: New test. From-SVN: r260119
2018-05-10re PR tree-optimization/85693 (Generation of SAD (Sum of Absolute ↵Uros Bizjak2-0/+20
Difference) instruction) PR target/85693 * config/i386/sse.md (usadv64qi): New expander. From-SVN: r260117
2018-05-10re PR fortran/54613 ([F08] Add FINDLOC plus support MAXLOC/MINLOC with ↵Thomas Koenig2-7/+20
KIND=/BACK=) 2018-05-10 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/54613 * intrinsic.texi: Document BACK for MINLOC and MAXLOC. From-SVN: r260116
2018-05-10PR libstdc++/83140 - assoc_legendre returns negated value when m is oddEdward Smith-Rowland4-2333/+292
2018-05-10 Edward Smith-Rowland <3dw4rd@verizon.net> PR libstdc++/83140 - assoc_legendre returns negated value when m is odd * include/tr1/legendre_function.tcc (__assoc_legendre_p): Add __phase argument defaulted to +1. Doxy comments on same. * testsuite/special_functions/02_assoc_legendre/ check_assoc_legendre.cc: Regen. * testsuite/tr1/5_numerical_facilities/special_functions/ 02_assoc_legendre/check_tr1_assoc_legendre.cc: Regen. From-SVN: r260115
2018-05-10PR libstdc++/85729 add linkage specifications to headersJonathan Wakely6-4/+23
PR libstdc++/85729 * include/bits/c++config.h (__replacement_assert): Add linkage specification. * include/bits/std_abs.h: Add comment to closing brace of block. * include/c_global/cstddef: Add linkage specification. * include/c_global/cstring: Likewise. * include/c_global/cwchar: Likewise. From-SVN: r260114
2018-05-10re PR fortran/68846 (Pointer function as LValue doesn't work when the ↵Paul Thomas5-1/+178
assignment regards a dummy argument.) 2018-05-10 Paul Thomas <pault@gcc.gnu.org> PR fortran/68846 PR fortran/70864 * resolve.c (get_temp_from_expr): The temporary must not have dummy or intent attributes. 2018-05-10 Paul Thomas <pault@gcc.gnu.org> PR fortran/68846 * gfortran.dg/temporary_3.f90 : New test. PR fortran/70864 * gfortran.dg/temporary_2.f90 : New test. From-SVN: r260113
2018-05-10Improve boostrap-ubsan config (PR bootstrap/64914).Martin Liska4-4/+14
2018-05-10 Martin Liska <mliska@suse.cz> PR bootstrap/64914 * bootstrap-ubsan.mk: Define UBSAN_BOOTSTRAP. 2018-05-10 Martin Liska <mliska@suse.cz> PR bootstrap/64914 * md5.c: Use strict alignment with UBSAN_BOOTSTRAP. From-SVN: r260112
2018-05-10rs6000: Remove -maltivec={be,le}Segher Boessenkool37-2072/+210
This removes the -maltivec=be and -maltivec=le options. Those were deprecated in GCC 8. Altivec will keep working on both BE and LE; it is just the BE-vectors- on-LE that is removed (the other way around was never supported). The main change is replacing VECTOR_ELT_ORDER_BIG by BYTES_BIG_ENDIAN (and then simplifying). * config/rs6000/altivec.md (altivec_vmrghb, altivec_vmrghh, altivec_vmrghw, altivec_vmrglb, altivec_vmrglh, altivec_vmrglw): Remove -maltivec=be support. (vec_widen_umult_even_v16qi, vec_widen_smult_even_v16qi, vec_widen_umult_even_v8hi, vec_widen_smult_even_v8hi, vec_widen_umult_even_v4si, vec_widen_smult_even_v4si, vec_widen_umult_odd_v16qi, vec_widen_smult_odd_v16qi, vec_widen_umult_odd_v8hi, vec_widen_smult_odd_v8hi, vec_widen_umult_odd_v4si, vec_widen_smult_odd_v4si, altivec_vpkpx, altivec_vpks<VI_char>ss, altivec_vpks<VI_char>us, altivec_vpku<VI_char>us, altivec_vpku<VI_char>um, altivec_vsum2sws, altivec_vsumsws): Adjust. (altivec_vspltb *altivec_vspltb_internal, altivec_vsplth, *altivec_vsplth_internal, altivec_vspltw, *altivec_vspltw_internal, altivec_vspltsf, *altivec_vspltsf_internal): Remove -maltivec=be support. (altivec_vperm_<mode>, altivec_vperm_<mode>_uns, altivec_vupkhs<VU_char>, altivec_vupkls<VU_char>, altivec_vupkhpx, altivec_vupklpx, altivec_lvsl, altivec_lvsr): Adjust. (altivec_lve<VI_char>x): Delete expand. (*altivec_lve<VI_char>x_internal): Rename to... (altivec_lve<VI_char>x): ... this. (altivec_lvxl_<mode>): Delete expand. (*altivec_lvxl_<mode>_internal): Rename to ... (altivec_lvxl_<mode>): ... this. (altivec_stvxl_<mode>): Delete expand. (*altivec_stvxl_<mode>_internal): Rename to ... (altivec_stvxl_<mode>): ... this. (altivec_stve<VI_char>x): Delete expand. (*altivec_stve<VI_char>x_internal): Rename to ... (altivec_stve<VI_char>x): ... this. (doublee<mode>2, unsdoubleev4si2, doubleo<mode>2, unsdoubleov4si2, doubleh<mode>2, unsdoublehv4si2, doublel<mode>2, unsdoublelv4si2, reduc_plus_scal_<mode>): Adjust. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Adjust comment. (rs6000_cpu_cpp_builtins): Adjust. (altivec_resolve_overloaded_builtin): Remove -maltivec=be support. * config/rs6000/rs6000-protos.h (altivec_expand_lvx_be, altivec_expand_stvx_be, altivec_expand_stvex_be): Delete. * config/rs6000/rs6000.c (rs6000_option_override_internal): Remove -maltivec=be support. (rs6000_split_vec_extract_var): Adjust. (rs6000_split_v4si_init): Adjust. (swap_selector_for_mode): Delete. (altivec_expand_lvx_be, altivec_expand_stvx_be, altivec_expand_stvex_be): Delete. (altivec_expand_lv_builtin, altivec_expand_stv_builtin): Remove -maltivec=be support. (rs6000_gimple_fold_builtin): Ditto. (rs6000_generate_float2_double_code, rs6000_generate_float2_code): Adjust. * config/rs6000/rs6000.h (VECTOR_ELT_ORDER_BIG): Delete. (TARGET_DIRECT_MOVE_64BIT): Adjust. * config/rs6000/rs6000.md (split for extendsidi2 for vectors): Adjust. * config/rs6000/rs6000.opt (maltivec=le, maltivec=be): Delete. * config/rs6000/vsx.md (floate<mode>, unsfloatev2di, floato<mode>, unsfloatov2di, vsignedo_v2df, vsignede_v2df, vunsignedo_v2df, vunsignede_v2df, vsx_extract_<mode>_p9, *vsx_extract_si, *vsx_extract_<mode>_p8, *vsx_extract_si_<uns>float_df, *vsx_extract_si_<uns>float_<mode>, vsx_set_<mode>_p9, vsx_set_v4sf_p9, *vsx_insert_extract_v4sf_p9, *vsx_insert_extract_v4sf_p9_2, and an anonymous split): Adjust. (vsx_mergel_<mode>, vsx_mergeh_<mode>): Remove -maltivec=be support. (vsx_xxspltd_<mode>, extract4b, insert4b): Adjust. gcc/testsuite/ * gcc.dg/vmx/extract-be-order.c: Delete testcase. * gcc.dg/vmx/extract-vsx-be-order.c: Delete testcase. * gcc.dg/vmx/insert-be-order.c: Delete testcase. * gcc.dg/vmx/insert-vsx-be-order.c: Delete testcase. * gcc.dg/vmx/ld-be-order.c: Delete testcase. * gcc.dg/vmx/ld-vsx-be-order.c: Delete testcase. * gcc.dg/vmx/lde-be-order.c: Delete testcase. * gcc.dg/vmx/ldl-be-order.c: Delete testcase. * gcc.dg/vmx/ldl-vsx-be-order.c: Delete testcase. * gcc.dg/vmx/merge-be-order.c: Delete testcase. * gcc.dg/vmx/merge-vsx-be-order.c: Delete testcase. * gcc.dg/vmx/mult-even-odd-be-order.c: Delete testcase. * gcc.dg/vmx/pack-be-order.c: Delete testcase. * gcc.dg/vmx/perm-be-order.c: Delete testcase. * gcc.dg/vmx/splat-be-order.c: Delete testcase. * gcc.dg/vmx/splat-vsx-be-order.c: Delete testcase. * gcc.dg/vmx/st-be-order.c: Delete testcase. * gcc.dg/vmx/st-vsx-be-order.c: Delete testcase. * gcc.dg/vmx/ste-be-order.c: Delete testcase. * gcc.dg/vmx/stl-be-order.c: Delete testcase. * gcc.dg/vmx/stl-vsx-be-order.c: Delete testcase. * gcc.dg/vmx/sum2s-be-order.c: Delete testcase. * gcc.dg/vmx/unpack-be-order.c: Delete testcase. * gcc.dg/vmx/vsums-be-order.c: Delete testcase. * gcc.target/powerpc/vec-setup-be-double.c: Delete testcase. * gcc.target/powerpc/vec-setup-be-long.c: Delete testcase. * gcc.target/powerpc/vec-setup.h: Remove -maltivec=be support. From-SVN: r260109
2018-05-10configure.ac (gcc_gxx_include_dir_add_sysroot): Set it to 1 only when ↵Eric Botcazou3-14/+20
--with-gxx-include-dir is also specified. * configure.ac (gcc_gxx_include_dir_add_sysroot): Set it to 1 only when --with-gxx-include-dir is also specified. * configure: Regenerate. From-SVN: r260108
2018-05-10re PR tree-optimization/85699 (gcc.dg/nextafter-2.c fail)Jakub Jelinek3-2/+22
PR tree-optimization/85699 * gcc.dg/nextafter-1.c (NO_LONG_DOUBLE): Define if not defined. Use !NO_LONG_DOUBLE instead of __LDBL_MANT_DIG__ != 106. * gcc.dg/nextafter-2.c: Include stdlib.h. For glibc < 2.24 define NO_LONG_DOUBLE to 1 before including nextafter-1.c. From-SVN: r260107
2018-05-10re PR c++/85400 (invalid Local Dynamic TLS relaxation for symbol defined in ↵Eric Botcazou6-3/+58
method) PR c++/85400 cp/ * decl2.c (adjust_var_decl_tls_model): New static function. (comdat_linkage): Call it on a variable. (maybe_make_one_only): Likewise. c-family/ * c-attribs.c (handle_visibility_attribute): Do not set no_add_attrs. From-SVN: r260106
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