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2023-12-08haifa-sched: Avoid overflows in extend_h_i_d [PR112411]Jakub Jelinek1-1/+1
2023-12-08LoongArch: Remove the definition of ISA_BASE_LA64V110 from the code.Lulu Cheng9-45/+19
2023-12-08LoongArch: Switch loongarch-def from C to C++ to make it possible.Xi Ruoyao8-258/+390
2023-12-08Add IntegerRange for -param=min-nondebug-insn-uid= and fix vector growing in ...Jakub Jelinek3-2/+5
2023-12-08i386: Mark Xeon Phi ISAs as deprecatedHaochen Jiang96-79/+175
2023-12-08RISC-V: Remove redundant check of better_main_loop_than_p in COST modelJuzhe-Zhong1-3/+0
2023-12-08tree-optimization/112774: extend the SCEV CHREC tree with a nonwrapping flagHao Liu8-9/+73
2023-12-07[PATCH 1/5][V3][ifcvt] optimize x=c ? (y op z) : y by RISC-V Zicond like insnsFei Gao2-0/+753
2023-12-07analyzer: fix ICE for 2 bits before the start of base region [PR112889]David Malcolm2-5/+22
2023-12-08Daily bump.GCC Administrator8-1/+1108
2023-12-08RISC-V: Support interleave vector with different step sequenceJuzhe-Zhong6-12/+211
2023-12-07libstdc++: Simplify ranges::to closure objectsPatrick Palka1-102/+26
2023-12-07libstdc++: Fix misleading typedef name in <format>Jonathan Wakely1-2/+1
2023-12-07libstdc++: Use <cstdint> instead of <stdint.h> in <bits/atomic_wait.h>Jonathan Wakely1-1/+1
2023-12-07libstdc++: Fix recent changes to __glibcxx_assert [PR112882]Jonathan Wakely1-8/+21
2023-12-07aarch64: Add an early RA for strided registersRichard Sandiford23-60/+4113
2023-12-07arm: vld1_types_x4 ACLE intrinsicsEzra Sitorus7-22/+231
2023-12-07arm: vld1_types_x3 ACLE intrinsicsEzra Sitorus7-22/+231
2023-12-07arm: vld1_types_x2 ACLE intrinsicsEzra Sitorus7-20/+254
2023-12-07arm: vst1q_types_x4 ACLE intrinsicsEzra Sitorus7-1/+219
2023-12-07arm: vst1q_types_x3 ACLE intrinsicsEzra Sitorus7-0/+217
2023-12-07arm: vst1q_types_x2 ACLE intrinsicsEzra Sitorus8-3/+232
2023-12-07arm: vst1_types_x4 ACLE intrinsicsEzra Sitorus7-7/+200
2023-12-07arm: vst1_types_x3 ACLE intrinsicsEzra Sitorus7-7/+202
2023-12-07arm: vst1_types_x2 ACLE intrinsicsEzra Sitorus7-0/+231
2023-12-07arm: vld1q_types_x4 ACLE intrinsicsEzra Sitorus7-0/+236
2023-12-07arm: vld1q_types_x3 ACLE intrinsicsEzra Sitorus7-3/+236
2023-12-07arm: vld1q_types_x2 ACLE intrinsicsEzra Sitorus7-0/+247
2023-12-07s390: Fix expansion of vec_stepStefan Schulze Frielinghaus1-2/+2
2023-12-07aarch64: add -fno-stack-protector to testsMarek Polacek30-32/+32
2023-12-07strub: enable conditional supportAlexandre Oliva103-3/+272
2023-12-07testsuite: skip gcc.target/i386/pr106910-1.c test when using newlibMarc Poulhiès1-0/+1
2023-12-07testsuite: refine gcc.dg/analyzer/fd-4.c test for newlibMarc Poulhiès1-0/+1
2023-12-07testsuite: require avx_runtime for some testsMarc Poulhiès3-5/+6
2023-12-07PR modula2/112893 detect procedure address incompatible with cardinal in isoGaius Mulley8-235/+254
2023-12-07RISC-V: Fix AVL propagation ICE for vleff/vlsegffJuzhe-Zhong3-7/+72
2023-12-07RISC-V: xtheadmemidx: Document inline asm issue with memory constraintChristoph Müllner1-0/+26
2023-12-07RISC-V: xtheadfmemidx: Disable if xtheadmemidx is not availableChristoph Müllner3-10/+51
2023-12-07testsuite: Add testcase for already fixed PR [PR111068]Jakub Jelinek1-0/+12
2023-12-07c-family: Fix up -fno-debug-cpp [PR111965]Jakub Jelinek3-1/+11
2023-12-07expr: Handle BITINT_TYPE in count_type_elements [PR112881]Jakub Jelinek2-0/+22
2023-12-07tree-ssa-dce: Fix up maybe_optimize_arith_overflow for BITINT_TYPE [PR112880]Jakub Jelinek2-3/+38
2023-12-07testsuite: Fix up gcc.target/s390/pr96127.c test for modern C [PR96127]Jakub Jelinek1-2/+2
2023-12-07analyzer: deal with -fshort-enumsAlexandre Oliva3-4/+304
2023-12-07libsupc++: try cxa_thread_atexit_impl at runtimeAlexandre Oliva2-1/+27
2023-12-07aarch64: rcpc3: Add intrinsics testsVictor Do Nascimento1-0/+47
2023-12-07aarch64: rcpc3: add Neon ACLE wrapper functions to `arm_neon.h'Victor Do Nascimento1-0/+129
2023-12-07aarch64: rcpc3: Add Neon ACLE intrinsicsVictor Do Nascimento3-0/+74
2023-12-07aarch64: rcpc3: Add relevant iterators to handle Neon intrinsicsVictor Do Nascimento1-8/+17
2023-12-07aarch64: rcpc3: Add +rcpc3 extensionVictor Do Nascimento3-0/+7
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