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2023-02-25Daily bump.GCC Administrator7-1/+280
2023-02-24Update .po filesJoseph Myers42-248408/+299546
gcc/po/ * be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po, ja.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po, zh_TW.po: Update. libcpp/po/ * be.po, ca.po, da.po, de.po, el.po, eo.po, es.po, fi.po, fr.po, id.po, ja.po, ka.po, nl.po, pt_BR.po, ro.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po, zh_TW.po: Update.
2023-02-24Fortran: Add support for WEAK attribute for variablesRimvydas Jasinskas3-0/+70
Add the rest of the weak-*.f90 testcases. gcc/fortran/ChangeLog: * trans-decl.cc (gfc_finish_var_decl): Apply attribute. (generate_local_decl): Add diagnostic for dummy and local variables. gcc/testsuite/ChangeLog: * gfortran.dg/weak-2.f90: New test. * gfortran.dg/weak-3.f90: New test. Signed-off-by: Rimvydas Jasinskas <rimvydas.jas@gmail.com>
2023-02-24fortran: Plug leak of associated_dummy memory. [PR108923]Mikael Morin1-0/+7
This fixes a memory leak by accompanying the release of gfc_actual_arglist elements' memory with a release of the associated_dummy field memory (if allocated). Actual argument copy is adjusted as well so that each copy can free its field independently. PR fortran/108923 gcc/fortran/ChangeLog: * expr.cc (gfc_free_actual_arglist): Free associated_dummy memory. (gfc_copy_actual_arglist): Make a copy of the associated_dummy field if it is set in the original element.
2023-02-24Fortran: frontend passes do_subscript leaks gmp memory [PR108924]Harald Anlauf1-1/+4
gcc/fortran/ChangeLog: PR fortran/108924 * frontend-passes.cc (do_subscript): Clear used gmp variable.
2023-02-24libstdc++: Fix formattingMatthias Kretz7-930/+942
Whitespace changes only. Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: * include/experimental/bits/simd.h: Line breaks and indenting fixed to follow the libstdc++ standard. * include/experimental/bits/simd_builtin.h: Likewise. * include/experimental/bits/simd_fixed_size.h: Likewise. * include/experimental/bits/simd_neon.h: Likewise. * include/experimental/bits/simd_ppc.h: Likewise. * include/experimental/bits/simd_scalar.h: Likewise. * include/experimental/bits/simd_x86.h: Likewise.
2023-02-24libstdc++: Always-inline most of non-cmath fixed_size implementationMatthias Kretz1-30/+30
For simd, the inlining behavior should be similar to builtin types. (No operator on buitin types is ever translated into a function call.) Therefore, always_inline is the right choice (i.e. inline on -O0 as well). Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: PR libstdc++/108030 * include/experimental/bits/simd_fixed_size.h (_SimdImplFixedSize::_S_broadcast): Replace inline with _GLIBCXX_SIMD_INTRINSIC. (_SimdImplFixedSize::_S_generate): Likewise. (_SimdImplFixedSize::_S_load): Likewise. (_SimdImplFixedSize::_S_masked_load): Likewise. (_SimdImplFixedSize::_S_store): Likewise. (_SimdImplFixedSize::_S_masked_store): Likewise. (_SimdImplFixedSize::_S_min): Likewise. (_SimdImplFixedSize::_S_max): Likewise. (_SimdImplFixedSize::_S_complement): Likewise. (_SimdImplFixedSize::_S_unary_minus): Likewise. (_SimdImplFixedSize::_S_plus): Likewise. (_SimdImplFixedSize::_S_minus): Likewise. (_SimdImplFixedSize::_S_multiplies): Likewise. (_SimdImplFixedSize::_S_divides): Likewise. (_SimdImplFixedSize::_S_modulus): Likewise. (_SimdImplFixedSize::_S_bit_and): Likewise. (_SimdImplFixedSize::_S_bit_or): Likewise. (_SimdImplFixedSize::_S_bit_xor): Likewise. (_SimdImplFixedSize::_S_bit_shift_left): Likewise. (_SimdImplFixedSize::_S_bit_shift_right): Likewise. (_SimdImplFixedSize::_S_remquo): Add inline keyword (to be explicit about not always-inline, yet). (_SimdImplFixedSize::_S_isinf): Likewise. (_SimdImplFixedSize::_S_isfinite): Likewise. (_SimdImplFixedSize::_S_isnan): Likewise. (_SimdImplFixedSize::_S_isnormal): Likewise. (_SimdImplFixedSize::_S_signbit): Likewise.
2023-02-24libstdc++: More efficient masked inc-/decrement implementationMatthias Kretz2-2/+93
Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: PR libstdc++/108856 * include/experimental/bits/simd_builtin.h (_SimdImplBuiltin::_S_masked_unary): More efficient implementation of masked inc-/decrement for integers and floats without AVX2. * include/experimental/bits/simd_x86.h (_SimdImplX86::_S_masked_unary): New. Use AVX512 masked subtract builtins for masked inc-/decrement.
2023-02-24Avoid default-initializing auto_vec<T, N> storage, fix vec<vl_embed>Richard Biener2-11/+37
The following avoids default-initializing auto_vec storage for non-POD T since that's not what the allocated storage fallback will do and it's also not expected for existing cases like auto_vec<std::pair<unsigned, unsigned>, 64> elts; which exist to optimize the allocation. It also fixes the array accesses done by vec<vl_embed> to not use its own m_vecdata member but instead access the container provided storage via pointer arithmetic. * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove. (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid changing alignment of vec<T, A, vl_embed> and simplifying address. (vec<T, A, vl_embed>::address): Compute as this + 1. (vec<T, A, vl_embed>::embedded_size): Use sizeof the vector instead of the offset of the m_vecdata member. (auto_vec<T, N>::m_data): Turn storage into uninitialized unsigned char. (auto_vec<T, N>::auto_vec): Allow allocation of one stack member. Initialize m_vec in a special way to avoid later stringop overflow diagnostics. * vec.cc (test_auto_alias): New. (vec_cc_tests): Call it.
2023-02-24Change vec<,,vl_embed>::m_vecdata refrences into address ()Richard Biener1-19/+25
As preparation to remove m_vecdata in the vl_embed vector this changes references to it into calls to address (). As I was here it also fixes ::contains to avoid repeated bounds checking and the same issue in ::lower_bound which also suffers from unnecessary copying around values. * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to take a const reference to the object, use address to access data. (vec<T, A, vl_embed>::contains): Use address to access data. (vec<T, A, vl_embed>::operator[]): Use address instead of m_vecdata to access data. (vec<T, A, vl_embed>::iterate): Likewise. (vec<T, A, vl_embed>::copy): Likewise. (vec<T, A, vl_embed>::quick_push): Likewise. (vec<T, A, vl_embed>::pop): Likewise. (vec<T, A, vl_embed>::quick_insert): Likewise. (vec<T, A, vl_embed>::ordered_remove): Likewise. (vec<T, A, vl_embed>::unordered_remove): Likewise. (vec<T, A, vl_embed>::block_remove): Likewise. (vec<T, A, vl_heap>::address): Likewise.
2023-02-24asan: adjust module name for global variablesMartin Liska2-2/+12
As mentioned in the PR, when we use LTO, we wrongly use ltrans output file name as a module name of a global variable. That leads to a non-reproducible output. After the suggested change, we emit context name of normal global variables. And for artificial variables (like .Lubsan_data3), we use aux_base_name (e.g. "./a.ltrans0.ltrans"). PR sanitizer/108834 gcc/ChangeLog: * asan.cc (asan_add_global): Use proper TU name for normal global variables (and aux_base_name for the artificial one). gcc/testsuite/ChangeLog: * c-c++-common/asan/global-overflow-1.c: Test line and column info for a global variable.
2023-02-24[PR105224] C++ modules and AAPCS/ARM EABI clash on inline key methodsAlexandre Oliva1-0/+3
g++.dg/modules/virt-2_a.C fails on arm-eabi and many other arm targets that use the AAPCS variant. ARM is the only target that overrides TARGET_CXX_KEY_METHOD_MAY_BE_INLINE. It's not clear to me which way the clash between AAPCS and C++ Modules design should be resolved, but currently it favors AAPCS and thus the test fails, so skip it on arm_eabi. for gcc/testsuite/ChangeLog PR c++/105224 * g++.dg/modules/virt-2_a.C: Skip on arm_eabi.
2023-02-24libstdc++: Constrain net::executor constructorsJonathan Wakely1-2/+7
The TS says the arguments to these constructors shall meet the Executor requirements, so it's undefined if they don't. Constraining on a subset of those requirements won't affect valid cases, but prevents the majority of invalid cases from trying to instantiate the constructor. This prevents the non-explicit executor(Executor) constructor being a candidate anywhere that a net::executor could be constructed e.g. comparing ip::tcp::v4() == ip::udp::v4() would try to convert both operands to executor using that constructor, then compare then using operator==(const executor&, const executor&). libstdc++-v3/ChangeLog: * include/experimental/executor (executor): Constrain template constructors.
2023-02-24libstdc++: Make net::ip::basic_endpoint comparisons constexprJonathan Wakely2-6/+72
libstdc++-v3/ChangeLog: * include/experimental/internet (basic_endpoint): Add missing constexpr to comparison operators. * testsuite/experimental/net/internet/endpoint/cons.cc: New test.
2023-02-24libstdc++: Fix members of net::ip::network_v4Jonathan Wakely3-13/+343
libstdc++-v3/ChangeLog: * include/experimental/internet (network_v4::netmask()): Avoid undefined shift. (network_v4::broadcast()): Optimize and fix for targets with uint_least32_t wider than 32 bits. (network_v4::to_string(const Allocator&)): Fix for custom allocators and optimize using to_chars. (operator==(const network_v4&, const network_v4&)): Add missing constexpr. (operator==(const network_v6&, const network_v6&)): Likewise. * testsuite/experimental/net/internet/network/v4/cons.cc: New test. * testsuite/experimental/net/internet/network/v4/members.cc: New test.
2023-02-24libstdc++: Fix conversion to/from net::ip::address_v4::bytes_typeJonathan Wakely4-20/+60
I messed up the endianness of the address_v4::bytes_type array, which should always be in network byte order. We can just use bit_cast to convert the _M_addr member to/from bytes_type. libstdc++-v3/ChangeLog: * include/experimental/internet (address_4(const bytes_type&)): Use __builtin_bit_cast if available, otherwise convert to network byte order. (address_v4::to_bytes()): Likewise, but convert from network byte order. * testsuite/experimental/net/internet/address/v4/cons.cc: Fix incorrect tests. Check for constexpr too. * testsuite/experimental/net/internet/address/v4/creation.cc: Likewise. * testsuite/experimental/net/internet/address/v4/members.cc: Check that bytes_type is a standard-layout type.
2023-02-24libstdc++: Optimize net::ip::address_v4::to_string()Jonathan Wakely2-8/+31
This is an order of magnitude faster than calling inet_ntop (and not only because we now avoid allocating a string that is one byte larger than the SSO buffer). libstdc++-v3/ChangeLog: * include/experimental/internet (address_v4::to_string): Optimize. * testsuite/experimental/net/internet/address/v4/members.cc: Check more addresses.
2023-02-24libstdc++: Suppress warnings about use of deprecated std::aligned_storageJonathan Wakely1-0/+3
libstdc++-v3/ChangeLog: * include/ext/aligned_buffer.h (__aligned_buffer): Add diagnostic pragmas.
2023-02-24libstdc++: Reorder dg-options before dg-doJonathan Wakely1-1/+1
The options need to be set first, so that -std=gnu++20 is used when checking the c++20 effective target. libstdc++-v3/ChangeLog: * testsuite/std/format/arguments/lwg3810.cc: Move dg-options before dg-do.
2023-02-24i386: Update i386-builtin.def file comment description of BDESC{,_FIRST}Jakub Jelinek1-2/+2
I've noticed the description of these wasn't updated when the mask2 argument has been added in 2019. 2023-02-24 Jakub Jelinek <jakub@redhat.com> * config/i386/i386-builtin.def: Update description of BDESC and BDESC_FIRST in file comment to include mask2.
2023-02-24aarch64: Update FLAGS field documentation comment in aarch64-cores.defKyrylo Tkachov1-1/+4
With the cleanup of the arch features in GCC 13 the comment on the FLAGS field in aarch64-cores.def is now outdated. It's now a comma-separated list rather than a bitwise or. Spotted while reviewing an aarch64-cores.def patch. Update the comment. gcc/ChangeLog: * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
2023-02-24cgraphclones: Don't share DECL_ARGUMENTS between thunk and its artificial ↵Jakub Jelinek2-1/+48
thunk [PR108854] The following testcase ICEs on x86_64-linux with -m32. The problem is we create an artificial thunk and because of -fPIC, ia32 and thunk destination which doesn't bind locally can't use a mi thunk. The ICE is because during expansion to RTL we see SSA_NAME for a PARM_DECL, but the PARM_DECL doesn't have DECL_CONTEXT of the current function. This is because duplicate_thunk_for_node creates a new DECL_ARGUMENTS chain only if some arguments need modification. The following patch fixes it by copying the DECL_ARGUMENTS list even if the arguments can stay as is, to update DECL_CONTEXT on them. While for mi thunks it doesn't really matter because we don't use those arguments in any way, for other thunks it is important. 2023-02-23 Jakub Jelinek <jakub@redhat.com> PR middle-end/108854 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter changes are needed, copy at least DECL_ARGUMENTS PARM_DECL nodes and adjust their DECL_CONTEXT. * g++.dg/opt/pr108854.C: New test.
2023-02-24i386: Fix up builtins used in avx512bf16vlintrin.h [PR108881]Jakub Jelinek2-16/+30
The builtins used in avx512bf16vlintrin.h implementation need both avx512bf16 and avx512vl ISAs, which the header ensures for them, but the builtins weren't actually requiring avx512vl, so when used by hand with just -mavx512bf16 -mno-avx512vl it resulted in ICEs. Fixed by adding OPTION_MASK_ISA_AVX512VL to their BDESC. 2023-02-24 Jakub Jelinek <jakub@redhat.com> PR target/108881 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf, __builtin_ia32_cvtne2ps2bf16_v16bf_mask, __builtin_ia32_cvtne2ps2bf16_v16bf_maskz, __builtin_ia32_cvtne2ps2bf16_v8bf, __builtin_ia32_cvtne2ps2bf16_v8bf_mask, __builtin_ia32_cvtne2ps2bf16_v8bf_maskz, __builtin_ia32_cvtneps2bf16_v8sf_mask, __builtin_ia32_cvtneps2bf16_v8sf_maskz, __builtin_ia32_cvtneps2bf16_v4sf_mask, __builtin_ia32_cvtneps2bf16_v4sf_maskz, __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask, __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf, __builtin_ia32_dpbf16ps_v4sf_mask, __builtin_ia32_dpbf16ps_v4sf_maskz): Require also OPTION_MASK_ISA_AVX512VL. * gcc.target/i386/avx512bf16-pr108881.c: New test.
2023-02-24libsanitizer: cherry-pick commit 8f5962b1ccb5fcd4d4544121d43efb860ac3cc6d ↵Martin Liska2-3/+13
from upstream ASAN: keep support for Global::location We as GCC still emit __asan_global_source_location for global variables and we would like to use it in the future. On other hand, we don't support llvm-symbolizer and the default libbacktraace symbolizer does not support location info.
2023-02-24RTEMS: Tune multilib selectionSebastian Huber1-8/+9
gcc/ChangeLog: * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs. Add non-compact 32-bit multilibs.
2023-02-24MIPS: Add pattern for cloJunxian Zhu4-0/+33
gcc/ChangeLog: * config/mips/mips.md (*clo<mode>2): New pattern. gcc/testsuite/ChangeLog: * gcc.target/mips/clz.c: New test. * gcc.target/mips/clo.c: New test. * gcc.target/mips/mips.exp: New option HAS_CLZ. Signed-off-by: Junxian Zhu <zhujunxian@oss.cipunited.com>
2023-02-24Hazard barrier return supportJunxian Zhu5-0/+45
This patch allows a function to request clearing of all instruction and execution hazards upon normal return via __attribute__ ((use_hazard_barrier_return)). 2017-04-25 Prachi Godbole <prachi.godbole@imgtec.com> gcc/ChangeLog: * config/mips/mips.h (machine_function): New variable use_hazard_barrier_return_p. * config/mips/mips.md (UNSPEC_JRHB): New unspec. (mips_hb_return_internal): New insn pattern. * config/mips/mips.cc (mips_attribute_table): Add attribute use_hazard_barrier_return. (mips_use_hazard_barrier_return_p): New static function. (mips_function_attr_inlinable_p): Likewise. (mips_compute_frame_info): Set use_hazard_barrier_return_p. Emit error for unsupported architecture choice. (mips_function_ok_for_sibcall, mips_can_use_return_insn): Return false for use_hazard_barrier_return. (mips_expand_epilogue): Emit hazard barrier return. * doc/extend.texi: Document use_hazard_barrier_return. gcc/testsuite/ChangeLog: * gcc.target/mips/hazard-barrier-return-attribute.c: New test. Signed-off-by: Junxian Zhu <zhujunxian@oss.cipunited.com>
2023-02-24Daily bump.GCC Administrator8-1/+190
2023-02-23gcc: xtensa: update include style in xtensa-dynconfig.ccMax Filippov1-5/+5
gcc/ * config/xtensa/xtensa-dynconfig.cc (config.h, system.h) (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...> for the gcc-internal headers.
2023-02-23gcc: xtensa: rename xtensa-dynconfig.c and update its build ruleMax Filippov2-4/+3
gcc/ * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE) and $(POSTCOMPILE) instead of manual dependency listing. * config/xtensa/xtensa-dynconfig.c: Rename to ... * config/xtensa/xtensa-dynconfig.cc: ... this.
2023-02-23**/*.texi: Reorder index entriesArsen Arsenović16-702/+701
This change is a generalization of r13-6292-gddf6fe375d9110. Historically, makeinfo exhibited a bug, due to which a structure like: @item foo @cindex foo @cindex bar ... would be transformed into an item heading, with the first index entry on it, followed by an item body, with the second index entry in it. This has often lead to index entries not linking to relevant items, but rather, just below them. This bug was exhibited in both Info and HTML documentation, and was most glaringly obvious in the latter. After a discussion with the Texinfo developers, it was decided that the appropriate construct for this case is: @cindex foo @cindex bar @item foo ... which behaves correctly in newer versions, linking all the index entries to the item itself. This pattern also produces copiable anchors in HTML output. This commit fixes most indices to follow the pattern above, however, omits relevant changes in the Ada manuals, as the algorithm described below lead to many false positives and unwanted changes in that manual. Much like the previous commit, this change is mostly mechanical, with a simple script. I have, however, gone over the patch myself also, to see if there's anything that ought to be kept as-is. Formatter: # GPL3+ use v5.35; use strict; use warnings; my @lineq = (); my @itemq = (); my @indxq = (); my $lstin = 0; while (<>) { push (@lineq, $_); if (/^\@[a-zA-Z0-9]{1,2}index\W/) { $lstin = @lineq; push (@indxq, $_); next; } if (/^\@itemx?\W/) { $lstin = @lineq; push (@itemq, $_); next; } next if $lstin && /^\s*(\@c(omment)?\W.*)?$/; if (@indxq and @itemq) { print @indxq; print @itemq; print @lineq[$lstin..@lineq-1]; } else { print @lineq; } @lineq = (); @itemq = (); @indxq = (); $lstin = 0; } if (@indxq and @itemq) { print @indxq; print @itemq; print @lineq[$lstin..@lineq-1]; } else { print @lineq; } # Local Variables: # indent-tabs-mode: nil # End: gcc/d/ChangeLog: * implement-d.texi: Reorder index entries around @items. gcc/ChangeLog: * doc/cfg.texi: Reorder index entries around @items. * doc/cpp.texi: Ditto. * doc/cppenv.texi: Ditto. * doc/cppopts.texi: Ditto. * doc/generic.texi: Ditto. * doc/install.texi: Ditto. * doc/extend.texi: Ditto. * doc/invoke.texi: Ditto. * doc/md.texi: Ditto. * doc/rtl.texi: Ditto. * doc/tm.texi.in: Ditto. * doc/trouble.texi: Ditto. * doc/tm.texi: Regenerate. gcc/fortran/ChangeLog: * invoke.texi: Reorder index entries around @items. gcc/go/ChangeLog: * gccgo.texi: Reorder index entries around @items.
2023-02-23xtensa: Eliminate unnecessary general-purpose reg-reg movesTakayuki 'January June' Suwa3-0/+79
Register-register move instructions that can be easily seen as unnecessary by the human eye may remain in the compiled result. For example: /* example */ double test(double a, double b) { return __builtin_copysign(a, b); } test: add.n a3, a3, a3 extui a5, a5, 31, 1 ssai 1 ;; Be in the same BB src a7, a5, a3 ;; Replacing the destination doesn't ;; violate any constraints of the ;; operands ;; No CALL insns in this span ;; Both A3 and A7 are irrelevant to ;; insns in this span mov.n a3, a7 ;; An unnecessary reg-reg move ;; A7 is not used after this ret.n The last two instructions above, excluding the return instruction, could be done like this: src a3, a5, a3 This symptom often occurs when handling DI/DFmode values with SImode instructions. This patch solves the above problem using peephole2 pattern. gcc/ChangeLog: * config/xtensa/xtensa.md: New peephole2 pattern that eliminates the occurrence of general-purpose register used only once and for transferring intermediate value. gcc/testsuite/ChangeLog: * gcc.target/xtensa/elim_GP_regmove_0.c: New test. * gcc.target/xtensa/elim_GP_regmove_1.c: New test.
2023-02-23xtensa: Eliminate the use of callee-saved register that saves and restores ↵Takayuki 'January June' Suwa2-25/+145
only once In the case of the CALL0 ABI, values that must be retained before and after function calls are placed in the callee-saved registers (A12 through A15) and referenced later. However, it is often the case that the save and the reference are each only once and a simple register- register move (with two exceptions; i. the register saved to/restored from is the stack pointer, ii. the function needs an additional stack pointer adjustment to grow the stack). e.g. in the following example, if there are no other occurrences of register A14: ;; before ; prologue { ... s32i.n a14, sp, 16 ... ;; no frame pointer needed ;; no additional stack growth ; } prologue ... mov.n a14, a6 ;; A6 is not SP ... call0 foo ... mov.n a8, a14 ;; A8 is not SP ... ; epilogue { ... l32i.n a14, sp, 16 ... ; } epilogue It can be possible like this: ;; after ; prologue { ... (no save needed) ... ; } prologue ... s32i.n a6, sp, 16 ;; replaced with A14's slot ... call0 foo ... l32i.n a8, sp, 16 ;; through SP ... ; epilogue { ... (no restoration needed) ... ; } epilogue This patch adds the abovementioned logic to the function prologue/epilogue RTL expander code. gcc/ChangeLog: * config/xtensa/xtensa.cc (machine_function): Add new member 'eliminated_callee_saved_bmp'. (xtensa_can_eliminate_callee_saved_reg_p): New function to determine whether the register can be eliminated or not. (xtensa_expand_prologue): Add invoking the above function and elimination the use of callee-saved register by using its stack slot through the stack pointer (or the frame pointer if needed) directly. (xtensa_expand_prologue): Modify to not emit register restoration insn from its stack slot if the register is already eliminated. gcc/testsuite/ChangeLog: * gcc.target/xtensa/elim_callee_saved.c: New.
2023-02-23xtensa: Fix up fatal_error message strings in xtensa-dynconfig.c [PR108890]Jakub Jelinek1-4/+4
The translation PR complains that these 4 messages from xtensa-dynconfig.c are marked in po/gcc.pot as c-format (which doesn't allow %qs) while they should be gcc-internal-format. The problem is in the manual translation of the strings with _(), that should be both unnecessary because fatal_error invokes _() on its argument already, but also incorrect for the above reason, for gcc-internal-format strings one should use G_("...") instead if really needed. The following patch drops those _("..."), tested by regenerating po/gcc.pot to see they are now gcc-internal-format, but not really tested on xtensa target. 2023-02-23 Jakub Jelinek <jakub@redhat.com> PR translation/108890 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s around fatal_error format strings.
2023-02-23testsuite: Fix up modules.exp [PR108899]Jakub Jelinek1-5/+9
On Wed, Feb 22, 2023 at 02:33:42PM -0300, Alexandre Oliva via Gcc-patches wrote: > When a multi-source module is found to be unsupported, we fail > module_cmi_p and subsequent sources. Override proc unsupported to > mark the result in module_do, and test it to skip module_cmp_p and > subsequent related tests. > > for gcc/testsuite/ChangeLog > > * g++.dg/modules/modules.exp: Override unsupported to update > module_do, and test it after dg-test. This patch breaks testing with more than one set of options in target board, like make check-g++ RUNTESTFLAGS='--target_board=unix\{-m32,-m64\} modules.exp' yields: ... === g++ Summary for unix/-m32 === # of expected passes 7217 # of unexpected failures 1 # of expected failures 18 # of unsupported tests 2 Running target unix/-m64 ... ERROR: tcl error sourcing /home/jakub/src/gcc/gcc/testsuite/g++.dg/modules/modules.exp. ERROR: tcl error code TCL OPERATION RENAME TARGET_EXISTS ERROR: can't rename to "saved-unsupported": command already exists while executing "rename unsupported saved-unsupported" (file "/home/jakub/src/gcc/gcc/testsuite/g++.dg/modules/modules.exp" line 322) invoked from within "source /home/jakub/src/gcc/gcc/testsuite/g++.dg/modules/modules.exp" ("uplevel" body line 1) invoked from within "uplevel #0 source /home/jakub/src/gcc/gcc/testsuite/g++.dg/modules/modules.exp" invoked from within "catch "uplevel #0 source $test_file_name" msg" In other spots where we in *.exp files rename some routine, we guard that and the following patch does that for modules.exp too. Tested with running make check-g++ RUNTESTFLAGS='--target_board=unix\{-m32,-m64\} modules.exp' again which now works properly again. 2023-02-23 Jakub Jelinek <jakub@redhat.com> PR testsuite/108899 * g++.dg/modules/modules.exp: Only override unsupported if it exists and saved-unsupported doesn't.
2023-02-23Fix memory leak in PTARichard Biener1-4/+4
When handle_lhs_call calls .create on the passed in vector it leaks any previous allocated storage. Avoid doing that and instead rely on the caller for memory management, just truncate the vector. * tree-ssa-structalias.cc (handle_lhs_call): Do not re-create rhsc, only truncate it.
2023-02-23c++: Fix up -fcontracts option description [PR108890]Jakub Jelinek1-1/+1
This translation PR mentioned the description is a little bit weird. 2023-02-23 Jakub Jelinek <jakub@redhat.com> PR translation/108890 * c.opt (fcontracts): Fix description.
2023-02-23ipa-prop: Fix another case of missing BUILT_IN_UNREACHABLE_TRAP handling ↵Jakub Jelinek1-0/+1
[PR106258] There is another spot that handles in IPA just BUILT_IN_UNREACHABLE and not BUILT_IN_UNREACHABLE_TRAP. This patch fixes that. 2023-02-23 Jakub Jelinek <jakub@redhat.com> PR middle-end/106258 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
2023-02-23libstdc++: Test that integral simd reductions are preciseMatthias Kretz1-1/+2
Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: * testsuite/experimental/simd/tests/reductions.cc: Introduce max_distance as the type-dependent max error.
2023-02-23libstdc++: Fix -Wsign-compare issueMatthias Kretz1-1/+1
Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: * include/experimental/bits/simd_builtin.h (_S_set): Compare as int. The actual range of these indexes is very small.
2023-02-23libstdc++: Add missing constexpr on simd shift implementationMatthias Kretz1-4/+4
Resolves -Wtautological-compare warnings about `if (__builtin_is_constant_evaluated())` in the implementations of these functions. Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: * include/experimental/bits/simd_x86.h (_S_bit_shift_left) (_S_bit_shift_right): Declare constexpr. The implementation was already expecting constexpr evaluation.
2023-02-23libstdc++: Fix simd build failure on clangMatthias Kretz1-1/+2
Clang does not support __attribute__ on lambdas. Therefore, only set _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA if __clang__ is not defined. Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: PR libstdc++/108030 * include/experimental/bits/simd_detail.h (_GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA): Define as empty for __clang__.
2023-02-23libstdc++: Simplify three helper functions into oneMatthias Kretz1-6/+6
Broadcast is a very common function. This should reduce compile-time effort. Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: PR libstdc++/108030 * include/experimental/bits/simd.h (__vector_broadcast): Implement via __vector_broadcast_impl instead of __call_with_n_evaluations + 2 lambdas. (__vector_broadcast_impl): New.
2023-02-23Fix memory leak in if-conversionRichard Biener1-4/+5
The following fixes if-conversion failing to release data-references and the data-reference vector. * tree-if-conv.cc (tree_if_conversion): Properly manage memory of refs and the contained data references.
2023-02-23tree-optimization/108888 - call if-conversionRichard Biener2-7/+28
The following makes sure to only predicate calls necessary. PR tree-optimization/108888 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on calls to predicate. (predicate_statements): Only predicate calls with PLF_2. * g++.dg/torture/pr108888.C: New testcase.
2023-02-23xtensa: Fix missing mode warnings in machine descriptionTakayuki 'January June' Suwa1-6/+6
gcc/ChangeLog: * config/xtensa/xtensa.md (zero_cost_loop_start, zero_cost_loop_end, loop_end): Add missing "SI:" to PLUS RTXes.
2023-02-23xtensa: fix PR target/108876Max Filippov1-3/+3
In commit b2ef02e8cbbaf95fee98be255f697f47193960ec, the sibling call insn included (use (reg:SI A0_REG)) to fix the problem, which added a USE chain unconditionally to the data flow of register A0 during the sibling call. As a result, df_regs_ever_live_p (A0_REG) returns true, so even if register A0 is not used outside of the sibling call insn, saves and restores to stack slots are emitted in pro/epilogue, and finally code size increases. (This is why I never included (use A0) in sibling calls) /* example */ extern int foo(int); int test(int a) { return foo(a * 3 + 1); } ;; before test: addi sp, sp, -16 ;; unneeded stack frame allocation (induced) s32i.n a0, sp, 12 ;; unneeded saving of register A0 l32i.n a0, sp, 12 ;; unneeded restoration of register A0 addx2 a2, a2, a2 addi.n a2, a2, 1 addi sp, sp, 16 ;; unneeded stack frame freeing (induced) j.l foo, a9 ;; sibling call (truly needs register A0) The essential cause is that we emit (use A0) *before* the insns that does the stack pointer adjustment during epilogue expansion, so the liveness of register A0 ends early, so register A0 is reused afterwards. This patch fixes the problem and avoids such regression by doing the emit of (use A0) in the sibling call epilogue expansion at the end. ;; after test: addx2 a2, a2, a2 addi.n a2, a2, 1 j.l foo, a9 >From RTL-pass "315r.rnreg" by "gfortran -O3 -funroll-loops -mabi=call0 -S -da gcc-gnu/gcc/testsuite/gfortran.dg/allocate_with_source_5.f90": ;; Function selector_init (__selectors_MOD_selector_init, funcdef_no=2, decl_uid=987, cgraph_uid=3, symbol_order=4) ... (insn 3807 3806 3808 121 (set (reg:SI 15 a15) (mem/c:SI (plus:SI (reg/f:SI 1 sp) (const_int 268 [0x10c])) [31 S4 A32])) "gcc-gnu/gcc/testsuite/gfortran.dg/allocate_with_source_5.f90":35:30 53 {movsi_internal} (nil)) (insn 3808 3807 3809 121 (set (reg:SI 7 a7) (const_int 288 [0x120])) "gcc-gnu/gcc/testsuite/gfortran.dg/allocate_with_source_5.f90":35:30 53 {movsi_internal} (nil)) (insn 3809 3808 3810 121 (set (reg/f:SI 1 sp) (plus:SI (reg/f:SI 1 sp) (reg:SI 7 a7))) "gcc-gnu/gcc/testsuite/gfortran.dg/allocate_with_source_5.f90":35:30 1 {addsi3} (expr_list:REG_DEAD (reg:SI 9 a9) (nil))) (insn 3810 3809 721 121 (use (reg:SI 0 a0)) "gcc-gnu/gcc/testsuite/gfortran.dg/allocate_with_source_5.f90":35:30 -1 (expr_list:REG_DEAD (reg:SI 0 a0) (nil))) (call_insn/j 721 3810 722 121 (call (mem:SI (symbol_ref:SI ("free") [flags 0x41] <function_decl 0x7f7c885f6000 __builtin_free>) [0 __builtin_free S4 A32]) (const_int 0 [0])) "gcc-gnu/gcc/testsuite/gfortran.dg/allocate_with_source_5.f90":35:30 discrim 1 106 {sibcall_internal} (expr_list:REG_DEAD (reg:SI 2 a2) (expr_list:REG_CALL_DECL (symbol_ref:SI ("free") [flags 0x41] <function_decl 0x7f7c885f6000 __builtin_free>) (expr_list:REG_EH_REGION (const_int 0 [0]) (nil)))) (expr_list:SI (use (reg:SI 2 a2)) (nil))) (IMHO the "rnreg" pass doesn't take REG_ALLOC_ORDER into account; it just seems to allocate registers in fixed_regs index order, which may have hurt register A0 that became allocatable in the recent patch) gcc/ChangeLog: PR target/108876 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Emit (use (reg:SI A0_REG)) at the end in the sibling call (i.e. the same place as (return) in the normal call).
2023-02-23Revert "gcc: xtensa: fix PR target/108876"Max Filippov2-13/+9
This reverts commit b2ef02e8cbbaf95fee98be255f697f47193960ec.
2023-02-23docs: Reorder @opindex before corresponding optionsArsen Arsenović7-3103/+3103
gcc/d/ChangeLog: * gdc.texi: Reorder @opindex commands to precede @items they relate to. gcc/ChangeLog: * doc/cppdiropts.texi: Reorder @opindex commands to precede @items they relate to. * doc/cppopts.texi: Ditto. * doc/cppwarnopts.texi: Ditto. * doc/invoke.texi: Ditto. * doc/lto.texi: Ditto. gcc/fortran/ChangeLog: * invoke.texi: Reorder @opindex commands to precede @items they relate to.
2023-02-23Daily bump.GCC Administrator9-1/+767