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2021-05-14Update ChangeLog and version files for releasereleases/gcc-8.5.0releases/gcc-8Jakub Jelinek52-1/+205
2021-05-14Daily bump.GCC Administrator1-1/+1
2021-05-13Daily bump.GCC Administrator1-1/+1
2021-05-12Daily bump.GCC Administrator1-1/+1
2021-05-11Daily bump.GCC Administrator1-1/+1
2021-05-10Daily bump.GCC Administrator1-1/+1
2021-05-09Daily bump.GCC Administrator1-1/+1
2021-05-08Daily bump.GCC Administrator4-1/+49
2021-05-07aarch64: Fix ICE in final_scan_insn_1 [PR87839]Jakub Jelinek2-1/+30
2021-05-07 Jakub Jelinek <jakub@redhat.com> PR target/87839 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>): Use rIJ constraint for aarch64_plus_operand rather than rn. * gcc.target/aarch64/pr87839.c: New test.
2021-05-07libcpp: Fix up pragma preprocessing [PR100450]Jakub Jelinek2-0/+21
Since the r0-85991-ga25a8f3be322fe0f838947b679f73d6efc2a412c https://gcc.gnu.org/legacy-ml/gcc-patches/2008-02/msg01329.html changes, so that we handle macros inside of pragmas that should expand macros, during preprocessing we print those pragmas token by token, with CPP_PRAGMA printed as fputs ("#pragma ", print.outf); if (space) fprintf (print.outf, "%s %s", space, name); else fprintf (print.outf, "%s", name); where name is some identifier (so e.g. print #pragma omp parallel or #pragma omp for etc.). Because it ends in an identifier, we need to handle it like an identifier (i.e. CPP_NAME) for the decision whether a space needs to be emitted in between that #pragma whatever or #pragma whatever whatever and following token, otherwise the attached testcase is preprocessed as #pragma omp forreduction(+:red) rather than #pragma omp for reduction(+:red) The cpp_avoid_paste function is only called for this purpose. 2021-05-07 Jakub Jelinek <jakub@redhat.com> PR c/100450 * lex.c (cpp_avoid_paste): Handle token1 CPP_PRAGMA like CPP_NAME. * c-c++-common/gomp/pr100450.c: New test. (cherry picked from commit 170c850e4bd46745e2a5130b5eb09f9fceb98416)
2021-05-07aarch64: Fix gcc.target/aarch64/pr99808.c for ILP32Kyrylo Tkachov1-2/+2
Fix test for -mabi=ilp32 gcc/testsuite/ChangeLog: PR target/99808 * gcc.target/aarch64/pr99808.c: Use ULL constant suffix.
2021-05-07aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patternsKyrylo Tkachov3-44/+24
This patch fixes the RTL representation of the move_lo_quad patterns to use aarch64_simd_or_scalar_imm_zero for the zero part rather than a vec_duplicate of zero or a const_int 0. The expander that generates them is also adjusted so that we use and match the correct const_vector forms throughout. Co-Authored-By: Jakub Jelinek <jakub@redhat.com> gcc/ChangeLog: PR target/99037 PR target/100441 * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): Use aarch64_simd_or_scalar_imm_zero to match zeroes. Remove pattern matching const_int 0. (move_lo_quad_internal_be_<mode>): Likewise. (move_lo_quad_<mode>): Update for the above. * config/aarch64/iterators.md (VQ_2E): Delete. gcc/testsuite/ChangeLog: PR target/99808 * gcc.target/aarch64/pr99808.c: New test.
2021-05-07Daily bump.GCC Administrator4-1/+30
2021-05-06modulo-sched: skip loops with strange register defs [PR100225]Roman Zhuykov3-21/+1677
PR84878 fix adds an assertion which can fail, e.g. when stack pointer is adjusted inside the loop. We have to prevent it and search earlier for any 'strange' instruction. The solution is to skip the whole loop if using 'note_stores' we found that one of hard registers is in 'df->regular_block_artificial_uses' set. Also patch properly prohibit not single-set instruction in loop body. gcc/ChangeLog: PR rtl-optimization/100225 PR rtl-optimization/84878 * modulo-sched.c (sms_schedule): Use note_stores to skip loops where we have an instruction which touches (writes) any hard register from df->regular_block_artificial_uses set. Allow not-single-set instruction only right before basic block tail. gcc/testsuite/ChangeLog: PR rtl-optimization/100225 PR rtl-optimization/84878 * gcc.dg/pr100225.c: New test. libgomp/ChangeLog: * testsuite/libgomp.oacc-c-c++-common/atomic_capture-3.c: New test. (cherry picked from commit 4cf3b10f27b1994cf4a9eb12079d85412ebc7cad)
2021-05-06Daily bump.GCC Administrator3-1/+36
2021-05-05PR rtl-optimization/100263: Ensure register can change modeStefan Schulze Frielinghaus1-1/+2
For move2add_valid_value_p we also have to ask the target whether a register can be accessed in a different mode than it was set before. gcc/ChangeLog: PR rtl-optimization/100263 * postreload.c (move2add_valid_value_p): Ensure register can change mode. (cherry picked from commit bb283170e7a1f39bf533651418daf10ad18eccfc)
2021-05-05tree-optimization/98786 - fix issue with phiopt and abnormalsRichard Biener2-0/+29
This fixes factor_out_conditional_conversion to avoid creating overlapping lifetimes for abnormals. 2021-01-22 Richard Biener <rguenther@suse.de> PR tree-optimization/98786 * tree-ssa-phiopt.c (factor_out_conditional_conversion): Avoid adding new uses of abnormals. * gcc.dg/torture/pr98786.c: New testcase. (cherry picked from commit 329f730fd1daa7cdae4a637244d4e215f9bb9a8c)
2021-05-05early-remat.c: Fix new/delete mismatch [PR100230]Alex Coplan1-1/+1
This simple patch fixes a mistmatched operator new/delete in early-remat.c which triggers ASan errors on (at least) AArch64 when compiling SVE code. gcc/ChangeLog: PR rtl-optimization/100230 * early-remat.c (early_remat::sort_candidates): Use delete[] instead of delete for array allocated with new[]. (cherry picked from commit 5d87c2251c441f056e0a44f928ffcb8a8a679b6b)
2021-05-05Daily bump.GCC Administrator3-1/+124
2021-05-04nvptx: Fix up nvptx build against latest libstdc++ [PR100375]Jakub Jelinek1-5/+5
The r12-220-gd96db15967e78d7cecea3b1cf3169ceb924678ac change deprecated some non-standard std::pair constructors and that apparently broke nvptx.c build, where pseudo_node_t is std::pair<struct basic_block_def *, int> and so nullptr (or NULL) needs to be used for the first argument of the ctors instead of 0. 2021-05-02 Jakub Jelinek <jakub@redhat.com> PR target/100375 * config/nvptx/nvptx.c (nvptx_sese_pseudo): Use NULL instead of 0 as first argument of pseudo_node_t constructors. (cherry picked from commit 7911a905276781c20f704f5a91b5125e0184d072)
2021-05-04aarch64: Fix ICE in aarch64_add_offset_1_temporaries [PR100302]Jakub Jelinek1-1/+1
In PR94121 I've changed aarch64_add_offset_1 to use absu_hwi instead of abs_hwi because offset can be HOST_WIDE_INT_MIN. As can be seen with the testcase below, aarch64_add_offset_1_temporaries suffers from the same problem and should be in sync with aarch64_add_offset_1, i.e. for HOST_WIDE_INT_MIN it needs a temporary. 2021-04-29 Jakub Jelinek <jakub@redhat.com> PR target/100302 * config/aarch64/aarch64.c (aarch64_add_offset_1_temporaries): Use absu_hwi instead of abs_hwi. (cherry picked from commit 1bb3e2c0ce6ed363c72caf814a6ba6d7b17c3e0a)
2021-05-04cfgcleanup: Fix -fcompare-debug issue in outgoing_edges_match [PR100254]Jakub Jelinek2-2/+102
The following testcase fails with -fcompare-debug. The problem is that outgoing_edges_match behaves differently between -g0 and -g, if some load/store with REG_EH_REGION is followed by DEBUG_INSNs, the REG_EH_REGION check is not done, while when there are no DEBUG_INSNs, it is done. We already compute last1 and last2 as BB_END (bb{1,2}) with skipped debug insns and notes, so this patch just uses those. 2021-04-27 Jakub Jelinek <jakub@redhat.com> PR rtl-optimization/100254 * cfgcleanup.c (outgoing_edges_match): Check REG_EH_REGION on last1 and last2 insns rather than BB_END (bb1) and BB_END (bb2) insns. * g++.dg/opt/pr100254.C: New test. (cherry picked from commit e600df51a15b2ec7a72731921a2464ffe59cf5ab)
2021-05-04vmsdbgout: Remove useless register keywordsJakub Jelinek1-10/+10
register keyword was removed in C++17, and in vmsdbgout.c it served no useful purpose. 2021-04-26 Jakub Jelinek <jakub@redhat.com> PR debug/100255 * vmsdbgout.c (ASM_OUTPUT_DEBUG_STRING, vmsdbgout_begin_block, vmsdbgout_end_block, lookup_filename, vmsdbgout_source_line): Remove register keywords. (cherry picked from commit 297bfacdb448c0d29b8dfac2818350b90902bc75)
2021-05-04cprop: Fix -fcompare-debug bug in constprop_register [PR100148]Jakub Jelinek2-3/+32
The following testcase shows different behavior between -g and -g0 in constprop_register, if a flags register setter is separated from a conditional jump using those flags with -g by a DEBUG_INSN. As it uses just NEXT_INSN, for -g it will look at the DEBUG_INSN which is not a conditional jump, while otherwise it would look at the conditional jump and call cprop_jump. 2021-04-21 Jakub Jelinek <jakub@redhat.com> PR rtl-optimization/100148 * cprop.c (constprop_register): Use next_nondebug_insn instead of NEXT_INSN. * g++.dg/opt/pr100148.C: New test. (cherry picked from commit 022f6ee3ad67ee30f62c8c2aeeb4156494f3284e)
2021-05-04Add missing alignment checks in epilogue loop vectorisation (PR 86877)Richard Sandiford2-10/+17
Epilogue loop vectorisation skips vect_enhance_data_refs_alignment since it doesn't make sense to version or peel the epilogue loop (that will already have happened for the main loop). But this means that it also fails to check whether the accesses are suitably aligned for the new vector subarch. We don't seem to carry alignment information from the (potentially peeled or versioned) main loop to the epilogue loop, which would be good to fix at some point. I think we want this patch regardless, since there's no guarantee that the alignment requirements are the same for every subarch. 2018-09-20 Richard Sandiford <richard.sandiford@arm.com> gcc/ PR tree-optimization/86877 * tree-vect-loop.c (vect_analyze_loop_2): Call vect_verify_datarefs_alignment. gcc/testsuite/ PR tree-optimization/86877 * gfortran.dg/vect/vect-8-epilogue.F90: New test. (cherry picked from commit 508a909eca536f7f6a60af9bd7ecea761bd2e8f1)
2021-05-04re PR tree-optimization/86159 (g++ ICE at -O1 and above on valid code: ↵Richard Biener2-6/+10
incorrect type of vector CONSTRUCTOR elements) 2018-06-15 Richard Biener <rguenther@suse.de> PR middle-end/86159 * tree-cfg.c (gimplify_build3): Do not strip sign conversions, leave useless conversion stripping to force_gimple_operand_gsi. (gimplify_build2): Likewise. (gimplify_build1): Likewise. * g++.dg/pr86159.C: New testcase. (cherry picked from commit fa6852317327d978d4069175952109505204f6ae)
2021-05-04haifa-sched: handle fallthru edge to EXIT block (PR 85899)Alexander Monakov2-1/+18
2019-03-01 Alexander Monakov <amonakov@ispras.ru> PR rtl-optimization/85899 * haifa-sched.c (find_fallthru_edge_from): Relax assert to account for fallthru edges leading to the exit block. * gcc.dg/pr85899.c: New test. (cherry picked from commit 5055060066723e409519376c8e571e51cff1eb30)
2021-05-04re PR rtl-optimization/81025 (gcc ICE while building glibc for MIPS ↵Jeff Law1-1/+14
soft-float multi-lib variant) 2019-04-03 Jeff Law <law@redhat.com> PR rtl-optimization/81025 * reorg.c (skip_consecutive_labels): Do not skip past a BARRIER. (cherry picked from commit 9427422ddacdf1c2914adfb6e8edca87f250fdfc)
2021-05-04Daily bump.GCC Administrator1-1/+1
2021-05-03Daily bump.GCC Administrator1-1/+1
2021-05-02Daily bump.GCC Administrator1-1/+1
2021-05-01Daily bump.GCC Administrator5-1/+49
2021-04-30libstdc++: Fix inconsistent feature test macroJonathan Wakely1-1/+4
The __cpp_lib_constexpr_string feature test macro is not defined consistently in <version> and <string>. libstdc++-v3/ChangeLog: * include/bits/basic_string.h (__cpp_lib_constexpr_string): Only define for C++17 and later. (cherry picked from commit 3215d4f5b3d08e0087a88df9e155c779927ace1a)
2021-04-30testsuite: Adjust expected error in a testcase [PR98358]Jakub Jelinek1-1/+1
On Fri, Apr 23, 2021 at 05:24:00PM -0400, Jason Merrill via Gcc wrote: > > We have one P1 bug though - P98358 - it is unclear if just changing the > > testcase is all that is needed or if some C++ FE changes are needed. > > The error message quoted in the PR looks correct, so I think changing > the testcase is sufficient. 2021-04-30 Jakub Jelinek <jakub@redhat.com> PR c++/98358 * g++.dg/template/pr98297.C: Expect error about shadowing template template parameter rather than does not declare anything error.
2021-04-30c++/98032 - add testcaseRichard Biener1-0/+20
This adds another testcase for PR95719. 2021-04-30 Richard Biener <rguenther@suse.de> PR c++/98032 * g++.dg/pr98032.C: New testcase. (cherry picked from commit dfc70841eb0ca42637826177f329cf6c98ee00ad)
2021-04-30c++: Fix ICE with using and virtual function. [PR95719]Jason Merrill3-1/+19
conversion_path points to the base where we found the using-declaration, not where the function is actually a member; look up the actual base. And then maybe look back to the derived class if the base is primary. gcc/cp/ChangeLog: PR c++/95719 * call.c (build_over_call): Look up the overrider in base_binfo. * class.c (lookup_vfn_in_binfo): Look through BINFO_PRIMARY_P. gcc/testsuite/ChangeLog: PR c++/95719 * g++.dg/tree-ssa/final4.C: New test. (cherry picked from commit 710df943389a854ef00c15ed0ad219b41db236aa)
2021-04-30bootstrap/87338 - gcc 8.2 fails to bootstrap on ia64James Clarke1-5/+2
This uses ASM_OUTPUT_DEBUG_LABEL instead of ASM_GENERATE_INTERNAL_LABEL and ASM_OUTPUT_LABEL. 2019-05-21 James Clarke <jrtc27@jrtc27.com> PR bootstrap/87338 * dwarf2out.c (dwarf2out_inline_entry): Use ASM_OUTPUT_DEBUG_LABEL instead of ASM_GENERATE_INTERNAL_LABEL and ASM_OUTPUT_LABEL. (cherry picked from commit fe18e4e0845c1821ca51e0a12c284b24a2b60f3a)
2021-04-30Daily bump.GCC Administrator4-1/+30
2021-04-29libstdc++: Define __cpp_lib_constexpr_string macroJonathan Wakely2-1/+9
As noted in r11-1339-gb6ab9ecd550227684643b41e9e33a4d3466724d8 we define a non-standard __cpp_lib_constexpr_char_traits feature test macro to indicate support for P0426R1 and P1032R1. At some point last year the __cpp_lib_constexpr_string macro was retconned to indicate support for those papers. This adds the new macro (which we didn't previously define, because it referred to P0980R1 "Making std::string constexpr" which we don't support). libstdc++-v3/ChangeLog: * include/bits/basic_string.h (__cpp_lib_constexpr_string): Define. * testsuite/21_strings/char_traits/requirements/constexpr_functions_c++17.cc: Check for __cpp_lib_constexpr_string. (cherry picked from commit 3da80ed7efd582575e7850a403ce693ec882d087)
2021-04-29tree-optimization/99954 - fix loop distribution memcpy classificationRichard Biener2-2/+45
This fixes bogus classification of a copy as memcpy. We cannot use plain dependence analysis to decide between memcpy and memmove when it computes no dependence. Instead we have to try harder later which the patch does for the gcc.dg/tree-ssa/ldist-24.c testcase by resorting to tree-affine to compute the difference between src and dest and compare against the copy size. 2021-04-07 Richard Biener <rguenther@suse.de> PR tree-optimization/99954 * tree-loop-distribution.c: Include tree-affine.h. (generate_memcpy_builtin): Try using tree-affine to prove non-overlap. (loop_distribution::classify_builtin_ldst): Always classify as PKIND_MEMMOVE. * gcc.dg/torture/pr99954.c: New testcase. (cherry picked from commit b091cb1efa1881e93fb2e264daaab8876acf6800)
2021-04-29Daily bump.GCC Administrator3-1/+29
2021-04-28i386: Fix atomic FP peepholes [PR100182]Uros Bizjak4-10/+48
64bit loads to/stores from x87 and SSE registers are atomic also on 32-bit targets, so there is no need for additional atomic moves to a temporary register. Introduced load peephole2 patterns assume that there won't be any additional loads from the load location outside the peepholed sequence and wrongly removed the source location initialization. OTOH, introduced store peephole2 patterns assume there won't be any additional loads from the stored location outside the peepholed sequence and wrongly removed the destination location initialization. Note that we can't use plain x87 FST instruction to initialize destination location because FST converts the value to the double-precision format, changing bits during move. The patch restores removed initializations in load and store patterns. Additionally, plain x87 FST in store peephole2 patterns is prevented by limiting the store operand source to SSE registers. 2021-04-23 Uroš Bizjak <ubizjak@gmail.com> gcc/ PR target/100182 * config/i386/sync.md (FILD_ATOMIC/FIST_ATOMIC FP load peephole2): Copy operand 3 to operand 4. Use sse_reg_operand as operand 3 predicate. (FILD_ATOMIC/FIST_ATOMIC FP load peephole2 with mem blockage): Ditto. (LDX_ATOMIC/STX_ATOMIC FP load peephole2): Ditto. (LDX_ATOMIC/LDX_ATOMIC FP load peephole2 with mem blockage): Ditto. (FILD_ATOMIC/FIST_ATOMIC FP store peephole2): Copy operand 1 to operand 0. (FILD_ATOMIC/FIST_ATOMIC FP store peephole2 with mem blockage): Ditto. (LDX_ATOMIC/STX_ATOMIC FP store peephole2): Ditto. (LDX_ATOMIC/LDX_ATOMIC FP store peephole2 with mem blockage): Ditto. gcc/testsuite/ PR target/100182 * gcc.target/i386/pr100182.c: New test. * gcc.target/i386/pr71245-1.c (dg-final): Xfail scan-assembler-not. * gcc.target/i386/pr71245-2.c (dg-final): Ditto. (cherry picked from commit d2324a5ab3ff097864ae6828cb1db4dd013c70d1)
2021-04-28Daily bump.GCC Administrator1-1/+1
2021-04-27Daily bump.GCC Administrator5-1/+110
2021-04-26[PATCH] Backport fix for PR target/989r2Michael Meissner2-4/+30
The test in the PowerPC 32-bit trampoline support is backwards. It aborts if the trampoline size is greater than the expected size. It should abort when the trampoline size is less than the expected size. I fixed the test so the operands are reversed. I then folded the load immediate into the compare instruction. I verified this by creating a 32-bit trampoline program and manually changing the size of the trampoline to be 48 instead of 40. The program aborted with the larger size. I updated this code and ran the test again and it passed. I added a test case that runs on PowerPC 32-bit Linux systems and it calls the __trampoline_setup function with a larger buffer size than the compiler uses. The test is not run on 64-bit systems, since the function __trampoline_setup is not called. I also limited the test to just Linux systems, in case trampolines are handled differently in other systems. libgcc/ 2021-04-26 Michael Meissner <meissner@linux.ibm.com> PR target/98952 * config/rs6000/tramp.S (__trampoline_setup, elfv1 #ifdef): Fix trampoline size comparison in 32-bit by reversing test and combining load immediate with compare. Fix backported from trunk change on 4/23, 886b6c1e8af502b69e3f318b9830b73b88215878. (__trampoline_setup, elfv2 #ifdef): Fix trampoline size comparison in 32-bit by reversing test and combining load immediate with compare. gcc/testsuite/ 2021-04-26 Michael Meissner <meissner@linux.ibm.com> PR target/98952 * gcc.target/powerpc/pr98952.c: New test. Test backported from trunk change on 4/23, 886b6c1e8af502b69e3f318b9830b73b88215878.
2021-04-26lto/96385 - avoid unused global UNDEFs in debug objectsRichard Biener1-0/+5
Unused global UNDEFs can have side-effects in some circumstances so the following patch avoids them by treating them the same as other to be discarded DEFs - make them local. 2020-08-03 Richard Biener <rguenther@suse.de> PR lto/96385 libiberty/ * simple-object-elf.c (simple_object_elf_copy_lto_debug_sections): Localize global UNDEFs and reuse the prevailing name. (cherry picked from commit b32c5d0b72fda2588b4e170e75a9c64e4bf266c7)
2021-04-26lto/96591 - walk VECTOR_CST elements in walk_treeRichard Biener2-1/+57
This implements walking of VECTOR_CST elements in walk_tree, mimicing the walk of COMPLEX_CST elements. Without this free-lang-data fails to see some types in case they are only refered to via tree constants used only as VECTOR_CST elements. 2021-02-08 Richard Biener <rguenther@suse.de> PR lto/96591 * tree.c (walk_tree_1): Walk VECTOR_CST elements. * g++.dg/lto/pr96591_0.C: New testcase. (cherry picked from commit d4536e431316b4568e236afd7a6017e5efd1b0a1)
2021-04-26tree-optimization/98117 - fix range set by vectorization on niter IVsRichard Biener2-6/+41
This avoids the degenerate case of a TYPE_MAX_VALUE latch iteration count value causing wrong range info for the vector IV. There's still the case of VF == 1 where if we don't know whether we hit the above case we cannot emit a range. 2020-12-07 Richard Biener <rguenther@suse.de> PR tree-optimization/98117 * tree-vect-loop-manip.c (vect_gen_vector_loop_niters): Properly handle degenerate niter when setting the vector loop IV range. * gcc.dg/torture/pr98117.c: New testcase. (cherry picked from commit 69894ce172412996c10c89838717980ede7c9003)
2021-04-26Check for matching CONST_VECTOR encodings [PR99929]Richard Sandiford7-0/+52
PR99929 is one of those “how did we get away with this for so long” bugs: the equality routines weren't checking whether two variable-length CONST_VECTORs had the same encoding. This meant that: { 1, 0, 0, 0, 0, 0, ... } would appear to be equal to: { 1, 0, 1, 0, 1, 0, ... } since both are represented using the elements { 1, 0 }. gcc/ PR rtl-optimization/99929 * rtl.h (same_vector_encodings_p): New function. * cse.c (exp_equiv_p): Check that CONST_VECTORs have the same encoding. * cselib.c (rtx_equal_for_cselib_1): Likewise. * jump.c (rtx_renumbered_equal_p): Likewise. * lra-constraints.c (operands_match_p): Likewise. * reload.c (operands_match_p): Likewise. * rtl.c (rtx_equal_p_cb, rtx_equal_p): Likewise. (cherry picked from commit a87d3f964df31d4fbceb822c6d293e85c117d992)
2021-04-26aarch64: Tweak post-RA handling of CONST_INT moves [PR98136]Richard Sandiford2-4/+39
This PR is a regression caused by r8-5967, where we replaced a call to aarch64_internal_mov_immediate in aarch64_add_offset with a call to aarch64_force_temporary, which in turn uses the normal emit_move_insn{,_1} routines. The problem is that aarch64_add_offset can be called while outputting a thunk, where we require all instructions to be valid without splitting. However, the move expanders were not splitting CONST_INT moves themselves. I think the right fix is to make the move expanders work even in this scenario, rather than require callers to handle it as a special case. gcc/ PR target/98136 * config/aarch64/aarch64.md (mov<mode>): Pass multi-instruction CONST_INTs to aarch64_expand_mov_immediate when called after RA. gcc/testsuite/ PR target/98136 * g++.dg/pr98136.C: New test. (cherry picked from commit 48c79f054bf435051c95ee093c45a0f8c9de5b4e)
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