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87 min.Daily bump.releases/gcc-14GCC Administrator2-1/+12
18 hourstestsuite: arm: Simplify fp16-aapcs testsTorbjörn SVENSSON5-218/+24
Reduce fp16-aapcs testcases to return value testing since parameter passing are already tested in aapcs/vfp*.c gcc/testsuite/ChangeLog: * gcc.target/arm/fp16-aapcs.c: New test. * gcc.target/arm/fp16-aapcs-1.c: Removed. * gcc.target/arm/fp16-aapcs-2.c: Likewise. * gcc.target/arm/fp16-aapcs-3.c: Likewise. * gcc.target/arm/fp16-aapcs-4.c: Likewise. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> (cherry picked from commit 1cf8cb45d872a5f09d65c63c891c091710c37432)
25 hoursDaily bump.GCC Administrator2-1/+9
32 hoursFix latent LRA bugJeff Law1-0/+1
Shreya's work to add the addptr pattern on the RISC-V port exposed a latent bug in LRA. We lazily allocate/reallocate the ira_reg_equiv structure and when we do (re)allocation we'll over-allocate and zero-fill so that we don't have to actually allocate and relocate the data so often. In the case exposed by Shreya's work we had N requested entries at the last rellocation step. We actually allocate N+M entries. During LRA we allocate enough new pseudos and thus have N+M+1 pseudos. In get_equiv we read ira_reg_equiv[regno] without bounds checking so we read past the allocated part of the array and get back junk which we use and depending on the precise contents we fault in various fun and interesting ways. We could either arrange to re-allocate ira_reg_equiv again on some path through LRA (possibly in get_equiv itself). We could also just insert the bounds check in get_equiv like is done elsewhere in LRA. Vlad indicated no strong preference in an email last week. So this just adds the bounds check in a manner similar to what's done elsewhere in LRA. Bootstrapped and regression tested on x86_64 as well as RISC-V with Shreya's work enabled and regtested across the various embedded targets. gcc/ * lra-constraints.cc (get_equiv): Bounds check before accessing data in ira_reg_equiv. (cherry picked from commit 0c6ad3f5dfbd45150eeef2474899ba7ef0d8e592)
2 daysDaily bump.GCC Administrator5-1/+102
2 dayslibstdc++: Fix memory leak in PSTL TBB backend [PR117276]Jonathan Wakely1-3/+9
Backport of upstream patch: https://github.com/uxlfoundation/oneDPL/pull/1589 libstdc++-v3/ChangeLog: PR libstdc++/117276 * include/pstl/parallel_backend_tbb.h (__func_task::finalize): Make deallocation unconditional. (cherry picked from commit d8f1655a781a76f5c86b3545b181b2005e585d29)
2 dayslibstdc++: Remove blank line from bits/unique_ptr.hJonathan Wakely1-1/+0
libstdc++-v3/ChangeLog: * include/bits/unique_ptr.h: Remove blank line. (cherry picked from commit 15327920854653887e8715bb1592121cafec5c3b)
2 daysaarch64: PR target/121749: Use dg-assemble in testcaseKyrylo Tkachov1-1/+1
Committing as obvious. Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com> gcc/testsuite/ PR target/121749 * gcc.target/aarch64/simd/pr121749.c: Use dg-assemble directive. (cherry picked from commit 2b8256d0ce18ed4d00868c78f5128d32884ccfa1)
2 daysaarch64: PR target/121749: Use correct predicate for narrowing shift amountsKyrylo Tkachov3-12/+24
With g:d20b2ad845876eec0ee80a3933ad49f9f6c4ee30 the narrowing shift instructions are now represented with standard RTL and more merging optimisations occur. This exposed a wrong predicate for the shift amount operand. The shift amount is the number of bits of the narrow destination, not the input sources. Correct this by using the vn_mode attribute when specifying the predicate, which exists for this purpose. I've spotted a few more narrowing shift patterns that need the restriction, so they are updated as well. Bootstrapped and tested on aarch64-none-linux-gnu. Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com> gcc/ PR target/121749 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn_n<mode>): Use aarch64_simd_shift_imm_offset_<vn_mode> instead of aarch64_simd_shift_imm_offset_<ve_mode> predicate. (aarch64_<shrn_op>shrn_n<mode> VQN define_expand): Likewise. (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise. (aarch64_<shrn_op>rshrn_n<mode>): Likewise. (aarch64_<shrn_op>rshrn_n<mode> VQN define_expand): Likewise. (aarch64_sqshrun_n<mode>_insn): Likewise. (aarch64_sqshrun_n<mode>): Likewise. (aarch64_sqshrun_n<mode> VQN define_expand): Likewise. (aarch64_sqrshrun_n<mode>_insn): Likewise. (aarch64_sqrshrun_n<mode>): Likewise. (aarch64_sqrshrun_n<mode>): Likewise. * config/aarch64/iterators.md (vn_mode): Handle DI, SI, HI modes. gcc/testsuite/ PR target/121749 * gcc.target/aarch64/simd/pr121749.c: New test. (cherry picked from commit cb508e54140687a50790059fac548d87515df6be)
2 daysAVR: Support AVR32EB14/20/28/32.Georg-Johann Lay2-1/+5
Add support for some recent AVR devices. gcc/ * config/avr/avr-mcus.def: Add avr32eb14, avr32eb20, avr32eb28, avr32eb32. * doc/avr-mmcu.texi: Rebuild. (cherry picked from commit 45f605a74fd7e96294477db064cc58033c3fba49)
3 daysc++: Fix mangling of _Float16 template args [PR121801]Matthias Kretz2-1/+27
Signed-off-by: Matthias Kretz <m.kretz@gsi.de> gcc/testsuite/ChangeLog: PR c++/121801 * g++.dg/abi/pr121801.C: New test. gcc/cp/ChangeLog: PR c++/121801 * mangle.cc (write_real_cst): Handle 16-bit real and assert that reals have 16 bits or a multiple of 32 bits. (cherry picked from commit 19d1c7c28f4fd0557dd868a7a4041b00ceada890)
3 dayss390: Emulate vec_cmp{eq,gt,gtu} for 128-bit integersStefan Schulze Frielinghaus4-12/+171
Mode iterator V_HW enables V1TI for target VXE which means vec_cmpv1tiv1ti becomes available which leads to an ICE since there is no corresponding insn. Fixed by emulating comparisons and enabling mode V1TI unconditionally for V_HW. For the sake of symmetry, I also added TI mode to V_HW since TF mode is already included. As a consequence the consumers of V_HW vec_{splat,slb,sld,sldw,sldb,srdb,srab,srb,test_mask_int,test_mask} also become available for 128-bit integers. This fixes gcc.c-torture/execute/pr105613.c and gcc.dg/pr106063.c. gcc/ChangeLog: * config/s390/vector.md (V_HW): Enable V1TI unconditionally and add TI. (vec_cmpu<VIT_HW:mode><VIT_HW:mode>): Add 128-bit integer variants. (*vec_cmpeq<mode><mode>_nocc_emu): Emulate operation. (*vec_cmpgt<mode><mode>_nocc_emu): Emulate operation. (*vec_cmpgtu<mode><mode>_nocc_emu): Emulate operation. gcc/testsuite/ChangeLog: * gcc.target/s390/vector/vec-cmp-emu-1.c: New test. * gcc.target/s390/vector/vec-cmp-emu-2.c: New test. * gcc.target/s390/vector/vec-cmp-emu-3.c: New test. (cherry picked from commit 1b575bb24a7a3d2b00197dd5deb4c26b313f442b)
3 daysDaily bump.GCC Administrator1-1/+1
4 daysDaily bump.GCC Administrator1-1/+1
5 daysDaily bump.GCC Administrator1-1/+1
6 daysDaily bump.GCC Administrator1-1/+1
7 daysDaily bump.GCC Administrator2-1/+10
7 daysAVR: Disable tree-switch-conversion per default.Georg-Johann Lay1-0/+7
There are at least two cases where tree-switch-conversion leads to unpleasant resource allocation: PR49857 The lookup table lives in RAM. This is the case for all devices that locate .rodata in RAM, which is for almost all AVR devices. PR81540 Code is bloated for 64-bit inputs. As far as PR49857 is concerned, a target hook that may add an address-space qualifier to the lookup table is the obvious solution, though a respective patch has always been rejected by global maintainers for non-technical reasons. gcc/ PR target/81540 PR target/49857 * common/config/avr/avr-common.cc: Disable -ftree-switch-conversion. (cherry picked from commit 912159d2b5429c3126756b56723dd4f32dd56bdd)
8 daysDaily bump.GCC Administrator2-1/+20
8 dayslibstdc++: Document remaining C++17 implementation-defined behavior.Tomasz Kamiński3-8/+34
This also covers bad_function_call::what from C++11. libstdc++-v3/ChangeLog: * doc/html/manual/status.html: Regenerate. * doc/xml/manual/status_cxx2011.xml: Add entry for bad_function_call. * doc/xml/manual/status_cxx2017.xml: Add entries for bad_any_cast and nullptr_t output. Update entry for sf.cmath. Fix stable name for mem.res. Reviewed-by: Jonathan Wakely <jwakely@redhat.com> Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com> (cherry picked from commit 39d7c4d42a764a86644198a517f58a94f467cdbd)
8 dayslibstdc++: Document missing implementation defined behavior for std::filesystem.Tomasz Kamiński2-5/+36
libstdc++-v3/ChangeLog: * doc/html/manual/status.html: Regenerate the file. * doc/xml/manual/status_cxx2017.xml: Addd more entires. Reviewed-by: Jonathan Wakely <jwakely@redhat.com> Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com> (cherry picked from commit d6c370b8e96d43448537276d91c2b33fedb9754a)
9 daysDaily bump.GCC Administrator2-1/+11
9 dayslibstdc++: Fix docs for --enable-vtable-verify [PR120698]Jonathan Wakely2-2/+2
libstdc++-v3/ChangeLog: PR libstdc++/120698 * doc/xml/manual/configure.xml: Do not claim that vtv is enabled by default. * doc/html/manual/configure.html: Regenerate. (cherry picked from commit d199a9c7c5034d0eddb3380a58342a5bcbe6febd)
10 daysDaily bump.GCC Administrator2-1/+20
10 dayslibphobos: enable for more hppa tuplesSam James1-1/+1
Gentoo uses hppa1.1*-*-linux* and hppa2.0*-*-linux* instead of Debian's hppa-*-linux*. libphobos/ChangeLog: * configure.tgt: Add hppa[12]*-*-linux* as a supported target. (cherry picked from commit 35cf8d85841a6301eeb12668085e326ddd115f6e)
10 dayslibphobos: enable for sparc64-unknown-linux-gnuSam James1-1/+1
This bootstraps with some test failures but works well enough to build 11..15. libphobos/ChangeLog: * configure.tgt: Add sparc64-unknown-linux-gnu as a supported target. (cherry picked from commit 2572d46f0d1e426c1091f9b84861ee5213b84b5a)
11 dayslibphobos: enable for powerpc64le-linux-gnuMatthias Klose1-0/+9
libphobos/ChangeLog: * configure.tgt: Add powerpc64le--linux-gnu as a supported target when configured with --with-long-double-format=ieee.
11 daysDaily bump.GCC Administrator1-1/+1
12 daysDaily bump.GCC Administrator1-1/+1
13 daysDaily bump.GCC Administrator2-1/+40
14 dayslibstdc++: Make CTAD ignore pair(const T1&, const T2&) constructor [PR110853]Jonathan Wakely2-1/+11
For the pair(T1, T2) explicit deduction type to decay its arguments as intended, we need the pair(const T1&, const T2&) constructor to not be used for CTAD. Otherwise we try to instantiate pair<T1, T2> without decaying, which is ill-formed for function lvalues. Use std::type_identity_t<T1> to make the constructor unusable for an implicit deduction guide. libstdc++-v3/ChangeLog: PR libstdc++/110853 * include/bits/stl_pair.h [C++20] (pair(const T1&, const T2&)): Use std::type_identity_t<T1> for first parameter. * testsuite/20_util/pair/cons/110853.cc: New test. Reviewed-by: Patrick Palka <ppalka@redhat.com> Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com> (cherry picked from commit 0bb0d1d2880d562298eeec8eee4ab4e8ba943260)
14 dayslibstdc++: Fix std::get<T> for std::pair with reference members [PR121745]Jonathan Wakely2-4/+56
Make the std::get<T> overloads for rvalues use std::forward<T>(p.first) not std::move(p.first), so that lvalue reference members are not incorrectly converted to rvalues. It might appear that std::move(p).first would also work, but the language rules say that for std::pair<T&&, U> that would produce T& rather than the expected T&& (see the discussion in P2445R1 §8.2). Additional tests are added to verify all combinations of reference members, value categories, and const-qualification. libstdc++-v3/ChangeLog: PR libstdc++/121745 * include/bits/stl_pair.h (get): Use forward instead of move in std::get<T> overloads for rvalue pairs. * testsuite/20_util/pair/astuple/get_by_type.cc: Check all value categories and cv-qualification. Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com> (cherry picked from commit c8a24f60b6874fca4fb3adb153f8d5f1dd72b951)
14 dayslibstdc++: Implement LWG4222 'expected' constructor from a single value ↵Yihan Wang2-0/+40
missing a constraint libstdc++-v3/ChangeLog: * include/std/expected (expected(U&&)): Add missing constraint as per LWG 4222. * testsuite/20_util/expected/lwg4222.cc: New test. Signed-off-by: Yihan Wang <yronglin777@gmail.com> (cherry picked from commit 589f3cd1831446485a6c602578177f5d9794d936)
14 dayslibstdc++: Implement LWG 3836 for std::expected bool conversionsJonathan Wakely2-16/+77
libstdc++-v3/ChangeLog: * include/std/expected (expected): Constrain constructors to prevent problematic bool conversions, as per LWG 3836. * testsuite/20_util/expected/lwg3836.cc: New test. (cherry picked from commit dca6a9a940e46d0c2d115a4702d648529a42efa9)
2025-09-04Daily bump.GCC Administrator3-1/+51
2025-09-03libstdc++: Add missing <vector> header to unordered_set/pr115285.cc testJonathan Wakely1-1/+2
libstdc++-v3/ChangeLog: * testsuite/23_containers/unordered_set/pr115285.cc: Include missing header for std::vector. (cherry picked from commit a51d220377ab8117305567e888a942d127ef6a48)
2025-09-03libstdc++: Fix -Wswitch warning in <regex>Jonathan Wakely1-0/+3
This fixes a warning seen with -Wsystem-headers: include/c++/14.3.0/bits/regex_compiler.h:191:11: warning: case value '0' not in enumerated type 'std::regex_constants::syntax_option_type' [-Wswitch] 191 | case _FlagT(0): | ^~~~ There's no diagnostic on trunk since the flag_enum attribute was added to the enum type in r15-3500-g1914ca8791ce4e. libstdc++-v3/ChangeLog: * include/bits/regex_compiler.h (_Compiler::_S_validate): Add diagnostic pragma to disable -Wswitch warning.
2025-09-03middle-end: Fix typo in gimple.hBenjamin Wu1-1/+1
gcc/ChangeLog: * gimple.h (GTMA_DOES_GO_IRREVOCABLE): Fix typo. (cherry picked from commit 356250630abd876ae592bc3d2b4cc171bc834b79)
2025-09-03libstdc++: Check _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK with #if [PR121496]Jonathan Wakely2-2/+16
The change in r14-905-g3b7cb33033fbe6 to disable the use of pthread_mutex_clocklock when TSan is active assumed that the _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK macro was always checked with #if rather than #ifdef, which was not true. This makes the checks use #if consistently. libstdc++-v3/ChangeLog: PR libstdc++/121496 * include/std/mutex (__timed_mutex_impl::_M_try_wait_until): Change preprocessor condition to use #if instead of #ifdef. (recursive_timed_mutex::_M_clocklock): Likewise. * testsuite/30_threads/timed_mutex/121496.cc: New test. Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com> (cherry picked from commit d1dec304453fa4874d16daaa15e6f477435edda4)
2025-09-03libstdc++: Fix std::numeric_limits<__float128>::max_digits10 [PR121374]Jonathan Wakely2-1/+6
When I added this explicit specialization in r14-1433-gf150a084e25eaa I used the wrong value for the number of mantissa digits (I used 112 instead of 113). Then when I refactored it in r14-1582-g6261d10521f9fd I used the value calculated from the incorrect value (35 instead of 36). libstdc++-v3/ChangeLog: PR libstdc++/121374 * include/std/limits (numeric_limits<__float128>::max_digits10): Fix value. * testsuite/18_support/numeric_limits/128bit.cc: Check value. (cherry picked from commit cf88ed5bf20c86ca38da19358ff79a34adb4d0b5)
2025-09-03libstdc++: Use __promote_3 for std::hypot [PR121097]Jonathan Wakely1-2/+2
The __promoted_t alias is only defined when __cpp_fold_expressions is defined, which might not be the case for some hypothetical C++17 compilers. Change the 3-arg std::hypot to just use __gnu_cxx::__promote_3 which is always available. libstdc++-v3/ChangeLog: PR libstdc++/121097 * include/c_global/cmath (hypot): Use __promote_3 instead of __promoted. Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com> (cherry picked from commit f4932c59df387a505de69a5a1015a03caa4ccf08)
2025-09-03Daily bump.GCC Administrator1-1/+1
2025-09-02Daily bump.GCC Administrator1-1/+1
2025-09-01Daily bump.GCC Administrator1-1/+1
2025-08-31Daily bump.GCC Administrator3-1/+21
2025-08-29Revert "Fix _Decimal128 arithmetic error under FE_UPWARD."liuhongt6-586/+215
This reverts commit e645728e9de64d019661c8f92bb487e06d95644a.
2025-08-30Daily bump.GCC Administrator3-1/+21
2025-08-28Fix _Decimal128 arithmetic error under FE_UPWARD.liuhongt6-215/+586
libgcc/config/libbid/ChangeLog: PR target/120691 * bid128_div.c: Fix _Decimal128 arithmetic error under FE_UPWARD. * bid128_rem.c: Ditto. * bid128_sqrt.c: Ditto. * bid64_div.c (bid64_div): Ditto. * bid64_sqrt.c (bid64_sqrt): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr120691.c: New test. (cherry picked from commit 50064b2898edfb83bc37f2597a35cbd3c1c853e3)
2025-08-29Daily bump.GCC Administrator1-1/+1
2025-08-28Daily bump.GCC Administrator1-1/+1
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