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This patch apply the DF_LIVE_SUBREG to LRA pass. More changes were made
to the LRA than the IRA since the LRA will modify the DF data directly.
The main big changes are centered on the lra-lives.cc file.
gcc/ChangeLog:
* lra-coalesce.cc (update_live_info): Extend to DF_LIVE_SUBREG.
(lra_coalesce): Ditto.
* lra-constraints.cc (update_ebb_live_info): Ditto.
(get_live_on_other_edges): Ditto.
(inherit_in_ebb): Ditto.
(lra_inheritance): Ditto.
(fix_bb_live_info): Ditto.
(remove_inheritance_pseudos): Ditto.
* lra-int.h (GCC_LRA_INT_H): include subreg-live-range.h
(struct lra_insn_reg): Add op filed to record the corresponding rtx.
* lra-lives.cc (class bb_data_pseudos): Extend the bb_data_pseudos to
include new partial_def/use and range_def/use fileds for DF_LIVE_SUBREG
problem.
(need_track_subreg_p): checking is the regno need to be tracked.
(make_hard_regno_live): switch to live_subreg filed.
(make_hard_regno_dead): Ditto.
(mark_regno_live): Support record subreg liveness.
(mark_regno_dead): Ditto.
(live_trans_fun): Adjust transfer function to support subreg liveness.
(live_con_fun_0): Adjust Confluence function to support subreg liveness.
(live_con_fun_n): Ditto.
(initiate_live_solver): Ditto.
(finish_live_solver): Ditto.
(process_bb_lives): Ditto.
(lra_create_live_ranges_1): Dump subreg liveness.
* lra-remat.cc (dump_candidates_and_remat_bb_data): Switch to
DF_LIVE_SUBREG df data.
(calculate_livein_cands): Ditto.
(do_remat): Ditto.
* lra-spills.cc (spill_pseudos): Ditto.
* lra.cc (new_insn_reg): New argument op.
(add_regs_to_insn_regno_info): Add new argument op.
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This patch simple replace df_get_live_in to df_get_subreg_live_in
and replace df_get_live_out to df_get_subreg_live_out.
gcc/ChangeLog:
* ira-build.cc (create_bb_allocnos): Switch to DF_LIVE_SUBREG df data.
(create_loop_allocnos): Ditto.
* ira-color.cc (ira_loop_edge_freq): Ditto.
* ira-emit.cc (generate_edge_moves): Ditto.
(add_ranges_and_copies): Ditto.
* ira-lives.cc (process_out_of_region_eh_regs): Ditto.
(add_conflict_from_region_landing_pads): Ditto.
(process_bb_node_lives): Ditto.
* ira.cc (find_moveable_pseudos): Ditto.
(interesting_dest_for_shprep_1): Ditto.
(allocate_initial_values): Ditto.
(ira): Ditto.
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This patch add a new DF problem, named DF_LIVE_SUBREG. This problem
is extended from the DF_LR problem and support track the subreg liveness
of multireg pseudo if these pseudo satisfy the following conditions:
1. the mode size greater than it's REGMODE_NATURAL_SIZE.
2. the reg is used in insns via subreg pattern.
The main methods are as follows:
1. split bitmap in/out/def/use fileds to full_in/out/def/use and
partial_in/out/def/use. If a pseudo need to be tracked it's subreg
liveness, then it is recorded in partial_in/out/def/use fileds.
Meantimes, there are range_in/out/def/use fileds which records the live
range of the tracked pseudo.
2. in the df_live_subreg_finalize function, we move the tracked pseudo from
the partial_in/out/def/use to full_in/out/def/use if the pseudo's live
range is full.
gcc/ChangeLog:
* Makefile.in: Add subreg-live-range object file.
* df-problems.cc (struct df_live_subreg_problem_data): Private struct
for DF_LIVE_SUBREG problem.
(df_live_subreg_get_bb_info): getting bb regs in/out data.
(get_live_subreg_local_bb_info): getting bb regs use/def data.
(multireg_p): checking is the regno a pseudo multireg.
(need_track_subreg_p): checking is the regno need to be tracked.
(init_range): getting the range of subreg rtx.
(remove_subreg_range): removing use data for the reg/subreg rtx.
(add_subreg_range): adding def/use data for the reg/subreg rtx.
(df_live_subreg_free_bb_info): Free basic block df data.
(df_live_subreg_alloc): Allocate and init df data.
(df_live_subreg_reset): Reset the live in/out df data.
(df_live_subreg_bb_local_compute): Compute basic block df data.
(df_live_subreg_local_compute): Compute all basic blocks df data.
(df_live_subreg_init): Init the in/out df data.
(df_live_subreg_check_result): Assert the full and partial df data.
(df_live_subreg_confluence_0): Confluence function for infinite loops.
(df_live_subreg_confluence_n): Confluence function for normal edge.
(df_live_subreg_transfer_function): Transfer function.
(df_live_subreg_finalize): Finalize the all_in/all_out df data.
(df_live_subreg_free): Free the df data.
(df_live_subreg_top_dump): Dump top df data.
(df_live_subreg_bottom_dump): Dump bottom df data.
(df_live_subreg_add_problem): Add the DF_LIVE_SUBREG problem.
* df.h (enum df_problem_id): Add DF_LIVE_SUBREG.
(class subregs_live): Simple decalare.
(class df_live_subreg_local_bb_info): New class for full/partial def/use
df data.
(class df_live_subreg_bb_info): New class for full/partial in/out
df data.
(df_live_subreg): getting the df_live_subreg data.
(df_live_subreg_add_problem): Exported.
(df_live_subreg_finalize): Ditto.
(df_live_subreg_check_result): Ditto.
(multireg_p): Ditto.
(init_range): Ditto.
(add_subreg_range): Ditto.
(remove_subreg_range): Ditto.
(df_get_subreg_live_in): Accessor the all_in df data.
(df_get_subreg_live_out): Accessor the all_out df data.
(df_get_subreg_live_full_in): Accessor the full_in df data.
(df_get_subreg_live_full_out): Accessor the full_out df data.
(df_get_subreg_live_partial_in): Accessor the partial_in df data.
(df_get_subreg_live_partial_out): Accessor the partial_out df data.
(df_get_subreg_live_range_in): Accessor the range_in df data.
(df_get_subreg_live_range_out): Accessor the range_out df data.
* regs.h (get_nblocks): Get the blocks of mode.
* sbitmap.cc (bitmap_full_p): sbitmap predicator.
(bitmap_same_p): sbitmap predicator.
(test_full): test bitmap_full_p.
(test_same): test bitmap_same_p.
(sbitmap_cc_tests): Add test_full and test_same.
* sbitmap.h (bitmap_full_p): Exported.
(bitmap_same_p): Ditto.
* timevar.def (TV_DF_LIVE_SUBREG): add DF_LIVE_SUBREG timevar.
* subreg-live-range.cc: New file.
* subreg-live-range.h: New file.
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Add new flag -ftrack-subreg-liveness to enable track-subreg-liveness.
This flag is enabled at -O3/fast.
gcc/ChangeLog:
* common.opt: add -ftrack-subreg-liveness option.
* opts.cc: auto aneble -ftrack-subreg-liveness in -O3/fast
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When CFG cleanup removes a backedge we have to be more careful with
loop update. In particular we need to clear niter info and estimates
and if we remove the last backedge of a loop we have to also mark
it for removal to prevent a following basic block merging to associate
loop info with an unrelated header.
PR tree-optimization/114787
* tree-cfg.cc (remove_edge_and_dominated_blocks): When
removing a loop backedge clear niter info and when removing
the last backedge of a loop mark that loop for removal.
* gcc.dg/torture/pr114787.c: New testcase.
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When we update the dominator of the redirected exit after peeling
we check whether the immediate dominator was the loop header rather
than the exit source when we later want to just update it to the
new source. The following fixes this oversight.
PR tree-optimization/114832
* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
Fix dominance check.
* gcc.dg/vect/pr114832.c: New testcase.
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When we are using -mavx10.1-256 in command line and avx10.1-256 in
target attribute together, zmm should never be generated. But current
GCC will generate zmm since it wrongly enables EVEX512 for non-explicitly
set AVX512. This patch will fix that issue.
gcc/ChangeLog:
* config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
Check whether AVX512F is explicitly enabled.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx10_1-24.c: New test.
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We reverted below patch for register group overlap, add the related
insn test and mark it as xfail. And we will remove the xfail
after we support the register overlap in GCC-15.
62685890d88 RISC-V: Support highpart overlap for vext.vf
The below test suites are passed for this patch
* The rv64gcv fully regression test with isl build.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/unop_v_constraint-2.c: Adjust asm
check cond.
* gcc.target/riscv/rvv/base/pr112431-4.c: New test.
* gcc.target/riscv/rvv/base/pr112431-5.c: New test.
* gcc.target/riscv/rvv/base/pr112431-6.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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This reverts commit 62685890d8861b72f812bfe171a20332df08bd49.
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This fixes a null dereference issue when decl_specifiers.type is not yet
provided.
gcc/cp/ChangeLog:
* parser.cc (cp_parser_parameter_declaration): Check if
decl_specifiers.type is null.
gcc/testsuite/ChangeLog:
* g++.dg/cpp23/explicit-obj-basic7.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
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As discussed in the PR, on ia32 with its 8 GPRs, where 1 is always fixed
and other 2 often are as well having an alternative which needs 3
double-word registers is just too much for RA.
The following patch splits that alternative into two, one with o is used
even on ia32, but one with the 3x r is used just for -m64/-mx32.
Tried to reduce the testcase further, but it wasn't easily possible.
2024-04-23 Jakub Jelinek <jakub@redhat.com>
PR target/114810
* config/i386/i386.md (*andn<dwi>3_doubleword_bmi): Split the =&r,r,ro
alternative into =&r,r,r enabled only for x64 and =&r,r,o.
* g++.target/i386/pr114810.C: New test.
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* gcc.pot: Regenerate.
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gcc/testsuite/ChangeLog:
PR fortran/103496
* gfortran.dg/c_sizeof_8.f90: New test.
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When merging an imported function template specialization with an
existing one, if the existing one has an undeduced return type and the
imported one's is already deduced, we need to propagate the deduced type
since once we install the imported definition we won't get a chance to
deduce it by normal means.
So this patch makes is_matching_decl propagate the deduced return
type alongside our propagation of the exception specification.
Another option would be to propagate it later when installing the
imported definition from read_function_def, but it seems preferable
to do it sooner rather than later.
PR c++/114795
gcc/cp/ChangeLog:
* module.cc (trees_in::is_matching_decl): Propagate deduced
function return type.
gcc/testsuite/ChangeLog:
* g++.dg/modules/auto-4_a.H: New test.
* g++.dg/modules/auto-4_b.C: New test.
Reviewed-by: Jason Merrill <jason@redhat.com>
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This should fix a testsuite problem with Solaris ld that supports zlib
but not zlib-gabi.
* configure.ac: Test --compress-debug-sections=zlib-gnu and
--compress-debug-sections=zlib-gabi separately, setting new
automake conditionals.
* Makefile.am (ctestg, ctestg_alloc): Only build if
HAVE_COMPRESSED_DEBUG_ZLIB_GNU.
(ctesta, ctesta_alloc): Only build if
HAVE_COMPRESSED_DEBUG_ZLIB_GABI.
(ctestzstd_alloc): New test if HAVE_COMPRESSED_DEBUG_ZSTD.
* configure, Makefile.in: Regenerate.
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The nullability-00.m* tests unfortunately check the exact spelling of
the diagnostics I've changed earlier today.
2024-04-23 Jakub Jelinek <jakub@redhat.com>
* objc.dg/attributes/nullability-00.m: Adjust expected diagnostic
spelling: recognised -> recognized.
* obj-c++.dg/attributes/nullability-00.mm: Likewise.
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We have:
-ftree-loop-distribute-patterns
Perform loop distribution of patterns that can be code generated with calls to a library. This flag is enabled by default at -O2 and higher, and by -fprofile-use and -fauto-profile.
This pass distributes the initialization loops and generates a call to memset zero. For example, the loop
...
and the initialization loop is transformed into a call to memset zero. This flag is enabled by default at -O3. It is also enabled by -fprofile-use and -fauto-profile.
Which mentions optimizatoin flags twice and the repeated mention is out of
date, since we enable this option at -O2 as well.
gcc/ChangeLog:
* doc/invoke.texi (-ftree-loop-distribute-patterns): Remove duplicated
sentence about optimization flags implying this.
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This addresses the non-Oxford British English vs. US English spelling
nits in translatable strings.
I see various similar cases in m2 and rust FEs where they don't make it into
gcc.pot, guess those would be nice to get fixed too.
2024-04-23 Jakub Jelinek <jakub@redhat.com>
* config/darwin.opt (init): Spelling fix: initialiser -> initializer.
gcc/c-family/
* c-attribs.cc (handle_objc_nullability_attribute): Spelling fix:
recognised -> recognized.
gcc/m2/
* lang.opt (fdef=, fmod=): Spelling fix: recognise -> recognize.
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I've run aspell on gcc.pot (just quickly skimming, so pressing
I key hundreds of times and just stopping when I catch something that
looks like a misspelling).
I plan to commit this tomorrow as obvious unless somebody finds some
issues in it, you know, I'm not a native English speaker.
Yes, I know favour is valid UK spelling, but we spell the US way I think.
I've left some *ise* -> *ize* cases (recognise, initialise), those
had too many hits, though in translatable strings just 4, so maybe
worth changing too:
msgid "recognise the specified suffix as a definition module filename"
msgid "recognise the specified suffix as implementation and module filenames"
"initialiser for a dylib."
msgid "%qE attribute argument %qE is not recognised"
2024-04-23 Jakub Jelinek <jakub@redhat.com>
* config/epiphany/epiphany.opt (may-round-for-trunc): Spelling fix:
floatig -> floating.
* config/riscv/riscv.opt (mcsr-check): Spelling fix: CRS -> CSR.
* params.opt (-param=ipa-cp-profile-count-base=): Spelling fix:
frequncy -> frequency.
gcc/c-family/
* c.opt (Wstrict-flex-arrays): Spelling fix: inproper -> improper.
gcc/cp/
* parser.cc (cp_parser_using_declaration): Spelling fix: favour
-> favor.
gcc/m2/
* lang.opt (fuse-list=): Spelling fix: finalializations ->
finalizations.
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The tests fail on s390 since can_vec_perm_const_p fails and therefore
the bit insert/ref survive which r14-3381-g27de9aa152141e aims for.
Strictly speaking, the tests only fail in case the target supports
vectors, i.e., for targets prior z13 or in case of -mesa the emulated
vector operations are optimized out.
Set to xfail and tracked by PR114802.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/forwprop-40.c: Xfail for s390.
* gcc.dg/tree-ssa/forwprop-41.c: Xfail for s390.
* lib/target-supports.exp: Add target check s390_mvx.
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2024-04-23 Paul Thomas <pault@gcc.gnu.org>
gcc/testsuite/
PR fortran/102597
* gfortran.dg/pr102597.f90: New test.
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The following plugs a hole with computing whether a SLP node has any
pattern stmts which is important to know when we want to replace it
by a CTOR from external defs.
PR tree-optimization/114799
* tree-vect-slp.cc (vect_get_and_check_slp_defs): Properly
update ->any_pattern when swapping operands.
* gcc.dg/vect/bb-slp-pr114799.c: New testcase.
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The requirements of the vec_xl/vec_xst intrinsincs wrt aliasing of the
pointer argument are not really documented. As it turns out, users
are likely to get it wrong. With this patch we let the pointer
argument alias everything in order to make it more robust for users.
gcc/ChangeLog:
PR target/114676
* config/s390/s390-c.cc (s390_expand_overloaded_builtin): Use a
MEM_REF with an addend of type ptr_type_node.
gcc/testsuite/ChangeLog:
PR target/114676
* gcc.target/s390/zvector/pr114676.c: New test.
Suggested-by: Jakub Jelinek <jakub@redhat.com>
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The following testcase is rejected with
error: inlining failed in call to 'always_inline' '...': call is unlikely and code size would grow
errors. The problem is that starting with the r14-2149 change
we try to copy most of the attributes from the inherited to
inheriting ctor, but don't copy associated flags that decl_attributes
sets.
Now, the other clone_attrs user, cp/optimize.cc (maybe_clone_body)
copies over
DECL_COMDAT (clone) = DECL_COMDAT (fn);
DECL_WEAK (clone) = DECL_WEAK (fn);
if (DECL_ONE_ONLY (fn))
cgraph_node::get_create (clone)->set_comdat_group (cxx_comdat_group (clone));
DECL_USE_TEMPLATE (clone) = DECL_USE_TEMPLATE (fn);
DECL_EXTERNAL (clone) = DECL_EXTERNAL (fn);
DECL_INTERFACE_KNOWN (clone) = DECL_INTERFACE_KNOWN (fn);
DECL_NOT_REALLY_EXTERN (clone) = DECL_NOT_REALLY_EXTERN (fn);
DECL_VISIBILITY (clone) = DECL_VISIBILITY (fn);
DECL_VISIBILITY_SPECIFIED (clone) = DECL_VISIBILITY_SPECIFIED (fn);
DECL_DLLIMPORT_P (clone) = DECL_DLLIMPORT_P (fn);
DECL_DISREGARD_INLINE_LIMITS (clone) = DECL_DISREGARD_INLINE_LIMITS (fn);
The following patch just copies DECL_DISREGARD_INLINE_LIMITS to fix
this exact bug, not really sure which other flags should be copied
and which shouldn't.
Plus there are tons of other flags, some of which might need to be copied
too, some of which might not, perhaps in both places, like:
DECL_UNINLINABLE, maybe DECL_PRESERVE_P, TREE_USED, maybe
DECL_USER_ALIGN/DECL_ALIGN, maybe DECL_WEAK, maybe
DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT, DECL_NO_LIMIT_STACK.
TREE_READONLY, DECL_PURE_P, TREE_THIS_VOLATILE (for const, pure and
noreturn attributes) probably makes no sense, DECL_IS_RETURNS_TWICE neither
(returns_twice ctor?). What about TREE_NOTHROW?
DECL_FUNCTION_SPECIFIC_OPTIMIZATION, DECL_FUNCTION_SPECIFIC_TARGET...
Anyway, another problem is that if inherited_ctor is a TEMPLATE_DECL, as
also can be seen in the using D<T>::D; case in the testcase, then
DECL_ATTRIBUTES (fn) = clone_attrs (DECL_ATTRIBUTES (inherited_ctor));
attempts to copy the attributes from the TEMPLATE_DECL which doesn't have
them. The following patch copies them from STRIP_TEMPLATE (inherited_ctor)
which does. E.g. DECL_DECLARED_CONSTEXPR_P works fine as the macro
itself uses STRIP_TEMPLATE too, but not 100% sure about other macros used
on inherited_ctor earlier.
2024-04-23 Jakub Jelinek <jakub@redhat.com>
PR c++/114784
* method.cc (implicitly_declare_fn): Call clone_attrs
on DECL_ATTRIBUTES on STRIP_TEMPLATE (inherited_ctor) rather than
inherited_ctor. Also copy DECL_DISREGARD_INLINE_LIMITS flag from it.
* g++.dg/cpp0x/inh-ctor39.C: New test.
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A class allocation member function is implicitly 'static' by
[class.free] p3, so cannot have an explicit object parameter.
PR c++/114078
gcc/cp/ChangeLog:
* decl.cc (grokdeclarator): Check allocation functions for xobj
parameters.
gcc/testsuite/ChangeLog:
* g++.dg/cpp23/explicit-obj-ops-alloc.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
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Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.
gcc/ChangeLog:
* config.gcc: Add loongarch-evolution.o.
* config/loongarch/genopts/genstr.sh: Enable generation of
loongarch-evolution.[cc,h].
* config/loongarch/t-loongarch: Likewise.
* config/loongarch/genopts/gen-evolution.awk: New file.
* config/loongarch/genopts/isa-evolution.in: Mark ISA version
of introduction for each ISA evolution feature.
* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
Define builtin macros for enabled ISA evolutions and the ISA
version.
* config/loongarch/loongarch-cpu.cc: Use loongarch-evolution.h.
* config/loongarch/loongarch.h: Likewise.
* config/loongarch/loongarch-cpucfg-map.h: Delete.
* config/loongarch/loongarch-evolution.cc: New file.
* config/loongarch/loongarch-evolution.h: New file.
* config/loongarch/loongarch-opts.h (ISA_HAS_FRECIPE): Define.
(ISA_HAS_DIV32): Likewise.
(ISA_HAS_LAM_BH): Likewise.
(ISA_HAS_LAMCAS): Likewise.
(ISA_HAS_LD_SEQ_SA): Likewise.
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These ISA versions are defined as -march= parameters and
are recommended for building binaries for distribution.
Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.
gcc/ChangeLog:
* config.gcc: Make la64v1.0 the default ISA preset of the lp64d ABI.
* config/loongarch/genopts/loongarch-strings: Define la64v1.0, la64v1.1.
* config/loongarch/genopts/loongarch.opt.in: Likewise.
* config/loongarch/loongarch-c.cc (LARCH_CPP_SET_PROCESSOR): Likewise.
(loongarch_cpu_cpp_builtins): Likewise.
* config/loongarch/loongarch-cpu.cc (get_native_prid): Likewise.
(fill_native_cpu_config): Likewise.
* config/loongarch/loongarch-def.cc (array_tune): Likewise.
* config/loongarch/loongarch-def.h: Likewise.
* config/loongarch/loongarch-driver.cc (driver_set_m_parm): Likewise.
(driver_get_normalized_m_opts): Likewise.
* config/loongarch/loongarch-opts.cc (default_tune_for_arch): Likewise.
(TUNE_FOR_ARCH): Likewise.
(arch_str): Likewise.
(loongarch_target_option_override): Likewise.
* config/loongarch/loongarch-opts.h (TARGET_uARCH_LA464): Likewise.
(TARGET_uARCH_LA664): Likewise.
* config/loongarch/loongarch-str.h (STR_CPU_ABI_DEFAULT): Likewise.
(STR_ARCH_ABI_DEFAULT): Likewise.
(STR_TUNE_GENERIC): Likewise.
(STR_ARCH_LA64V1_0): Likewise.
(STR_ARCH_LA64V1_1): Likewise.
* config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width): Likewise.
(loongarch_asm_code_end): Likewise.
* config/loongarch/loongarch.opt: Likewise.
* doc/invoke.texi: Likewise.
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After we reverted below 2 commits, the reference to attr need some
adjustment as the group_overlap is no longer available.
* RISC-V: Robostify the W43, W86, W87 constraint enabled attribute
* RISC-V: Rename vconstraint into group_overlap
The below tests are passed for this patch.
* The rv64gcv fully regression tests.
gcc/ChangeLog:
* config/riscv/vector-crypto.md:
Signed-off-by: Pan Li <pan2.li@intel.com>
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This patch corrects gm2-torture.exp to recognize an ICE
in the fail case as a negative result. The patch also fixes
FoldBinarySet so that the types are only checked once the operands
have been resolved. Without this patch
gcc/testsuite/gm2/iso/fail/badexpression2.mod would cause an ICE.
gcc/m2/ChangeLog:
PR modula2/114811
* gm2-compiler/M2GenGCC.mod (FoldBinarySet): Add condition
checking to ensure op2 and op3 are fully resolved before
type checking is performed.
gcc/testsuite/ChangeLog:
PR modula2/114811
* lib/gm2-torture.exp: Correct regexp checking for internal
compiler error strings in compiler output.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
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Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:
PR libstdc++/114803
* include/experimental/bits/simd_builtin.h
(_SimdBase2::operator __vector_type_t): There is no __builtin()
function in _SimdWrapper, instead use its conversion operator.
* testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc: New
test.
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Avoid
-Wnarrowing in C code;
-Wtautological-compare in unconditional static_assert (necessary for
faking a dependency on a template parameter)
Signed-off-by: Matthias Kretz <m.kretz@gsi.de>
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd.h: Ignore -Wnarrowing for
arm_neon.h.
(__int_for_sizeof): Replace tautological compare with checking
for invalid template parameter value.
* include/experimental/bits/simd_builtin.h (__extract_part):
Remove tautological compare by combining two static_assert.
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This patch fixes an ICE caused when a constant string
is built and attempted to be passed into a procedure with
an opaque type.
gcc/m2/ChangeLog:
PR modula2/114807
* gm2-compiler/M2Check.mod (checkUnbounded): Remove unused
local variables.
(constCheckMeta): Include check for IsReallyPointer in the
failure case.
* gm2-compiler/M2Quads.mod (MoveWithMode): Remove CopyConstString.
* gm2-compiler/SymbolTable.def (IsHiddenReallyPointer): Export.
* gm2-compiler/SymbolTable.mod (SkipHiddenType): Remove.
(IsReallyPointer): Include IsHiddenReallyPointer test.
gcc/testsuite/ChangeLog:
PR modula2/114807
* gm2/pim/fail/badproctype.mod: Change MYSHORTREAL
to SHORTREAL.
* gm2/pim/fail/badprocbool.mod: New test.
* gm2/pim/fail/badproccard.mod: New test.
* gm2/pim/fail/badprocint.mod: New test.
* gm2/pim/fail/badprocint2.mod: New test.
* gm2/pim/pass/goodproccard2.mod: New test.
* gm2/pim/pass/goodprocint.mod: New test.
* gm2/pim/pass/goodprocint3.mod: New test.
* gm2/pim/run/pass/genconststr.mod: New test.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
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We see
FAIL: 17_intro/headers/c++1998/all_attributes.cc (test for excess errors)
FAIL: 17_intro/headers/c++2011/all_attributes.cc (test for excess errors)
FAIL: 17_intro/headers/c++2014/all_attributes.cc (test for excess errors)
FAIL: 17_intro/headers/c++2017/all_attributes.cc (test for excess errors)
FAIL: 17_intro/headers/c++2020/all_attributes.cc (test for excess errors)
FAIL: 17_intro/names.cc -std=gnu++17 (test for excess errors)
on s390x-linux.
The first 5 are due to kernel-headers not using uglified attribute names,
where <asm/types.h> contains
__attribute__((packed, aligned(4)))
I've filed a downstream bugreport for this in
https://bugzilla.redhat.com/show_bug.cgi?id=2276084
(not really sure where to report kernel-headers issues upstream), while the
last one is due to <sys/ucontext.h> from glibc containing:
#ifdef __USE_MISC
# define __ctx(fld) fld
#else
# define __ctx(fld) __ ## fld
#endif
...
typedef union
{
double __ctx(d);
float __ctx(f);
} fpreg_t;
and g++ predefining -D_GNU_SOURCE which implies define __USE_MISC.
The following patch adds a workaround for this on the libstdc++ testsuite
side.
2024-04-22 Jakub Jelinek <jakub@redhat.com>
* testsuite/17_intro/names.cc (d, f): Undefine on s390*-linux*.
* testsuite/17_intro/headers/c++1998/all_attributes.cc (packed): Don't
define on s390.
* testsuite/17_intro/headers/c++2011/all_attributes.cc (packed):
Likewise.
* testsuite/17_intro/headers/c++2014/all_attributes.cc (packed):
Likewise.
* testsuite/17_intro/headers/c++2017/all_attributes.cc (packed):
Likewise.
* testsuite/17_intro/headers/c++2020/all_attributes.cc (packed):
Likewise.
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When the compiler defaults to -freport-bug, a few dg-ice tests fail
with:
Excess errors:
Preprocessed source stored into /tmp/cc6hldZ0.out file, please attach this to your bugreport.
We could add -fno-report-bug to those tests. But it seems to me that a
better fix would be to prune the "Preprocessed source stored..." message
in prune_gcc_output.
gcc/testsuite/ChangeLog:
* lib/prune.exp (prune_gcc_output): Also prune -freport-bug output.
Reviewed-by: Jakub Jelinek <jakub@redhat.com>
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This reverts commit e65aaf8efe1900f7bbf76235a078000bf2ec8b45.
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This reverts commit d3544cea63d0a642b6357a7be55986f5562beaa0.
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gcc/ChangeLog:
* common/config/i386/i386-common.cc (processor_alias_table):
Let Sierra Forest map to CPU_TYPE enum.
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We currently enable the vector extensions also for -march=z13 -m31
-mesa which is very wrong.
gcc/ChangeLog:
* config/s390/s390.cc (s390_option_override_internal): Check zarch
flag before enabling -mvx.
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We reverted below patch for register group overlap, add the related
insn test and mark it as xfail. And we will remove the xfail
after we support the register overlap in GCC-15.
8614cbb2534 RISC-V: Support highpart overlap for floating-point widen instructions
The below test suites are passed.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112431-10.c: New test.
* gcc.target/riscv/rvv/base/pr112431-11.c: New test.
* gcc.target/riscv/rvv/base/pr112431-12.c: New test.
* gcc.target/riscv/rvv/base/pr112431-13.c: New test.
* gcc.target/riscv/rvv/base/pr112431-14.c: New test.
* gcc.target/riscv/rvv/base/pr112431-15.c: New test.
* gcc.target/riscv/rvv/base/pr112431-7.c: New test.
* gcc.target/riscv/rvv/base/pr112431-8.c: New test.
* gcc.target/riscv/rvv/base/pr112431-9.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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This reverts commit 8614cbb253484e28c3eb20cde4d1067aad56de58.
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Update in v2:
* Add change log to pr112431-34.c.
Original log:
We reverted below patch for register group overlap, add the related
insn test and mark it as xfail. And we will remove the xfail
after we support the register overlap in GCC-15.
4418d55bcd1 RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW
The below test suites are passed.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112431-34.c: Remove xfail for vluxei8 check.
* gcc.target/riscv/rvv/base/pr112431-28.c: New test.
* gcc.target/riscv/rvv/base/pr112431-29.c: New test.
* gcc.target/riscv/rvv/base/pr112431-30.c: New test.
* gcc.target/riscv/rvv/base/pr112431-31.c: New test.
* gcc.target/riscv/rvv/base/pr112431-32.c: New test.
* gcc.target/riscv/rvv/base/pr112431-33.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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DEST EEW"
This reverts commit 4418d55bcd1b7e0ef823981b6a781d7de5c38cce.
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Starting with r14-9316-g7890836de20912 patterns for vpopct{b,h} are also
detected. Thus, remove xfails.
gcc/testsuite/ChangeLog:
* gcc.target/s390/vxe/popcount-1.c: Remove xfail.
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We reverted below patch for register group overlap, add the related
insn test and mark it as xfail. And we will remove the xfail
after we support the register overlap in GCC-15.
27fde325d64 RISC-V: Support highest-number regno overlap for widen ternary
The below test suites are passed.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112431-37.c: New test.
* gcc.target/riscv/rvv/base/pr112431-38.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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This reverts commit 27fde325d64447a3a0d5d550c5976e5f3fb6dc16.
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We reverted below patch for register group overlap, add the related
insn test and mark it as xfail. And we will remove the xfail
after we support the register overlap in GCC-15.
303195e2a6b RISC-V: Support widening register overlap for vf4/vf8
The below test suites are passed.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112431-16.c: New test.
* gcc.target/riscv/rvv/base/pr112431-17.c: New test.
* gcc.target/riscv/rvv/base/pr112431-18.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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This reverts commit 303195e2a6b6f0e8f42e0578b61f9f37c6250beb.
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We reverted below patch for register group overlap, add the related
insn test and mark it as xfail. And we will remove the xfail
after we support the register overlap in GCC-15.
a23415d7572 RISC-V: Support highpart register overlap for widen vx/vf instructions
The below test suites are passed.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112431-22.c: New test.
* gcc.target/riscv/rvv/base/pr112431-23.c: New test.
* gcc.target/riscv/rvv/base/pr112431-24.c: New test.
* gcc.target/riscv/rvv/base/pr112431-25.c: New test.
* gcc.target/riscv/rvv/base/pr112431-26.c: New test.
* gcc.target/riscv/rvv/base/pr112431-27.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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