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2019-01-10Daily bump.GCC Administrator1-1/+1
From-SVN: r267792
2019-01-09re PR go/86343 (types built by GO share TYPE_FIELDS in unsupported way)Ian Lance Taylor2-1/+12
PR go/86343 * go-gcc.cc (Gcc_backend::set_placeholder_struct_type): Go back to build_distinct_type_copy, but copy the fields so that they have the right DECL_CONTEXT. From-SVN: r267789
2019-01-09libphobos: Merge phobos upstream b022e552aIain Buclaw14-1506/+80
This removes updates the removal date of all deprecations in phobos. Many of the marked functions have passed their end dates, and are now absent in upstream. Reviewed-on: https://github.com/dlang/phobos/pull/6828 From-SVN: r267788
2019-01-09PR other/16615 [5/5]Sandra Loosemore2-15874/+17598
2019-01-09 Sandra Loosemore <sandra@codesourcery.com> PR other/16615 [5/5] gcc/po/ * gcc.pot: Regenerate. From-SVN: r267787
2019-01-09PR other/16615 [4/5]Sandra Loosemore18-33/+70
2019-01-09 Sandra Loosemore <sandra@codesourcery.com> PR other/16615 [4/5] gcc/ * config/pa/pa.c: Change "can not" to "cannot". * gimple-ssa-evrp-analyze.c: Likewise. * ipa-icf.c: Likewise. * ipa-polymorphic-call.c: Likewise. * ipa-pure-const.c: Likewise. * lra-constraints.c: Likewise. * lra-remat.c: Likewise. * reload1.c: Likewise. * reorg.c: Likewise. * tree-ssa-uninit.c: Likewise. gcc/ada/ * exp_ch11.adb: Change "can not" to "cannot". * sem_ch4.adb: Likewise. gcc/fortran/ * expr.c: Change "can not" to "cannot". libobjc/ * objc/runtime.h: Change "can not" to "cannot". From-SVN: r267786
2019-01-09PR other/16615 [3/5]Sandra Loosemore23-53/+81
2019-01-09 Sandra Loosemore <sandra@codesourcery.com> PR other/16615 [3/5] gcc/testsuite/ * g++.dg/lto/odr-1_1.C: Update diagnostic message patterns to replace "can not" with "cannot". * gfortran.dg/common_15.f90: Likewise. * gfortran.dg/derived_result_2.f90: Likewise. * gfortran.dg/do_check_6.f90: Likewise. * gfortran.dg/namelist_args.f90: Likewise. * gfortran.dg/negative_unit_check.f90: Likewise. * gfortran.dg/pure_formal_3.f90: Likewise. * obj-c++.dg/attributes/method-attribute-2.mm: Likewise. * obj-c++.dg/exceptions-3.mm: Likewise. * obj-c++.dg/exceptions-4.mm: Likewise. * obj-c++.dg/exceptions-5.mm: Likewise. * obj-c++.dg/property/at-property-23.mm: Likewise. * obj-c++.dg/property/dotsyntax-17.mm: Likewise. * obj-c++.dg/property/property-neg-7.mm: Likewise. * objc.dg/attributes/method-attribute-2.m: Likewise. * objc.dg/exceptions-3.m: Likewise. * objc.dg/exceptions-4.m: Likewise. * objc.dg/exceptions-5.m: Likewise. * objc.dg/param-1.m: Likewise. * objc.dg/property/at-property-23.m: Likewise. * objc.dg/property/dotsyntax-17.m: Likewise. * objc.dg/property/property-neg-7.m: Likewise. From-SVN: r267785
2019-01-09PR other/16615 [2/5]Sandra Loosemore7-7/+22
2019-01-09 Sandra Loosemore <sandra@codesourcery.com> PR other/16615 [2/5] include/ * libiberty.h: Mechanically replace "can not" with "cannot". * plugin-api.h: Likewise. libiberty/ * cp-demangle.c: Mechanically replace "can not" with "cannot". * floatformat.c: Likewise. * strerror.c: Likewise. From-SVN: r267784
2019-01-09PR other/16615 [1/5]Sandra Loosemore210-435/+699
2019-01-09 Sandra Loosemore <sandra@codesourcery.com> PR other/16615 [1/5] contrib/ * mklog: Mechanically replace "can not" with "cannot". gcc/ * Makefile.in: Mechanically replace "can not" with "cannot". * alias.c: Likewise. * builtins.c: Likewise. * calls.c: Likewise. * cgraph.c: Likewise. * cgraph.h: Likewise. * cgraphclones.c: Likewise. * cgraphunit.c: Likewise. * combine-stack-adj.c: Likewise. * combine.c: Likewise. * common/config/i386/i386-common.c: Likewise. * config/aarch64/aarch64.c: Likewise. * config/alpha/sync.md: Likewise. * config/arc/arc.c: Likewise. * config/arc/predicates.md: Likewise. * config/arm/arm-c.c: Likewise. * config/arm/arm.c: Likewise. * config/arm/arm.h: Likewise. * config/arm/arm.md: Likewise. * config/arm/cortex-r4f.md: Likewise. * config/csky/csky.c: Likewise. * config/csky/csky.h: Likewise. * config/darwin-f.c: Likewise. * config/epiphany/epiphany.md: Likewise. * config/i386/i386.c: Likewise. * config/i386/sol2.h: Likewise. * config/m68k/m68k.c: Likewise. * config/mcore/mcore.h: Likewise. * config/microblaze/microblaze.md: Likewise. * config/mips/20kc.md: Likewise. * config/mips/sb1.md: Likewise. * config/nds32/nds32.c: Likewise. * config/nds32/predicates.md: Likewise. * config/pa/pa.c: Likewise. * config/rs6000/e300c2c3.md: Likewise. * config/rs6000/rs6000.c: Likewise. * config/s390/s390.h: Likewise. * config/sh/sh.c: Likewise. * config/sh/sh.md: Likewise. * config/spu/vmx2spu.h: Likewise. * cprop.c: Likewise. * dbxout.c: Likewise. * df-scan.c: Likewise. * doc/cfg.texi: Likewise. * doc/extend.texi: Likewise. * doc/fragments.texi: Likewise. * doc/gty.texi: Likewise. * doc/invoke.texi: Likewise. * doc/lto.texi: Likewise. * doc/md.texi: Likewise. * doc/objc.texi: Likewise. * doc/rtl.texi: Likewise. * doc/tm.texi: Likewise. * dse.c: Likewise. * emit-rtl.c: Likewise. * emit-rtl.h: Likewise. * except.c: Likewise. * expmed.c: Likewise. * expr.c: Likewise. * fold-const.c: Likewise. * genautomata.c: Likewise. * gimple-fold.c: Likewise. * hard-reg-set.h: Likewise. * ifcvt.c: Likewise. * ipa-comdats.c: Likewise. * ipa-cp.c: Likewise. * ipa-devirt.c: Likewise. * ipa-fnsummary.c: Likewise. * ipa-icf.c: Likewise. * ipa-inline-transform.c: Likewise. * ipa-inline.c: Likewise. * ipa-polymorphic-call.c: Likewise. * ipa-profile.c: Likewise. * ipa-prop.c: Likewise. * ipa-pure-const.c: Likewise. * ipa-reference.c: Likewise. * ipa-split.c: Likewise. * ipa-visibility.c: Likewise. * ipa.c: Likewise. * ira-build.c: Likewise. * ira-color.c: Likewise. * ira-conflicts.c: Likewise. * ira-costs.c: Likewise. * ira-int.h: Likewise. * ira-lives.c: Likewise. * ira.c: Likewise. * ira.h: Likewise. * loop-invariant.c: Likewise. * loop-unroll.c: Likewise. * lower-subreg.c: Likewise. * lra-assigns.c: Likewise. * lra-constraints.c: Likewise. * lra-eliminations.c: Likewise. * lra-lives.c: Likewise. * lra-remat.c: Likewise. * lra-spills.c: Likewise. * lra.c: Likewise. * lto-cgraph.c: Likewise. * lto-streamer-out.c: Likewise. * postreload-gcse.c: Likewise. * predict.c: Likewise. * profile-count.h: Likewise. * profile.c: Likewise. * recog.c: Likewise. * ree.c: Likewise. * reload.c: Likewise. * reload1.c: Likewise. * reorg.c: Likewise. * resource.c: Likewise. * rtl.def: Likewise. * rtl.h: Likewise. * rtlanal.c: Likewise. * sched-deps.c: Likewise. * sched-ebb.c: Likewise. * sched-rgn.c: Likewise. * sel-sched-ir.c: Likewise. * sel-sched.c: Likewise. * shrink-wrap.c: Likewise. * simplify-rtx.c: Likewise. * symtab.c: Likewise. * target.def: Likewise. * toplev.c: Likewise. * tree-call-cdce.c: Likewise. * tree-cfg.c: Likewise. * tree-complex.c: Likewise. * tree-core.h: Likewise. * tree-eh.c: Likewise. * tree-inline.c: Likewise. * tree-loop-distribution.c: Likewise. * tree-nrv.c: Likewise. * tree-profile.c: Likewise. * tree-sra.c: Likewise. * tree-ssa-alias.c: Likewise. * tree-ssa-dce.c: Likewise. * tree-ssa-dom.c: Likewise. * tree-ssa-forwprop.c: Likewise. * tree-ssa-loop-im.c: Likewise. * tree-ssa-loop-ivcanon.c: Likewise. * tree-ssa-loop-ivopts.c: Likewise. * tree-ssa-loop-niter.c: Likewise. * tree-ssa-phionlycprop.c: Likewise. * tree-ssa-phiopt.c: Likewise. * tree-ssa-propagate.c: Likewise. * tree-ssa-threadedge.c: Likewise. * tree-ssa-threadupdate.c: Likewise. * tree-ssa-uninit.c: Likewise. * tree-ssanames.c: Likewise. * tree-streamer-out.c: Likewise. * tree.c: Likewise. * tree.h: Likewise. * vr-values.c: Likewise. gcc/ada/ * exp_ch9.adb: Mechanically replace "can not" with "cannot". * libgnat/s-regpat.ads: Likewise. * par-ch4.adb: Likewise. * set_targ.adb: Likewise. * types.ads: Likewise. gcc/cp/ * cp-tree.h: Mechanically replace "can not" with "cannot". * parser.c: Likewise. * pt.c: Likewise. gcc/fortran/ * class.c: Mechanically replace "can not" with "cannot". * decl.c: Likewise. * expr.c: Likewise. * gfc-internals.texi: Likewise. * intrinsic.texi: Likewise. * invoke.texi: Likewise. * io.c: Likewise. * match.c: Likewise. * parse.c: Likewise. * primary.c: Likewise. * resolve.c: Likewise. * symbol.c: Likewise. * trans-array.c: Likewise. * trans-decl.c: Likewise. * trans-intrinsic.c: Likewise. * trans-stmt.c: Likewise. gcc/go/ * go-backend.c: Mechanically replace "can not" with "cannot". * go-gcc.cc: Likewise. gcc/lto/ * lto-partition.c: Mechanically replace "can not" with "cannot". * lto-symtab.c: Likewise. * lto.c: Likewise. gcc/objc/ * objc-act.c: Mechanically replace "can not" with "cannot". libbacktrace/ * backtrace.h: Mechanically replace "can not" with "cannot". libgcc/ * config/c6x/libunwind.S: Mechanically replace "can not" with "cannot". * config/tilepro/atomic.h: Likewise. * config/vxlib-tls.c: Likewise. * generic-morestack-thread.c: Likewise. * generic-morestack.c: Likewise. * mkmap-symver.awk: Likewise. libgfortran/ * caf/single.c: Mechanically replace "can not" with "cannot". * io/unit.c: Likewise. libobjc/ * class.c: Mechanically replace "can not" with "cannot". * objc/runtime.h: Likewise. * sendmsg.c: Likewise. liboffloadmic/ * include/coi/common/COIResult_common.h: Mechanically replace "can not" with "cannot". * include/coi/source/COIBuffer_source.h: Likewise. libstdc++-v3/ * include/ext/bitmap_allocator.h: Mechanically replace "can not" with "cannot". From-SVN: r267783
2019-01-09re PR fortran/68426 (Simplification of SPREAD with a derived type element is ↵Thomas Koenig4-1/+29
unimplemented) 2019-01-09 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/68426 * simplify.c (gfc_simplify_spread): Also simplify if the type of source is an EXPR_STRUCTURE. 2019-01-09 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/68426 * gfortran.dg/spread_simplify_1.f90: New test. From-SVN: r267781
2019-01-09i386-protos.h (ix86_expand_xorsign): New prototype.Uros Bizjak8-1/+170
* config/i386/i386-protos.h (ix86_expand_xorsign): New prototype. (ix86_split_xorsign): Ditto. * config/i386/i386.c (ix86_expand_xorsign): New function. (ix86_split_xorsign): Ditto. * config/i386/i386.md (UNSPEC_XORSIGN): New unspec. (xorsign<mode>3): New expander. (xorsign<mode>3_1): New insn_and_split pattern. * config/i386/sse.md (xorsign<mode>3): New expander. testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_xorsign): Add i?86-*-* and x86_64-*-* targets. * gcc.target/i386/xorsign.c: New test. From-SVN: r267779
2019-01-09Merge dmd upstream 6d5b853d3Iain Buclaw129-129/+129
Updates the copyright years of all d/dmd sources. Reviewed-on: https://github.com/dlang/dmd/pull/9181 From-SVN: r267778
2019-01-09sparc.md (*tablejump_sp32): Merge into...Eric Botcazou2-109/+65
* config/sparc/sparc.md (*tablejump_sp32): Merge into... (*tablejump_sp64): Likewise. (*tablejump<P:mode>): ...this. (*call_address_sp32): Merge into... (*call_address_sp64): Likewise. (*call_address<P:mode>): ...this. (*call_symbolic_sp32): Merge into... (*call_symbolic_sp64): Likewise. (*call_symbolic<P:mode>): ...this. (call_value): Remove constraint and add predicate. (*call_value_address_sp32): Merge into... (*call_value_address_sp64): Likewise. (*call_value_address<P:mode>): ...this. (*call_value_symbolic_sp32): Merge into... (*call_value_symbolic_sp64): Likewise. (*call_value_symbolic<P:mode>): ...this. (*sibcall_symbolic_sp32): Merge into... (*sibcall_symbolic_sp64): Likewise. (*sibcall_symbolic<P:mode>): ...this. (sibcall_value): Remove constraint and add predicate. (*sibcall_value_symbolic_sp32): Merge into... (*sibcall_value_symbolic_sp64): Likewise. (*sibcall_value_symbolic<P:mode>): ...this. (window_save): Minor tweak. (*branch_sp32): Merge into... (*branch_sp64): Likewise. (*branch<P:mode>): ...this. From-SVN: r267774
2019-01-09re PR target/84010 (problematic TLS code generation on 64-bit SPARC)Eric Botcazou11-411/+566
PR target/84010 * config/sparc/sparc.c (sparc_legitimize_tls_address): Only use Pmode consistently in TLS address generation and adjust code to the renaming of patterns. Mark calls to __tls_get_addr as const. * config/sparc/sparc.md (tgd_hi22): Turn into... (tgd_hi22<P:mode>): ...this and use Pmode throughout. (tgd_lo10): Turn into... (tgd_lo10<P:mode>): ...this and use Pmode throughout. (tgd_add32): Merge into... (tgd_add64): Likewise. (tgd_add<P:mode>): ...this and use Pmode throughout. (tldm_hi22): Turn into... (tldm_hi22<P:mode>): ...this and use Pmode throughout. (tldm_lo10): Turn into... (tldm_lo10<P:mode>): ...this and use Pmode throughout. (tldm_add32): Merge into... (tldm_add64): Likewise. (tldm_add<P:mode>): ...this and use Pmode throughout. (tldm_call32): Merge into... (tldm_call64): Likewise. (tldm_call<P:mode>): ...this and use Pmode throughout. (tldo_hix22): Turn into... (tldo_hix22<P:mode>): ...this and use Pmode throughout. (tldo_lox10): Turn into... (tldo_lox10<P:mode>): ...this and use Pmode throughout. (tldo_add32): Merge into... (tldo_add64): Likewise. (tldo_add<P:mode>): ...this and use Pmode throughout. (tie_hi22): Turn into... (tie_hi22<P:mode>): ...this and use Pmode throughout. (tie_lo10): Turn into... (tie_lo10<P:mode>): ...this and use Pmode throughout. (tie_ld64): Use DImode throughout. (tie_add32): Merge into... (tie_add64): Likewise. (tie_add<P:mode>): ...this and use Pmode throughout. (tle_hix22_sp32): Merge into... (tle_hix22_sp64): Likewise. (tle_hix22<P:mode>): ...this and use Pmode throughout. (tle_lox22_sp32): Merge into... (tle_lox22_sp64): Likewise. (tle_lox22<P:mode>): ...this and use Pmode throughout. (*tldo_ldub_sp32): Merge into... (*tldo_ldub_sp64): Likewise. (*tldo_ldub<P:mode>): ...this and use Pmode throughout. (*tldo_ldub1_sp32): Merge into... (*tldo_ldub1_sp64): Likewise. (*tldo_ldub1<P:mode>): ...this and use Pmode throughout. (*tldo_ldub2_sp32): Merge into... (*tldo_ldub2_sp64): Likewise. (*tldo_ldub2<P:mode>): ...this and use Pmode throughout. (*tldo_ldsb1_sp32): Merge into... (*tldo_ldsb1_sp64): Likewise. (*tldo_ldsb1<P:mode>): ...this and use Pmode throughout. (*tldo_ldsb2_sp32): Merge into... (*tldo_ldsb2_sp64): Likewise. (*tldo_ldsb2<P:mode>): ...this and use Pmode throughout. (*tldo_ldub3_sp64): Use DImode throughout. (*tldo_ldsb3_sp64): Likewise. (*tldo_lduh_sp32): Merge into... (*tldo_lduh_sp64): Likewise. (*tldo_lduh<P:mode>): ...this and use Pmode throughout. (*tldo_lduh1_sp32): Merge into... (*tldo_lduh1_sp64): Likewise. (*tldo_lduh1<P:mode>): ...this and use Pmode throughout. (*tldo_ldsh1_sp32): Merge into... (*tldo_ldsh1_sp64): Likewise. (*tldo_ldsh1<P:mode>): ...this and use Pmode throughout. (*tldo_lduh2_sp64): Use DImode throughout. (*tldo_ldsh2_sp64): Likewise. (*tldo_lduw_sp32): Merge into... (*tldo_lduw_sp64): Likewise. (*tldo_lduw<P:mode>): ...this and use Pmode throughout. (*tldo_lduw1_sp64): Use DImode throughout. (*tldo_ldsw1_sp64): Likewise. (*tldo_ldx_sp64): Likewise. (*tldo_stb_sp32): Merge into... (*tldo_stb_sp64): Likewise. (*tldo_stb<P:mode>): ...this and use Pmode throughout. (*tldo_sth_sp32): Merge into... (*tldo_sth_sp64): Likewise. (*tldo_sth<P:mode>): ...this and use Pmode throughout. (*tldo_stw_sp32): Merge into... (*tldo_stw_sp64): Likewise. (*tldo_stw<P:mode>): ...this and use Pmode throughout. (*tldo_stx_sp64): Use DImode throughout. From-SVN: r267771
2019-01-09[AArch64, 6/6] Enable BTI: Add configure option.Sudakshina Das9-2/+113
This patch is part of a series that enables ARMv8.5-A in GCC and adds Branch Target Identification Mechanism. This patch is adding a new configure option for enabling BTI and Return Address Signing by default. *** gcc/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * config/aarch64/aarch64.c (aarch64_override_options): Add case to check configure option to set BTI and Return Address Signing. * configure.ac: Add --enable-standard-branch-protection and --disable-standard-branch-protection. * configure: Regenerated. * doc/install.texi: Document the same. *** gcc/testsuite/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * gcc.target/aarch64/bti-1.c: Update test to not add command line option when configure with bti. * gcc.target/aarch64/bti-2.c: Likewise. * lib/target-supports.exp (check_effective_target_default_branch_protection): Add configure check for --enable-standard-branch-protection. From-SVN: r267770
2019-01-09[AArch64, 5/6] Enable BTI : Add new pass for BTI.Sudakshina Das14-7/+490
This patch is part of a series that enables ARMv8.5-A in GCC and adds Branch Target Identification Mechanism. This patch adds a new pass called "bti" which is triggered by the command line argument -mbranch-protection whenever "bti" is turned on. The pass iterates through the instructions and adds appropriated BTI instructions based on the following: * Add a new "BTI C" at the beginning of a function, unless its already protected by a "PACIASP". We exempt the functions that are only called directly. * Add a new "BTI J" for every target of an indirect jump, jump table targets, non-local goto targets or labels that might be referenced by variables, constant pools, etc (NOTE_INSN_DELETED_LABEL). Since we have already changed the use of indirect tail calls to only x16 and x17, we do not have to use "BTI JC". (check patch 3/6). *** gcc/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o. * gcc/config/aarch64/aarch64.h: Update comment for TRAMPOLINE_SIZE. * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Update if bti is enabled. * config/aarch64/aarch64-bti-insert.c: New file. * config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert bti pass. * config/aarch64/aarch64-protos.h (make_pass_insert_bti): Declare the new bti pass. * config/aarch64/aarch64.md (unspecv): Add UNSPECV_BTI_NOARG, UNSPECV_BTI_C, UNSPECV_BTI_J and UNSPECV_BTI_JC. (bti_noarg, bti_j, bti_c, bti_jc): New define_insns. * config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o. *** gcc/testsuite/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * gcc.target/aarch64/bti-1.c: New test. * gcc.target/aarch64/bti-2.c: New test. * gcc.target/aarch64/bti-3.c: New test. * lib/target-supports.exp (check_effective_target_aarch64_bti_hw): Add new check for BTI hw. Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> From-SVN: r267769
2019-01-09[AArch64, 4/6] Enable BTI: Add new <type> to -mbranch-protection.Sudakshina Das5-0/+36
This patch is part of a series that enables ARMv8.5-A in GCC and adds Branch Target Identification Mechanism. This pass updates the CLI of -mbranch-protection to add "bti" as a new type of branch protection and also add it its definition of "none" and "standard". The option does not really do anything functional. The functional changes are in the next patch. I am initializing the target variable aarch64_enable_bti to 2 since I am also adding a configure option in a later patch and a value different from 0 and 1 would help identify if its already been updated. *** gcc/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * config/aarch64/aarch64-protos.h (aarch64_bti_enabled): Declare. * config/aarch64/aarch64.c (aarch64_handle_no_branch_protection): Disable bti for -mbranch-protection=none. (aarch64_handle_standard_branch_protection): Enable bti for -mbranch-protection=standard. (aarch64_handle_bti_protection): Enable bti for "bti" in the string to -mbranch-protection. (aarch64_bti_enabled): Check if bti is enabled. * config/aarch64/aarch64.opt: Declare target variable. * doc/invoke.texi: Add bti to the -mbranch-protection documentation. From-SVN: r267768
2019-01-09[AArch64, 3/6] Restrict indirect tail calls to x16 and x17Sudakshina Das6-20/+52
This patch is part of a series that enables ARMv8.5-A in GCC and adds Branch Target Identification Mechanism. This patch changes the registers that are allowed for indirect tail calls. We are choosing to restrict these to only x16 or x17. Indirect tail calls are special in a way that they convert a call statement (BLR instruction) to a jump statement (BR instruction). For the best possible use of Branch Target Identification Mechanism, we would like to place a "BTI C" (call) at the beginning of the function which is only compatible with BLRs and BR X16/X17. In order to make indirect tail calls compatible with this scenario, we are restricting the TAILCALL_ADDR_REGS. In order to use x16/x17 for this purpose, we also had to change the use of these registers in the epilogue/prologue handling. For this purpose we are now using x12 and x13 named as EP0_REGNUM and EP1_REGNUM as scratch registers for epilogue and prologue. *** gcc/ChangeLog*** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * config/aarch64/aarch64.c (aarch64_expand_prologue): Use new epilogue/prologue scratch registers EP0_REGNUM and EP1_REGNUM. (aarch64_expand_epilogue): Likewise. (aarch64_output_mi_thunk): Likewise * config/aarch64/aarch64.h (REG_CLASS_CONTENTS): Change TAILCALL_ADDR_REGS to x16 and x17. * config/aarch64/aarch64.md: Define EP0_REGNUM and EP1_REGNUM. *** gcc/testsuite/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * gcc.target/aarch64/test_frame_17.c: Update to check for EP0_REGNUM instead of IP0_REGNUM and add test case. From-SVN: r267767
2019-01-09[AArch64, 2/6] Add new arch command line feaures from ARMv8.5-ASudakshina Das4-1/+61
This patch is part of a series that enables ARMv8.5-A in GCC and adds Branch Target Identification Mechanism. This patch add all the command line feature that are added by ARMv8.5. Optional extensions to armv8.5-a: +rng : Random number Generation Instructions. +memtag : Memory Tagging Extension. ARMv8.5-A features that are optional to older arch: +sb : Speculation barrier instruction. +ssbs: Speculative Store Bypass Safe instruction. +predres: Execution and Data Prediction Restriction instructions. All of the above only effect the assembler and have already gone in the trunk of binutils. *** gcc/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * config/aarch64/aarch64-option-extensions.def: Define AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres. * gcc/config/aarch64/aarch64.h (AARCH64_FL_RNG): New. (AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New. (AARCH64_FL_PREDRES): New. (AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and AARCH64_FL_PREDRES by default. * gcc/doc/invoke.texi: Document rng, memtag, sb, ssbs and predres. From-SVN: r267766
2019-01-09[AArch64, 1/6] Enable ARMv8.5-A in gccSudakshina Das4-2/+20
This patch is part of a series that enables ARMv8.5-A in GCC and adds Branch Target Identification Mechanism. *** gcc/ChangeLog *** 2018-01-09 Sudakshina Das <sudi.das@arm.com> * config/aarch64/aarch64-arches.def: Define AARCH64_ARCH for ARMv8.5-A. * gcc/config/aarch64/aarch64.h (AARCH64_FL_V8_5): New. (AARCH64_FL_FOR_ARCH8_5, AARCH64_ISA_V8_5): New. * gcc/doc/invoke.texi: Document ARMv8.5-A. From-SVN: r267765
2019-01-09[Aarch64][SVE] Add copysign and xorsign supportAlejandro Martinez7-0/+290
This patch adds support for copysign and xorsign builtins to SVE. With the new expands, they can be vectorized using bitwise logical operations. I tested this patch in an aarch64 machine bootstrapping the compiler and running the checks. 2019-01-09 Alejandro Martinez <alejandro.martinezvicente@arm.com> * config/aarch64/aarch64-sve.md (copysign<mode>3): New define_expand. (xorsign<mode>3): Likewise. 2019-01-09 Alejandro Martinez <alejandro.martinezvicente@arm.com> * gcc.target/aarch64/sve/copysign_1.c: New test for SVE vectorized copysign. * gcc.target/aarch64/sve/copysign_1_run.c: Likewise. * gcc.target/aarch64/sve/xorsign_1.c: New test for SVE vectorized xorsign. * gcc.target/aarch64/sve/xorsign_1_run.c: Likewise. From-SVN: r267764
2019-01-09Fix failing prettyprinter testJonathan Wakely2-6/+9
The failure for "p2" went unnoticed due to the pre-existing failures for variables with similar names, like "p" and "q". This fixes the failure, and gives the filesystem::path variables better names. * testsuite/libstdc++-prettyprinters/cxx17.cc: Fix expected output for filesystem::path. Give variables more distinctive names. From-SVN: r267762
2019-01-09Remove some more code duplication in std::optionalJonathan Wakely2-37/+45
Hoist the duplicated code from the _Optional_payload partial specializations into the _Optional_payload_base base class. * include/std/optional (_Optional_payload_base::_M_copy_assign): New member function to perform non-trivial assignment. (_Optional_payload_base::_M_move_assign): Likewise. (_Optional_payload<T, true, false, true>::operator=) (_Optional_payload<T, true, true, false>::operator=) (_Optional_payload<T, true, false, false>::operator=): Call _M_copy_assign and/or _M_move_assign to do non-trivial assignments. From-SVN: r267761
2019-01-09re PR middle-end/88758 (186.crafty in SPEC CPU 2000 failed to build)Jakub Jelinek2-2/+6
PR middle-end/88758 * tree.c (initializer_each_zero_or_onep) <case VECTOR_CST>: Use vector_cst_elt instead of VECTOR_CST_ENCODED_ELT. From-SVN: r267760
2019-01-09re PR rtl-optimization/88331 (ICE in rtl_verify_bb_layout, at cfgrtl.c:2987)Jakub Jelinek4-1/+44
PR rtl-optimization/88331 * function.c (assign_stack_local_1): Don't set dynamic_align_addr if not currently_expanding_to_rtl. * gcc.target/i386/pr88331.c: New test. From-SVN: r267758
2019-01-09PR libstdc++/88204 disable std::complex<long double> testsJonathan Wakely3-1/+12
The IBM128 long double format isn't foldable in constant expressions, so conditionally skip the std::complex<long double> cases when they'll fail. PR libstdc++/88204 * testsuite/26_numerics/complex/operators/more_constexpr.cc: Do not test std::complex<long double> if long double format is IBM128. * testsuite/26_numerics/complex/requirements/more_constexpr.cc: Likewise. From-SVN: r267757
2019-01-09decl.c (grok_reference_init): Improve error location.Paolo Carlini5-5/+27
/cp 2019-01-08 Paolo Carlini <paolo.carlini@oracle.com> * decl.c (grok_reference_init): Improve error location. (grokdeclarator): Likewise, improve two locations. /testsuite 2019-01-08 Paolo Carlini <paolo.carlini@oracle.com> * g++.dg/diagnostic/constexpr2.C: New. * g++.dg/diagnostic/ref3.C: Likewise. From-SVN: r267756
2019-01-09invoke.texi (-Os): Remove trailing spaces.Eric Botcazou2-2/+7
* doc/invoke.texi (-Os): Remove trailing spaces. (-finline-functions): Remove reference to -O2. From-SVN: r267753
2019-01-09libgomp: Reduce copy and paste for RTEMSSebastian Huber2-181/+7
libgomp/ * config/rtems/bar.c: Include "../linux/bar.c" and delete copy and paste code. From-SVN: r267752
2019-01-09libgomp: Avoid complex dependencies for RTEMSSebastian Huber2-0/+55
libgomp/ * config/rtems/affinity-fmt.c: New file. Include affinity-fmt.c, undefining HAVE_GETPID and HAVE_GETHOSTNAME, and mapping fwrite to write. From-SVN: r267751
2019-01-09Daily bump.GCC Administrator1-1/+1
From-SVN: r267750
2019-01-09[libgomp, testsuite, openacc] Don't use const int for dimensionsTom de Vries6-15/+25
Const int is handled differently at -O0 for -xc and -xc++, which can cause noise in testsuite/libgomp.oacc-c-c++-common test-cases (which are both run for c and c++) if const int is used for launch dimensions. Fix this by using #defines instead. 2019-01-09 Tom de Vries <tdevries@suse.de> PR target/88756 * testsuite/libgomp.oacc-c-c++-common/reduction-1.c (ng, nw, vl): Use #define instead of "const int". * testsuite/libgomp.oacc-c-c++-common/reduction-2.c (ng, nw, vl): Same. * testsuite/libgomp.oacc-c-c++-common/reduction-3.c (ng, nw, vl): Same. * testsuite/libgomp.oacc-c-c++-common/reduction-4.c (ng, nw, vl): Same. * testsuite/libgomp.oacc-c-c++-common/reduction-5.c (ng, nw, vl): Same. From-SVN: r267747
2019-01-09[nvptx, libgomp] Don't launch with num_workers == 0Tom de Vries2-0/+6
When using a compiler build with: ... +#define PTX_DEFAULT_VECTOR_LENGTH PTX_CTA_SIZE +#define PTX_MAX_VECTOR_LENGTH PTX_CTA_SIZE ... and running the libgomp testsuite, we run into an execution failure in parallel-loop-1.c, due to a cuda launch failure: ... nvptx_exec: kernel f6_none_none$_omp_fn$0: launch gangs=480, workers=0, \ vectors=1024 libgomp: cuLaunchKernel error: invalid argument ... because workers == 0. The workers variable is set to 0 here in nvptx_exec: ... workers = blocks / actual_vectors; ... because actual_vectors is 1024, and blocks is 768: ... cuOccupancyMaxPotentialBlockSize: grid = 10, block = 768 ... Fix this by ensuring that workers is at least one. 2019-01-09 Tom de Vries <tdevries@suse.de> * plugin/plugin-nvptx.c (nvptx_exec): Make sure to launch with at least one worker. From-SVN: r267746
2019-01-09compiler: use int type for len & cap in slice valueIan Lance Taylor2-3/+5
Slice value expression has backend type a struct of a pointer and two ints. Make sure the len and cap are converted to int when creating slice value expression. Reviewed-on: https://go-review.googlesource.com/c/156897 From-SVN: r267745
2019-01-08re PR c++/88744 (class non-type template parameters doesn't work with ↵Marek Polacek2-0/+26
default template parameters) PR c++/88744 * g++.dg/cpp2a/nontype-class12.C: New test. From-SVN: r267744
2019-01-08Pretty printer test fixes and improvementsJonathan Wakely3-2/+42
Test that StdUniquePtrPrinter correctly prints std::unique_ptr objects using the old layout, prior to the PR libstdc++/77990 changes. The printer test for a valueless std::variant started to fail because the PR libstdc++/87431 fix meant it no longer became valueless. Change the test to use a type that is not trivially copyable, so that the exception causes it to become valueless. * testsuite/libstdc++-prettyprinters/compat.cc: Test printer support for old std::unique_ptr layout. * testsuite/libstdc++-prettyprinters/cxx17.cc: Fix std::variant test to become valueless. Add filesystem::path tests. From-SVN: r267743
2019-01-08PR libstdc++/87855 fix optional for types with non-trivial copy/moveJonathan Wakely4-558/+323
When the contained value is not trivially copy (or move) constructible the union's copy (or move) constructor will be deleted, and so the _Optional_payload delegating constructors are invalid. G++ fails to diagnose this because it incorrectly performs copy elision in the delegating constructors. Clang does diagnose it (llvm.org/PR40245). The solution is to avoid performing any copy (or move) when the contained value's copy (or move) constructor isn't trivial. Instead the contained value can be constructed by calling _M_construct. This is OK, because the relevant constructor doesn't need to be constexpr when the contained value isn't trivially copy (or move) constructible. Additionally, this patch removes a lot of code duplication in the _Optional_payload partial specializations and the _Optional_base partial specialization, by hoisting it into common base classes. The Python pretty printer for std::optional needs to be adjusted to support the new layout. Retain support for the old layout, and add a test to verify that the support still works. PR libstdc++/87855 * include/std/optional (_Optional_payload_base): New class template for common code hoisted from _Optional_payload specializations. Use a template for the union, to allow a partial specialization for types with non-trivial destructors. Add constructors for in-place initialization to the union. (_Optional_payload(bool, const _Optional_payload&)): Use _M_construct to perform non-trivial copy construction, instead of relying on non-standard copy elision in a delegating constructor. (_Optional_payload(bool, _Optional_payload&&)): Likewise for non-trivial move construction. (_Optional_payload): Derive from _Optional_payload_base and use it for everything except the non-trivial assignment operators, which are defined as needed. (_Optional_payload<false, C, M>): Derive from the specialization _Optional_payload<true, false, false> and add a destructor. (_Optional_base_impl::_M_destruct, _Optional_base_impl::_M_reset): Forward to corresponding members of _Optional_payload. (_Optional_base_impl::_M_is_engaged, _Optional_base_impl::_M_get): Hoist common members from _Optional_base. (_Optional_base): Make all members and base class public. (_Optional_base::_M_get, _Optional_base::_M_is_engaged): Move to _Optional_base_impl. * python/libstdcxx/v6/printers.py (StdExpOptionalPrinter): Add support for new std::optional layout. * testsuite/libstdc++-prettyprinters/compat.cc: New test. From-SVN: r267742
2019-01-08PR c++/88538 - braced-init-list in template-argument-list.Marek Polacek4-0/+38
* parser.c (cp_parser_template_argument): Handle braced-init-list when in C++20. * g++.dg/cpp2a/nontype-class11.C: New test. From-SVN: r267741
2019-01-08re PR rtl-optimization/79593 (Poor/Worse code generation for FPU on versions ↵Jakub Jelinek2-0/+15
after 6) PR rtl-optimization/79593 * config/i386/i386.md (reg = mem; mem = reg): New define_peephole2. From-SVN: r267740
2019-01-08re PR target/88457 (ICE: Max. number of generated reload insns per insn is ↵Jakub Jelinek2-2/+10
achieved (90)) PR target/88457 * gcc.target/powerpc/pr88457.c: Remove -m32, -c and -mcpu=e300c3 from dg-options. Require ppc_cpu_supports_hw effective target instead of powerpc64*-*-*. From-SVN: r267739
2019-01-08rs6000.c (rs6000_delegitimize_address): Delegitimize UNSPEC_FUSION_GPR to ↵Jakub Jelinek2-6/+12
its argument. * config/rs6000/rs6000.c (rs6000_delegitimize_address): Delegitimize UNSPEC_FUSION_GPR to its argument. Formatting fixes. From-SVN: r267738
2019-01-08re PR fortran/88047 (ICE in gfc_find_vtab, at fortran/class.c:2843)Janus Weil4-1/+36
2019-01-08 Janus Weil <janus@gcc.gnu.org> PR fortran/88047 * class.c (gfc_find_vtab): For polymorphic typespecs, the components of the class container may not be available (in case of invalid code). 2019-01-08 Janus Weil <janus@gcc.gnu.org> PR fortran/88047 * gfortran.dg/class_69.f90: New test case. From-SVN: r267735
2019-01-08re PR bootstrap/88721 (-Wmaybe-uninitialized warnings in sparc.c)Eric Botcazou2-3/+24
PR bootstrap/88721 * config/sparc/sparc.c (function_arg_slotno): Set *PPREGNO & *PPADDING to -1 on entry. PR debug/88723 * config/sparc/sparc.c (sparc_delegitimize_address): Deal with naked UNSPECs and UNSPEC_MOVE_GOTDATA specifically. From-SVN: r267734
2019-01-08x86: Don't generate vzeroupper if caller passes AVX/AVX512 registersH.J. Lu4-1/+39
There is no need to generate vzeroupper if caller passes arguments in AVX/AVX512 registers. Tested on i686 and x86-64 with and without --with-arch=native. gcc/ PR target/88717 * config/i386/i386.c (ix86_avx_u128_mode_exit): Call ix86_avx_u128_mode_entry. gcc/testsuite/ PR target/88717 * gcc.target/i386/pr88717.c: New test. From-SVN: r267732
2019-01-08PR c++/88548 - this accepted in static member functions.Marek Polacek5-36/+153
* parser.c (cp_debug_parser): Adjust printing of local_variables_forbidden_p. (cp_parser_new): Set local_variables_forbidden_p to 0 rather than false. (cp_parser_primary_expression): When checking local_variables_forbidden_p, use THIS_FORBIDDEN or LOCAL_VARS_FORBIDDEN. (cp_parser_lambda_body): Update the type of local_variables_forbidden_p. Set it to 0 rather than false. (cp_parser_condition): Adjust call to cp_parser_declarator. (cp_parser_explicit_instantiation): Likewise. (cp_parser_init_declarator): Likewise. (cp_parser_declarator): New parameter. Use it. (cp_parser_direct_declarator): New parameter. Use it to set local_variables_forbidden_p. Adjust call to cp_parser_declarator. (cp_parser_type_id_1): Adjust call to cp_parser_declarator. (cp_parser_parameter_declaration): Likewise. (cp_parser_default_argument): Update the type of local_variables_forbidden_p. Set it to LOCAL_VARS_AND_THIS_FORBIDDEN rather than true. (cp_parser_member_declaration): Tell cp_parser_declarator if we saw 'static' or 'friend'. (cp_parser_exception_declaration): Adjust call to cp_parser_declarator. (cp_parser_late_parsing_default_args): Update the type of local_variables_forbidden_p. Set it to LOCAL_VARS_AND_THIS_FORBIDDEN rather than true. (cp_parser_cache_defarg): Adjust call to cp_parser_declarator. (cp_parser_objc_class_ivars): Likewise. (cp_parser_objc_struct_declaration): Likewise. (cp_parser_omp_for_loop_init): Likewise. * parser.h (cp_parser): Change the type of local_variables_forbidden_p to unsigned char. (LOCAL_VARS_FORBIDDEN, LOCAL_VARS_AND_THIS_FORBIDDEN, THIS_FORBIDDEN): Define. * g++.dg/cpp0x/this1.C: New test. From-SVN: r267731
2019-01-08Use proper type in linear transformation in tree-switch-conversion (PR ↵Martin Liska4-7/+79
tree-optimization/88753). 2019-01-08 Martin Liska <mliska@suse.cz> PR tree-optimization/88753 * tree-switch-conversion.c (switch_conversion::build_one_array): Come up with local variable constructor. Convert first to type of constructor values. 2019-01-08 Martin Liska <mliska@suse.cz> PR tree-optimization/88753 * gcc.dg/tree-ssa/pr88753.c: New test. From-SVN: r267728
2019-01-08PR libstdc++/88066 use <> for includes not ""Jonathan Wakely4-7/+14
Using #include "..." to include a header in the same directory fails if the user compiles with -I-, so always use something like <bits/...> for internal headers. I haven't added tests for this, because dg-options adds options to the end, and the position of -I- matters (if it's at the end then the tests won't find any headers in the build tree, as they're specified by -I options earlier in the flags). It's been manually tested though. PR libstdc++/88066 * include/bits/locale_conv.h: Use <> for includes not "". * include/ext/random: Likewise. * include/ext/vstring.h: Likewise. From-SVN: r267726
2019-01-08re PR middle-end/86554 (Incorrect code generation with signed/unsigned ↵Richard Biener5-81/+188
comparison) 2019-01-08 Richard Biener <rguenther@suse.de> PR tree-optimization/86554 * tree-ssa-sccvn.c (eliminate_dom_walker, rpo_elim, rpo_avail): Move earlier. (visit_nary_op): When value-numbering to expressions with different overflow behavior make sure there's an available expression on the path. * gcc.dg/torture/pr86554-1.c: New testcase. * gcc.dg/torture/pr86554-2.c: Likewise. From-SVN: r267725
2019-01-08Fix libstdc++.so link on Solaris with C++17 std::basic_string member functionsRainer Orth2-5/+10
* config/abi/pre/gnu.ver (GLIBCXX_3.4): Tighten existing patterns. (GLIBCXX_3.4.21): Likewise. From-SVN: r267723
2019-01-08thread1.C: Tweak expected error #line 13 to cover target variance.Paolo Carlini2-1/+6
2019-01-08 Paolo Carlini <paolo.carlini@oracle.com> * g++.dg/diagnostic/thread1.C: Tweak expected error #line 13 to cover target variance. From-SVN: r267722
2019-01-08re PR fortran/88611 (ICE in eliminate_stmt, at tree-ssa-sccvn.c:5011)Richard Biener4-13/+32
2019-01-08 Richard Biener <rguenther@suse.de> PR fortran/88611 * trans-expr.c (gfc_conv_initializer): For ISOCBINDING_NULL_* directly build the expected GENERIC tree. * gfortran.dg/pr88611.f90: New testcase. From-SVN: r267721
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