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2018-04-16One last tweak before we move onto the new world/branch.devel/range-gen3Aldy Hernandez1-1/+7
From-SVN: r259404
2018-04-13allow kind_type for a constructor with integersAndrew Macleod1-1/+2
From-SVN: r259376
2018-04-13Rewrite size_must_be_zero_p with irange infrastructure.Aldy Hernandez1-3/+19
Rewrite size_must_be_zero_p with irange infrastructure. Previous implementation did not get the bits in [7fff,ffff]. This fixes a handful of regressions. From-SVN: r259370
2018-04-13single_import changes by Andrew to fix my backwards threaders problems.Aldy Hernandez1-2/+4
From-SVN: r259365
2018-04-11make get_operand virtual, move logical and folding into stmtAndrew Macleod6-224/+228
From-SVN: r259332
2018-04-10Reduce range_stmt to a single gimple stmt for efficiencyAndrew Macleod5-313/+280
From-SVN: r259304
2018-04-09Implement intersect_mask to perform an intersection of a range with a bitmask.Andrew Macleod2-0/+42
From-SVN: r259236
2018-04-06Add logical AND folding support, and do empty range check in fold(), ↵Andrew Macleod2-26/+153
otherwise we can never be sure of the required range type of the folded exprression From-SVN: r259173
2018-04-06disable rvrp for these VRP testsAndrew Macleod2-2/+2
From-SVN: r259172
2018-04-06if we dont get a value for path_range_of_stmt, use range of typeAndrew Macleod1-1/+1
From-SVN: r259171
2018-04-04turn off rvrp tooAndrew Macleod1-1/+1
From-SVN: r259084
2018-04-04disable rvrp for this test as wellAndrew Macleod1-1/+1
From-SVN: r259076
2018-04-03Check in initial version of Early Ranger VRPAndrew Macleod12-54/+386
disable with -fno-rvrp From-SVN: r259033
2018-04-02Rewrite range unionAndrew Macleod1-139/+95
From-SVN: r259017
2018-04-01Dont wind back thru divide yetAndrew Macleod1-3/+19
From-SVN: r258999
2018-03-31Dont create range from nonzerobitsAndrew Macleod1-2/+2
From-SVN: r258990
2018-03-23Dont check invalid ssa names, like floatsAndrew Macleod1-0/+2
From-SVN: r258817
2018-03-22Merge remote-tracking branch 'origin/trunk' into range-gen3-mergeAldy Hernandez25263-637822/+985920
This merge has not been tested apart from building c/c++ with --disable-bootstrap. get_nonzero_bits_as_range() needs to be looked at. From-SVN: r258769
2018-03-21PR c++/71638, ICE with NSDMI and reference.Marek Polacek5-8/+47
* constexpr.c (cxx_eval_bare_aggregate): Update constructor's flags even when we replace an element. * g++.dg/cpp0x/nsdmi14.C: New test. * g++.dg/cpp1y/nsdmi-aggr10.C: New test. From-SVN: r258703
2018-03-21vect-strided-shift-1.c: Add dg-skip-if for MIPS with -mpaired-single directives.Chenghua Xu2-0/+6
2018-03-21 Chenghua Xu <paul.hua.gm@gmail.com> * gcc.dg/vect/vect-strided-shift-1.c: Add dg-skip-if for MIPS with -mpaired-single directives. From-SVN: r258702
2018-03-21re PR fortran/85001 (ICE in gfc_build_array_type, at fortran/trans-types.c:1420)Steven G. Kargl4-1/+32
2018-03-20 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85001 * interface.c (symbol_rank): Remove bogus null pointer check that crept in when translating a ternary operator into an if-else constructor. 2018-03-20 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/85001 * gfortran.dg/interface_41.f90: New test. From-SVN: r258698
2018-03-21Daily bump.GCC Administrator1-1/+1
From-SVN: r258697
2018-03-20re PR target/84838 (Minor grammar fixes for x86 options)David H. Gutteridge2-4/+9
PR target/84838 * Minor grammar fixes for x86 options. From-SVN: r258694
2018-03-20re PR libstdc++/84998 (std::hash<std::bitset<N>> fails in Debug Mode)François Dumont10-15/+37
2018-03-20 François Dumont <fdumont@gcc.gnu.org> PR libstdc++/84998 * include/bits/stl_bvector.h: Fix std::hash friend declaration. * include/std/bitset: Likewise. * include/bits/stl_map.h (std::map<>): Fix _Rb_tree_merge_helper friend declaration. * include/bits/stl_multimap.h (std::multimap<>): Likewise. * include/bits/stl_multiset.h (std::multiset<>): Likewise. * include/bits/stl_set.h (std::set<>): Likewise. * include/bits/unordered_map.h (std::unordered_map<>): Fix _Hash_merge_helper friend declaration. (std::unordered_multimap<>): Likewise. * include/bits/unordered_set.h (std::unordered_set<>): Likewise. (std::unordered_multiset<>): Likewise. From-SVN: r258693
2018-03-20re PR debug/84875 (ICE in maybe_record_trace_start, at dwarf2cfi.c:2348 on ↵Jakub Jelinek4-3/+63
s390x) PR debug/84875 * dce.c (delete_unmarked_insns): Don't remove frame related noop moves holding REG_CFA_RESTORE notes, instead turn them into a USE. * gcc.dg/pr84875.c: New test. From-SVN: r258692
2018-03-20re PR c++/84927 (ICE with NSDMI and reference)Marek Polacek4-1/+35
PR c++/84927 * constexpr.c (cxx_eval_bare_aggregate): Update constructor's flags as we evaluate the elements. (cxx_eval_constant_expression): Verify constructor's flags unconditionally. * g++.dg/cpp1y/nsdmi-aggr9.C: New test. From-SVN: r258691
2018-03-20Fix fallout from merge with Aldy's threader branch.Aldy Hernandez2-6/+14
From-SVN: r258690
2018-03-20PR c++/84978, ICE with NRVO.Jason Merrill5-5/+23
* cvt.c (cp_get_fndecl_from_callee): Add fold parameter. (cp_get_callee_fndecl_nofold): New. * cp-gimplify.c (cp_genericize_r): Use it instead. * call.c (check_self_delegation): Likewise. From-SVN: r258689
2018-03-20re PR target/83789 (__builtin_altivec_lvx fails for powerpc for altivec-4.c)Peter Bergner5-259/+158
PR target/83789 * config/rs6000/altivec.md (altivec_lvx_<mode>_2op): Delete define_insn. (altivec_lvx_<mode>_1op): Likewise. (altivec_stvx_<mode>_2op): Likewise. (altivec_stvx_<mode>_1op): Likewise. (altivec_lvx_<VM2:mode>): New define_expand. (altivec_stvx_<VM2:mode>): Likewise. (altivec_lvx_<VM2:mode>_2op_<P:mptrsize>): New define_insn. (altivec_lvx_<VM2:mode>_1op_<P:mptrsize>): Likewise. (altivec_stvx_<VM2:mode>_2op_<P:mptrsize>): Likewise. (altivec_stvx_<VM2:mode>_1op_<P:mptrsize>): Likewise. * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Use new expanders. (rs6000_gen_lvx): Likewise. * config/rs6000/rs6000.c (altivec_expand_lv_builtin): Likewise. (altivec_expand_stv_builtin): Likewise. (altivec_expand_builtin): Likewise. * config/rs6000/vector.md: Likewise. From-SVN: r258688
2018-03-20This PR shows that we get the load/store_lanes logic wrong for arm big-endian.Kyrylo Tkachov3-2/+35
It is tricky to get right. Aarch64 does it by adding the appropriate lane-swapping operations during expansion. I'd like to do the same on arm eventually, but we'd need to port and validate the VTBL-generating code and add it to all the right places and I'm not comfortable enough doing it for GCC 8, but I am keen in getting the wrong-code fixed. As I say in the PR, vectorisation on armeb is already severely restricted (we disable many patterns on BYTES_BIG_ENDIAN) and the load/store_lanes patterns really were not working properly at all, so disabling them is not a radical approach. The way to do that is to return false in ARRAY_MODE_SUPPORTED_P for BYTES_BIG_ENDIAN. Bootstrapped and tested on arm-none-linux-gnueabihf. Also tested on armeb-none-eabi. PR target/82518 * config/arm/arm.c (arm_array_mode_supported_p): Return false for BYTES_BIG_ENDIAN. * lib/target-supports.exp (check_effective_target_vect_load_lanes): Disable for armeb targets. * gcc.target/arm/pr82518.c: New test. From-SVN: r258687
2018-03-20[PR c++/84962] ICE with anon-struct memberNathan Sidwell4-9/+44
https://gcc.gnu.org/ml/gcc-patches/2018-03/msg00961.html PR c++/84962 * name-lookup.c (pushdecl_class_level): Push anon-struct's member_vec, if there is one. PR c++/84962 * g++.dg/lookup/pr84962.C: New. From-SVN: r258686
2018-03-20[PR c++/84970] lookup markingNathan Sidwell6-4/+55
https://gcc.gnu.org/ml/gcc-patches/2018-03/msg00973.html PR c++/84970 * cp-tree.h (lookup_list_keep): Declare. * tree.c (lookup_list_keep): New, broken out of ... (build_min): ... here. Call it. * decl.c (cp_finish_decl): Call lookup_list_keep. PR c++/84970 * g++.dg/lookup/pr84970.C: New. From-SVN: r258685
2018-03-20re PR target/84986 (Performance regression: loop no longer vectorized (x86-64))Richard Biener4-1/+31
2018-03-20 Richard Biener <rguenther@suse.de> PR target/84986 * config/i386/i386.c (ix86_add_stmt_cost): Only cost sign-conversions as zero, fall back to standard scalar_stmt cost for the rest. * gcc.dg/vect/costmodel/x86_64/costmodel-pr84986.c: New testcase. From-SVN: r258684
2018-03-20Handle -fno-guess-branch-probability properly in predict.c (PR ipa/84825).Martin Liska4-0/+32
2018-03-20 Martin Liska <mliska@suse.cz> PR ipa/84825 * predict.c (rebuild_frequencies): Handle case when we have PROFILE_ABSENT, but flag_guess_branch_prob is false. 2018-03-20 Martin Liska <mliska@suse.cz> PR ipa/84825 * g++.dg/ipa/pr84825.C: New test. From-SVN: r258683
2018-03-20Remove ICEing test-case.Martin Liska2-23/+4
2018-03-20 Martin Liska <mliska@suse.cz> * gcc.dg/lto/chkp-ctor-merge_0.c: Remove. From-SVN: r258682
2018-03-20re PR target/84990 (Boostrap broken with --enable-checking=release and Ada)Jakub Jelinek3-7/+12
PR target/84990 * dwarf2asm.c (dw2_output_indirect_constant_1): Temporarily turn off flag_section_anchors. * varasm.c (use_blocks_for_decl_p): Remove hack for dw2_force_const_mem. From-SVN: r258681
2018-03-20PR c++/84937 - ICE with class deduction and auto.Jason Merrill3-3/+32
* pt.c (rewrite_template_parm): Fix auto handling. From-SVN: r258680
2018-03-20force-parallel-4.c: XFAIL one parallelizable loop.Richard Biener2-2/+10
2018-03-20 Richard Biener <rguenther@suse.de> * testsuite/libgomp.graphite/force-parallel-4.c: XFAIL one parallelizable loop. From-SVN: r258679
2018-03-20re PR target/84845 (ICE: in extract_insn, at recog.c:2304: unrecognizable ↵Jakub Jelinek4-6/+38
insn at -O2 and above at aarch64) PR target/84845 * config/aarch64/aarch64.md (*aarch64_reg_<mode>3_neg_mask2): Rename to ... (*aarch64_<optab>_reg_<mode>3_neg_mask2): ... this. If pseudos can't be created, use lowpart_subreg of operands[0] rather than operands[0] itself. (*aarch64_reg_<mode>3_minus_mask): Rename to ... (*aarch64_ashl_reg_<mode>3_minus_mask): ... this. (*aarch64_<optab>_reg_di3_mask2): Use const_int_operand predicate and n constraint instead of aarch64_shift_imm_di and Usd. (*aarch64_reg_<optab>_minus<mode>3): Rename to ... (*aarch64_<optab>_reg_minus<mode>3): ... this. * gcc.c-torture/compile/pr84845.c: New test. From-SVN: r258678
2018-03-20[ARM][PR82989] Fix unexpected use of NEON instructions for shiftsSudakshina Das4-7/+57
This patch fixes PR82989 so that we avoid NEON instructions when -mneon-for-64bits is not enabled. This is more of a short term fix for the real deeper problem of making an early decision of choosing or rejecting NEON instructions. There is now a new ticket PR84467 to deal with the longer term solution. (Please refer to the discussion in the bug report for more details). Sudi *** gcc/ChangeLog *** 2018-03-20 Sudakshina Das <sudi.das@arm.com> PR target/82989 * config/arm/neon.md (ashldi3_neon): Update ?s for constraints to favor GPR over NEON registers. (<shift>di3_neon): Likewise. *** gcc/testsuite/ChangeLog *** 2018-03-20 Sudakshina Das <sudi.das@arm.com> PR target/82989 * gcc.target/arm/pr82989.c: New test. From-SVN: r258677
2018-03-20[nvptx] Fix bar.sync positionTom de Vries2-3/+12
2018-03-20 Tom de Vries <tom@codesourcery.com> PR target/84952 * config/nvptx/nvptx.c (nvptx_single): Don't neuter bar.sync. (nvptx_process_pars): Emit bar.sync asap and alap. From-SVN: r258676
2018-03-20* c-ada-spec.c (pp_ada_tree_identifier): Deal specifically with _Bool.Eric Botcazou2-1/+5
From-SVN: r258675
2018-03-20[nvptx] Fix prevent_branch_around_nothingTom de Vries2-4/+11
2018-03-20 Tom de Vries <tom@codesourcery.com> PR target/84954 * config/nvptx/nvptx.c (prevent_branch_around_nothing): Also update seen_label if seen_label is already set. From-SVN: r258674
2018-03-20re PR target/84945 (UBSAN: gcc/config/i386/i386.c:33312:22: runtime error: ↵Jakub Jelinek7-41/+108
shift exponent 32 is too large for 32-bit type 'int') PR target/84945 * config/i386/i386.c (fold_builtin_cpu): For features above 31 use __cpu_features2 variable instead of __cpu_model.__cpu_features[0]. Use 1U instead of 1. Formatting fixes. * gcc.target/i386/pr84945.c: New test. * config/i386/cpuinfo.h (__cpu_features2): Declare. * config/i386/cpuinfo.c (__cpu_features2): New variable for ifndef SHARED only. (set_feature): Define. (get_available_features): Use set_feature macro. Set __cpu_features2 to the second word of features ifndef SHARED. From-SVN: r258673
2018-03-20PR target/81647: Fix testcase.Christophe Lyon2-0/+6
2018-03-20 Christophe Lyon <christophe.lyon@linaro.org> PR target/81647 * gcc.target/aarch64/pr81647.c: Require fenv_exceptions. From-SVN: r258672
2018-03-20re PR c/84953 (misleading warning from strpbrk(x,""))Jakub Jelinek4-1/+23
PR c/84953 * builtins.c (fold_builtin_strpbrk): For strpbrk(x, "") use type instead of TREE_TYPE (s1) for the return value. * gcc.dg/pr84953.c: New test. From-SVN: r258671
2018-03-20Daily bump.GCC Administrator1-1/+1
From-SVN: r258670
2018-03-19re PR tree-optimization/84946 (UBSAN: in mem_valid_for_store_merging ↵Jakub Jelinek2-1/+6
../../gcc/gimple-ssa-store-merging.c:3951) PR tree-optimization/84946 * gimple-ssa-store-merging.c (mem_valid_for_store_merging): Compute bitsize + bitsize in poly_uint64 rather than poly_int64. From-SVN: r258665
2018-03-19re PR sanitizer/78651 (Incorrect exception handling when catch clause uses ↵Jakub Jelinek2-1/+7
local class and PIC and sanitizer are active) PR sanitizer/78651 * dwarf2asm.c: Include fold-const.c. (dw2_output_indirect_constant_1): Set DECL_INITIAL (decl) to ADDR_EXPR of decl rather than decl itself. From-SVN: r258664
2018-03-19re PR sanitizer/84761 (AddressSanitizer is not compatible with glibc 2.27 on ↵Jakub Jelinek2-14/+40
x86) PR sanitizer/84761 * sanitizer_common/sanitizer_linux_libcdep.cc (__GLIBC_PREREQ): Define if not defined. (DL_INTERNAL_FUNCTION): Don't define. (InitTlsSize): For __i386__ if not compiled against glibc 2.27+ determine at runtime whether to use regparm(3), stdcall calling convention for older glibcs or normal calling convention for newer glibcs for call to _dl_get_tls_static_info. From-SVN: r258663