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This reverts commit 5f6a6c91d7c592cb49f7c519f289777eac09bb74.
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gcc/
* gcov-io.cc (gcov_read_string): Reword documentation comment.
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The recent change to reject __is_constructible for nested classes with DMI
is, unsurprisingly, breaking some code. Let's allow simple cases by
immediately parsing DMI that do no name lookup; then being in complete class
scope makes no difference.
PR c++/96645
gcc/cp/ChangeLog:
* parser.cc (cp_parser_early_parsing_nsdmi): New.
(cp_parser_member_declaration): Call it.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/nsdmi10.C: Now OK.
* g++.dg/ext/is_constructible3.C: Likewise.
* g++.dg/ext/is_constructible7.C: Likewise.
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gcc/fortran/ChangeLog:
PR fortran/100892
* check.cc (gfc_check_associated): Avoid NULL pointer dereference.
gcc/testsuite/ChangeLog:
PR fortran/100892
* gfortran.dg/associated_target_8.f90: New test.
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* hr.po: Update.
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As the subject states. Fixing this is accomplished by moving the built-ins
to the correct stanzas, [altivec] and [vsx].
2022-01-27 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtins.def (NEG_V16QI): Move to [altivec]
stanza.
(NEG_V4SF): Likewise.
(NEG_V4SI): Likewise.
(NEG_V8HI): Likewise.
(NEG_V2DF): Move to [vsx] stanza.
(NEG_V2DI): Likewise.
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splitting
When trying to split hard reg live range to assign hard reg to a reload
pseudo, LRA searches for reload insns of the reload pseudo
assuming a specific order of the reload insns. This order is violated if
reload involved in inheritance transformation. In such case, the loop used
for reload insn searching can become infinite. The patch fixes this.
gcc/ChangeLog:
PR middle-end/105032
* lra-assigns.cc (find_reload_regno_insns): Modify loop condition.
gcc/testsuite/ChangeLog:
PR middle-end/105032
* gcc.target/i386/pr105032.c: New.
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This reverts commit 6a777ceb0e975f0efc823d2d82e676346f068151.
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This patch fixes a crash in conversion_warning on a null expression.
It is null because the testcase uses the GNU A ?: B extension. We
could also use op0 instead of op1 in this case, but it doesn't seem
to be necessary.
PR c++/101030
gcc/c-family/ChangeLog:
* c-warn.cc (conversion_warning) <case COND_EXPR>: Don't call
conversion_warning when OP1 is null.
gcc/testsuite/ChangeLog:
* g++.dg/ext/cond5.C: New test.
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Here we're crashing when diagnosing an unsatisfied __is_constructible
constraint because diagnose_trait_expr doesn't recognize this trait
(along with a bunch of other traits). Fix this by adding handling for
all remaining traits and removing the default case so that when adding a
new trait we'll get a warning that diagnose_trait_expr needs to handle it.
PR c++/100474
gcc/cp/ChangeLog:
* constraint.cc (diagnose_trait_expr): Handle all remaining
traits appropriately. Remove default case.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-traits3.C: New test.
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The testcase has UB at runtime, placement new shouldn't construct
an object with certain alignment requirements into an unaligned buffer.
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/80334
PR target/102772
* g++.dg/torture/pr80334.C: Change from dg-do run to dg-do compile.
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The attached 93280 test no longer ICEs but looks like it was never added to the
testsuite. The 104583 test, modified so that it closely resembles 93280, still
ICEs.
The problem is that in 104583 we have a value-init from {} (the line A a{};),
so this code in convert_like_internal
7960 /* If we're initializing from {}, it's value-initialization. */
7961 if (BRACE_ENCLOSED_INITIALIZER_P (expr)
7962 && CONSTRUCTOR_NELTS (expr) == 0
7963 && TYPE_HAS_DEFAULT_CONSTRUCTOR (totype)
7964 && !processing_template_decl)
7965 {
7966 bool direct = CONSTRUCTOR_IS_DIRECT_INIT (expr);
...
7974 TARGET_EXPR_DIRECT_INIT_P (expr) = direct;
sets TARGET_EXPR_DIRECT_INIT_P. This does not happen in 93280 where we
initialize from {0}.
In 104583, when gimplifying, the d = {}; line, we have
d = {.a=TARGET_EXPR <D.2474, <<< Unknown tree: aggr_init_expr
4
__ct_comp
D.2474
(struct A *) <<< Unknown tree: void_cst >>> >>>>}
where the TARGET_EXPR is the one with TARGET_EXPR_DIRECT_INIT_P set. In
gimplify_init_ctor_preeval we do
4724 FOR_EACH_VEC_SAFE_ELT (v, ix, ce)
4725 gimplify_init_ctor_preeval (&ce->value, pre_p, post_p, data);
so we gimplify the TARGET_EXPR, crashing at
744 case TARGET_EXPR:
745 /* A TARGET_EXPR that expresses direct-initialization should have
been
746 elided by cp_gimplify_init_expr. */
747 gcc_checking_assert (!TARGET_EXPR_DIRECT_INIT_P (*expr_p));
but there is no INIT_EXPR so cp_gimplify_init_expr was never called!
Now, the fix for c++/93280
<https://gcc.gnu.org/pipermail/gcc-patches/2020-January/538414.html>
says "let's only set TARGET_EXPR_DIRECT_INIT_P when we're using the DMI in
a constructor." and the comment talks about the full initialization. Is
is accurate to say that our TARGET_EXPR does not represent the full
initialization, because it only initializes the 'a' subobject? If so,
then maybe get_nsdmi should clear TARGET_EXPR_DIRECT_INIT_P when in_ctor
is false.
I've compared the 93280.s and 104583.s files, they differ only in one
movl $0, so there are no extra calls and similar.
PR c++/93280
PR c++/104583
gcc/cp/ChangeLog:
* init.cc (get_nsdmi): Set TARGET_EXPR_DIRECT_INIT_P to in_ctor.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/nsdmi-list7.C: New test.
* g++.dg/cpp0x/nsdmi-list8.C: New test.
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Document predefined macros:
- __PTX_SM__ ,
- __PTX_ISA_VERSION_MAJOR__ and
- __PTX_ISA_VERSION_MINOR__ .
gcc/ChangeLog:
2022-03-29 Tom de Vries <tdevries@suse.de>
* doc/invoke.texi (march): Document __PTX_SM__.
(mptx): Document __PTX_ISA_VERSION_MAJOR__ and
__PTX_ISA_VERSION_MINOR__.
Co-Authored-By: Tobias Burnus <tobias@codesourcery.com>
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The following testcase ICEs, because for a volatile X & RESULT_DECL
ubsan wants to take address of that reference. instrument_object_size
is called with x, so the base is equal to the access and the var
is automatic, so there is no risk of an out of bounds access for it.
Normally we wouldn't instrument those because we fold address of the
t - address of inner to 0, add constant size of the decl and it is
equal to what __builtin_object_size computes. But the volatile
results in the subtraction not being folded.
The first hunk fixes it by punting if we access the whole automatic
decl, so that even volatile won't cause a problem.
The second hunk (not strictly needed for this testcase) is similar
to what has been added to asan.cc recently, if we actually take
address of a decl and keep it in the IL, we better mark it addressable.
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/105093
* ubsan.cc (instrument_object_size): If t is equal to inner and
is a decl other than global var, punt. When emitting call to
UBSAN_OBJECT_SIZE ifn, make sure base is addressable.
* g++.dg/ubsan/pr105093.C: New test.
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On the following testcase on 64-bit targets, store-merging sees
a MEM_REF store from {} ctor with "negative" bitsize where bitoff + bitsize
wraps around to very small end offset. This later confuses the code
so that it allocates just a few bytes of memory but fills in huge amounts of
it. Later on there is a param_store_merging_max_size size check but due to
the wrap-around we pass that.
The following patch punts on such large bitsizes.
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/105094
* gimple-ssa-store-merging.cc (mem_valid_for_store_merging): Punt if
bitsize <= 0 rather than just == 0.
* gcc.dg/pr105094.c: New test.
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cp_parser_omp_iterators does:
DECL_ARTIFICIAL (iter_var) = 1;
DECL_CONTEXT (iter_var) = current_function_decl;
pushdecl (iter_var);
on the newly created iterator vars, but when we instantiate templates
containing them, we just tsubst_decl them (which apparently for
automatic vars clears DECL_CONTEXT with a comment that pushdecl should
be called on them later).
The result is that we have automatic vars in the IL which have NULL
DECL_CONTEXT and the analyzer is upset about those.
Fixed by setting DECL_CONTEXT and calling pushdecl during the instantiation.
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR c++/105092
* pt.cc (tsubst_omp_clause_decl): When handling iterators, set
DECL_CONTEXT of the iterator var to current_function_decl and
call pushdecl.
* g++.dg/gomp/pr105092.C: New test.
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Update nvptx documentation:
- Use meaningful terms: "PTX ISA target architecture" and "PTX ISA version".
- Remove invalid claim that "ISA strings must be lower-case".
- Add missing sm_xx entries.
- Fix misa default.
- Add march, copying misa doc.
- Declare misa an march alias.
- Add march-map.
- Fix "for given the specified" typo.
gcc/ChangeLog:
2022-03-29 Tom de Vries <tdevries@suse.de>
* doc/invoke.texi (misa, mptx): Update.
(march, march-map): Add.
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colon_corrects_to_scope_p [PR105061]
The concepts support (in particular template introductions from concepts TS)
broke the following testcase, valid unnamed bitfields with dependent
types (or even just typedefs) were diagnosed as typos (: instead of correct
::) in template introduction during their tentative parsing.
The following patch fixes that by not doing this : to :: correction when
member_p is true.
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR c++/105061
* parser.cc (cp_parser_template_introduction): If member_p, temporarily
clear parser->colon_corrects_to_scope_p around tentative parsing of
nested name specifier.
* g++.dg/concepts/pr105061.C: New test.
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No changes in generated files.
gcc/
* opt-functions.awk (n_args): New function.
(lang_enabled_by): Merge function into...
* optc-gen.awk <END>: ... sole user here.
Improve diagnostics.
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'LangEnabledBy' option properties
A one-argument form of the 'LangEnabledBy' option property isn't defined,
and effectively appears to be a no-op. Removing these only changes
'build-gcc/gcc/optionlist' accordingly, but no other generated files.
Clean-up for commit ee336ecb2a7161bc28f6c5343d97870a8d15e177
"c++: Add new warning options for C++ language mismatches".
gcc/c-family/
* c.opt (Wc++11-extensions, Wc++14-extensions, Wc++17-extensions)
(Wc++20-extensions, Wc++23-extensions): Remove 'LangEnabledBy'
option properties.
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A one-argument form of the 'LangEnabledBy' option property isn't defined,
and effectively appears to be a no-op. Removing that one, the
'gcc/c-family/c.opt:Wuse-after-free' option definition record becomes
empty, and doesn't add anything over 'gcc/common.opt:Wuse-after-free', and
may thus be removed entirely. This only changes 'build-gcc/gcc/optionlist'
accordingly, but no other generated files.
Clean-up after recent commit 671a283636de75f7ed638ee6b01ed2d44361b8b6
"Add -Wuse-after-free [PR80532]".
gcc/c-family/
* c.opt (Wuse-after-free): Remove.
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A one-argument form of the 'LangEnabledBy' option property isn't defined,
and effectively appears to be a no-op. Removing that one, the
'gcc/c-family/c.opt:Warray-bounds' option definition record becomes empty,
and doesn't add anything over 'gcc/common.opt:Warray-bounds', and may thus
be removed entirely. This only changes 'build-gcc/gcc/optionlist'
accordingly, but no other generated files.
Clean-up after r262912/commit 0d7f90652080c42cddca6f9b68f6895218c70880
"PR middle-end/82063 - issues with arguments enabled by -Wall".
gcc/c-family/
* c.opt (Warray-bounds): Remove.
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Add vxworks to the set of operating systems whose C libraries don't
support strndup.
for gcc/testsuite/ChangeLog
* gcc.dg/analyzer/strndup-1.c: Add *-*-vxworks* to no-strndup
in libc.
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Some ARM configurations, such as with -mlong-calls, load the call
target from the constant pool, breaking the expectation of the test as
on several other targets.
for gcc/testsuite/ChangeLog
* gcc.dg/weak/typeof-2.c: Add arm*-*-* to targets that may
place the call target in a constant pool.
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In r12-7809-g5f6197d7c197f9 I added -fdump-analyzer-untracked as support
for DejaGnu testing of an optimization of -fanalyzer,
PR analyzer/104954.
PR testsuite/105085 notes testsuite failures of the form:
FAIL: gcc.dg/analyzer/untracked-1.c (test for excess errors)
Excess errors:
cc1: warning: track '*.LC1': yes
where these warnings are emitted on some targets where the test
causes labelled constants to be created in the constant pool.
We probably ought not to be tracking the values of such decls in the
store, given that they're meant to be constant, and I attempted various
fixes to make the "should we track this decl" logic smarter, but given
that we're in stage 4, the simplest fix seems to be for
-fdump-analyzer-untracked to skip such decls in its output, to minimize
test output differences between targets.
gcc/analyzer/ChangeLog:
PR testsuite/105085
* region-model-manager.cc (dump_untracked_region): Skip decls in
the constant pool.
gcc/testsuite/ChangeLog:
PR testsuite/105085
* gcc.dg/analyzer/untracked-1.c: Add further test coverage.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
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gcc/fortran/ChangeLog:
PR fortran/104571
* resolve.cc (resolve_elemental_actual): Avoid NULL pointer
dereference.
gcc/testsuite/ChangeLog:
PR fortran/104571
* gfortran.dg/pr104571.f90: New test.
Co-authored-by: Steven G. Kargl <kargl@gcc.gnu.org>
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This allows the gpp_std_list variable to be set in ~/.dejagnurc instead
of using the GXX_TESTSUITE_STDS environment variable. This is
consistent with how other defaults such as tool_timeout can be set.
The environment variable can still be used to override the default.
gcc/testsuite/ChangeLog:
* lib/g++-dg.exp: Update comments.
* lib/g++.exp (gpp_std_list): Check for an existing value before
setting it to an empty list.
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These tests depend on unexpected handlers, which are no longer declared
for C++23 mode. Adjust the target specifier so they don't run.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/noexcept06.C: Disable for C++23.
libstdc++-v3/ChangeLog:
* testsuite/18_support/exception/38732.cc: Disable for C++23.
* testsuite/18_support/headers/exception/synopsis.cc: Likewise.
* testsuite/18_support/unexpected_handler.cc: Likewise.
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* hr.po: Update.
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gcc/fortran/ChangeLog:
PR fortran/50549
* resolve.cc (resolve_structure_cons): Reject pointer assignments
of character with different lengths in structure constructor.
gcc/testsuite/ChangeLog:
PR fortran/50549
* gfortran.dg/char_pointer_assign_7.f90: New test.
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This patch fixes a wrong -Wimplicit-fallthrough warning for
case 0:
if (1) // wrong may fallthrough
return 0;
case 1:
which in .gimple looks like
<D.1981>: // case 0
if (1 != 0) goto <D.1985>; else goto <D.1986>;
<D.1985>:
D.1987 = 0;
// predicted unlikely by early return (on trees) predictor.
return D.1987;
<D.1986>: // dead
<D.1982>: // case 1
and the warning thinks that <D.1986>: falls through to <D.1982>:. It
does not know that <D.1986> is effectively a dead label, only reachable
through fallthrough from previous instructions, never jumped to. To
that effect, Jakub introduced UNUSED_LABEL_P, which is set on such dead
labels.
collect_fallthrough_labels has code to deal with cases like
case 2:
if (e != 10)
i++; // this may fallthru, warn
else
return 44;
case 3:
which collects labels that may fall through. Here it sees the "goto <D.1990>;"
at the end of the then branch and so when the warning reaches
...
<D.1990>: // from if-then
<D.1984>: // case 3
it knows it should warn about the possible fallthrough. But an UNUSED_LABEL_P
is not a label that can fallthrough like that, so it should ignore those.
However, we still want to warn about this:
case 0:
if (1)
n++; // falls through
case 1:
so collect_fallthrough_labels needs to return the "n = n + 1;" statement, rather
than the dead label.
Co-authored-by: Jakub Jelinek <jakub@redhat.com>
PR middle-end/103597
gcc/ChangeLog:
* gimplify.cc (collect_fallthrough_labels): Don't push UNUSED_LABEL_Ps
into labels. Maybe set prev to the statement preceding UNUSED_LABEL_P.
(gimplify_cond_expr): Set UNUSED_LABEL_P.
* tree.h (UNUSED_LABEL_P): New.
gcc/testsuite/ChangeLog:
* c-c++-common/Wimplicit-fallthrough-39.c: New test.
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We no longer emit a bogus warning for the below testcase after
r11-3266-g4839de55e2c986.
PR c++/71637
gcc/testsuite/ChangeLog:
* c-c++-common/Wmisleading-indentation-6.c: New test.
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I noticed that the vsx_extract_<mode> pattern for V2DImode and V2DFmode
only allowed traditional floating point registers, and it did not allow
Altivec registers. The original code was written a few years ago when we
used the old register allocator, and support for scalar floating point in
Altivec registers was just being added to GCC.
I have built the spec 2017 benchmark suite With all 4 patches in this
series applied, and compared it to the build with the previous 3 patches
applied. In addition to the changes from the previous 3 patches, this
patch now changes the code for the following 3 benchmarks (2 floating
point, 1 integer):
bwaves_r, fotonik3d_r, xalancbmk_r
I have built bootstrap versions on the following systems. There were no
regressions in the runs:
Power9 little endian, --with-cpu=power9
Power10 little endian, --with-cpu=power10
Power8 big endian, --with-cpu=power8 (both 32-bit & 64-bit tests)
2022-03-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/vsx.md (vsx_extract_<mode>): Allow destination to
be any VSX register.
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On aarch64 the AAPCS64 states that an HFA is determined by the 'shape' of
the object after layout has been completed, so anything that adds no
members and does not cause the layout to be modified should be ignored
for the purposes of determining which registers are used for parameter
passing.
A zero-sized bit-field falls into this category. This was not handled
correctly for C structs and in G++-11 only handled correctly because
such fields were eliminated early by the front end.
gcc/ChangeLog:
PR target/102024
* config/aarch64/aarch64.cc (aapcs_vfp_sub_candidate): Handle
zero-sized bit-fields. Detect cases where a warning may be needed.
(aarch64_vfp_is_call_or_return_candidate): Emit a note if a
zero-sized bit-field has caused parameter passing to change.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/aapcs64/test_28.c: New test.
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On arm the AAPCS states that an HFA is determined by the 'shape' of
the object after layout has been completed, so anything that adds no
members and does not cause the layout to be modified should be ignored
for the purposes of determining which registers are used for parameter
passing.
A zero-sized bit-field falls into this category. This was not handled
correctly for C structs and in G++-11 only handled correctly because
such fields were eliminated early by the front end.
gcc/ChangeLog:
PR target/102024
* config/arm/arm.cc (aapcs_vfp_sub_candidate): Handle zero-sized
bit-fields. Detect cases where a warning may be needed.
(aapcs_vfp_is_call_or_return_candidate): Emit a note if
a zero-sized bit-field has caused parameter passing to change.
gcc/testsuite/ChangeLog:
PR target/102024
* gcc.target/arm/aapcs/vfp26.c: New test.
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The arm port has an optimization used during selection of the
function's ABI to permit deviation from the strict ABI when the
function does not escape the current translation unit.
Unfortunately, the ABI selection it makes can be unsafe if it changes
how a result is returned because not enough information is available
via the RETURN_IN_MEMORY hook to determine where the function gets
used. This can result in some parts of the compiler thinking a value
is returned in memory while others think it is returned in registers.
To mitigate this, this patch temporarily disables the optimization and
falls back to using the default ABI for the translation.
gcc/ChangeLog:
PR target/96882
* config/arm/arm.cc (arm_get_pcs_model): Disable selection of
ARM_PCS_AAPCS_LOCAL.
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Add preprocessor macros __PTX_ISA_VERSION_MAJOR__ and
__PTX_ISA_VERSION_MINOR__.
For the default 6.0, we have:
...
$ echo | cc1 -E -dD - 2>&1 | grep PTX_ISA_VERSION
#define __PTX_ISA_VERSION_MAJOR__ 6
#define __PTX_ISA_VERSION_MINOR__ 0
...
and for 3.1, we have:
...
$ echo | cc1 -mptx=3.1 -E -dD - 2>&1 | grep PTX_ISA_VERSION
#define __PTX_ISA_VERSION_MAJOR__ 3
#define __PTX_ISA_VERSION_MINOR__ 1
...
These can be used to express things like:
...
#if __PTX_ISA_VERSION_MAJOR__ >= 4 && __PTX_ISA_VERSION_MAJOR__ >= 1
/* Code using %dynamic_smem_size. */
#else
/* Fallback code. */
#endif
...
Tested on nvptx.
gcc/ChangeLog:
2022-03-29 Tom de Vries <tdevries@suse.de>
PR target/104857
* config/nvptx/nvptx-c.cc (nvptx_cpu_cpp_builtins): Emit
__PTX_ISA_VERSION_MAJOR__ and __PTX_ISA_VERSION_MINOR__.
* config/nvptx/nvptx.cc (ptx_version_to_number): New function.
* config/nvptx/nvptx-protos.h (ptx_version_to_number): Declare.
gcc/testsuite/ChangeLog:
2022-03-29 Tom de Vries <tdevries@suse.de>
PR target/104857
* gcc.target/nvptx/ptx31.c: New test.
* gcc.target/nvptx/ptx60.c: New test.
* gcc.target/nvptx/ptx63.c: New test.
* gcc.target/nvptx/ptx70.c: New test.
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In the docs we have for m64:
...
Ignored, but preserved for backward compatibility. Only 64-bit ABI is
supported.
...
But with --target-help, we have instead:
...
$ gcc --target-help
...
-m64 Generate code for a 64-bit ABI.
...
which could be interpreted as meaning that generating code for a 32-bit ABI is
still possible.
Fix this by instead emitting the same text as in the docs:
...
-m64 Ignored, but preserved for backward compatibility. Only 64-bit
ABI is supported.
...
Tested on nvptx.
gcc/ChangeLog:
2022-03-29 Tom de Vries <tdevries@suse.de>
* config/nvptx/nvptx.opt (m64): Update help text to reflect that it
is ignored.
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Say we have an sm_50 board, and we want to run a benchmark using the highest
possible march setting.
Currently there's march=sm_30, march=sm_35, march=sm_53, but no march=sm_50.
So, we'd need to pick march=sm_35.
Likewise, for a test script that handles multiple boards, we'd need a mapping
from native board sm_xx to march, which might have to be updated with newer
gcc releases.
Add an option march-map, such that we can just specify march-map=sm_50, and
let the compiler map this to the appropriate march.
The option is implemented as a list of aliases, such that we have a somewhat
lengthy (17 lines in total):
...
$ gcc --help=target
...
-march-map=sm_30 Same as -misa=sm_30.
-march-map=sm_32 Same as -misa=sm_30.
...
-march-map=sm_87 Same as -misa=sm_80.
-march-map=sm_90 Same as -misa=sm_80.
...
This implementation was chosen in the hope that it'll be easier if
we end up with some misa multilib.
It would be nice to have the mapping list generated from an updated
nvptx-sm.def, but for now it's spelled out in nvptx.opt.
Tested on nvptx.
gcc/ChangeLog:
2022-03-29 Tom de Vries <tdevries@suse.de>
PR target/104714
* config/nvptx/nvptx.opt (march-map=*): Add aliases.
gcc/testsuite/ChangeLog:
2022-03-29 Tom de Vries <tdevries@suse.de>
PR target/104714
* gcc.target/nvptx/march-map.c: New test.
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gcc/ChangeLog:
2022-03-28 Jan Hubicka <hubicka@ucw.cz>
* config/i386/i386-builtins.cc (ix86_vectorize_builtin_gather): Test
TARGET_USE_GATHER_2PARTS and TARGET_USE_GATHER_4PARTS.
* config/i386/i386.h (TARGET_USE_GATHER_2PARTS): New macro.
(TARGET_USE_GATHER_4PARTS): New macro.
* config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): New tune
(X86_TUNE_USE_GATHER_4PARTS): New tune
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The target option misa has the following description:
...
$ gcc --target-help 2>&1 | grep misa
-misa= Specify the PTX ISA target architecture to use.
...
The name misa is somewhat poorly chosen. It suggests that for a use
-misa=sm_30, sm_30 is the name of a specific Instruction Set Architecture.
Instead, sm_30 is the name of a specific target architecture in the generic
PTX Instruction Set Architecture.
Futhermore, there's mptx, which also has ISA in the description:
...
-mptx= Specify the PTX ISA version to use.
...
Add the more intuitive alias march for misa:
...
$ gcc --target-help 2>&1 | grep march
-march= Alias: Same as -misa=.
...
Tested on nvptx.
gcc/ChangeLog:
2022-03-29 Tom de Vries <tdevries@suse.de>
* config/nvptx/nvptx.opt (march): Add alias of misa.
gcc/testsuite/ChangeLog:
2022-03-29 Tom de Vries <tdevries@suse.de>
* gcc.target/nvptx/main.c: New test.
* gcc.target/nvptx/march.c: New test.
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2022-03-29 Chenghua Xu <xuchenghua@loongson.cn>
ChangeLog:
* MAINTAINERS: (CPU Port Maintainers): Add myself and
Lulu as LoongArch port maintainer.
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2022-03-29 Chenghua Xu <xuchenghua@loongson.cn>
Lulu Cheng <chenglulu@loongson.cn>
gcc/ChangeLog:
* doc/install.texi: Add LoongArch options section.
* doc/invoke.texi: Add LoongArch options section.
* doc/md.texi: Add LoongArch options section.
contrib/ChangeLog:
* config-list.mk: Add LoongArch triplet.
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2022-03-29 Chenghua Xu <xuchenghua@loongson.cn>
Lulu Cheng <chenglulu@loongson.cn>
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/constexpr-rom.C: Add build options for LoongArch.
* g++.old-deja/g++.abi/ptrmem.C: Add LoongArch support.
* g++.old-deja/g++.pt/ptrmem6.C: xfail for LoongArch.
* gcc.dg/20020312-2.c: Add LoongArch support.
* c-c++-common/zero-scratch-regs-10.c: Like wise
* c-c++-common/zero-scratch-regs-11.c: Like wise
* c-c++-common/zero-scratch-regs-8.c: Like wise
* c-c++-common/zero-scratch-regs-9.c: Like wise
* gcc.dg/loop-8.c: Skip on LoongArch.
* gcc.dg/torture/stackalign/builtin-apply-2.c: Likewise.
* gcc.dg/tree-ssa/ssa-fre-3.c: Likewise.
* go.test/go-test.exp: Define the LoongArch target.
* lib/target-supports.exp: Like wise.
* gcc.target/loongarch/loongarch.exp: New file.
* gcc.target/loongarch/tst-asm-const.c: Like wise.
* gcc.target/loongarch/larch-builtin.c: Like wise.
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2022-03-29 Chenghua Xu <xuchenghua@loongson.cn>
Lulu Cheng <chenglulu@loongson.cn>
libgomp/ChangeLog:
* configure.tgt: Add LoongArch triplet.
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2022-03-29 Chenghua Xu <xuchenghua@loongson.cn>
Lulu Cheng <chenglulu@loongson.cn>
libgcc/ChangeLog:
* configure: Regenerate file.
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2022-03-29 Chenghua Xu <xuchenghua@loongson.cn>
Lulu Cheng <chenglulu@loongson.cn>
libgcc/ChangeLog:
* config/loongarch/crtfastmath.c: New file.
* config/loongarch/linux-unwind.h: Like wise.
* config/loongarch/sfp-machine.h: Like wise.
* config/loongarch/t-crtstuff: Like wise.
* config/loongarch/t-loongarch: Like wise.
* config/loongarch/t-loongarch64: Like wise.
* config/loongarch/t-softfp-tf: Like wise.
* config.host: Add LoongArch tuples.
* configure.ac: Add LoongArch support.
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2022-03-29 Chenghua Xu <xuchenghua@loongson.cn>
Lulu Cheng <chenglulu@loongson.cn>
gcc/ChangeLog:
* config/loongarch/loongarch-c.cc
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