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2022-04-04aarch64: Fix aarch64-tune.md (re)generation [PR105144]Jakub Jelinek2-1/+3
As I wrote in the PR, our Fedora trunk gcc builds likely after r12-7842 change are now failing (lto1 crashes). What happens is that when one bootstraps into an empty build directory (or set of them), mddeps.mk doesn't exist yet and so Makefile doesn't include it. When building from an empty dir, that is usually not a big issue, it is enough when various build directory files depend on just $(srcdir)/config/aarch64/aarch64.md, those files don't exist and aarch64.md does, so they are built, so is mddeps.mk. But because the other dependencies aren't there (in particular $(srcdir)/config/aarch64/aarch64-tune.md ), the s-aarch64-tune-md rule isn't invoked to regenerate that file and the r12-7842 commit reordered aarch64-cores.def entries but didn't commit regenerated aarch64-tune.md. Because it is just reordering in aarch64-tune.md, it actually doesn't matter and bootstraps succeeds. But then during make install, mddeps.mk exists already in gcc/ directory, it sees that aarch64-cores.def is newer than aarch64-tune.md (unless gen_update is used, that just touches aarch64-tune.md to make sure it is newer) and regenerates it and as it is different, make install rebuilds a large subset of the *.o files, but this time with the system g++ rather than previous stage one. And during lto linking of it there are differences in LTO bytecode between the compilers and we crash. The following patch fixes that by regenerating aarch64-tune.md (what was forgotten in r12-7842) and by adding a dependency from s-mddeps to s-aarch64-tune-md, which makes sure that even when mddeps.mk doesn't exist yet make sees the dependency and regenerates aarch64-tune.md if needed. 2022-04-04 Jakub Jelinek <jakub@redhat.com> PR target/105144 * config/aarch64/t-aarch64 (s-mddeps): Depend on s-aarch64-tune-md. * config/aarch64/aarch64-tune.md: Regenerated.
2022-04-04tree-optimization/105132 - add missing checking in vectorizable_operationRichard Biener2-0/+18
The following adds missing verification that the input vectors have the same number of elements for vectorizable_operation. 2022-04-04 Richard Biener <rguenther@suse.de> PR tree-optimization/105132 * tree-vect-stmts.cc (vectorizable_operation): Check that the input vectors have the same number of elements. * gcc.dg/torture/pr105132.c: New testcase.
2022-04-04middle-end/105140 - fix bogus recursion in fold_convertible_pRichard Biener2-2/+20
fold_convertible_p expects an operand and a type to convert to but recurses with two vector component types. Fixed by allowing types instead of an operand as well. 2022-04-04 Richard Biener <rguenther@suse.de> PR middle-end/105140 * fold-const.cc (fold_convertible_p): Allow a TYPE_P arg. * gcc.dg/pr105140.c: New testcase.
2022-04-04d: Compile simd_ctfe.d only on avx_runtime or vect_sizes_16B_8B targetsIain Buclaw1-1/+2
PR d/104740 gcc/testsuite/ChangeLog: * gdc.dg/simd_ctfe.d: Compile with target avx_runtime or vect_sizes_16B_8B.
2022-04-04Add ChangeLog entries for 86d8e0c0652ef5236a460b75c25e4f7093cc0651.Martin Liska2-0/+41
gcc/cp/ChangeLog: * ChangeLog: Add entry for 86d8e0c0652ef5236a460b75c25e4f7093cc0651. gcc/testsuite/ChangeLog: * ChangeLog: Add entry for 86d8e0c0652ef5236a460b75c25e4f7093cc0651.
2022-04-04Daily bump.GCC Administrator12-1/+252
2022-04-04gcc-changelog: ignore one more revisionMartin Liska1-1/+2
Ignore: Checking 86d8e0c0652ef5236a460b75c25e4f7093cc0651: FAILED ERR: line should start with a tab: "This reverts commits r12-7804 and r12-7929." ERR: could not deduce ChangeLog file contrib/ChangeLog: * gcc-changelog/git_update_version.py: Ignore the revision.
2022-04-03[committed][PR target/104987] Avoid "likely" forms of bbi[n] on iq2000.Jeff Law1-7/+22
The iq2000 port is mis-compiling its mulsi3 libgcc2 function. AFAICT, the iq2000 has delay slots and can use "branch-likely" forms of conditional branches to annul-false the slot. There's a support routine that handles creation of the likely form. However, that routine is not used by the bbi[n] instructions. If I manually add the likely extension to the bbi[b] instructions, the assembler complains After a fair amount of digging it appears that the likely forms of bbi[n] are only supported on the IQ10 variant. Given this is a dead processor and has been so for a while it seems reasonable to just disallow annul-false slots for the bbi[n] instructions rather than try to handle them just for the IQ10 (which we don't have real support for anyway). This (of course) fixes the vrp13 regression. But it also fixes nearly a thousand execution test failures in the testsuite (Yow!). gcc/ PR target/104987 * config/iq2000/iq2000.md (bbi): New attribute, default to no. (delay slot descripts): Use different delay slot description when the insn as the "bbi" attribute. (bbi, bbin patterns): Set the bbi attribute to yes.
2022-04-03i386: Fix up ix86_expand_vector_init_general [PR105123]Jakub Jelinek2-2/+24
The following testcase is miscompiled on ia32. The problem is that at -O0 we end up with: vector(4) short unsigned int _1; short unsigned int u.0_3; ... _1 = {u.0_3, u.0_3, u.0_3, u.0_3}; statement (dead) which is wrongly expanded. elt is (subreg:HI (reg:SI 83 [ u.0_3 ]) 0), tmp_mode SImode, so after convert_mode we start with word (reg:SI 83 [ u.0_3 ]). The intent is to manually broadcast that value to 2 SImode parts, but because we pass word as target to expand_simple_binop, it will overwrite (reg:SI 83 [ u.0_3 ]) and we end up with 0: 10: {r83:SI=r83:SI<<0x10;clobber flags:CC;} 11: {r83:SI=r83:SI|r83:SI;clobber flags:CC;} 12: {r83:SI=r83:SI<<0x10;clobber flags:CC;} 13: {r83:SI=r83:SI|r83:SI;clobber flags:CC;} 14: clobber r110:V4HI 15: r110:V4HI#0=r83:SI 16: r110:V4HI#4=r83:SI as the two ors do nothing and two shifts each by 16 left shift it all away. The following patch fixes that by using NULL_RTX target, so we expand it as 10: {r110:SI=r83:SI<<0x10;clobber flags:CC;} 11: {r111:SI=r110:SI|r83:SI;clobber flags:CC;} 12: {r112:SI=r83:SI<<0x10;clobber flags:CC;} 13: {r113:SI=r112:SI|r83:SI;clobber flags:CC;} 14: clobber r114:V4HI 15: r114:V4HI#0=r111:SI 16: r114:V4HI#4=r113:SI instead. Another possibility would be to pass NULL_RTX only when word == elt and word otherwise, where word would necessarily be a pseudo from the first shift after passing NULL_RTX there once or pass NULL_RTX for the shift and word for ior. 2022-04-03 Jakub Jelinek <jakub@redhat.com> PR target/105123 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): Avoid using word as target for expand_simple_binop when doing ASHIFT and IOR. * gcc.target/i386/pr105123.c: New test.
2022-04-03d: Remove Wtemplates warnings from the code generation passIain Buclaw3-14/+5
These have been superceded by the front-end's own internal tracking of instantiations, exposed by `-ftransition=templates'. gcc/d/ChangeLog: * d-lang.cc: Include dmd/template.h. (d_parse_file): Call printTemplateStats when vtemplates is set. * decl.cc (start_function): Remove OPT_Wtemplates warning. * lang.opt (Wtemplates): Remove.
2022-04-03c++: Fix ICE due to shared BLOCK node in coroutine generation [PR103328]Benno Evers2-0/+33
When finishing a function that is a coroutine, the function is transformed into a "ramp" function, and the original user-provided function body gets moved into a newly created "actor" function. In this case `current_function_decl` points to the ramp function, but `current_binding_level->blocks` would still point to the scope block of the user-provided function body in the actor function, so when the ramp function was finished during `poplevel()` in decl.cc, we could end up with that block being reused as the `DECL_INITIAL()` of the ramp function: subblocks = functionbody >= 0 ? current_binding_level->blocks : 0; // [...] DECL_INITIAL (current_function_decl) = block ? block : subblocks; This block would then be independently modified by subsequent passes touching either the ramp or the actor function, potentially causing an ICE depending on the order and function of these passes. gcc/cp/ChangeLog: PR c++/103328 * coroutines.cc (morph_fn_to_coro): Reset current_binding_level->blocks. gcc/testsuite/ChangeLog: PR c++/103328 * g++.dg/coroutines/pr103328.C: New test. Co-Authored-By: Iain Sandoe <iain@sandoe.co.uk>
2022-04-02d: Merge upstream dmd 47871363d, druntime, c52e28b7, phobos 99e9c1b77.Iain Buclaw527-1913/+2728
D front-end changes: - Import dmd v2.099.1-beta.1. - The address of NRVO variables is now stored in scoped closures when they have nested references. - Using `__traits(parameters)' in foreach loops now always returns the parameters to the function the foreach appears within. Previously, when used inside a `foreach' using an overloaded `opApply', the trait would yield the parameters to the delegate. - The deprecation period of unannotated `asm' blocks has been ended. - The `inout' attribute no longer implies the `return' attribute. - Added new `D_PreConditions', `D_PostConditions', and `D_Invariants' version identifiers. D runtime changes: - Import druntime v2.099.1-beta.1. Phobos changes: - Import phobos v2.099.1-beta.1. - `Nullable' in `std.typecons' can now act as a range. - std.experimental.logger default level changed to `info' instead of `warning'. gcc/d/ChangeLog: * dmd/MERGE: Merge upstream dmd 47871363d. * d-builtins.cc (d_init_versions): Add predefined version identifiers D_PreConditions, D_PostConditions, and D_Invariants. * d-codegen.cc (d_build_call): Update for new front-end interface. (build_frame_type): Generate reference field for NRVO variables with nested references. (build_closure): Generate assignment of return address to closure. * d-tree.h (DECL_INSTANTIATED): Use DECL_LANG_FLAG_2. (bind_expr): Remove. * decl.cc (DeclVisitor::visit (FuncDeclaration *)): Update for new front-end interface. (get_symbol_decl): Likewise. (get_decl_tree): Check DECL_LANG_FRAME_FIELD before DECL_LANG_NRVO. Dereference the field when both are set. * expr.cc (ExprVisitor::visit (DeleteExp *)): Update for new front-end interface. * modules.cc (get_internal_fn): Likewise. * toir.cc (IRVisitor::visit (ReturnStatement *)): Likewise. libphobos/ChangeLog: * libdruntime/MERGE: Merge upstream druntime c52e28b7. * libdruntime/Makefile.am (DRUNTIME_DSOURCES_OPENBSD): Add core/sys/openbsd/pwd.d. * libdruntime/Makefile.in: Regenerate. * src/MERGE: Merge upstream phobos 99e9c1b77. * testsuite/libphobos.exceptions/message_with_null.d: New test. gcc/testsuite/ChangeLog: * gdc.dg/nrvo1.d: New test.
2022-04-02mips: Fix an ICE caused by r12-7962Xi Ruoyao2-1/+12
DECL_SIZE(x) is NULL if x is a flexible array member, but I forgot to check it in r12-7962. Then if we increase the size of a struct with flexible array member (by using aligned attribute), the code will dereference NULL trying to use the "size" of the flexible array member. gcc/ * config/mips/mips.cc (mips_function_arg): Check if DECL_SIZE is NULL before dereferencing it. gcc/testsuite/ * gcc.target/mips/pr102024-4.c: New test.
2022-04-02libstdc++: Tweak source_location for clang trunk [PR105128]Jakub Jelinek1-8/+7
Apparently clang trunk implemented __builtin_source_location(), but the using __builtin_ret_type = decltype(__builtin_source_location()); which has been added for it isn't enough, they also need the std::source_location::__impl class to be defined (but incomplete seems to be good enough) before the builtin is used. The following has been tested on godbolt with clang trunk (old version fails with error: 'std::source_location::__impl' was not found; it must be defined before '__builtin_source_location' is called and some follow-up errors), getting back to just void * instead of __builtin_ret_type and commenting out using doesn't work either and just struct __impl; before using __builtin_ret_type doesn't work too. 2022-04-02 Jakub Jelinek <jakub@redhat.com> PR libstdc++/105128 * include/std/source_location (std::source_location::__impl): Move definition before using __builtin_ret_type.
2022-04-01fixed-point/composite-type: add -Wno-array-parameterAlexandre Oliva1-1/+1
On machines that support fixed-point and the test runs, it's failing because of warnings issued by -Warray-parameter=[12], enabled by -Wall. The warnings state "mismatch in bound 1 of argument 1 declared as...", referring to the redeclaration of f2_##NAME. The purpose of the redeclaration is not clear to me. It doesn't look like the test intends to catch mismatches between parameter's array lengths, despite the explicit array bound and the incompatible calls, so I'm adding -Wno-array-parameter to avoid this distraction and enable the test to pass. for gcc/testsuite/ChangeLog * gcc.dg/fixed-point/composite-type.c: Add -Wno-array-parameter.
2022-04-01c++: deducing from class type of NTTP [PR105110]Patrick Palka2-2/+16
Here when attempting to deduce T in the NTTP type A<T> from the argument type 'const A<int>', we give up due to the const: types ‘A<T>’ and ‘const A<int>’ have incompatible cv-qualifiers But since the type of an NTTP cannot be cv-qualified, it seems natural to ignore cv-qualifiers on the argument type before attempting to unify the two types. PR c++/105110 gcc/cp/ChangeLog: * pt.cc (unify) <case TEMPLATE_PARM_INDEX>: Drop cv-quals from the argument type of an NTTP before deducing from it. gcc/testsuite/ChangeLog: * g++.dg/cpp2a/nontype-class52.C: New test.
2022-04-01Regenerate gcc.potJoseph Myers1-6816/+7031
* gcc.pot: Regenerate.
2022-04-01Update gcc hr.poJoseph Myers1-91/+91
* hr.po: Update.
2022-04-01Add an assertion: the zeroed_hardregs set is a subset of all call used regs.Qing Zhao4-13/+50
We should make sure that the hard register set that is actually cleared by the target hook zero_call_used_regs should be a subset of all call used registers. At the same time, update documentation for the target hook TARGET_ZERO_CALL_USED_REGS. This new assertion identified a bug in the i386 implemenation, which incorrectly set the zeroed_hardregs for stack registers. Fixed this bug in i386 implementation. gcc/ChangeLog: 2022-04-01 Qing Zhao <qing.zhao@oracle.com> * config/i386/i386.cc (zero_all_st_registers): Return the value of num_of_st. (ix86_zero_call_used_regs): Update zeroed_hardregs set according to the return value of zero_all_st_registers. * doc/tm.texi: Update the documentation of TARGET_ZERO_CALL_USED_REGS. * function.cc (gen_call_used_regs_seq): Add an assertion. * target.def: Update the documentation of TARGET_ZERO_CALL_USED_REGS.
2022-04-01mips: Ignore zero width fields in arguments and issue -Wpsabi warning about ↵Xi Ruoyao4-4/+102
C zero-width field ABI changes [PR102024] gcc/ PR target/102024 * config/mips/mips.cc (mips_function_arg): Ignore zero-width fields, and inform if it causes a psABI change. gcc/testsuite/ PR target/102024 * gcc.target/mips/pr102024-1.c: New test. * gcc.target/mips/pr102024-2.c: New test. * gcc.target/mips/pr102024-3.c: New test.
2022-04-01mips: Emit psabi diagnostic for return values affected by C++ zero-width ↵Xi Ruoyao3-8/+104
bit-field ABI change [PR 102024] gcc/ PR target/102024 * config/mips/mips.cc (mips_fpr_return_fields): Detect C++ zero-width bit-fields and set up an indicator. (mips_return_in_msb): Adapt for mips_fpr_return_fields change. (mips_function_value_1): Diagnose when the presense of a C++ zero-width bit-field changes function returning in GCC 12. gcc/testsuite/ PR target/102024 * g++.target/mips/mips.exp: New test supporting file. * g++.target/mips/pr102024.C: New test.
2022-04-01Revert "c++: delayed parse DMI [PR96645]"Jason Merrill6-102/+7
The breakage from r12-7804 (in WebKit, particularly) is more of a can of worms than I think we can address in GCC 12, so let's return to the GCC 11 status quo for now and try again in stage 1. I think the change was correct for the current standard, but the standard needs a fix in this area; this is CWG issue 2335. PR c++/96645 This reverts commits r12-7804 and r12-7929.
2022-04-01jit: further doc fixesDavid Malcolm3-702/+1320
Further jit doc fixes, which fix links to gcc_jit_function_type_get_param_type and gcc_jit_struct_get_field. gcc/jit/ChangeLog: * docs/topics/expressions.rst: Fix formatting. * docs/topics/types.rst: Likewise. * docs/_build/texinfo/libgccjit.texi: Regenerate Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2022-04-01jit: Update docsPetter Tomner4-11/+29
Update docs concerning linking and fix formatting errors. gcc/jit/ChangeLog: * docs/topics/compatibility.rst: Add 19 tag * docs/topics/compilation.rst: Linking * docs/topics/contexts.rst: Linking example * docs/topics/expressions.rst: Fix formatting and dropped 's' Signed-off-by: Petter Tomner 2022-02-19 <tomner@kth.se>
2022-04-01libstdc++: Implement std::unreachable() for C++23 (P0627R6)Jonathan Wakely5-2/+59
This defines std::unreachable as an assertion for debug mode, a trap when _GLIBCXX_ASSERTIONS is defined, and __builtin_unreachable() otherwise. The reason for only using __builtin_trap() in the second case is to avoid the overhead of setting up a call to __glibcxx_assert_fail that should never happen. UBsan can detect if __builtin_unreachable() is executed, so if a feature test macro for that sanitizer is added, we could change just use __builtin_unreachable() when the sanitizer is enabled. While thinking about what the debug assertion failure should print, I noticed that the __glibcxx_assert_fail function doesn't check for null pointers. This adds a check so we don't try to print them if null. libstdc++-v3/ChangeLog: * include/std/utility (unreachable): Define for C++23. * include/std/version (__cpp_lib_unreachable): Define. * src/c++11/debug.cc (__glibcxx_assert_fail): Check for valid arguments. Handle only the function being given. * testsuite/20_util/unreachable/1.cc: New test. * testsuite/20_util/unreachable/version.cc: New test.
2022-04-01libstdc++: Fix mismatched noexcept-specifiers in Filesystem TSJonathan Wakely2-3/+3
The copy_file fix should have been part of r12-7063-gda72e0fd20f87b. The path::begin() fix should have been part of r12-3930-gf2b7f56a15d9cb. Thanks to Timm Bäder for reporting this one. libstdc++-v3/ChangeLog: * include/experimental/bits/fs_fwd.h (copy_file): Remove incorrect noexcept from declaration. * include/experimental/bits/fs_path.h (path::begin, path::end): Add noexcept to declarations, to match definitions.
2022-04-01[libgomp, testsuite, nvptx] Limit recursion in declare_target-{1,2}.f90Tom de Vries2-11/+27
When running testcases libgomp.fortran/examples-4/declare_target-{1,2}.f90 on an RTX A2000 (sm_86) with driver 510.60.02 and with GOMP_NVPTX_JIT=-O0 I run into: ... FAIL: libgomp.fortran/examples-4/declare_target-1.f90 -O0 \ -DGOMP_NVPTX_JIT=-O0 execution test FAIL: libgomp.fortran/examples-4/declare_target-2.f90 -O0 \ -DGOMP_NVPTX_JIT=-O0 execution test ... Fix this by further limiting recursion depth in the test-cases for nvptx. Furthermore, make the recursion depth limiting nvptx-specific. Tested on x86_64 with nvptx accelerator. libgomp/ChangeLog: 2022-04-01 Tom de Vries <tdevries@suse.de> * testsuite/libgomp.fortran/examples-4/declare_target-1.f90: Define and use REC_DEPTH. * testsuite/libgomp.fortran/examples-4/declare_target-2.f90: Same.
2022-04-01[libgomp, testsuite, nvptx] Fix dg-output test in vector-length-128-7.cTom de Vries1-1/+1
When running test-case libgomp.oacc-c-c++-common/vector-length-128-7.c on an RTX A2000 (sm_86) with driver 510.60.02 I run into: ... FAIL: libgomp.oacc-c/../libgomp.oacc-c-c++-common/vector-length-128-7.c \ -DACC_DEVICE_TYPE_nvidia=1 -DACC_MEM_SHARED=0 -foffload=nvptx-none -O0 \ output pattern test ... The failing check verifies the launch dimensions: ... /* { dg-output "nvptx_exec: kernel main\\\$_omp_fn\\\$0: \ launch gangs=1, workers=8, vectors=128" } */ ... which fails because (as we can see with GOMP_DEBUG=1) the actual num_workers is 6: ... nvptx_exec: kernel main$_omp_fn$0: launch gangs=1, workers=6, vectors=128 ... This is due to the result of cuOccupancyMaxPotentialBlockSize (which suggests 'a launch configuration with reasonable occupancy') printed just before: ... cuOccupancyMaxPotentialBlockSize: grid = 52, block = 768 ... [ Note: 6 * 128 == 768. ] Fix this by updating the check to allow num_workers in the range 1 to 8. Tested on x86_64 with nvptx accelerator. libgomp/ChangeLog: 2022-04-01 Tom de Vries <tdevries@suse.de> * testsuite/libgomp.oacc-c-c++-common/vector-length-128-7.c: Fix num_workers check.
2022-04-01libstdc++: Fix filenames in Doxygen @file commentsTimm Bäder2-2/+2
Reviewed-by: Jonathan Wakely <jwakely@redhat.com> libstdc++-v3/ChangeLog: * include/bits/fs_ops.h: Fix filename in Doxygen comment. * include/experimental/bits/fs_ops.h: Likewise.
2022-04-01phiopt: Improve value_replacement [PR104645]Jakub Jelinek2-14/+77
The following patch fixes the P1 regression by reusing existing value_replacement code. That function already has code to handle simple preparation statements (casts, and +,&,|,^ binary assignments) before a final binary assignment (which can be much wider range of ops). When we have e.g. if (y_3(D) == 0) goto <bb 4>; else goto <bb 3>; <bb 3>: y_4 = y_3(D) & 31; _1 = (int) y_4; _6 = x_5(D) r<< _1; <bb 4>: # _2 = PHI <x_5(D)(2), _6(3)> the preparation statements y_4 = y_3(D) & 31; and _1 = (int) y_4; are handled by constant evaluation, passing through y_3(D) = 0 initially and propagating that through the assignments with checking that UB isn't invoked. But the final _6 = x_5(D) r<< _1; assign is handled differently, either through neutral_element_p or absorbing_element_p. In the first function below we now have: <bb 2> [local count: 1073741824]: if (i_2(D) != 0) goto <bb 3>; [50.00%] else goto <bb 4>; [50.00%] <bb 3> [local count: 536870913]: _3 = i_2(D) & 1; iftmp.0_4 = (int) _3; <bb 4> [local count: 1073741824]: # iftmp.0_1 = PHI <iftmp.0_4(3), 0(2)> where in GCC 11 we had: <bb 2> : if (i_3(D) != 0) goto <bb 3>; [INV] else goto <bb 4>; [INV] <bb 3> : i.1_1 = (int) i_3(D); iftmp.0_5 = i.1_1 & 1; <bb 4> : # iftmp.0_2 = PHI <iftmp.0_5(3), 0(2)> Current value_replacement can handle the latter as the last stmt of middle_bb is a binary op that in this case satisfies absorbing_element_p. But the former we can't handle, as the last stmt in middle_bb is a cast. The patch makes it work in that case by pretending all of middle_bb are the preparation statements and there is no binary assign at the end, so everything is handled through the constant evaluation. We simply set at the start of middle_bb the lhs of comparison virtually to the rhs, propagate it through and at the end see if virtually the arg0 of the PHI is equal to arg1 of it. For GCC 13, I think we just should throw away all the neutral/absorbing element stuff and do the constant evaluation of the whole middle_bb and handle that way all the ops we currently handle in neutral/absorbing element. 2022-04-01 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/104645 * tree-ssa-phiopt.cc (value_replacement): If assign has CONVERT_EXPR_CODE_P rhs_code, treat it like a preparation statement with constant evaluation. * gcc.dg/tree-ssa/pr104645.c: New test.
2022-04-01testsuite: Add further zero size elt passing tests [PR102024]Jakub Jelinek2-0/+12
As discussed in PR102024, zero width bitfields might not be the only ones causing ABI issues at least on mips, zero size arrays or (in C only) zero sized (empty) structures can be problematic too. The following patch adds some coverage for it too. Tested on x86_64-linux with make check-gcc check-g++ RUNTESTFLAGS='ALT_CC_UNDER_TEST=gcc ALT_CXX_UNDER_TEST=g++ --target_board=unix\{-m32,-m64\} compat.exp=pr102024*' make check-gcc check-g++ RUNTESTFLAGS='ALT_CC_UNDER_TEST=clang ALT_CXX_UNDER_TEST=clang++ --target_board=unix\{-m32,-m64\} compat.exp=pr102024*' with gcc/g++ 10.3 and clang 11. Everything but (expectedly) FAIL: gcc.dg/compat/pr102024 c_compat_x_tst.o-c_compat_y_alt.o execute FAIL: gcc.dg/compat/pr102024 c_compat_x_alt.o-c_compat_y_tst.o execute for -m64 ALT_CC_UNDER_TEST=gcc passes. 2022-04-01 Jakub Jelinek <jakub@redhat.com> PR target/102024 * gcc.dg/compat/pr102024_test.h: Add further tests with zero sized structures and arrays. * g++.dg/compat/pr102024_test.h: Add further tests with zero sized arrays.
2022-04-01[nvptx, testsuite] Fix gcc.target/nvptx/alias-*.c on sm_80Tom de Vries5-12/+70
When running test-cases gcc.target/nvptx/alias-*.c on target board nvptx-none-run/-misa=sm_80 we run into fails because the test-cases add -mptx=6.3, which doesn't support sm_80. Fix this by only adding -mptx=6.3 if necessary, and simplify the test-cases by using ptx_alias feature abstractions: ... /* { dg-do run { target runtime_ptx_alias } } */ /* { dg-add-options ptx_alias } */ ... Tested on nvptx. gcc/testsuite/ChangeLog: 2022-04-01 Tom de Vries <tdevries@suse.de> * gcc.target/nvptx/nvptx.exp (check_effective_target_runtime_ptx_isa_version_6_3): Rename and generalize to ... (check_effective_target_runtime_ptx_isa_version_at_least): .. this. (check_effective_target_default_ptx_isa_version_at_least) (check_effective_target_runtime_ptx_alias, add_options_for_ptx_alias): New proc. * gcc.target/nvptx/alias-1.c: Use "target runtime_ptx_alias" and "dg-add-options ptx_alias". * gcc.target/nvptx/alias-2.c: Same. * gcc.target/nvptx/alias-3.c: Same. * gcc.target/nvptx/alias-4.c: Same.
2022-04-01MIPS: IPL is 8bit in Cause and Status registers if TARGET_MCUYunQiang Su1-2/+14
If MIPS MCU extension is enable, the IPL section in Cause and Status registers has been expand to 8bit instead of 6bit. In Cause: the bits are 10-17. In Status: the bits are 10-16 and 18. MD00834-2B-MUCON-AFP-01.03.pdf: P49 and P61. gcc/ChangeLog: * config/mips/mips.cc (mips_expand_prologue): IPL is 8bit for MCU ASE.
2022-04-01MAINTAINERS: Update my email addressQian Jianhua1-1/+1
Update my email address in the MAINTAINERS file. 2022-04-01 Qian Jianhua <qianjh@fujitsu.com> ChangeLog: * MAINTAINERS: Update my email address.
2022-04-01Test for linking for arm/size-optimization-ieee-[123].cAlexandre Oliva4-3/+15
These tests require a target that supports arm soft-float. The problem is that the test checks for compile-time soft-float support, but they may hit a problem when the linker complains that it can't combine the testcase's object file with hard-float init files and target system libraries. I don't see that the tests actually require linking, and they could be simplified to dg-do assemble, but I figured a link test for soft-float support could be useful, so I added that, and adjusted the tests to require it instead. for gcc/testsuite/ChangeLog * lib/target-supports.exp (check_effective_target_arm_soft_ok_link): New. * gcc.target/arm/size-optimization-ieee-1.c: Use it. * gcc.target/arm/size-optimization-ieee-2.c: Likewise. * gcc.target/arm/size-optimization-ieee-3.c: Likewise.
2022-04-01Daily bump.GCC Administrator6-1/+154
2022-03-31rs6000: Fix some missing built-in attributes [PR104004]Bill Schmidt1-5/+5
PR104004 caught some misses on my part in converting to the new built-in function infrastructure. In particular, I forgot to mark all of the "nosoft" built-ins, and one of those should also have been marked "no32bit". 2022-01-27 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ PR target/104004 * config/rs6000/rs6000-builtins.def (MFFSL): Mark nosoft. (MTFSB0): Likewise. (MTFSB1): Likewise. (SET_FPSCR_RN): Likewise. (SET_FPSCR_DRN): Mark nosoft and no32bit.
2022-03-31runtime: support PPC32 MUSL register accessIan Lance Taylor2-1/+19
Based on patch by Sören Tempel. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/397394
2022-03-31options: Clarifications around option definition records' help textsThomas Schwinge1-0/+11
gcc/ * doc/options.texi (Option file format): Clarifications around option definition records' help texts.
2022-03-31options: Fix "Multiple different help strings" error diagnosticThomas Schwinge1-2/+5
This currently causes a confusing litany, for example: options.cc:3245:2: error: #error Multiple different help strings for Wunused-result: #error Multiple different help strings for Wunused-result: ^ options.cc:3246:2: error: 'Warn' was not declared in this scope Warn if a caller of a function, marked with attribute warn_unused_result, does not use its return value. ^ options.cc:3246:7: error: expected '}' before 'if' Warn if a caller of a function, marked with attribute warn_unused_result, does not use its return value. ^ options.cc:3246:7: error: expected ',' or ';' before 'if' options.cc:3256:54: error: expected unqualified-id before ',' token (unsigned short) -1, 0, CLVC_INTEGER, 0, -1, -1 }, ^ [going on for several thousands of lines] Fixed: options.cc:3245:2: error: #error Multiple different help strings for Wunused-result: #error Multiple different help strings for Wunused-result: ^ options.cc:3246:2: error: #error Warn if a caller of a function, marked with attribute warn_unused_result, does not use its return value. #error Warn if a caller of a function, marked with attribute warn_unused_result, does not use its return value. ^ options.cc:3247:2: error: #error TEST. #error TEST. ^ Fix-up for r187437/commit 71caddc5568f59a5990f39226f60979a7fe953ef "optc-gen.awk: Error instead of warning for conflicting help". gcc/ * optc-gen.awk <END>: Fix "Multiple different help strings" error diagnostic.
2022-03-31contrib: Fix up spelling of loongarch-str.h dependency [PR105114]Jakub Jelinek1-1/+1
As found by Joseph, the dependency of gcc/config/loongarch/loongarch-str.h is spelled incorrectly, it should be gcc/config/loongarch/genopts/loongarch-strings but was using gcc/config/loongarch/genopts/loongarch-string 2022-03-31 Jakub Jelinek <jakub@redhat.com> Joseph Myers <joseph@codesourcery.com> PR other/105114 * gcc_update: Fix up spelling of gcc/config/loongarch/genopts/loongarch-strings dependency.
2022-03-31aarch64: Implement determine_suggested_unroll_factorAndre Vieira3-2/+97
This patch implements the costing function determine_suggested_unroll_factor for aarch64. It determines the unrolling factor by dividing the number of X operations we can do per cycle by the number of X operations, taking this information from the vec_ops analysis during vector costing and the available issue_info information. We multiply the dividend by a potential reduction_latency, to improve our pipeline utilization if we are stalled waiting on a particular reduction operation. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_vector_costs): Define determine_suggested_unroll_factor and m_has_avg. (determine_suggested_unroll_factor): New function. (aarch64_vector_costs::add_stmt_cost): Check for a qualifying pattern to set m_nosve_pattern. (aarch64_vector_costs::finish_costs): Use determine_suggested_unroll_factor. * config/aarch64/aarch64.opt (aarch64-vect-unroll-limit): New. * doc/invoke.texi: (aarch64-vect-unroll-limit): Document new option.
2022-03-31ipa: Careful processing ANCESTOR jump functions and NULL pointers (PR 103083)Martin Jambor5-29/+137
IPA_JF_ANCESTOR jump functions are constructed also when the formal parameter of the caller is first checked whether it is NULL and left as it is if it is NULL, to accommodate C++ casts to an ancestor class. The jump function type was invented for devirtualization and IPA-CP propagation of tree constants is also careful to apply it only to existing DECLs(*) but as PR 103083 shows, the part propagating "known bits" was not careful about this, which can lead to miscompilations. This patch introduces a flag to the ancestor jump functions which tells whether a NULL-check was elided when creating it and makes the bits propagation behave accordingly, masking any bits otherwise would be known to be one. This should safely preserve alignment info, which is the primary ifnormation that we keep in bits for pointers. (*) There still may remain problems when a DECL resides on address zero (with -fno-delete-null-pointer-checks ...I hope it cannot happen otherwise). I am looking into that now but I think it will be easier for everyone if I do so in a follow-up patch. gcc/ChangeLog: 2022-02-11 Martin Jambor <mjambor@suse.cz> PR ipa/103083 * ipa-prop.h (ipa_ancestor_jf_data): New flag keep_null; (ipa_get_jf_ancestor_keep_null): New function. * ipa-prop.cc (ipa_set_ancestor_jf): Initialize keep_null field of the ancestor function. (compute_complex_assign_jump_func): Pass false to keep_null parameter of ipa_set_ancestor_jf. (compute_complex_ancestor_jump_func): Pass true to keep_null parameter of ipa_set_ancestor_jf. (update_jump_functions_after_inlining): Carry over keep_null from the original ancestor jump-function or merge them. (ipa_write_jump_function): Stream keep_null flag. (ipa_read_jump_function): Likewise. (ipa_print_node_jump_functions_for_edge): Print the new flag. * ipa-cp.cc (class ipcp_bits_lattice): Make various getters const. New member function known_nonzero_p. (ipcp_bits_lattice::known_nonzero_p): New. (ipcp_bits_lattice::meet_with_1): New parameter drop_all_ones, observe it. (ipcp_bits_lattice::meet_with): Likewise. (propagate_bits_across_jump_function): Simplify. Pass true in drop_all_ones when it is necessary. (propagate_aggs_across_jump_function): Take care of keep_null flag. (ipa_get_jf_ancestor_result): Propagate NULL accross keep_null jump functions. gcc/testsuite/ChangeLog: 2021-11-25 Martin Jambor <mjambor@suse.cz> * gcc.dg/ipa/pr103083-1.c: New test. * gcc.dg/ipa/pr103083-2.c: Likewise.
2022-03-31libstdc++: Add comment about memalign requirementsJonathan Wakely1-0/+2
The memalign man page on Solaris and QNX lists an additional requirement for the alignment value that is not present in all implementation of that non-standard function. For both those targets we should actually be using posix_memalign anyway, so it doesn't matter. This just adds a comment making note of that fact. libstdc++-v3/ChangeLog: * libsupc++/new_opa.cc (aligned_alloc): Add comment.
2022-03-31ipa-cp: Do not create clones for values outside known value range (PR 102513)Martin Jambor2-2/+59
PR 102513 shows we emit bogus array access warnings when IPA-CP creates clones specialized for values which it deduces from arithmetic jump functions describing self-recursive calls. Those can however be avoided if we consult the IPA-VR information that the same pass also has. The patch below does that at the stage when normally values are only examined for profitability. It would be better not to create lattices describing such bogus values in the first place, however that presents an ordering problem, the pass currently propagates all information, and so both constants and VR, in no particular order when processing SCCs, and so this approach seemed much simpler. I plan to rearrange the pass so that it clones in multiple passes over the call graph (or rather the lattice dependence graph) and it feels natural to only do propagation for these kinds of recursion in the second or later passes, which would fix the issue more elegantly. gcc/ChangeLog: 2022-02-14 Martin Jambor <mjambor@suse.cz> PR ipa/102513 * ipa-cp.cc (decide_whether_version_node): Skip scalar values which do not fit the known value_range. gcc/testsuite/ChangeLog: 2022-02-14 Martin Jambor <mjambor@suse.cz> PR ipa/102513 * gcc.dg/ipa/pr102513.c: New test.
2022-03-31ipa: Create LOAD references when necessary during inlining (PR 103171)Martin Jambor5-15/+96
in r12-2523-g13586172d0b70c ipa-prop tracking of jump functions during inlining got the ability to remove ADDR references when inlining discovered that they were not necessary or turn them into LOAD references when we know that what was a function call argument passed by reference will end up as a load (one or more). Unfortunately, the code only creates the LOAD references when replacing removed ADDR references and PR 103171 showed that with some ordering of inlining, we need to add the LOAD reference before we know we can remove the ADDR one - or the reference will be lost, leading to link errors or even ICEs. Specifically in testcase gcc.dg/lto/pr103171_1.c added in this patch, if foo() is inlined to entry(), we need to create the LOAD reference so that when later bar() is inlined into foo() and we discover that the paameter is unused, we can remove the ADDR reference and still keep the varaible around for the load. Martin gcc/ChangeLog: 2022-01-28 Martin Jambor <mjambor@suse.cz> PR ipa/103171 * ipa-prop.cc (propagate_controlled_uses): Add a LOAD reference always when an ADDR_EXPR constant is known to reach a load because of inlining, not just when removing an ADDR reference. gcc/testsuite/ChangeLog: 2022-01-28 Martin Jambor <mjambor@suse.cz> PR ipa/103171 * gcc.dg/ipa/remref-6.c: Adjust dump scan string. * gcc.dg/ipa/remref-7.c: New test. * gcc.dg/lto/pr103171_0.c: New test. * gcc.dg/lto/pr103171_1.c: Likewise.
2022-03-31[nvptx, testsuite] Fix typo in gcc.target/nvptx/march.cTom de Vries1-1/+1
The dg-options line in gcc.target/nvptx/march.c: ... /* { dg-options "-march=sm_30"} */ ... currently doesn't have any effect because it's missing a space between '"' and '}'. Fix this by adding the missing space. Tested on nvptx. gcc/testsuite/ChangeLog: 2022-03-31 Tom de Vries <tdevries@suse.de> * gcc.target/nvptx/march.c: Add missing space in dg-options line.
2022-03-31tree-optimization/105109 - bogus uninit diagnostic with _ComplexRichard Biener2-0/+16
When update_address_taken rewrites a _Complex into SSA it changes stores to real/imaginary parts to loads of the other component and a COMPLEX_EXPR. That matches what gimplification does but it misses suppression of diagnostics for the load of the other component. The following patch adds that, syncing up gimplification and update_address_taken behavior. 2022-03-31 Richard Biener <rguenther@suse.de> PR tree-optimization/105109 * tree-ssa.cc (execute_update_addresses_taken): Suppress diagnostics on the load of the other complex component. * gcc.dg/uninit-pr105109.c: New testcase.
2022-03-31[nvptx] Fix ASM_SPEC workaround for sm_30Tom de Vries1-4/+18
Newer versions of CUDA no longer support sm_30, and nvptx-tools as currently doesn't handle that gracefully when verifying ( https://github.com/MentorEmbedded/nvptx-tools/issues/30 ). There's a --no-verify work-around in place in ASM_SPEC, but that one doesn't work when using -Wa,--verify on the command line. Use a more robust workaround: verify using sm_35 when misa=sm_30 is specified (either implicitly or explicitly). Tested on nvptx. gcc/ChangeLog: 2022-03-30 Tom de Vries <tdevries@suse.de> * config/nvptx/nvptx.h (ASM_SPEC): Use "-m sm_35" for -misa=sm_30.
2022-03-31rtl-optimization/105091 - wrong DSE with missed TREE_ADDRESSABLERichard Biener1-1/+2
When expanding an aggregate copy into a memcpy call RTL expansion uses mark_addressable to ensure the base object is addressable but that function doesn't handle TARGET_MEM_REF bases. Fixed as follows. 2022-03-31 Richard Biener <rguenther@suse.de> PR rtl-optimization/105091 * gimple-expr.cc (mark_addressable): Handle TARGET_MEM_REF bases.